SE_NATIVE) return _mm_rcp_ps(a); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4_t recip = vrecpeq_f32(a_.neon_f32); #if SIMDE_ACCURACY_PREFERENCE > 0 for (int i = 0; i < SIMDE_ACCURACY_PREFERENCE ; ++i) { recip = vmulq_f32(recip, vrecpsq_f32(recip, a_.neon_f32)); } #endif r_.neon_f32 = recip; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_div(simde_mm_set1_ps(1.0f), a_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_f32 = vec_re(a_.altivec_f32); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_f32 = __lsx_vfrecip_s(a_.lsx_f32); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.f32 = 1.0f / a_.f32; #elif defined(SIMDE_IEEE754_STORAGE) /* https://stackoverflow.com/questions/12227126/division-as-multiply-and-lut-fast-float-division-reciprocal/12228234#12228234 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { int32_t ix; simde_float32 fx = a_.f32[i]; simde_memcpy(&ix, &fx, sizeof(ix)); int32_t x = INT32_C(0x7EF311C3) - ix; simde_float32 temp; simde_memcpy(&temp, &x, sizeof(temp)); r_.f32[i] = temp * (SIMDE_FLOAT32_C(2.0) - temp * fx); } #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = 1.0f / a_.f32[i]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_rcp_ps(a) simde_mm_rcp_ps((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_rcp_ss (simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_rcp_ss(a); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_rcp_ps(a)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_rcp_ps(simde_x_mm_broadcastlow_ps(a))); #else simde__m128_private r_, a_ = simde__m128_to_private(a); r_.f32[0] = 1.0f / a_.f32[0]; r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[3]; return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_rcp_ss(a) simde_mm_rcp_ss((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_rsqrt_ps (simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_rsqrt_ps(a); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_f32 = vrsqrteq_f32(a_.neon_f32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_f32 = vec_rsqrte(a_.altivec_f32); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_f32 = __lsx_vfrsqrt_s(a_.lsx_f32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_div(simde_mm_set1_ps(1.0f), wasm_f32x4_sqrt(a_.wasm_v128)); #elif defined(SIMDE_IEEE754_STORAGE) /* https://basesandframes.files.wordpress.com/2020/04/even_faster_math_functions_green_2020.pdf Pages 100 - 103 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { #if SIMDE_ACCURACY_PREFERENCE <= 0 r_.i32[i] = INT32_C(0x5F37624F) - (a_.i32[i] >> 1); #else simde_float32 x = a_.f32[i]; simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x; int32_t ix; simde_memcpy(&ix, &x, sizeof(ix)); #if SIMDE_ACCURACY_PREFERENCE == 1 ix = INT32_C(0x5F375A82) - (ix >> 1); #else ix = INT32_C(0x5F37599E) - (ix >> 1); #endif simde_memcpy(&x, &ix, sizeof(x)); #if SIMDE_ACCURACY_PREFERENCE >= 2 x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); #endif x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); r_.f32[i] = x; #endif } #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_rsqrt_ps(a) simde_mm_rsqrt_ps((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_rsqrt_ss (simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_rsqrt_ss(a); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_rsqrt_ps(a)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_rsqrt_ps(simde_x_mm_broadcastlow_ps(a))); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_f32 = vsetq_lane_f32(vgetq_lane_f32(simde_mm_rsqrt_ps(a).neon_f32, 0), a_.neon_f32, 0); #elif defined(SIMDE_IEEE754_STORAGE) { #if SIMDE_ACCURACY_PREFERENCE <= 0 r_.i32[0] = INT32_C(0x5F37624F) - (a_.i32[0] >> 1); #else simde_float32 x = a_.f32[0]; simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x; int32_t ix; simde_memcpy(&ix, &x, sizeof(ix)); #if SIMDE_ACCURACY_PREFERENCE == 1 ix = INT32_C(0x5F375A82) - (ix >> 1); #else ix = INT32_C(0x5F37599E) - (ix >> 1); #endif simde_memcpy(&x, &ix, sizeof(x)); #if SIMDE_ACCURACY_PREFERENCE >= 2 x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); #endif x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); r_.f32[0] = x; #endif } r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[3]; #elif defined(simde_math_sqrtf) r_.f32[0] = 1.0f / simde_math_sqrtf(a_.f32[0]); r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[3]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_rsqrt_ss(a) simde_mm_rsqrt_ss((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_sad_pu8 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_sad_pu8(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint64x1_t t = vpaddl_u32(vpaddl_u16(vpaddl_u8(vabd_u8(a_.neon_u8, b_.neon_u8)))); r_.neon_u16 = vset_lane_u16(HEDLEY_STATIC_CAST(uint64_t, vget_lane_u64(t, 0)), vdup_n_u16(0), 0); #else uint16_t sum = 0; SIMDE_VECTORIZE_REDUCTION(+:sum) for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { sum += HEDLEY_STATIC_CAST(uint8_t, simde_math_abs(a_.u8[i] - b_.u8[i])); } r_.i16[0] = HEDLEY_STATIC_CAST(int16_t, sum); r_.i16[1] = 0; r_.i16[2] = 0; r_.i16[3] = 0; #endif return simde__m64_from_private(r_); #endif } #define simde_m_psadbw(a, b) simde_mm_sad_pu8(a, b) #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sad_pu8(a, b) simde_mm_sad_pu8(a, b) # define _m_psadbw(a, b) simde_mm_sad_pu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_set_ss (simde_float32 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_set_ss(a); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsetq_lane_f32(a, vdupq_n_f32(SIMDE_FLOAT32_C(0.0)), 0); #else return simde_mm_set_ps(SIMDE_FLOAT32_C(0.0), SIMDE_FLOAT32_C(0.0), SIMDE_FLOAT32_C(0.0), a); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_set_ss(a) simde_mm_set_ss(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_setr_ps (simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_setr_ps(e3, e2, e1, e0); #else return simde_mm_set_ps(e0, e1, e2, e3); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_setr_ps(e3, e2, e1, e0) simde_mm_setr_ps(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_setzero_ps (void) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_setzero_ps(); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vdupq_n_f32(SIMDE_FLOAT32_C(0.0)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_splats(SIMDE_FLOAT32_C(0.0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f32x4_const(0.f, 0.f, 0.f, 0.f); #else simde__m128 r; simde_memset(&r, 0, sizeof(r)); return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_setzero_ps() simde_mm_setzero_ps() #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_undefined_ps (void) { simde__m128_private r_; #if defined(SIMDE_HAVE_UNDEFINED128) r_.n = _mm_undefined_ps(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m128_to_private(simde_mm_setzero_ps()); #endif return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_undefined_ps() simde_mm_undefined_ps() #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_POP #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_x_mm_setone_ps (void) { simde__m128 t = simde_mm_setzero_ps(); return simde_mm_cmpeq_ps(t, t); } SIMDE_FUNCTION_ATTRIBUTES void simde_mm_sfence (void) { /* TODO: Use Hedley. */ #if defined(SIMDE_X86_SSE_NATIVE) _mm_sfence(); #elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 7)) __atomic_thread_fence(__ATOMIC_SEQ_CST); #elif !defined(__INTEL_COMPILER) && defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L) && !defined(__STDC_NO_ATOMICS__) #if defined(__GNUC__) && (__GNUC__ == 4) && (__GNUC_MINOR__ < 9) __atomic_thread_fence(__ATOMIC_SEQ_CST); #else atomic_thread_fence(memory_order_seq_cst); #endif #elif defined(_MSC_VER) MemoryBarrier(); #elif HEDLEY_HAS_EXTENSION(c_atomic) __c11_atomic_thread_fence(__ATOMIC_SEQ_CST); #elif defined(__GNUC__) && ((__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1)) __sync_synchronize(); #elif defined(_OPENMP) #pragma omp critical(simde_mm_sfence_) { } #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sfence() simde_mm_sfence() #endif #define SIMDE_MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w)) #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _MM_SHUFFLE(z, y, x, w) SIMDE_MM_SHUFFLE(z, y, x, w) #endif #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI) # define simde_mm_shuffle_pi16(a, imm8) _mm_shuffle_pi16(a, imm8) #elif defined(SIMDE_SHUFFLE_VECTOR_) # define simde_mm_shuffle_pi16(a, imm8) (__extension__ ({ \ const simde__m64_private simde_tmp_a_ = simde__m64_to_private(a); \ simde__m64_from_private((simde__m64_private) { .i16 = \ SIMDE_SHUFFLE_VECTOR_(16, 8, \ (simde_tmp_a_).i16, \ (simde_tmp_a_).i16, \ (((imm8) ) & 3), \ (((imm8) >> 2) & 3), \ (((imm8) >> 4) & 3), \ (((imm8) >> 6) & 3)) }); })) #else SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_shuffle_pi16 (simde__m64 a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m64_private r_; simde__m64_private a_ = simde__m64_to_private(a); for (size_t i = 0 ; i < sizeof(r_.i16) / sizeof(r_.i16[0]) ; i++) { r_.i16[i] = a_.i16[(imm8 >> (i * 2)) & 3]; } HEDLEY_DIAGNOSTIC_PUSH #if HEDLEY_HAS_WARNING("-Wconditional-uninitialized") # pragma clang diagnostic ignored "-Wconditional-uninitialized" #endif return simde__m64_from_private(r_); HEDLEY_DIAGNOSTIC_POP } #endif #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI) # define simde_m_pshufw(a, imm8) _m_pshufw(a, imm8) #else # define simde_m_pshufw(a, imm8) simde_mm_shuffle_pi16(a, imm8) #endif #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_shuffle_pi16(a, imm8) simde_mm_shuffle_pi16(a, imm8) # define _m_pshufw(a, imm8) simde_mm_shuffle_pi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_shuffle_ps (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); r_.f32[0] = a_.f32[(imm8 >> 0) & 3]; r_.f32[1] = a_.f32[(imm8 >> 2) & 3]; r_.f32[2] = b_.f32[(imm8 >> 4) & 3]; r_.f32[3] = b_.f32[(imm8 >> 6) & 3]; return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE_NATIVE) && !defined(__PGI) # define simde_mm_shuffle_ps(a, b, imm8) _mm_shuffle_ps(a, b, imm8) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_shuffle_ps(a, b, imm8) (__extension__ ({ \ simde__m128_from_private((simde__m128_private) { .wasm_v128 = \ wasm_i32x4_shuffle( \ simde__m128_to_private(a).wasm_v128, \ simde__m128_to_private(b).wasm_v128, \ (((imm8) ) & 3), \ (((imm8) >> 2) & 3), \ (((imm8) >> 4) & 3) + 4, \ (((imm8) >> 6) & 3) + 4) }); })) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm_shuffle_ps(a, b, imm8) \ (__extension__({ \ float32x4_t simde_mm_shuffle_ps_a_ = simde__m128_to_neon_f32(a); \ float32x4_t simde_mm_shuffle_ps_b_ = simde__m128_to_neon_f32(b); \ float32x4_t simde_mm_shuffle_ps_r_; \ \ simde_mm_shuffle_ps_r_ = vmovq_n_f32(vgetq_lane_f32(simde_mm_shuffle_ps_a_, (imm8) & (0x3))); \ simde_mm_shuffle_ps_r_ = vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_a_, ((imm8) >> 2) & 0x3), simde_mm_shuffle_ps_r_, 1); \ simde_mm_shuffle_ps_r_ = vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_b_, ((imm8) >> 4) & 0x3), simde_mm_shuffle_ps_r_, 2); \ vsetq_lane_f32(vgetq_lane_f32(simde_mm_shuffle_ps_b_, ((imm8) >> 6) & 0x3), simde_mm_shuffle_ps_r_, 3); \ })) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_shuffle_ps(a, b, imm8) (__extension__ ({ \ simde__m128_from_private((simde__m128_private) { .f32 = \ SIMDE_SHUFFLE_VECTOR_(32, 16, \ simde__m128_to_private(a).f32, \ simde__m128_to_private(b).f32, \ (((imm8) ) & 3), \ (((imm8) >> 2) & 3), \ (((imm8) >> 4) & 3) + 4, \ (((imm8) >> 6) & 3) + 4) }); })) #endif #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_shuffle_ps(a, b, imm8) simde_mm_shuffle_ps((a), (b), imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_sqrt_ps (simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_sqrt_ps(a); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vsqrtq_f32(a_.neon_f32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4_t est = vrsqrteq_f32(a_.neon_f32); for (int i = 0 ; i <= SIMDE_ACCURACY_PREFERENCE ; i++) { est = vmulq_f32(vrsqrtsq_f32(vmulq_f32(a_.neon_f32, est), est), est); } r_.neon_f32 = vmulq_f32(a_.neon_f32, est); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_sqrt(a_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_14_NATIVE) r_.altivec_f32 = vec_sqrt(a_.altivec_f32); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_f32 = __lsx_vfsqrt_s(a_.lsx_f32); #elif defined(simde_math_sqrt) SIMDE_VECTORIZE for (size_t i = 0 ; i < sizeof(r_.f32) / sizeof(r_.f32[0]) ; i++) { r_.f32[i] = simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sqrt_ps(a) simde_mm_sqrt_ps((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_sqrt_ss (simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_sqrt_ss(a); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_sqrt_ps(a)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_sqrt_ps(simde_x_mm_broadcastlow_ps(a))); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32_t value = vgetq_lane_f32(simde__m128_to_private(simde_mm_sqrt_ps(a)).neon_f32, 0); r_.neon_f32 = vsetq_lane_f32(value, a_.neon_f32, 0); #elif defined(simde_math_sqrtf) r_.f32[0] = simde_math_sqrtf(a_.f32[0]); r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[3]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sqrt_ss(a) simde_mm_sqrt_ss((a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store_ps (simde_float32 mem_addr[4], simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_store_ps(mem_addr, a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_f32(mem_addr, a_.neon_f32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) vec_st(a_.altivec_f32, 0, mem_addr); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(mem_addr, a_.wasm_v128); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) __lsx_vst(a_.lsx_f32, mem_addr, 0); #else simde_memcpy(mem_addr, &a_, sizeof(a)); #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_store_ps(mem_addr, a) simde_mm_store_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store1_ps (simde_float32 mem_addr[4], simde__m128 a) { simde_float32* mem_addr_ = SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128); #if defined(SIMDE_X86_SSE_NATIVE) _mm_store_ps1(mem_addr_, a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_f32(mem_addr_, vdupq_lane_f32(vget_low_f32(a_.neon_f32), 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(mem_addr_, wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0, 0, 0)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) vec_st(vec_splat(a_.altivec_f32, 0), 0, mem_addr_); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) __lsx_vst(__lsx_vreplvei_w(a_.lsx_f32, 0), mem_addr_, 0); #elif defined(SIMDE_SHUFFLE_VECTOR_) simde__m128_private tmp_; tmp_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 0, 0); simde_mm_store_ps(mem_addr_, tmp_.f32); #else SIMDE_VECTORIZE_ALIGNED(mem_addr_:16) for (size_t i = 0 ; i < sizeof(a_.f32) / sizeof(a_.f32[0]) ; i++) { mem_addr_[i] = a_.f32[0]; } #endif #endif } #define simde_mm_store_ps1(mem_addr, a) simde_mm_store1_ps(mem_addr, a) #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_store_ps1(mem_addr, a) simde_mm_store1_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) # define _mm_store1_ps(mem_addr, a) simde_mm_store1_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store_ss (simde_float32* mem_addr, simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_store_ss(mem_addr, a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_lane_f32(mem_addr, a_.neon_f32, 0); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) __lsx_vstelm_w(a_.lsx_f32, mem_addr, 0, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store32_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0); #else *mem_addr = a_.f32[0]; #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_store_ss(mem_addr, a) simde_mm_store_ss(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeh_pi (simde__m64* mem_addr, simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_storeh_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_f32(HEDLEY_REINTERPRET_CAST(float32_t*, mem_addr), vget_high_f32(a_.neon_f32)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 1); #else simde_memcpy(mem_addr, &(a_.m64[1]), sizeof(a_.m64[1])); #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_storeh_pi(mem_addr, a) simde_mm_storeh_pi(mem_addr, (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storel_pi (simde__m64* mem_addr, simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_storel_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) simde__m128_private a_ = simde__m128_to_private(a); wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0); #else simde__m64_private* dest_ = HEDLEY_REINTERPRET_CAST(simde__m64_private*, mem_addr); simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) dest_->neon_f32 = vget_low_f32(a_.neon_f32); #else dest_->f32[0] = a_.f32[0]; dest_->f32[1] = a_.f32[1]; #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_storel_pi(mem_addr, a) simde_mm_storel_pi(mem_addr, (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storer_ps (simde_float32 mem_addr[4], simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_storer_ps(mem_addr, a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) vec_st(vec_reve(a_.altivec_f32), 0, mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4_t tmp = vrev64q_f32(a_.neon_f32); vst1q_f32(mem_addr, vextq_f32(tmp, tmp, 2)); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) __lsx_vst(__lsx_vshuf4i_w(a_.lsx_f32, 0x1b), mem_addr, 0); #elif defined(SIMDE_SHUFFLE_VECTOR_) a_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 3, 2, 1, 0); simde_mm_store_ps(mem_addr, simde__m128_from_private(a_)); #else SIMDE_VECTORIZE_ALIGNED(mem_addr:16) for (size_t i = 0 ; i < sizeof(a_.f32) / sizeof(a_.f32[0]) ; i++) { mem_addr[i] = a_.f32[((sizeof(a_.f32) / sizeof(a_.f32[0])) - 1) - i]; } #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_storer_ps(mem_addr, a) simde_mm_storer_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_ps (simde_float32 mem_addr[4], simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_storeu_ps(mem_addr, a); #else simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_f32(mem_addr, a_.neon_f32); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) vec_vsx_st(a_.altivec_f32, 0, mem_addr); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) __lsx_vst(a_.lsx_f32, mem_addr, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(mem_addr, a_.wasm_v128); #else simde_memcpy(mem_addr, &a_, sizeof(a_)); #endif #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_storeu_ps(mem_addr, a) simde_mm_storeu_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_sub_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_sub_ps(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_f32 = vsubq_f32(a_.neon_f32, b_.neon_f32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_sub(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_f32 = vec_sub(a_.altivec_f32, b_.altivec_f32); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_f32 = __lsx_vfsub_s(a_.lsx_f32, b_.lsx_f32); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f32 = a_.f32 - b_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i] - b_.f32[i]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sub_ps(a, b) simde_mm_sub_ps((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_sub_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_sub_ss(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_sub_ps(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_sub_ps(simde_x_mm_broadcastlow_ps(a), simde_x_mm_broadcastlow_ps(b))); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); r_.f32[0] = a_.f32[0] - b_.f32[0]; r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[3]; return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_sub_ss(a, b) simde_mm_sub_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomieq_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomieq_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); uint32x4_t a_eq_b = vceqq_f32(a_.neon_f32, b_.neon_f32); r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_eq_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) == wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] == b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] == b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomieq_ss(a, b) simde_mm_ucomieq_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomige_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomige_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); uint32x4_t a_ge_b = vcgeq_f32(a_.neon_f32, b_.neon_f32); r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_ge_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) >= wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] >= b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] >= b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomige_ss(a, b) simde_mm_ucomige_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomigt_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomigt_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); uint32x4_t a_gt_b = vcgtq_f32(a_.neon_f32, b_.neon_f32); r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_gt_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) > wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] > b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] > b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomigt_ss(a, b) simde_mm_ucomigt_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomile_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomile_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); uint32x4_t a_le_b = vcleq_f32(a_.neon_f32, b_.neon_f32); r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_le_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) <= wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] <= b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] <= b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomile_ss(a, b) simde_mm_ucomile_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomilt_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomilt_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); uint32x4_t a_lt_b = vcltq_f32(a_.neon_f32, b_.neon_f32); r = !!(vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_lt_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) < wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] < b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] < b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomilt_ss(a, b) simde_mm_ucomilt_ss((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomineq_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_ucomineq_ss(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t a_not_nan = vceqq_f32(a_.neon_f32, a_.neon_f32); uint32x4_t b_not_nan = vceqq_f32(b_.neon_f32, b_.neon_f32); uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); uint32x4_t a_neq_b = vmvnq_u32(vceqq_f32(a_.neon_f32, b_.neon_f32)); r = !!(vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_neq_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = wasm_f32x4_extract_lane(a_.wasm_v128, 0) != wasm_f32x4_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f32[0] != b_.f32[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f32[0] != b_.f32[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_ucomineq_ss(a, b) simde_mm_ucomineq_ss((a), (b)) #endif #if defined(SIMDE_X86_SSE_NATIVE) # if defined(__has_builtin) # if __has_builtin(__builtin_ia32_undef128) # define SIMDE_HAVE_UNDEFINED128 # endif # elif !defined(__PGI) && !defined(SIMDE_BUG_GCC_REV_208793) && !defined(_MSC_VER) # define SIMDE_HAVE_UNDEFINED128 # endif #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_unpackhi_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_unpackhi_ps(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vzip2q_f32(a_.neon_f32, b_.neon_f32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x2_t a1 = vget_high_f32(a_.neon_f32); float32x2_t b1 = vget_high_f32(b_.neon_f32); float32x2x2_t result = vzip_f32(a1, b1); r_.neon_f32 = vcombine_f32(result.val[0], result.val[1]); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_i64 = __lsx_vilvh_w(b_.lsx_i64, a_.lsx_i64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 6, 3, 7); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 2, 6, 3, 7); #else r_.f32[0] = a_.f32[2]; r_.f32[1] = b_.f32[2]; r_.f32[2] = a_.f32[3]; r_.f32[3] = b_.f32[3]; #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_unpackhi_ps(a, b) simde_mm_unpackhi_ps((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_unpacklo_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE_NATIVE) return _mm_unpacklo_ps(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vzip1q_f32(a_.neon_f32, b_.neon_f32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_f32 = vec_mergeh(a_.altivec_f32, b_.altivec_f32); #elif defined(SIMDE_LOONGARCH_LSX_NATIVE) r_.lsx_i64 = __lsx_vilvl_w(b_.lsx_i64, a_.lsx_i64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 4, 1, 5); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x2_t a1 = vget_low_f32(a_.neon_f32); float32x2_t b1 = vget_low_f32(b_.neon_f32); float32x2x2_t result = vzip_f32(a1, b1); r_.neon_f32 = vcombine_f32(result.val[0], result.val[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 0, 4, 1, 5); #else r_.f32[0] = a_.f32[0]; r_.f32[1] = b_.f32[0]; r_.f32[2] = a_.f32[1]; r_.f32[3] = b_.f32[1]; #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_unpacklo_ps(a, b) simde_mm_unpacklo_ps((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_pi (simde__m64* mem_addr, simde__m64 a) { #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) _mm_stream_pi(HEDLEY_REINTERPRET_CAST(__m64*, mem_addr), a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \ defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_MIPS_LOONGSON_MMI_NATIVE) || \ defined(SIMDE_VECTOR_SUBSCRIPT)) __builtin_nontemporal_store(a, mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde__m64_private a_ = simde__m64_to_private(a); vst1_s64(HEDLEY_REINTERPRET_CAST(int64_t *, mem_addr), a_.neon_i64); #else simde__m64_private* dest = HEDLEY_REINTERPRET_CAST(simde__m64_private*, mem_addr), a_ = simde__m64_to_private(a); dest->i64[0] = a_.i64[0]; #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_stream_pi(mem_addr, a) simde_mm_stream_pi(mem_addr, (a)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_ps (simde_float32 mem_addr[4], simde__m128 a) { #if defined(SIMDE_X86_SSE_NATIVE) _mm_stream_ps(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \ defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_VECTOR_SUBSCRIPT) || \ defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \ defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) || defined(SIMDE_LOONGARCH_LSX_NATIVE)) __builtin_nontemporal_store(a, SIMDE_ALIGN_ASSUME_CAST(__typeof__(a)*, mem_addr)); #else simde_mm_store_ps(mem_addr, a); #endif } #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _mm_stream_ps(mem_addr, a) simde_mm_stream_ps(SIMDE_CHECKED_REINTERPRET_CAST(float*, simde_float32*, mem_addr), (a)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3) \ do { \ float32x4x2_t SIMDE_MM_TRANSPOSE4_PS_ROW01 = vtrnq_f32(row0, row1); \ float32x4x2_t SIMDE_MM_TRANSPOSE4_PS_ROW23 = vtrnq_f32(row2, row3); \ row0 = vcombine_f32(vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[0]), \ vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[0])); \ row1 = vcombine_f32(vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[1]), \ vget_low_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[1])); \ row2 = vcombine_f32(vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[0]), \ vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[0])); \ row3 = vcombine_f32(vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW01.val[1]), \ vget_high_f32(SIMDE_MM_TRANSPOSE4_PS_ROW23.val[1])); \ } while (0) #else #define SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3) \ do { \ simde__m128 SIMDE_MM_TRANSPOSE4_PS_tmp3, SIMDE_MM_TRANSPOSE4_PS_tmp2, SIMDE_MM_TRANSPOSE4_PS_tmp1, SIMDE_MM_TRANSPOSE4_PS_tmp0; \ SIMDE_MM_TRANSPOSE4_PS_tmp0 = simde_mm_unpacklo_ps((row0), (row1)); \ SIMDE_MM_TRANSPOSE4_PS_tmp2 = simde_mm_unpacklo_ps((row2), (row3)); \ SIMDE_MM_TRANSPOSE4_PS_tmp1 = simde_mm_unpackhi_ps((row0), (row1)); \ SIMDE_MM_TRANSPOSE4_PS_tmp3 = simde_mm_unpackhi_ps((row2), (row3)); \ row0 = simde_mm_movelh_ps(SIMDE_MM_TRANSPOSE4_PS_tmp0, SIMDE_MM_TRANSPOSE4_PS_tmp2); \ row1 = simde_mm_movehl_ps(SIMDE_MM_TRANSPOSE4_PS_tmp2, SIMDE_MM_TRANSPOSE4_PS_tmp0); \ row2 = simde_mm_movelh_ps(SIMDE_MM_TRANSPOSE4_PS_tmp1, SIMDE_MM_TRANSPOSE4_PS_tmp3); \ row3 = simde_mm_movehl_ps(SIMDE_MM_TRANSPOSE4_PS_tmp3, SIMDE_MM_TRANSPOSE4_PS_tmp1); \ } while (0) #endif #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES) # define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) SIMDE_MM_TRANSPOSE4_PS(row0, row1, row2, row3) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE_H) */ /* :: End simde/simde/x86/sse.h :: */ #if !defined(SIMDE_X86_AVX_H) #define SIMDE_X86_AVX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/x86/sse4.2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2017 Evan Nemerson * 2020 Hidayat Khan */ #if !defined(SIMDE_X86_SSE4_2_H) #define SIMDE_X86_SSE4_2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/x86/sse4.1.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2017-2020 Evan Nemerson */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #if !defined(SIMDE_X86_SSE4_1_H) #define SIMDE_X86_SSE4_1_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/x86/ssse3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2017-2020 Evan Nemerson */ #if !defined(SIMDE_X86_SSSE3_H) #define SIMDE_X86_SSSE3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/x86/sse3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2017-2020 Evan Nemerson */ #if !defined(SIMDE_X86_SSE3_H) #define SIMDE_X86_SSE3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/x86/sse2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2017-2020 Evan Nemerson * 2015-2017 John W. Ratcliff * 2015 Brandon Rowlett * 2015 Ken Fast * 2017 Hasindu Gamaarachchi * 2018 Jeff Daily */ #if !defined(SIMDE_X86_SSE2_H) #define SIMDE_X86_SSE2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ typedef union { #if defined(SIMDE_VECTOR_SUBSCRIPT) SIMDE_ALIGN_TO_16 int8_t i8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int16_t i16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int32_t i32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int64_t i64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint8_t u8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint16_t u16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint32_t u32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint64_t u64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_16 simde_int128 i128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 simde_uint128 u128 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #endif #if defined(SIMDE_FLOAT16_VECTOR) SIMDE_ALIGN_TO_16 simde_float16 f16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_16 simde_float16 f16[8]; #endif SIMDE_ALIGN_TO_16 simde_float32 f32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 simde_float64 f64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int_fast32_t i32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint_fast32_t u32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_16 int8_t i8[16]; SIMDE_ALIGN_TO_16 int16_t i16[8]; SIMDE_ALIGN_TO_16 int32_t i32[4]; SIMDE_ALIGN_TO_16 int64_t i64[2]; SIMDE_ALIGN_TO_16 uint8_t u8[16]; SIMDE_ALIGN_TO_16 uint16_t u16[8]; SIMDE_ALIGN_TO_16 uint32_t u32[4]; SIMDE_ALIGN_TO_16 uint64_t u64[2]; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_16 simde_int128 i128[1]; SIMDE_ALIGN_TO_16 simde_uint128 u128[1]; #endif SIMDE_ALIGN_TO_16 simde_float16 f16[8]; SIMDE_ALIGN_TO_16 simde_float32 f32[4]; SIMDE_ALIGN_TO_16 simde_float64 f64[2]; SIMDE_ALIGN_TO_16 int_fast32_t i32f[16 / sizeof(int_fast32_t)]; SIMDE_ALIGN_TO_16 uint_fast32_t u32f[16 / sizeof(uint_fast32_t)]; #endif SIMDE_ALIGN_TO_16 simde__m64_private m64_private[2]; SIMDE_ALIGN_TO_16 simde__m64 m64[2]; #if defined(SIMDE_X86_SSE2_NATIVE) SIMDE_ALIGN_TO_16 __m128i n; #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_TO_16 int8x16_t neon_i8; SIMDE_ALIGN_TO_16 int16x8_t neon_i16; SIMDE_ALIGN_TO_16 int32x4_t neon_i32; SIMDE_ALIGN_TO_16 int64x2_t neon_i64; SIMDE_ALIGN_TO_16 uint8x16_t neon_u8; SIMDE_ALIGN_TO_16 uint16x8_t neon_u16; SIMDE_ALIGN_TO_16 uint32x4_t neon_u32; SIMDE_ALIGN_TO_16 uint64x2_t neon_u64; #if defined(__ARM_FP16_FORMAT_IEEE) SIMDE_ALIGN_TO_16 float16x8_t neon_f16; #endif SIMDE_ALIGN_TO_16 float32x4_t neon_f32; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_ALIGN_TO_16 float64x2_t neon_f64; #endif #elif defined(SIMDE_MIPS_MSA_NATIVE) v16i8 msa_i8; v8i16 msa_i16; v4i32 msa_i32; v2i64 msa_i64; v16u8 msa_u8; v8u16 msa_u16; v4u32 msa_u32; v2u64 msa_u64; #elif defined(SIMDE_WASM_SIMD128_NATIVE) SIMDE_ALIGN_TO_16 v128_t wasm_v128; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char) altivec_i8; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short) altivec_i16; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32; #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__INT_FAST32_TYPE__) altivec_i32f; #else SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32f; #endif SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) altivec_u8; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) altivec_u16; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32; #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__UINT_FAST32_TYPE__) altivec_u32f; #else SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32f; #endif SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float) altivec_f32; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long) altivec_i64; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double) altivec_f64; #endif #endif } simde__m128i_private; typedef union { #if defined(SIMDE_VECTOR_SUBSCRIPT) SIMDE_ALIGN_TO_16 int8_t i8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int16_t i16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int32_t i32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int64_t i64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint8_t u8 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint16_t u16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint32_t u32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint64_t u64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 simde_float32 f32 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 simde_float64 f64 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 int_fast32_t i32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_16 uint_fast32_t u32f SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_16 int8_t i8[16]; SIMDE_ALIGN_TO_16 int16_t i16[8]; SIMDE_ALIGN_TO_16 int32_t i32[4]; SIMDE_ALIGN_TO_16 int64_t i64[2]; SIMDE_ALIGN_TO_16 uint8_t u8[16]; SIMDE_ALIGN_TO_16 uint16_t u16[8]; SIMDE_ALIGN_TO_16 uint32_t u32[4]; SIMDE_ALIGN_TO_16 uint64_t u64[2]; SIMDE_ALIGN_TO_16 simde_float32 f32[4]; SIMDE_ALIGN_TO_16 simde_float64 f64[2]; SIMDE_ALIGN_TO_16 int_fast32_t i32f[16 / sizeof(int_fast32_t)]; SIMDE_ALIGN_TO_16 uint_fast32_t u32f[16 / sizeof(uint_fast32_t)]; #endif SIMDE_ALIGN_TO_16 simde__m64_private m64_private[2]; SIMDE_ALIGN_TO_16 simde__m64 m64[2]; #if defined(SIMDE_X86_SSE2_NATIVE) || defined(SIMDE_X86_SVML_NATIVE) SIMDE_ALIGN_TO_16 __m128d n; #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_TO_16 int8x16_t neon_i8; SIMDE_ALIGN_TO_16 int16x8_t neon_i16; SIMDE_ALIGN_TO_16 int32x4_t neon_i32; SIMDE_ALIGN_TO_16 int64x2_t neon_i64; SIMDE_ALIGN_TO_16 uint8x16_t neon_u8; SIMDE_ALIGN_TO_16 uint16x8_t neon_u16; SIMDE_ALIGN_TO_16 uint32x4_t neon_u32; SIMDE_ALIGN_TO_16 uint64x2_t neon_u64; SIMDE_ALIGN_TO_16 float32x4_t neon_f32; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_ALIGN_TO_16 float64x2_t neon_f64; #endif #elif defined(SIMDE_MIPS_MSA_NATIVE) v16i8 msa_i8; v8i16 msa_i16; v4i32 msa_i32; v2i64 msa_i64; v16u8 msa_u8; v8u16 msa_u16; v4u32 msa_u32; v2u64 msa_u64; #elif defined(SIMDE_WASM_SIMD128_NATIVE) SIMDE_ALIGN_TO_16 v128_t wasm_v128; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char) altivec_i8; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short) altivec_i16; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32; #if defined(__INT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__INT_FAST32_TYPE__) altivec_i32f; #else SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32f; #endif SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) altivec_u8; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) altivec_u16; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32; #if defined(__UINT_FAST32_TYPE__) && (defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(__UINT_FAST32_TYPE__) altivec_u32f; #else SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32f; #endif SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float) altivec_f32; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long) altivec_i64; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double) altivec_f64; #endif #endif } simde__m128d_private; #if defined(SIMDE_X86_SSE2_NATIVE) || defined(SIMDE_X86_SVML_NATIVE) typedef __m128i simde__m128i; typedef __m128d simde__m128d; #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) typedef int64x2_t simde__m128i; # if defined(SIMDE_ARM_NEON_A64V8_NATIVE) typedef float64x2_t simde__m128d; # elif defined(SIMDE_VECTOR_SUBSCRIPT) typedef simde_float64 simde__m128d SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; # else typedef simde__m128d_private simde__m128d; # endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) typedef v128_t simde__m128i; typedef v128_t simde__m128d; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) typedef SIMDE_POWER_ALTIVEC_VECTOR(float) simde__m128i; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) typedef SIMDE_POWER_ALTIVEC_VECTOR(double) simde__m128d; #else typedef simde__m128d_private simde__m128d; #endif #elif defined(SIMDE_VECTOR_SUBSCRIPT) typedef int64_t simde__m128i SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; typedef simde_float64 simde__m128d SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS; #else typedef simde__m128i_private simde__m128i; typedef simde__m128d_private simde__m128d; #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_SVML_ENABLE_NATIVE_ALIASES) typedef simde__m128i __m128i; typedef simde__m128d __m128d; #endif HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128i), "simde__m128i size incorrect"); HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128i_private), "simde__m128i_private size incorrect"); HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128d), "simde__m128d size incorrect"); HEDLEY_STATIC_ASSERT(16 == sizeof(simde__m128d_private), "simde__m128d_private size incorrect"); #if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF) HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128i) == 16, "simde__m128i is not 16-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128i_private) == 16, "simde__m128i_private is not 16-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128d) == 16, "simde__m128d is not 16-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m128d_private) == 16, "simde__m128d_private is not 16-byte aligned"); #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde__m128i_from_private(simde__m128i_private v) { simde__m128i r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m128i_private simde__m128i_to_private(simde__m128i v) { simde__m128i_private r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde__m128d_from_private(simde__m128d_private v) { simde__m128d r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m128d_private simde__m128d_to_private(simde__m128d v) { simde__m128d_private r; simde_memcpy(&r, &v, sizeof(r)); return r; } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int8x16_t, neon, i8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int16x8_t, neon, i16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int32x4_t, neon, i32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, int64x2_t, neon, i64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint8x16_t, neon, u8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint16x8_t, neon, u16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint32x4_t, neon, u32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, uint64x2_t, neon, u64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, float32x4_t, neon, f32) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, float64x2_t, neon, f64) #endif #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed char), altivec, i8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed short), altivec, i16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed int), altivec, i32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), altivec, u8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), altivec, u16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), altivec, u32) #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), altivec, u64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, SIMDE_POWER_ALTIVEC_VECTOR(signed long long), altivec, i64) #endif #endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */ #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int8x16_t, neon, i8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int16x8_t, neon, i16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int32x4_t, neon, i32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, int64x2_t, neon, i64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint8x16_t, neon, u8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint16x8_t, neon, u16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint32x4_t, neon, u32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, uint64x2_t, neon, u64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, float32x4_t, neon, f32) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, float64x2_t, neon, f64) #endif #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed char), altivec, i8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed short), altivec, i16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed int), altivec, i32) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), altivec, u8) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), altivec, u16) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), altivec, u32) #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), altivec, u64) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(signed long long), altivec, i64) #if defined(SIMDE_BUG_GCC_95782) SIMDE_FUNCTION_ATTRIBUTES SIMDE_POWER_ALTIVEC_VECTOR(double) simde__m128d_to_altivec_f64(simde__m128d value) { simde__m128d_private r_ = simde__m128d_to_private(value); return r_.altivec_f64; } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde__m128d_from_altivec_f64(SIMDE_POWER_ALTIVEC_VECTOR(double) value) { simde__m128d_private r_; r_.altivec_f64 = value; return simde__m128d_from_private(r_); } #else SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, SIMDE_POWER_ALTIVEC_VECTOR(double), altivec, f64) #endif #endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128d, v128_t, wasm, v128); SIMDE_X86_GENERATE_CONVERSION_FUNCTION(m128i, v128_t, wasm, v128); #endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */ SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_set_pd (simde_float64 e1, simde_float64 e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_pd(e1, e0); #else simde__m128d_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_make(e0, e1); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_ALIGN_TO_16 simde_float64 data[2] = { e0, e1 }; r_.neon_f64 = vld1q_f64(data); #else r_.f64[0] = e0; r_.f64[1] = e1; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_pd(e1, e0) simde_mm_set_pd(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_set1_pd (simde_float64 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set1_pd(a); #else simde__m128d_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_splat(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vdupq_n_f64(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_splats(HEDLEY_STATIC_CAST(double, a)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.f64[i] = a; } #endif return simde__m128d_from_private(r_); #endif } #define simde_mm_set_pd1(a) simde_mm_set1_pd(a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_pd(a) simde_mm_set1_pd(a) #define _mm_set_pd1(a) simde_mm_set1_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_abs_pd(simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) simde_float64 mask_; uint64_t u64_ = UINT64_C(0x7FFFFFFFFFFFFFFF); simde_memcpy(&mask_, &u64_, sizeof(u64_)); return _mm_and_pd(_mm_set1_pd(mask_), a); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vabsq_f64(a_.neon_f64); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_abs(a_.altivec_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_abs(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_fabs(a_.f64[i]); } #endif return simde__m128d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_not_pd(simde__m128d a) { #if defined(SIMDE_X86_AVX512VL_NATIVE) __m128i ai = _mm_castpd_si128(a); return _mm_castsi128_pd(_mm_ternarylogic_epi64(ai, ai, ai, 0x55)); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vmvnq_s32(a_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_f64 = vec_nor(a_.altivec_f64, a_.altivec_f64); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_nor(a_.altivec_i32, a_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_not(a_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~(a_.i32f[i]); } #endif return simde__m128d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_select_pd(simde__m128d a, simde__m128d b, simde__m128d mask) { /* This function is for when you want to blend two elements together * according to a mask. It is similar to _mm_blendv_pd, except that * it is undefined whether the blend is based on the highest bit in * each lane (like blendv) or just bitwise operations. This allows * us to implement the function efficiently everywhere. * * Basically, you promise that all the lanes in mask are either 0 or * ~0. */ #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_blendv_pd(a, b, mask); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b), mask_ = simde__m128d_to_private(mask); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 ^ ((a_.i64 ^ b_.i64) & mask_.i64); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vbslq_s64(mask_.neon_u64, b_.neon_i64, a_.neon_i64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] ^ ((a_.i64[i] ^ b_.i64[i]) & mask_.i64[i]); } #endif return simde__m128d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_add_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vaddq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i8 = vec_add(a_.altivec_i8, b_.altivec_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i8 = a_.i8 + b_.i8; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[i] + b_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_epi8(a, b) simde_mm_add_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_add_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vaddq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i16 = vec_add(a_.altivec_i16, b_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i16 = a_.i16 + b_.i16; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[i] + b_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_epi16(a, b) simde_mm_add_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_add_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vaddq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_add(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = a_.i32 + b_.i32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] + b_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_epi32(a, b) simde_mm_add_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_add_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_epi64(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vaddq_s64(a_.neon_i64, b_.neon_i64); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) r_.altivec_i64 = vec_add(a_.altivec_i64, b_.altivec_i64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 + b_.i64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] + b_.i64[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_epi64(a, b) simde_mm_add_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_add_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vaddq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_f64 = vec_add(a_.altivec_f64, b_.altivec_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_add(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 + b_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] + b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_pd(a, b) simde_mm_add_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_move_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_move_sd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsetq_lane_f64(vgetq_lane_f64(b_.neon_f64, 0), a_.neon_f64, 0); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) #if defined(HEDLEY_IBM_VERSION) r_.altivec_f64 = vec_xxpermdi(a_.altivec_f64, b_.altivec_f64, 1); #else r_.altivec_f64 = vec_xxpermdi(b_.altivec_f64, a_.altivec_f64, 1); #endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 1); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 2, 1); #else r_.f64[0] = b_.f64[0]; r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_move_sd(a, b) simde_mm_move_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_broadcastlow_pd(simde__m128d a) { /* This function broadcasts the first element in the input vector to * all lanes. It is used to avoid generating spurious exceptions in * *_sd functions since there may be garbage in the upper lanes. */ #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castsi128_pd(_mm_shuffle_epi32(_mm_castpd_si128(a), 0x44)); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vdupq_laneq_f64(a_.neon_f64, 0); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_f64 = vec_splat(a_.altivec_f64, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_splat(a_.f64[0]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 0, 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[0]; } #endif return simde__m128d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_add_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_add_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_add_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_add_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.f64[0] = a_.f64[0] + b_.f64[0]; r_.f64[1] = a_.f64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_sd(a, b) simde_mm_add_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_add_si64 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_add_si64(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vadd_s64(a_.neon_i64, b_.neon_i64); #else r_.i64[0] = a_.i64[0] + b_.i64[0]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_add_si64(a, b) simde_mm_add_si64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_adds_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_adds_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vqaddq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_add_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i8 = vec_adds(a_.altivec_i8, b_.altivec_i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = simde_math_adds_i8(a_.i8[i], b_.i8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_adds_epi8(a, b) simde_mm_adds_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_adds_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_adds_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vqaddq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_add_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i16 = vec_adds(a_.altivec_i16, b_.altivec_i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = simde_math_adds_i16(a_.i16[i], b_.i16[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_adds_epi16(a, b) simde_mm_adds_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_adds_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_adds_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vqaddq_u8(a_.neon_u8, b_.neon_u8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_add_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_u8 = vec_adds(a_.altivec_u8, b_.altivec_u8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { r_.u8[i] = simde_math_adds_u8(a_.u8[i], b_.u8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_adds_epu8(a, b) simde_mm_adds_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_adds_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_adds_epu16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vqaddq_u16(a_.neon_u16, b_.neon_u16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_add_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u16 = vec_adds(a_.altivec_u16, b_.altivec_u16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = simde_math_adds_u16(a_.u16[i], b_.u16[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_adds_epu16(a, b) simde_mm_adds_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_and_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_and_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vandq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_f64 = vec_and(a_.altivec_f64, b_.altivec_f64); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] & b_.i32f[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_and_pd(a, b) simde_mm_and_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_and_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_and_si128(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vandq_s32(b_.neon_i32, a_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u32f = vec_and(a_.altivec_u32f, b_.altivec_u32f); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] & b_.i32f[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_and_si128(a, b) simde_mm_and_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_andnot_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_andnot_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vbicq_s32(b_.neon_i32, a_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_andc(b_.altivec_f64, a_.altivec_f64); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32f = vec_andc(b_.altivec_i32f, a_.altivec_i32f); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = ~a_.u64[i] & b_.u64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_andnot_pd(a, b) simde_mm_andnot_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_andnot_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_andnot_si128(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vbicq_s32(b_.neon_i32, a_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_andc(b_.altivec_i32, a_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~(a_.i32f[i]) & b_.i32f[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_andnot_si128(a, b) simde_mm_andnot_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_xor_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_xor_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f ^ b_.i32f; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_xor(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = veorq_s64(a_.neon_i64, b_.neon_i64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] ^ b_.i32f[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_xor_pd(a, b) simde_mm_xor_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_avg_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_avg_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vrhaddq_u8(b_.neon_u8, a_.neon_u8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_avgr(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u8 = vec_avg(a_.altivec_u8, b_.altivec_u8); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_) uint16_t wa SIMDE_VECTOR(32); uint16_t wb SIMDE_VECTOR(32); uint16_t wr SIMDE_VECTOR(32); SIMDE_CONVERT_VECTOR_(wa, a_.u8); SIMDE_CONVERT_VECTOR_(wb, b_.u8); wr = (wa + wb + 1) >> 1; SIMDE_CONVERT_VECTOR_(r_.u8, wr); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { r_.u8[i] = (a_.u8[i] + b_.u8[i] + 1) >> 1; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_avg_epu8(a, b) simde_mm_avg_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_avg_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_avg_epu16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vrhaddq_u16(b_.neon_u16, a_.neon_u16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_avgr(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u16 = vec_avg(a_.altivec_u16, b_.altivec_u16); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && defined(SIMDE_CONVERT_VECTOR_) uint32_t wa SIMDE_VECTOR(32); uint32_t wb SIMDE_VECTOR(32); uint32_t wr SIMDE_VECTOR(32); SIMDE_CONVERT_VECTOR_(wa, a_.u16); SIMDE_CONVERT_VECTOR_(wb, b_.u16); wr = (wa + wb + 1) >> 1; SIMDE_CONVERT_VECTOR_(r_.u16, wr); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = (a_.u16[i] + b_.u16[i] + 1) >> 1; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_avg_epu16(a, b) simde_mm_avg_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_setzero_si128 (void) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setzero_si128(); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vdupq_n_s32(0); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_splats(HEDLEY_STATIC_CAST(signed int, 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_splat(INT32_C(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT) r_.i32 = __extension__ (__typeof__(r_.i32)) { 0, 0, 0, 0 }; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = 0; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setzero_si128() (simde_mm_setzero_si128()) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_bslli_si128 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); if (HEDLEY_UNLIKELY((imm8 & ~15))) { return simde_mm_setzero_si128(); } #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_ENDIAN_ORDER) r_.altivec_i8 = #if (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) vec_slo #else /* SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG */ vec_sro #endif (a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, imm8 * 8))); #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_srb(a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, (imm8 & 15) << 3))); #elif defined(SIMDE_HAVE_INT128_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.u128[0] = a_.u128[0] << (imm8 * 8); #else r_ = simde__m128i_to_private(simde_mm_setzero_si128()); for (int i = imm8 ; i < HEDLEY_STATIC_CAST(int, sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[i - imm8]; } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) #define simde_mm_bslli_si128(a, imm8) _mm_slli_si128(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(__clang__) #define simde_mm_bslli_si128(a, imm8) \ simde__m128i_from_neon_i8(((imm8) <= 0) ? simde__m128i_to_neon_i8(a) : (((imm8) > 15) ? (vdupq_n_s8(0)) : (vextq_s8(vdupq_n_s8(0), simde__m128i_to_neon_i8(a), 16 - (imm8))))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_bslli_si128(a, imm8) __extension__ ({ \ simde__m128i_from_wasm_v128( \ wasm_i8x16_shuffle(wasm_i32x4_splat(INT32_C(0)), \ simde__m128i_to_wasm_v128((a)), \ ((imm8)&0xF0) ? 0 : 16 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 17 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 18 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 19 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 20 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 21 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 22 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 23 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 24 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 25 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 26 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 27 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 28 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 29 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 30 - ((imm8)&0xF), \ ((imm8)&0xF0) ? 0 : 31 - ((imm8)&0xF))); }) #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) #define simde_mm_bslli_si128(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ simde__m128i_private simde_tmp_r_; \ if (HEDLEY_UNLIKELY(imm8 > 15)) { \ simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ } else { \ simde_tmp_r_.i8 = \ SIMDE_SHUFFLE_VECTOR_(8, 16, \ simde_tmp_z_.i8, \ (simde_tmp_a_).i8, \ HEDLEY_STATIC_CAST(int8_t, (16 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (17 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (18 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (19 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (20 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (21 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (22 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (23 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (24 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (25 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (26 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (27 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (28 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (29 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (30 - imm8) & 31), \ HEDLEY_STATIC_CAST(int8_t, (31 - imm8) & 31)); \ } \ simde__m128i_from_private(simde_tmp_r_); })) #endif #define simde_mm_slli_si128(a, imm8) simde_mm_bslli_si128(a, imm8) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_bslli_si128(a, imm8) simde_mm_bslli_si128(a, imm8) #define _mm_slli_si128(a, imm8) simde_mm_bslli_si128(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_bsrli_si128 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); if (HEDLEY_UNLIKELY((imm8 & ~15))) { return simde_mm_setzero_si128(); } #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_ENDIAN_ORDER) r_.altivec_i8 = #if (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) vec_sro #else /* SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG */ vec_slo #endif (a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, imm8 * 8))); #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_slb(a_.altivec_i8, vec_splats(HEDLEY_STATIC_CAST(unsigned char, (imm8 & 15) << 3))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { const int e = HEDLEY_STATIC_CAST(int, i) + imm8; r_.i8[i] = (e < 16) ? a_.i8[e] : 0; } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) #define simde_mm_bsrli_si128(a, imm8) _mm_srli_si128(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(__clang__) #define simde_mm_bsrli_si128(a, imm8) \ simde__m128i_from_neon_i8(((imm8 < 0) || (imm8 > 15)) ? vdupq_n_s8(0) : (vextq_s8(simde__m128i_to_private(a).neon_i8, vdupq_n_s8(0), ((imm8 & 15) != 0) ? imm8 : (imm8 & 15)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_bsrli_si128(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ simde__m128i_private simde_tmp_r_ = simde__m128i_to_private(a); \ if (HEDLEY_UNLIKELY(imm8 > 15)) { \ simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ } else { \ simde_tmp_r_.wasm_v128 = \ wasm_i8x16_shuffle( \ simde_tmp_z_.wasm_v128, \ simde_tmp_a_.wasm_v128, \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 16) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 17) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 18) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 19) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 20) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 21) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 22) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 23) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 24) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 25) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 26) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 27) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 28) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 29) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 30) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 31) & 31)); \ } \ simde__m128i_from_private(simde_tmp_r_); })) #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && !defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) #define simde_mm_bsrli_si128(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ const simde__m128i_private simde_tmp_z_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ simde__m128i_private simde_tmp_r_ = simde__m128i_to_private(a); \ if (HEDLEY_UNLIKELY(imm8 > 15)) { \ simde_tmp_r_ = simde__m128i_to_private(simde_mm_setzero_si128()); \ } else { \ simde_tmp_r_.i8 = \ SIMDE_SHUFFLE_VECTOR_(8, 16, \ simde_tmp_z_.i8, \ (simde_tmp_a_).i8, \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 16) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 17) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 18) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 19) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 20) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 21) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 22) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 23) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 24) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 25) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 26) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 27) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 28) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 29) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 30) & 31), \ HEDLEY_STATIC_CAST(int8_t, (imm8 + 31) & 31)); \ } \ simde__m128i_from_private(simde_tmp_r_); })) #endif #define simde_mm_srli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8)) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_bsrli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8)) #define _mm_srli_si128(a, imm8) simde_mm_bsrli_si128((a), (imm8)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_clflush (void const* p) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_clflush(p); #else (void) p; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_clflush(p) simde_mm_clflush(p) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comieq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comieq_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !!vgetq_lane_u64(vceqq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) == wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] == b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comieq_sd(a, b) simde_mm_comieq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comige_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comige_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !!vgetq_lane_u64(vcgeq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) >= wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] >= b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comige_sd(a, b) simde_mm_comige_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comigt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comigt_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !!vgetq_lane_u64(vcgtq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) > wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] > b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comigt_sd(a, b) simde_mm_comigt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comile_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comile_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !!vgetq_lane_u64(vcleq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) <= wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] <= b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comile_sd(a, b) simde_mm_comile_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comilt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comilt_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !!vgetq_lane_u64(vcltq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) < wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] < b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comilt_sd(a, b) simde_mm_comilt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_comineq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_comineq_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return !vgetq_lane_u64(vceqq_f64(a_.neon_f64, b_.neon_f64), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) != wasm_f64x2_extract_lane(b_.wasm_v128, 0); #else return a_.f64[0] != b_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_comineq_sd(a, b) simde_mm_comineq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_copysign_pd(simde__m128d dest, simde__m128d src) { simde__m128d_private r_, dest_ = simde__m128d_to_private(dest), src_ = simde__m128d_to_private(src); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t sign_pos = vreinterpretq_u64_f64(vdupq_n_f64(-SIMDE_FLOAT64_C(0.0))); #else simde_float64 dbl_nz = -SIMDE_FLOAT64_C(0.0); uint64_t u64_nz; simde_memcpy(&u64_nz, &dbl_nz, sizeof(u64_nz)); uint64x2_t sign_pos = vdupq_n_u64(u64_nz); #endif r_.neon_u64 = vbslq_u64(sign_pos, src_.neon_u64, dest_.neon_u64); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) #if defined(SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS) r_.altivec_f64 = vec_cpsgn(dest_.altivec_f64, src_.altivec_f64); #else r_.altivec_f64 = vec_cpsgn(src_.altivec_f64, dest_.altivec_f64); #endif #elif defined(simde_math_copysign) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_copysign(dest_.f64[i], src_.f64[i]); } #else simde__m128d sgnbit = simde_mm_set1_pd(-SIMDE_FLOAT64_C(0.0)); return simde_mm_xor_pd(simde_mm_and_pd(sgnbit, src), simde_mm_andnot_pd(sgnbit, dest)); #endif return simde__m128d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_xorsign_pd(simde__m128d dest, simde__m128d src) { return simde_mm_xor_pd(simde_mm_and_pd(simde_mm_set1_pd(-0.0), src), dest); } SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_castpd_ps (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castpd_ps(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vreinterpretq_f32_f64(a); #else simde__m128 r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castpd_ps(a) simde_mm_castpd_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_castpd_si128 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castpd_si128(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vreinterpretq_s64_f64(a); #else simde__m128i r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castpd_si128(a) simde_mm_castpd_si128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_castps_pd (simde__m128 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castps_pd(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vreinterpretq_f64_f32(a); #else simde__m128d r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castps_pd(a) simde_mm_castps_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_castps_si128 (simde__m128 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castps_si128(a); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return simde__m128i_from_neon_i32(simde__m128_to_private(a).neon_i32); #else simde__m128i r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castps_si128(a) simde_mm_castps_si128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_castsi128_pd (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castsi128_pd(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vreinterpretq_f64_s64(a); #else simde__m128d r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castsi128_pd(a) simde_mm_castsi128_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_castsi128_ps (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_castsi128_ps(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(float), a); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return simde__m128_from_neon_i32(simde__m128i_to_private(a).neon_i32); #else simde__m128 r; simde_memcpy(&r, &a, sizeof(a)); return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_castsi128_ps(a) simde_mm_castsi128_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpeq_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpeq_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vceqq_s8(b_.neon_i8, a_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_eq(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmpeq(a_.altivec_i8, b_.altivec_i8)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 == b_.i8)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = (a_.i8[i] == b_.i8[i]) ? ~INT8_C(0) : INT8_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpeq_epi8(a, b) simde_mm_cmpeq_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpeq_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpeq_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vceqq_s16(b_.neon_i16, a_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_eq(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmpeq(a_.altivec_i16, b_.altivec_i16)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i16 = (a_.i16 == b_.i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (a_.i16[i] == b_.i16[i]) ? ~INT16_C(0) : INT16_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpeq_epi16(a, b) simde_mm_cmpeq_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpeq_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpeq_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vceqq_s32(b_.neon_i32, a_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_eq(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmpeq(a_.altivec_i32, b_.altivec_i32)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), a_.i32 == b_.i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = (a_.i32[i] == b_.i32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpeq_epi32(a, b) simde_mm_cmpeq_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpeq_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpeq_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vceqq_f64(b_.neon_f64, a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_eq(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpeq(a_.altivec_f64, b_.altivec_f64)); #elif defined(SIMDE_MIPS_MSA_NATIVE) r_.msa_i32 = __msa_addv_w(a_.msa_i32, b_.msa_i32); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] == b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpeq_pd(a, b) simde_mm_cmpeq_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpeq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpeq_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpeq_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpeq_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.u64[0] == b_.u64[0]) ? ~UINT64_C(0) : 0; r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpeq_sd(a, b) simde_mm_cmpeq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpneq_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpneq_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u32 = vmvnq_u32(vreinterpretq_u32_u64(vceqq_f64(b_.neon_f64, a_.neon_f64))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_ne(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] != b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpneq_pd(a, b) simde_mm_cmpneq_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpneq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpneq_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpneq_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpneq_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.f64[0] != b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpneq_sd(a, b) simde_mm_cmpneq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmplt_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmplt_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vcltq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char),vec_cmplt(a_.altivec_i8, b_.altivec_i8)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_lt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 < b_.i8)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = (a_.i8[i] < b_.i8[i]) ? ~INT8_C(0) : INT8_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmplt_epi8(a, b) simde_mm_cmplt_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmplt_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmplt_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vcltq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmplt(a_.altivec_i16, b_.altivec_i16)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_lt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.i16 < b_.i16)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? ~INT16_C(0) : INT16_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmplt_epi16(a, b) simde_mm_cmplt_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmplt_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmplt_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vcltq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmplt(a_.altivec_i32, b_.altivec_i32)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_lt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.i32 < b_.i32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = (a_.i32[i] < b_.i32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmplt_epi32(a, b) simde_mm_cmplt_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmplt_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmplt_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vcltq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmplt(a_.altivec_f64, b_.altivec_f64)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_lt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 < b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] < b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmplt_pd(a, b) simde_mm_cmplt_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmplt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmplt_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmplt_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmplt_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.f64[0] < b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmplt_sd(a, b) simde_mm_cmplt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmple_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmple_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 <= b_.f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vcleq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_le(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmple(a_.altivec_f64, b_.altivec_f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] <= b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmple_pd(a, b) simde_mm_cmple_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmple_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmple_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmple_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmple_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.f64[0] <= b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmple_sd(a, b) simde_mm_cmple_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpgt_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpgt_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vcgtq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_gt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmpgt(a_.altivec_i8, b_.altivec_i8)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i8), (a_.i8 > b_.i8)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = (a_.i8[i] > b_.i8[i]) ? ~INT8_C(0) : INT8_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpgt_epi8(a, b) simde_mm_cmpgt_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpgt_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpgt_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vcgtq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_gt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_cmpgt(a_.altivec_i16, b_.altivec_i16)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), (a_.i16 > b_.i16)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? ~INT16_C(0) : INT16_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpgt_epi16(a, b) simde_mm_cmpgt_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpgt_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpgt_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vcgtq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_gt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_cmpgt(a_.altivec_i32, b_.altivec_i32)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.i32 > b_.i32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = (a_.i32[i] > b_.i32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpgt_epi32(a, b) simde_mm_cmpgt_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpgt_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpgt_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 > b_.f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vcgtq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_gt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpgt(a_.altivec_f64, b_.altivec_f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] > b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpgt_pd(a, b) simde_mm_cmpgt_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpgt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_cmpgt_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpgt_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpgt_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.f64[0] > b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpgt_sd(a, b) simde_mm_cmpgt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpge_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpge_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 >= b_.f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vcgeq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_ge(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_cmpge(a_.altivec_f64, b_.altivec_f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (a_.f64[i] >= b_.f64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpge_pd(a, b) simde_mm_cmpge_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpge_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_cmpge_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpge_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpge_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.u64[0] = (a_.f64[0] >= b_.f64[0]) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpge_sd(a, b) simde_mm_cmpge_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpngt_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpngt_pd(a, b); #else return simde_mm_cmple_pd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpngt_pd(a, b) simde_mm_cmpngt_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpngt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_cmpngt_sd(a, b); #else return simde_mm_cmple_sd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpngt_sd(a, b) simde_mm_cmpngt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnge_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpnge_pd(a, b); #else return simde_mm_cmplt_pd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnge_pd(a, b) simde_mm_cmpnge_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnge_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_cmpnge_sd(a, b); #else return simde_mm_cmplt_sd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnge_sd(a, b) simde_mm_cmpnge_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnlt_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpnlt_pd(a, b); #else return simde_mm_cmpge_pd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnlt_pd(a, b) simde_mm_cmpnlt_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnlt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpnlt_sd(a, b); #else return simde_mm_cmpge_sd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnlt_sd(a, b) simde_mm_cmpnlt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnle_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpnle_pd(a, b); #else return simde_mm_cmpgt_pd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnle_pd(a, b) simde_mm_cmpnle_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpnle_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpnle_sd(a, b); #else return simde_mm_cmpgt_sd(a, b); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpnle_sd(a, b) simde_mm_cmpnle_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpord_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpord_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) /* Note: NEON does not have ordered compare builtin Need to compare a eq a and b eq b to check for NaN Do AND of results to get final */ uint64x2_t ceqaa = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t ceqbb = vceqq_f64(b_.neon_f64, b_.neon_f64); r_.neon_u64 = vandq_u64(ceqaa, ceqbb); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_and(wasm_f64x2_eq(a_.wasm_v128, a_.wasm_v128), wasm_f64x2_eq(b_.wasm_v128, b_.wasm_v128)); #elif defined(simde_math_isnan) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (!simde_math_isnan(a_.f64[i]) && !simde_math_isnan(b_.f64[i])) ? ~UINT64_C(0) : UINT64_C(0); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpord_pd(a, b) simde_mm_cmpord_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64 simde_mm_cvtsd_f64 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_cvtsd_f64(a); #else simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(simde_float64, vgetq_lane_f64(a_.neon_f64, 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return HEDLEY_STATIC_CAST(simde_float64, wasm_f64x2_extract_lane(a_.wasm_v128, 0)); #else return a_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsd_f64(a) simde_mm_cvtsd_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpord_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpord_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpord_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpord_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(simde_math_isnan) r_.u64[0] = (!simde_math_isnan(a_.f64[0]) && !simde_math_isnan(b_.f64[0])) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpord_sd(a, b) simde_mm_cmpord_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpunord_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpunord_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t ceqaa = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t ceqbb = vceqq_f64(b_.neon_f64, b_.neon_f64); r_.neon_u64 = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(ceqaa, ceqbb)))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_or(wasm_f64x2_ne(a_.wasm_v128, a_.wasm_v128), wasm_f64x2_ne(b_.wasm_v128, b_.wasm_v128)); #elif defined(simde_math_isnan) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.u64[i] = (simde_math_isnan(a_.f64[i]) || simde_math_isnan(b_.f64[i])) ? ~UINT64_C(0) : UINT64_C(0); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpunord_pd(a, b) simde_mm_cmpunord_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmpunord_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cmpunord_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_cmpunord_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_cmpunord_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(simde_math_isnan) r_.u64[0] = (simde_math_isnan(a_.f64[0]) || simde_math_isnan(b_.f64[0])) ? ~UINT64_C(0) : UINT64_C(0); r_.u64[1] = a_.u64[1]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cmpunord_sd(a, b) simde_mm_cmpunord_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtepi32_pd (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtepi32_pd(a); #else simde__m128d_private r_; simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_convert_low_i32x4(a_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.f64, a_.m64_private[0].i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (simde_float64) a_.i32[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtepi32_pd(a) simde_mm_cvtepi32_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_cvtepi32_ps (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtepi32_ps(a); #else simde__m128_private r_; simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_f32 = vcvtq_f32_s32(a_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_convert_i32x4(a_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) HEDLEY_DIAGNOSTIC_PUSH #if HEDLEY_HAS_WARNING("-Wc11-extensions") #pragma clang diagnostic ignored "-Wc11-extensions" #endif r_.altivec_f32 = vec_ctf(a_.altivec_i32, 0); HEDLEY_DIAGNOSTIC_POP #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.f32, a_.i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = (simde_float32) a_.i32[i]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtepi32_ps(a) simde_mm_cvtepi32_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_cvtpd_pi32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_cvtpd_pi32(a); #else simde__m64_private r_; simde__m128d_private a_ = simde__m128d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { simde_float64 v = simde_math_round(a_.f64[i]); #if defined(SIMDE_FAST_CONVERSION_RANGE) r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v); #else r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif } return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtpd_pi32(a) simde_mm_cvtpd_pi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtpd_epi32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_BUG_PGI_30107) return _mm_cvtpd_epi32(a); #else simde__m128i_private r_; r_.m64[0] = simde_mm_cvtpd_pi32(a); r_.m64[1] = simde_mm_setzero_si64(); return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtpd_epi32(a) simde_mm_cvtpd_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_cvtpd_ps (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtpd_ps(a); #else simde__m128_private r_; simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vcombine_f32(vcvt_f32_f64(a_.neon_f64), vdup_n_f32(0.0f)); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) r_.altivec_f32 = vec_float2(a_.altivec_f64, vec_splats(0.0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_demote_f64x2_zero(a_.wasm_v128); #elif HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && HEDLEY_HAS_BUILTIN(__builtin_convertvector) float __attribute__((__vector_size__(8))) z = { 0.0f, 0.0f }; r_.f32 = __builtin_shufflevector( __builtin_convertvector(__builtin_shufflevector(a_.f64, a_.f64, 0, 1), __typeof__(z)), z, 0, 1, 2, 3 ); #else r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[0]); r_.f32[1] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[1]); r_.f32[2] = SIMDE_FLOAT32_C(0.0); r_.f32[3] = SIMDE_FLOAT32_C(0.0); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtpd_ps(a) simde_mm_cvtpd_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtpi32_pd (simde__m64 a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_cvtpi32_pd(a); #else simde__m128d_private r_; simde__m64_private a_ = simde__m64_to_private(a); #if defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.f64, a_.i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (simde_float64) a_.i32[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtpi32_pd(a) simde_mm_cvtpi32_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtps_epi32 (simde__m128 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtps_epi32(a); #else simde__m128i_private r_; simde__m128_private a_; #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES) && !defined(SIMDE_BUG_GCC_95399) a_ = simde__m128_to_private(a); r_.neon_i32 = vcvtnq_s32_f32(a_.neon_f32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES) a_ = simde__m128_to_private(a); HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_C11_EXTENSIONS_ SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ r_.altivec_i32 = vec_cts(a_.altivec_f32, 1); HEDLEY_DIAGNOSTIC_POP #elif defined(SIMDE_WASM_SIMD128_NATIVE) && defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_ROUND_TIES) a_ = simde__m128_to_private(a); r_.wasm_v128 = wasm_i32x4_trunc_sat_f32x4(a_.wasm_v128); #else a_ = simde__m128_to_private(simde_x_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEAREST_INT, 1)); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { simde_float32 v = simde_math_roundf(a_.f32[i]); #if defined(SIMDE_FAST_CONVERSION_RANGE) r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v); #else r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtps_epi32(a) simde_mm_cvtps_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtps_pd (simde__m128 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtps_pd(a); #else simde__m128d_private r_; simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_promote_low_f32x4(a_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.f64, a_.m64_private[0].f32); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vcvt_f64_f32(vget_low_f32(a_.neon_f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f32[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtps_pd(a) simde_mm_cvtps_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_cvtsd_si32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtsd_si32(a); #else simde__m128d_private a_ = simde__m128d_to_private(a); simde_float64 v = simde_math_round(a_.f64[0]); #if defined(SIMDE_FAST_CONVERSION_RANGE) return SIMDE_CONVERT_FTOI(int32_t, v); #else return ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsd_si32(a) simde_mm_cvtsd_si32(a) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_mm_cvtsd_si64 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) #if defined(__PGI) return _mm_cvtsd_si64x(a); #else return _mm_cvtsd_si64(a); #endif #else simde__m128d_private a_ = simde__m128d_to_private(a); return SIMDE_CONVERT_FTOI(int64_t, simde_math_round(a_.f64[0])); #endif } #define simde_mm_cvtsd_si64x(a) simde_mm_cvtsd_si64(a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_cvtsd_si64(a) simde_mm_cvtsd_si64(a) #define _mm_cvtsd_si64x(a) simde_mm_cvtsd_si64x(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_cvtsd_ss (simde__m128 a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtsd_ss(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a); simde__m128d_private b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vsetq_lane_f32(vcvtxd_f32_f64(vgetq_lane_f64(b_.neon_f64, 0)), a_.neon_f32, 0); #else r_.f32[0] = HEDLEY_STATIC_CAST(simde_float32, b_.f64[0]); SIMDE_VECTORIZE for (size_t i = 1 ; i < (sizeof(r_) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsd_ss(a, b) simde_mm_cvtsd_ss(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_x_mm_cvtsi128_si16 (simde__m128i a) { simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vgetq_lane_s16(a_.neon_i16, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return HEDLEY_STATIC_CAST(int16_t, wasm_i16x8_extract_lane(a_.wasm_v128, 0)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; #endif return vec_extract(a_.altivec_i16, 0); #else return a_.i16[0]; #endif } SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_cvtsi128_si32 (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtsi128_si32(a); #else simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vgetq_lane_s32(a_.neon_i32, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return HEDLEY_STATIC_CAST(int32_t, wasm_i32x4_extract_lane(a_.wasm_v128, 0)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; #endif return vec_extract(a_.altivec_i32, 0); #else return a_.i32[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsi128_si32(a) simde_mm_cvtsi128_si32(a) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_mm_cvtsi128_si64 (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) #if defined(__PGI) return _mm_cvtsi128_si64x(a); #else return _mm_cvtsi128_si64(a); #endif #else simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && !defined(HEDLEY_IBM_VERSION) return vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), a_.i64), 0); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vgetq_lane_s64(a_.neon_i64, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return HEDLEY_STATIC_CAST(int64_t, wasm_i64x2_extract_lane(a_.wasm_v128, 0)); #endif return a_.i64[0]; #endif } #define simde_mm_cvtsi128_si64x(a) simde_mm_cvtsi128_si64(a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_cvtsi128_si64(a) simde_mm_cvtsi128_si64(a) #define _mm_cvtsi128_si64x(a) simde_mm_cvtsi128_si64x(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtsi32_sd (simde__m128d a, int32_t b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtsi32_sd(a, b); #else simde__m128d_private r_; simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsetq_lane_f64(HEDLEY_STATIC_CAST(float64_t, b), a_.neon_f64, 0); #else r_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b); r_.i64[1] = a_.i64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsi32_sd(a, b) simde_mm_cvtsi32_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_cvtsi16_si128 (int16_t a) { simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vsetq_lane_s16(a, vdupq_n_s16(0), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_make(a, 0, 0, 0, 0, 0, 0, 0); #else r_.i16[0] = a; r_.i16[1] = 0; r_.i16[2] = 0; r_.i16[3] = 0; r_.i16[4] = 0; r_.i16[5] = 0; r_.i16[6] = 0; r_.i16[7] = 0; #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtsi32_si128 (int32_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtsi32_si128(a); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vsetq_lane_s32(a, vdupq_n_s32(0), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_make(a, 0, 0, 0); #else r_.i32[0] = a; r_.i32[1] = 0; r_.i32[2] = 0; r_.i32[3] = 0; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtsi32_si128(a) simde_mm_cvtsi32_si128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtsi64_sd (simde__m128d a, int64_t b) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) #if !defined(__PGI) return _mm_cvtsi64_sd(a, b); #else return _mm_cvtsi64x_sd(a, b); #endif #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsetq_lane_f64(HEDLEY_STATIC_CAST(float64_t, b), a_.neon_f64, 0); #else r_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b); r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #define simde_mm_cvtsi64x_sd(a, b) simde_mm_cvtsi64_sd(a, b) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_cvtsi64_sd(a, b) simde_mm_cvtsi64_sd(a, b) #define _mm_cvtsi64x_sd(a, b) simde_mm_cvtsi64x_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtsi64_si128 (int64_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) #if !defined(__PGI) return _mm_cvtsi64_si128(a); #else return _mm_cvtsi64x_si128(a); #endif #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vsetq_lane_s64(a, vdupq_n_s64(0), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_make(a, 0); #else r_.i64[0] = a; r_.i64[1] = 0; #endif return simde__m128i_from_private(r_); #endif } #define simde_mm_cvtsi64x_si128(a) simde_mm_cvtsi64_si128(a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_cvtsi64_si128(a) simde_mm_cvtsi64_si128(a) #define _mm_cvtsi64x_si128(a) simde_mm_cvtsi64x_si128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cvtss_sd (simde__m128d a, simde__m128 b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvtss_sd(a, b); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t temp = vcvt_f64_f32(vset_lane_f32(vgetq_lane_f32(simde__m128_to_private(b).neon_f32, 0), vdup_n_f32(0), 0)); return vsetq_lane_f64(vgetq_lane_f64(simde__m128d_to_private(a).neon_f64, 1), temp, 1); #else simde__m128d_private a_ = simde__m128d_to_private(a); simde__m128_private b_ = simde__m128_to_private(b); a_.f64[0] = HEDLEY_STATIC_CAST(simde_float64, b_.f32[0]); return simde__m128d_from_private(a_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvtss_sd(a, b) simde_mm_cvtss_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_cvttpd_pi32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_cvttpd_pi32(a); #else simde__m64_private r_; simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_FAST_CONVERSION_RANGE) SIMDE_CONVERT_VECTOR_(r_.i32, a_.f64); #else for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { simde_float64 v = a_.f64[i]; #if defined(SIMDE_FAST_CONVERSION_RANGE) r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v); #else r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvttpd_pi32(a) simde_mm_cvttpd_pi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvttpd_epi32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvttpd_epi32(a); #else simde__m128i_private r_; r_.m64[0] = simde_mm_cvttpd_pi32(a); r_.m64[1] = simde_mm_setzero_si64(); return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvttpd_epi32(a) simde_mm_cvttpd_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvttps_epi32 (simde__m128 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvttps_epi32(a); #else simde__m128i_private r_; simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vcvtq_s32_f32(a_.neon_f32); #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS) /* Values below INT32_MIN saturate anyways, so we don't need to * test for that. */ #if !defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_FAST_NANS) uint32x4_t valid_input = vandq_u32( vcltq_f32(a_.neon_f32, vdupq_n_f32(SIMDE_FLOAT32_C(2147483648.0))), vceqq_f32(a_.neon_f32, a_.neon_f32) ); #elif !defined(SIMDE_FAST_CONVERSION_RANGE) uint32x4_t valid_input = vcltq_f32(a_.neon_f32, vdupq_n_f32(SIMDE_FLOAT32_C(2147483648.0))); #elif !defined(SIMDE_FAST_NANS) uint32x4_t valid_input = vceqq_f32(a_.neon_f32, a_.neon_f32); #endif r_.neon_i32 = vbslq_s32(valid_input, r_.neon_i32, vdupq_n_s32(INT32_MIN)); #endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_trunc_sat_f32x4(a_.wasm_v128); #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS) #if !defined(SIMDE_FAST_CONVERSION_RANGE) && !defined(SIMDE_FAST_NANS) v128_t valid_input = wasm_v128_and( wasm_f32x4_lt(a_.wasm_v128, wasm_f32x4_splat(SIMDE_FLOAT32_C(2147483648.0))), wasm_f32x4_eq(a_.wasm_v128, a_.wasm_v128) ); #elif !defined(SIMDE_FAST_CONVERSION_RANGE) v128_t valid_input = wasm_f32x4_lt(a_.wasm_v128, wasm_f32x4_splat(SIMDE_FLOAT32_C(2147483648.0))); #elif !defined(SIMDE_FAST_NANS) v128_t valid_input = wasm_f32x4_eq(a_.wasm_v128, a_.wasm_v128); #endif r_.wasm_v128 = wasm_v128_bitselect(r_.wasm_v128, wasm_i32x4_splat(INT32_MIN), valid_input); #endif #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_ARCH_POWER) SIMDE_CONVERT_VECTOR_(r_.i32, a_.f32); #if !defined(SIMDE_FAST_CONVERSION_RANGE) || !defined(SIMDE_FAST_NANS) #if !defined(SIMDE_FAST_CONVERSION_RANGE) static const simde_float32 SIMDE_VECTOR(16) first_too_high = { SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0), SIMDE_FLOAT32_C(2147483648.0) }; __typeof__(r_.i32) valid_input = HEDLEY_REINTERPRET_CAST( __typeof__(r_.i32), (a_.f32 < first_too_high) & (a_.f32 >= -first_too_high) ); #elif !defined(SIMDE_FAST_NANS) __typeof__(r_.i32) valid_input = HEDLEY_REINTERPRET_CAST( __typeof__(valid_input), a_.f32 == a_.f32); #endif __typeof__(r_.i32) invalid_output = { INT32_MIN, INT32_MIN, INT32_MIN, INT32_MIN }; r_.i32 = (r_.i32 & valid_input) | (invalid_output & ~valid_input); #endif #else for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { simde_float32 v = a_.f32[i]; #if defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_FAST_NANS) r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, v); #else r_.i32[i] = ((v > HEDLEY_STATIC_CAST(simde_float32, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvttps_epi32(a) simde_mm_cvttps_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_cvttsd_si32 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_cvttsd_si32(a); #else simde__m128d_private a_ = simde__m128d_to_private(a); simde_float64 v = a_.f64[0]; #if defined(SIMDE_FAST_CONVERSION_RANGE) return SIMDE_CONVERT_FTOI(int32_t, v); #else return ((v > HEDLEY_STATIC_CAST(simde_float64, INT32_MIN)) && (v < HEDLEY_STATIC_CAST(simde_float64, INT32_MAX))) ? SIMDE_CONVERT_FTOI(int32_t, v) : INT32_MIN; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_cvttsd_si32(a) simde_mm_cvttsd_si32(a) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_mm_cvttsd_si64 (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) #if !defined(__PGI) return _mm_cvttsd_si64(a); #else return _mm_cvttsd_si64x(a); #endif #else simde__m128d_private a_ = simde__m128d_to_private(a); return SIMDE_CONVERT_FTOI(int64_t, a_.f64[0]); #endif } #define simde_mm_cvttsd_si64x(a) simde_mm_cvttsd_si64(a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_cvttsd_si64(a) simde_mm_cvttsd_si64(a) #define _mm_cvttsd_si64x(a) simde_mm_cvttsd_si64x(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_div_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_div_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 / b_.f64; #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vdivq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_div(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] / b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_div_pd(a, b) simde_mm_div_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_div_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_div_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_div_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_div_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t temp = vdivq_f64(a_.neon_f64, b_.neon_f64); r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1); #else r_.f64[0] = a_.f64[0] / b_.f64[0]; r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_div_sd(a, b) simde_mm_div_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_extract_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) { uint16_t r; simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; (void) imm8; #endif r = HEDLEY_STATIC_CAST(uint16_t, vec_extract(a_.altivec_i16, imm8)); #else r = a_.u16[imm8 & 7]; #endif return HEDLEY_STATIC_CAST(int32_t, r); } #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,6,0)) #define simde_mm_extract_epi16(a, imm8) _mm_extract_epi16(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_extract_epi16(a, imm8) (HEDLEY_STATIC_CAST(int32_t, vgetq_lane_s16(simde__m128i_to_private(a).neon_i16, (imm8))) & (INT32_C(0x0000ffff))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_extract_epi16(a, imm8) HEDLEY_STATIC_CAST(int32_t, wasm_u16x8_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 7)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_extract_epi16(a, imm8) simde_mm_extract_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_insert_epi16 (simde__m128i a, int16_t i, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 7) { simde__m128i_private a_ = simde__m128i_to_private(a); a_.i16[imm8 & 7] = i; return simde__m128i_from_private(a_); } #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) #define simde_mm_insert_epi16(a, i, imm8) _mm_insert_epi16((a), (i), (imm8)) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_insert_epi16(a, i, imm8) simde__m128i_from_neon_i16(vsetq_lane_s16((i), simde__m128i_to_neon_i16(a), (imm8))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_insert_epi16(a, i, imm8) wasm_i16x8_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 7, (i)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_insert_epi16(a, i, imm8) simde_mm_insert_epi16(a, i, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_load_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_load_pd(mem_addr); #else simde__m128d_private r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vld1q_f64(mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vld1q_u32(HEDLEY_REINTERPRET_CAST(uint32_t const*, mem_addr)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_load(mem_addr); #else simde_memcpy(&r_, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128d), sizeof(r_)); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_load_pd(mem_addr) simde_mm_load_pd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_load1_pd (simde_float64 const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_load1_pd(mem_addr); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return simde__m128d_from_neon_f64(vld1q_dup_f64(mem_addr)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128d_from_wasm_v128(wasm_v128_load64_splat(mem_addr)); #else return simde_mm_set1_pd(*mem_addr); #endif } #define simde_mm_load_pd1(mem_addr) simde_mm_load1_pd(mem_addr) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_load_pd1(mem_addr) simde_mm_load1_pd(mem_addr) #define _mm_load1_pd(mem_addr) simde_mm_load1_pd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_load_sd (simde_float64 const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_load_sd(mem_addr); #else simde__m128d_private r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsetq_lane_f64(*mem_addr, vdupq_n_f64(0), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_load64_zero(HEDLEY_REINTERPRET_CAST(const void*, mem_addr)); #else r_.f64[0] = *mem_addr; r_.u64[1] = UINT64_C(0); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_load_sd(mem_addr) simde_mm_load_sd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_load_si128 (simde__m128i const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_load_si128(HEDLEY_REINTERPRET_CAST(__m128i const*, mem_addr)); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vld1q_s64(HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr)); #else simde__m128i_private r_; #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_ld(0, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(int) const*, mem_addr)); #else simde_memcpy(&r_, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128i), sizeof(simde__m128i)); #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_load_si128(mem_addr) simde_mm_load_si128(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_loadh_pd (simde__m128d a, simde_float64 const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadh_pd(a, mem_addr); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vcombine_f64(vget_low_f64(a_.neon_f64), vld1_f64(HEDLEY_REINTERPRET_CAST(const float64_t*, mem_addr))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_load64_lane(HEDLEY_REINTERPRET_CAST(const void*, mem_addr), a_.wasm_v128, 1); #else simde_float64 t; simde_memcpy(&t, mem_addr, sizeof(t)); r_.f64[0] = a_.f64[0]; r_.f64[1] = t; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadh_pd(a, mem_addr) simde_mm_loadh_pd(a, mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadl_epi64 (simde__m128i const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadl_epi64(mem_addr); #else simde__m128i_private r_; int64_t value; simde_memcpy(&value, mem_addr, sizeof(value)); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vcombine_s64(vld1_s64(HEDLEY_REINTERPRET_CAST(int64_t const *, mem_addr)), vdup_n_s64(0)); #else r_.i64[0] = value; r_.i64[1] = 0; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadl_epi64(mem_addr) simde_mm_loadl_epi64(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_loadl_pd (simde__m128d a, simde_float64 const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadl_pd(a, mem_addr); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vcombine_f64(vld1_f64( HEDLEY_REINTERPRET_CAST(const float64_t*, mem_addr)), vget_high_f64(a_.neon_f64)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_load64_lane(HEDLEY_REINTERPRET_CAST(const void*, mem_addr), a_.wasm_v128, 0); #else r_.f64[0] = *mem_addr; r_.u64[1] = a_.u64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadl_pd(a, mem_addr) simde_mm_loadl_pd(a, mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_loadr_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadr_pd(mem_addr); #else simde__m128d_private r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vld1q_f64(mem_addr); r_.neon_f64 = vextq_f64(r_.neon_f64, r_.neon_f64, 1); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vld1q_s64(HEDLEY_REINTERPRET_CAST(int64_t const *, mem_addr)); r_.neon_i64 = vextq_s64(r_.neon_i64, r_.neon_i64, 1); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t tmp = wasm_v128_load(mem_addr); r_.wasm_v128 = wasm_i64x2_shuffle(tmp, tmp, 1, 0); #else r_.f64[0] = mem_addr[1]; r_.f64[1] = mem_addr[0]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadr_pd(mem_addr) simde_mm_loadr_pd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_loadu_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_pd(mem_addr); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vld1q_f64(mem_addr); #else simde__m128d_private r_; simde_memcpy(&r_, mem_addr, sizeof(r_)); return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadu_pd(mem_addr) simde_mm_loadu_pd(mem_addr) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \ && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm_loadu_epi8(mem_addr) _mm_loadu_epi8(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_epi8(void const * mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr)); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #endif #define simde_x_mm_loadu_epi8(mem_addr) simde_mm_loadu_epi8(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm_loadu_epi8 #define _mm_loadu_epi8(a) simde_mm_loadu_epi8(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \ && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm_loadu_epi16(mem_addr) _mm_loadu_epi16(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_epi16(void const * mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vreinterpretq_s16_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr))); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #endif #define simde_x_mm_loadu_epi16(mem_addr) simde_mm_loadu_epi16(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm_loadu_epi16 #define _mm_loadu_epi16(a) simde_mm_loadu_epi16(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \ && !defined(SIMDE_BUG_CLANG_REV_344862) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm_loadu_epi32(mem_addr) _mm_loadu_epi32(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_epi32(void const * mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vreinterpretq_s32_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr))); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #endif #define simde_x_mm_loadu_epi32(mem_addr) simde_mm_loadu_epi32(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm_loadu_epi32 #define _mm_loadu_epi32(a) simde_mm_loadu_epi32(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \ && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm_loadu_epi64(mem_addr) _mm_loadu_epi64(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_epi64(void const * mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_si128(SIMDE_ALIGN_CAST(__m128i const *, mem_addr)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vreinterpretq_s64_s8(vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr))); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #endif #define simde_x_mm_loadu_epi64(mem_addr) simde_mm_loadu_epi64(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm_loadu_epi64 #define _mm_loadu_epi64(a) simde_mm_loadu_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_si128 (void const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_loadu_si128(HEDLEY_STATIC_CAST(__m128i const*, mem_addr)); #else simde__m128i_private r_; #if HEDLEY_GNUC_HAS_ATTRIBUTE(may_alias,3,3,0) HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_PACKED_ struct simde_mm_loadu_si128_s { __typeof__(r_) v; } __attribute__((__packed__, __may_alias__)); r_ = HEDLEY_REINTERPRET_CAST(const struct simde_mm_loadu_si128_s *, mem_addr)->v; HEDLEY_DIAGNOSTIC_POP #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vld1q_s8(HEDLEY_REINTERPRET_CAST(int8_t const*, mem_addr)); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadu_si128(mem_addr) simde_mm_loadu_si128(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_madd_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_madd_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) int32x4_t pl = vmull_s16(vget_low_s16(a_.neon_i16), vget_low_s16(b_.neon_i16)); int32x4_t ph = vmull_high_s16(a_.neon_i16, b_.neon_i16); r_.neon_i32 = vpaddq_s32(pl, ph); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x4_t pl = vmull_s16(vget_low_s16(a_.neon_i16), vget_low_s16(b_.neon_i16)); int32x4_t ph = vmull_s16(vget_high_s16(a_.neon_i16), vget_high_s16(b_.neon_i16)); int32x2_t rl = vpadd_s32(vget_low_s32(pl), vget_high_s32(pl)); int32x2_t rh = vpadd_s32(vget_low_s32(ph), vget_high_s32(ph)); r_.neon_i32 = vcombine_s32(rl, rh); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_msum(a_.altivec_i16, b_.altivec_i16, vec_splats(0)); #elif defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_mule(a_.altivec_i16, b_.altivec_i16) + vec_mulo(a_.altivec_i16, b_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_dot_i16x8(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) int32_t SIMDE_VECTOR(32) a32, b32, p32; SIMDE_CONVERT_VECTOR_(a32, a_.i16); SIMDE_CONVERT_VECTOR_(b32, b_.i16); p32 = a32 * b32; r_.i32 = __builtin_shufflevector(p32, p32, 0, 2, 4, 6) + __builtin_shufflevector(p32, p32, 1, 3, 5, 7); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i += 2) { r_.i32[i / 2] = (a_.i16[i] * b_.i16[i]) + (a_.i16[i + 1] * b_.i16[i + 1]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_madd_epi16(a, b) simde_mm_madd_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_maskmoveu_si128 (simde__m128i a, simde__m128i mask, int8_t mem_addr[HEDLEY_ARRAY_PARAM(16)]) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_maskmoveu_si128(a, mask, HEDLEY_REINTERPRET_CAST(char*, mem_addr)); #else simde__m128i_private a_ = simde__m128i_to_private(a), mask_ = simde__m128i_to_private(mask); for (size_t i = 0 ; i < (sizeof(a_.i8) / sizeof(a_.i8[0])) ; i++) { if (mask_.u8[i] & 0x80) { mem_addr[i] = a_.i8[i]; } } #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_maskmoveu_si128(a, mask, mem_addr) simde_mm_maskmoveu_si128((a), (mask), SIMDE_CHECKED_REINTERPRET_CAST(int8_t*, char*, (mem_addr))) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_movemask_epi8 (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__INTEL_COMPILER) /* ICC has trouble with _mm_movemask_epi8 at -O2 and above: */ return _mm_movemask_epi8(a); #else int32_t r = 0; simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* https://github.com/WebAssembly/simd/pull/201#issue-380682845 */ static const uint8_t md[16] = { 1 << 0, 1 << 1, 1 << 2, 1 << 3, 1 << 4, 1 << 5, 1 << 6, 1 << 7, 1 << 0, 1 << 1, 1 << 2, 1 << 3, 1 << 4, 1 << 5, 1 << 6, 1 << 7, }; /* Extend sign bit over entire lane */ uint8x16_t extended = vreinterpretq_u8_s8(vshrq_n_s8(a_.neon_i8, 7)); /* Clear all but the bit we're interested in. */ uint8x16_t masked = vandq_u8(vld1q_u8(md), extended); /* Alternate bytes from low half and high half */ uint8x8x2_t tmp = vzip_u8(vget_low_u8(masked), vget_high_u8(masked)); uint16x8_t x = vreinterpretq_u16_u8(vcombine_u8(tmp.val[0], tmp.val[1])); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vaddvq_u16(x); #else uint64x2_t t64 = vpaddlq_u32(vpaddlq_u16(x)); r = HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(t64, 0)) + HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(t64, 1)); #endif #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(HEDLEY_IBM_VERSION) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) perm = { 120, 112, 104, 96, 88, 80, 72, 64, 56, 48, 40, 32, 24, 16, 8, 0 }; r = HEDLEY_STATIC_CAST(int32_t, vec_extract(vec_vbpermq(a_.altivec_u8, perm), 1)); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(HEDLEY_IBM_VERSION) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_BIG) static const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) perm = { 120, 112, 104, 96, 88, 80, 72, 64, 56, 48, 40, 32, 24, 16, 8, 0 }; r = HEDLEY_STATIC_CAST(int32_t, vec_extract(vec_vbpermq(a_.altivec_u8, perm), 14)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = HEDLEY_STATIC_CAST(int32_t, wasm_i8x16_bitmask(a_.wasm_v128)); #else SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u8) / sizeof(a_.u8[0])) ; i++) { r |= (a_.u8[15 - i] >> 7) << (15 - i); } #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_movemask_epi8(a) simde_mm_movemask_epi8(a) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_movemask_pd (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_movemask_pd(a); #else int32_t r = 0; simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ uint64x2_t shifted = vshrq_n_u64(a_.neon_u64, 63); r = HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(shifted, 0)) + (HEDLEY_STATIC_CAST(int32_t, vgetq_lane_u64(shifted, 1)) << 1); HEDLEY_DIAGNOSTIC_POP #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && defined(SIMDE_BUG_CLANG_50932) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 64, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }; SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_bperm(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned __int128), a_.altivec_u64), idx)); r = HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2)); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) idx = { 64, 0, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }; SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) res = vec_bperm(a_.altivec_u8, idx); r = HEDLEY_STATIC_CAST(int32_t, vec_extract(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), res), 2)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_bitmask(a_.wasm_v128)); #else SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { r |= (a_.u64[i] >> 63) << i; } #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_movemask_pd(a) simde_mm_movemask_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_movepi64_pi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_movepi64_pi64(a); #else simde__m64_private r_; simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i64 = vget_low_s64(a_.neon_i64); #else r_.i64[0] = a_.i64[0]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_movepi64_pi64(a) simde_mm_movepi64_pi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_movpi64_epi64 (simde__m64 a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_movpi64_epi64(a); #else simde__m128i_private r_; simde__m64_private a_ = simde__m64_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vcombine_s64(a_.neon_i64, vdup_n_s64(0)); #else r_.i64[0] = a_.i64[0]; r_.i64[1] = 0; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_movpi64_epi64(a) simde_mm_movpi64_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_min_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vminq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = vec_min(a_.altivec_i16, b_.altivec_i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (a_.i16[i] < b_.i16[i]) ? a_.i16[i] : b_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_min_epi16(a, b) simde_mm_min_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_min_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vminq_u8(a_.neon_u8, b_.neon_u8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u8 = vec_min(a_.altivec_u8, b_.altivec_u8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { r_.u8[i] = (a_.u8[i] < b_.u8[i]) ? a_.u8[i] : b_.u8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_min_epu8(a, b) simde_mm_min_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_min_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_min_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_min(a_.altivec_f64, b_.altivec_f64); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vminq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_min(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (a_.f64[i] < b_.f64[i]) ? a_.f64[i] : b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_min_pd(a, b) simde_mm_min_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_min_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_min_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_min_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_min_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t temp = vminq_f64(a_.neon_f64, b_.neon_f64); r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1); #else r_.f64[0] = (a_.f64[0] < b_.f64[0]) ? a_.f64[0] : b_.f64[0]; r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_min_sd(a, b) simde_mm_min_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_max_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vmaxq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = vec_max(a_.altivec_i16, b_.altivec_i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (a_.i16[i] > b_.i16[i]) ? a_.i16[i] : b_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_max_epi16(a, b) simde_mm_max_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_max_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vmaxq_u8(a_.neon_u8, b_.neon_u8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u8 = vec_max(a_.altivec_u8, b_.altivec_u8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { r_.u8[i] = (a_.u8[i] > b_.u8[i]) ? a_.u8[i] : b_.u8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_max_epu8(a, b) simde_mm_max_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_max_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_max_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_max(a_.altivec_f64, b_.altivec_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vmaxq_f64(a_.neon_f64, b_.neon_f64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (a_.f64[i] > b_.f64[i]) ? a_.f64[i] : b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_max_pd(a, b) simde_mm_max_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_max_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_max_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_max_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_max_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t temp = vmaxq_f64(a_.neon_f64, b_.neon_f64); r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1); #else r_.f64[0] = (a_.f64[0] > b_.f64[0]) ? a_.f64[0] : b_.f64[0]; r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_max_sd(a, b) simde_mm_max_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_move_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_move_epi64(a); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vsetq_lane_s64(0, a_.neon_i64, 1); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, wasm_i64x2_const(0, 0), 0, 2); #else r_.i64[0] = a_.i64[0]; r_.i64[1] = 0; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_move_epi64(a) simde_mm_move_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mul_epu32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_mul_epu32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x2_t a_lo = vmovn_u64(a_.neon_u64); uint32x2_t b_lo = vmovn_u64(b_.neon_u64); r_.neon_u64 = vmull_u32(a_lo, b_lo); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u64x2_extmul_low_u32x4( wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 2, 0, 2), wasm_i32x4_shuffle(b_.wasm_v128, b_.wasm_v128, 0, 2, 0, 2)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(a_.u32) z = { 0, }; a_.u32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.u32, z, 0, 4, 2, 6); b_.u32 = SIMDE_SHUFFLE_VECTOR_(32, 16, b_.u32, z, 0, 4, 2, 6); r_.u64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), a_.u32) * HEDLEY_REINTERPRET_CAST(__typeof__(r_.u64), b_.u32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[i * 2]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[i * 2]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mul_epu32(a, b) simde_mm_mul_epu32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_mul_epi64 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_mul(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 * b_.i64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] * b_.i64[i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_mod_epi64 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_PGI_30104) r_.i64 = a_.i64 % b_.i64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] % b_.i64[i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_mul_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_mul_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 * b_.f64; #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vmulq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_mul(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] * b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mul_pd(a, b) simde_mm_mul_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_mul_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_mul_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_mul_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_mul_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t temp = vmulq_f64(a_.neon_f64, b_.neon_f64); r_.neon_f64 = vsetq_lane_f64(vgetq_lane(a_.neon_f64, 1), temp, 1); #else r_.f64[0] = a_.f64[0] * b_.f64[0]; r_.f64[1] = a_.f64[1]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mul_sd(a, b) simde_mm_mul_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_mul_su32 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) && !defined(__PGI) return _mm_mul_su32(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.u64[0] = vget_lane_u64(vget_low_u64(vmull_u32(vreinterpret_u32_s64(a_.neon_i64), vreinterpret_u32_s64(b_.neon_i64))), 0); #else r_.u64[0] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[0]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[0]); #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mul_su32(a, b) simde_mm_mul_su32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mulhi_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_mulhi_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4_t a3210 = vget_low_s16(a_.neon_i16); int16x4_t b3210 = vget_low_s16(b_.neon_i16); int32x4_t ab3210 = vmull_s16(a3210, b3210); /* 3333222211110000 */ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) int32x4_t ab7654 = vmull_high_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = vuzp2q_s16(vreinterpretq_s16_s32(ab3210), vreinterpretq_s16_s32(ab7654)); #else int16x4_t a7654 = vget_high_s16(a_.neon_i16); int16x4_t b7654 = vget_high_s16(b_.neon_i16); int32x4_t ab7654 = vmull_s16(a7654, b7654); /* 7777666655554444 */ uint16x8x2_t rv = vuzpq_u16(vreinterpretq_u16_s32(ab3210), vreinterpretq_u16_s32(ab7654)); r_.neon_u16 = rv.val[1]; #endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) const v128_t lo = wasm_i32x4_extmul_low_i16x8(a_.wasm_v128, b_.wasm_v128); const v128_t hi = wasm_i32x4_extmul_high_i16x8(a_.wasm_v128, b_.wasm_v128); r_.wasm_v128 = wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (HEDLEY_STATIC_CAST(uint32_t, HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) >> 16)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mulhi_epi16(a, b) simde_mm_mulhi_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mulhi_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) return _mm_mulhi_epu16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x4_t a3210 = vget_low_u16(a_.neon_u16); uint16x4_t b3210 = vget_low_u16(b_.neon_u16); uint32x4_t ab3210 = vmull_u16(a3210, b3210); /* 3333222211110000 */ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint32x4_t ab7654 = vmull_high_u16(a_.neon_u16, b_.neon_u16); r_.neon_u16 = vuzp2q_u16(vreinterpretq_u16_u32(ab3210), vreinterpretq_u16_u32(ab7654)); #else uint16x4_t a7654 = vget_high_u16(a_.neon_u16); uint16x4_t b7654 = vget_high_u16(b_.neon_u16); uint32x4_t ab7654 = vmull_u16(a7654, b7654); /* 7777666655554444 */ uint16x8x2_t neon_r = vuzpq_u16(vreinterpretq_u16_u32(ab3210), vreinterpretq_u16_u32(ab7654)); r_.neon_u16 = neon_r.val[1]; #endif #elif defined(SIMDE_WASM_SIMD128_NATIVE) const v128_t lo = wasm_u32x4_extmul_low_u16x8(a_.wasm_v128, b_.wasm_v128); const v128_t hi = wasm_u32x4_extmul_high_u16x8(a_.wasm_v128, b_.wasm_v128); r_.wasm_v128 = wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i]) >> 16); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mulhi_epu16(a, b) simde_mm_mulhi_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mullo_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_mullo_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vmulq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) (void) a_; (void) b_; r_.altivec_i16 = vec_mul(a_.altivec_i16, b_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_mul(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint32_t, a_.u16[i]) * HEDLEY_STATIC_CAST(uint32_t, b_.u16[i])); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mullo_epi16(a, b) simde_mm_mullo_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_or_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_or_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f | b_.i32f; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_or(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vorrq_s64(a_.neon_i64, b_.neon_i64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] | b_.i32f[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_or_pd(a, b) simde_mm_or_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_or_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_or_si128(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vorrq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_or(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_or(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f | b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] | b_.i32f[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_or_si128(a, b) simde_mm_or_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_packs_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_packs_epi16(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i8 = vqmovn_high_s16(vqmovn_s16(a_.neon_i16), b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vcombine_s8(vqmovn_s16(a_.neon_i16), vqmovn_s16(b_.neon_i16)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i8 = vec_packs(a_.altivec_i16, b_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_narrow_i16x8(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) int16_t SIMDE_VECTOR(32) v = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); const int16_t SIMDE_VECTOR(32) min = { INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN, INT8_MIN }; const int16_t SIMDE_VECTOR(32) max = { INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX }; int16_t m SIMDE_VECTOR(32); m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v < min); v = (v & ~m) | (min & m); m = v > max; v = (v & ~m) | (max & m); SIMDE_CONVERT_VECTOR_(r_.i8, v); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { int16_t v = (i < (sizeof(a_.i16) / sizeof(a_.i16[0]))) ? a_.i16[i] : b_.i16[i & 7]; r_.i8[i] = (v < INT8_MIN) ? INT8_MIN : ((v > INT8_MAX) ? INT8_MAX : HEDLEY_STATIC_CAST(int8_t, v)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_packs_epi16(a, b) simde_mm_packs_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_packs_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_packs_epi32(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vqmovn_high_s32(vqmovn_s32(a_.neon_i32), b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vcombine_s16(vqmovn_s32(a_.neon_i32), vqmovn_s32(b_.neon_i32)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i16 = vec_packs(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.sse_m128i = _mm_packs_epi32(a_.sse_m128i, b_.sse_m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_narrow_i32x4(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) int32_t SIMDE_VECTOR(32) v = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 1, 2, 3, 4, 5, 6, 7); const int32_t SIMDE_VECTOR(32) min = { INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN, INT16_MIN }; const int32_t SIMDE_VECTOR(32) max = { INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX }; int32_t m SIMDE_VECTOR(32); m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v < min); v = (v & ~m) | (min & m); m = HEDLEY_REINTERPRET_CAST(__typeof__(m), v > max); v = (v & ~m) | (max & m); SIMDE_CONVERT_VECTOR_(r_.i16, v); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { int32_t v = (i < (sizeof(a_.i32) / sizeof(a_.i32[0]))) ? a_.i32[i] : b_.i32[i & 3]; r_.i16[i] = (v < INT16_MIN) ? INT16_MIN : ((v > INT16_MAX) ? INT16_MAX : HEDLEY_STATIC_CAST(int16_t, v)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_packs_epi32(a, b) simde_mm_packs_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_packus_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_packus_epi16(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_46840) r_.neon_u8 = vqmovun_high_s16(vreinterpret_s8_u8(vqmovun_s16(a_.neon_i16)), b_.neon_i16); #else r_.neon_u8 = vqmovun_high_s16(vqmovun_s16(a_.neon_i16), b_.neon_i16); #endif #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vcombine_u8( vqmovun_s16(a_.neon_i16), vqmovun_s16(b_.neon_i16) ); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u8 = vec_packsu(a_.altivec_i16, b_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_narrow_i16x8(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) int16_t v SIMDE_VECTOR(32) = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); v &= ~(v >> 15); v |= HEDLEY_REINTERPRET_CAST(__typeof__(v), v > UINT8_MAX); SIMDE_CONVERT_VECTOR_(r_.i8, v); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { int16_t v = (i < (sizeof(a_.i16) / sizeof(a_.i16[0]))) ? a_.i16[i] : b_.i16[i & 7]; r_.u8[i] = (v < 0) ? UINT8_C(0) : ((v > UINT8_MAX) ? UINT8_MAX : HEDLEY_STATIC_CAST(uint8_t, v)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_packus_epi16(a, b) simde_mm_packus_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_pause (void) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_pause(); #elif defined(SIMDE_ARCH_X86) #if defined(_MSC_VER) __asm pause; #else __asm__ __volatile__("pause"); #endif #elif defined(SIMDE_ARCH_ARM_NEON) #if defined(_MSC_VER) __isb(_ARM64_BARRIER_SY); #else __asm__ __volatile__("isb\n"); #endif #elif defined(SIMDE_ARCH_POWER) __asm__ __volatile__ ("or 27,27,27" ::: "memory"); #elif defined(SIMDE_ARCH_WASM) __asm__ __volatile__ ("nop"); #elif defined(HEDLEY_GCC_VERSION) #if defined(SIMDE_ARCH_RISCV) __builtin_riscv_pause(); #else __asm__ __volatile__ ("nop" ::: "memory"); #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_pause() (simde_mm_pause()) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sad_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sad_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) const uint16x8_t t = vpaddlq_u8(vabdq_u8(a_.neon_u8, b_.neon_u8)); r_.neon_u64 = vcombine_u64( vpaddl_u32(vpaddl_u16(vget_low_u16(t))), vpaddl_u32(vpaddl_u16(vget_high_u16(t)))); #else for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { uint16_t tmp = 0; SIMDE_VECTORIZE_REDUCTION(+:tmp) for (size_t j = 0 ; j < ((sizeof(r_.u8) / sizeof(r_.u8[0])) / 2) ; j++) { const size_t e = j + (i * 8); tmp += (a_.u8[e] > b_.u8[e]) ? (a_.u8[e] - b_.u8[e]) : (b_.u8[e] - a_.u8[e]); } r_.i64[i] = tmp; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sad_epu8(a, b) simde_mm_sad_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set_epi8 (int8_t e15, int8_t e14, int8_t e13, int8_t e12, int8_t e11, int8_t e10, int8_t e9, int8_t e8, int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi8( e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m128i_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_make( e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(int8x16_t) int8_t data[16] = { e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15}; r_.neon_i8 = vld1q_s8(data); #else r_.i8[ 0] = e0; r_.i8[ 1] = e1; r_.i8[ 2] = e2; r_.i8[ 3] = e3; r_.i8[ 4] = e4; r_.i8[ 5] = e5; r_.i8[ 6] = e6; r_.i8[ 7] = e7; r_.i8[ 8] = e8; r_.i8[ 9] = e9; r_.i8[10] = e10; r_.i8[11] = e11; r_.i8[12] = e12; r_.i8[13] = e13; r_.i8[14] = e14; r_.i8[15] = e15; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_set_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set_epi16 (int16_t e7, int16_t e6, int16_t e5, int16_t e4, int16_t e3, int16_t e2, int16_t e1, int16_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi16(e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(int16x8_t) int16_t data[8] = { e0, e1, e2, e3, e4, e5, e6, e7 }; r_.neon_i16 = vld1q_s16(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_make(e0, e1, e2, e3, e4, e5, e6, e7); #else r_.i16[0] = e0; r_.i16[1] = e1; r_.i16[2] = e2; r_.i16[3] = e3; r_.i16[4] = e4; r_.i16[5] = e5; r_.i16[6] = e6; r_.i16[7] = e7; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_epi16(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_set_epi16(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_si16 (void const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1) || \ HEDLEY_GCC_VERSION_CHECK(12,1,0)) return _mm_loadu_si16(mem_addr); #else int16_t val; simde_memcpy(&val, mem_addr, sizeof(val)); return simde_x_mm_cvtsi16_si128(val); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadu_si16(mem_addr) simde_mm_loadu_si16(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set_epi32 (int32_t e3, int32_t e2, int32_t e1, int32_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi32(e3, e2, e1, e0); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(int32x4_t) int32_t data[4] = { e0, e1, e2, e3 }; r_.neon_i32 = vld1q_s32(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_make(e0, e1, e2, e3); #else r_.i32[0] = e0; r_.i32[1] = e1; r_.i32[2] = e2; r_.i32[3] = e3; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_epi32(e3, e2, e1, e0) simde_mm_set_epi32(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_si32 (void const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1) || \ HEDLEY_GCC_VERSION_CHECK(12,1,0)) return _mm_loadu_si32(mem_addr); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128i_from_wasm_v128(wasm_v128_load32_zero(mem_addr)); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde__m128i_private r_; r_.neon_i32 = vsetq_lane_s32(* HEDLEY_REINTERPRET_CAST(const int32_t *, mem_addr), vdupq_n_s32(0), 0); return simde__m128i_from_private(r_); #else int32_t val; simde_memcpy(&val, mem_addr, sizeof(val)); return simde_mm_cvtsi32_si128(val); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadu_si32(mem_addr) simde_mm_loadu_si32(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set_epi64 (simde__m64 e1, simde__m64 e0) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_set_epi64(e1, e0); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vcombine_s64(simde__m64_to_neon_i64(e0), simde__m64_to_neon_i64(e1)); #else r_.m64[0] = e0; r_.m64[1] = e1; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_epi64(e1, e0) (simde_mm_set_epi64((e1), (e0))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set_epi64x (int64_t e1, int64_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0)) return _mm_set_epi64x(e1, e0); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(int64x2_t) int64_t data[2] = {e0, e1}; r_.neon_i64 = vld1q_s64(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_make(e0, e1); #else r_.i64[0] = e0; r_.i64[1] = e1; #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_epi64x(e1, e0) simde_mm_set_epi64x(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_loadu_si64 (void const* mem_addr) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_GCC_VERSION_CHECK(11,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1)) return _mm_loadu_si64(mem_addr); #else int64_t val; simde_memcpy(&val, mem_addr, sizeof(val)); return simde_mm_cvtsi64_si128(val); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_loadu_si64(mem_addr) simde_mm_loadu_si64(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set_epu8 (uint8_t e15, uint8_t e14, uint8_t e13, uint8_t e12, uint8_t e11, uint8_t e10, uint8_t e9, uint8_t e8, uint8_t e7, uint8_t e6, uint8_t e5, uint8_t e4, uint8_t e3, uint8_t e2, uint8_t e1, uint8_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi8( HEDLEY_STATIC_CAST(char, e15), HEDLEY_STATIC_CAST(char, e14), HEDLEY_STATIC_CAST(char, e13), HEDLEY_STATIC_CAST(char, e12), HEDLEY_STATIC_CAST(char, e11), HEDLEY_STATIC_CAST(char, e10), HEDLEY_STATIC_CAST(char, e9), HEDLEY_STATIC_CAST(char, e8), HEDLEY_STATIC_CAST(char, e7), HEDLEY_STATIC_CAST(char, e6), HEDLEY_STATIC_CAST(char, e5), HEDLEY_STATIC_CAST(char, e4), HEDLEY_STATIC_CAST(char, e3), HEDLEY_STATIC_CAST(char, e2), HEDLEY_STATIC_CAST(char, e1), HEDLEY_STATIC_CAST(char, e0)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(uint8x16_t) uint8_t data[16] = { e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15}; r_.neon_u8 = vld1q_u8(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_make(e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15); #else r_.u8[ 0] = e0; r_.u8[ 1] = e1; r_.u8[ 2] = e2; r_.u8[ 3] = e3; r_.u8[ 4] = e4; r_.u8[ 5] = e5; r_.u8[ 6] = e6; r_.u8[ 7] = e7; r_.u8[ 8] = e8; r_.u8[ 9] = e9; r_.u8[10] = e10; r_.u8[11] = e11; r_.u8[12] = e12; r_.u8[13] = e13; r_.u8[14] = e14; r_.u8[15] = e15; #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set_epu16 (uint16_t e7, uint16_t e6, uint16_t e5, uint16_t e4, uint16_t e3, uint16_t e2, uint16_t e1, uint16_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi16( HEDLEY_STATIC_CAST(short, e7), HEDLEY_STATIC_CAST(short, e6), HEDLEY_STATIC_CAST(short, e5), HEDLEY_STATIC_CAST(short, e4), HEDLEY_STATIC_CAST(short, e3), HEDLEY_STATIC_CAST(short, e2), HEDLEY_STATIC_CAST(short, e1), HEDLEY_STATIC_CAST(short, e0)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(uint16x8_t) uint16_t data[8] = { e0, e1, e2, e3, e4, e5, e6, e7 }; r_.neon_u16 = vld1q_u16(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_make(e0, e1, e2, e3, e4, e5, e6, e7); #else r_.u16[0] = e0; r_.u16[1] = e1; r_.u16[2] = e2; r_.u16[3] = e3; r_.u16[4] = e4; r_.u16[5] = e5; r_.u16[6] = e6; r_.u16[7] = e7; #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set_epu32 (uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_epi32( HEDLEY_STATIC_CAST(int, e3), HEDLEY_STATIC_CAST(int, e2), HEDLEY_STATIC_CAST(int, e1), HEDLEY_STATIC_CAST(int, e0)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(uint32x4_t) uint32_t data[4] = { e0, e1, e2, e3 }; r_.neon_u32 = vld1q_u32(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_make(e0, e1, e2, e3); #else r_.u32[0] = e0; r_.u32[1] = e1; r_.u32[2] = e2; r_.u32[3] = e3; #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set_epu64x (uint64_t e1, uint64_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0)) return _mm_set_epi64x(HEDLEY_STATIC_CAST(int64_t, e1), HEDLEY_STATIC_CAST(int64_t, e0)); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_ALIGN_LIKE_16(uint64x2_t) uint64_t data[2] = {e0, e1}; r_.neon_u64 = vld1q_u64(data); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u64x2_make(e0, e1); #else r_.u64[0] = e0; r_.u64[1] = e1; #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_set_sd (simde_float64 a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set_sd(a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsetq_lane_f64(a, vdupq_n_f64(SIMDE_FLOAT64_C(0.0)), 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128d_from_wasm_v128(wasm_f64x2_make(a, 0)); #else return simde_mm_set_pd(SIMDE_FLOAT64_C(0.0), a); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set_sd(a) simde_mm_set_sd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set1_epi8 (int8_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set1_epi8(a); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vdupq_n_s8(a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_splat(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_splats(HEDLEY_STATIC_CAST(signed char, a)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_epi8(a) simde_mm_set1_epi8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set1_epi16 (int16_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set1_epi16(a); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vdupq_n_s16(a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_splat(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = vec_splats(HEDLEY_STATIC_CAST(signed short, a)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_epi16(a) simde_mm_set1_epi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set1_epi32 (int32_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_set1_epi32(a); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vdupq_n_s32(a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_splat(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_splats(HEDLEY_STATIC_CAST(signed int, a)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_epi32(a) simde_mm_set1_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set1_epi64x (int64_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,0,0)) return _mm_set1_epi64x(a); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vdupq_n_s64(a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_splat(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i64 = vec_splats(HEDLEY_STATIC_CAST(signed long long, a)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_epi64x(a) simde_mm_set1_epi64x(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_set1_epi64 (simde__m64 a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_set1_epi64(a); #else simde__m64_private a_ = simde__m64_to_private(a); return simde_mm_set1_epi64x(a_.i64[0]); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_set1_epi64(a) simde_mm_set1_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set1_epu8 (uint8_t value) { #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return simde__m128i_from_altivec_u8(vec_splats(HEDLEY_STATIC_CAST(unsigned char, value))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128i_from_wasm_v128(wasm_u8x16_splat(value)); #else return simde_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, value)); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set1_epu16 (uint16_t value) { #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return simde__m128i_from_altivec_u16(vec_splats(HEDLEY_STATIC_CAST(unsigned short, value))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128i_from_wasm_v128(wasm_u16x8_splat(value)); #else return simde_mm_set1_epi16(HEDLEY_STATIC_CAST(int16_t, value)); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set1_epu32 (uint32_t value) { #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return simde__m128i_from_altivec_u32(vec_splats(HEDLEY_STATIC_CAST(unsigned int, value))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128i_from_wasm_v128(wasm_u32x4_splat(value)); #else return simde_mm_set1_epi32(HEDLEY_STATIC_CAST(int32_t, value)); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_set1_epu64 (uint64_t value) { #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return simde__m128i_from_altivec_u64(vec_splats(HEDLEY_STATIC_CAST(unsigned long long, value))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128i_from_wasm_v128(wasm_u64x2_splat(value)); #else return simde_mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, value)); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_setr_epi8 (int8_t e15, int8_t e14, int8_t e13, int8_t e12, int8_t e11, int8_t e10, int8_t e9, int8_t e8, int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setr_epi8( e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm_set_epi8( e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_setr_epi8(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_setr_epi16 (int16_t e7, int16_t e6, int16_t e5, int16_t e4, int16_t e3, int16_t e2, int16_t e1, int16_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setr_epi16(e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm_set_epi16(e0, e1, e2, e3, e4, e5, e6, e7); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setr_epi16(e7, e6, e5, e4, e3, e2, e1, e0) simde_mm_setr_epi16(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_setr_epi32 (int32_t e3, int32_t e2, int32_t e1, int32_t e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setr_epi32(e3, e2, e1, e0); #else return simde_mm_set_epi32(e0, e1, e2, e3); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setr_epi32(e3, e2, e1, e0) simde_mm_setr_epi32(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_setr_epi64 (simde__m64 e1, simde__m64 e0) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_setr_epi64(e1, e0); #else return simde_mm_set_epi64(e0, e1); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setr_epi64(e1, e0) (simde_mm_setr_epi64((e1), (e0))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_setr_pd (simde_float64 e1, simde_float64 e0) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setr_pd(e1, e0); #else return simde_mm_set_pd(e0, e1); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setr_pd(e1, e0) simde_mm_setr_pd(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_setzero_pd (void) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_setzero_pd(); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128d_from_wasm_v128(wasm_f64x2_const(0.0, 0.0)); #else return simde_mm_castsi128_pd(simde_mm_setzero_si128()); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_setzero_pd() simde_mm_setzero_pd() #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_undefined_pd (void) { simde__m128d_private r_; #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE__HAVE_UNDEFINED128) r_.n = _mm_undefined_pd(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m128d_to_private(simde_mm_setzero_pd()); #endif return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_undefined_pd() simde_mm_undefined_pd() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_undefined_si128 (void) { simde__m128i_private r_; #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE__HAVE_UNDEFINED128) r_.n = _mm_undefined_si128(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m128i_to_private(simde_mm_setzero_si128()); #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_undefined_si128() (simde_mm_undefined_si128()) #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_POP #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_setone_pd (void) { return simde_mm_castps_pd(simde_x_mm_setone_ps()); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_setone_si128 (void) { return simde_mm_castps_si128(simde_x_mm_setone_ps()); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_shuffle_epi32 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[(imm8 >> (i * 2)) & 3]; } return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_shuffle_epi32(a, imm8) _mm_shuffle_epi32((a), (imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_shuffle_epi32(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ simde__m128i_from_wasm_v128( \ wasm_i32x4_shuffle( \ (simde_tmp_a_).wasm_v128, \ (simde_tmp_a_).wasm_v128, \ ((imm8) ) & 3, \ ((imm8) >> 2) & 3, \ ((imm8) >> 4) & 3, \ ((imm8) >> 6) & 3)); })) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm_shuffle_epi32(a, imm8) \ (__extension__ ({ \ const int32x4_t simde_mm_shuffle_epi32_a_ = simde__m128i_to_neon_i32(a); \ int32x4_t simde_mm_shuffle_epi32_r_; \ simde_mm_shuffle_epi32_r_ = vmovq_n_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, (imm8) & (0x3))); \ simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 2) & 0x3), simde_mm_shuffle_epi32_r_, 1); \ simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 4) & 0x3), simde_mm_shuffle_epi32_r_, 2); \ simde_mm_shuffle_epi32_r_ = vsetq_lane_s32(vgetq_lane_s32(simde_mm_shuffle_epi32_a_, ((imm8) >> 6) & 0x3), simde_mm_shuffle_epi32_r_, 3); \ vreinterpretq_s64_s32(simde_mm_shuffle_epi32_r_); \ })) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_shuffle_epi32(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ simde__m128i_from_private((simde__m128i_private) { .i32 = \ SIMDE_SHUFFLE_VECTOR_(32, 16, \ (simde_tmp_a_).i32, \ (simde_tmp_a_).i32, \ ((imm8) ) & 3, \ ((imm8) >> 2) & 3, \ ((imm8) >> 4) & 3, \ ((imm8) >> 6) & 3) }); })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_shuffle_epi32(a, imm8) simde_mm_shuffle_epi32(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_shuffle_pd (simde__m128d a, simde__m128d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.f64[0] = ((imm8 & 1) == 0) ? a_.f64[0] : a_.f64[1]; r_.f64[1] = ((imm8 & 2) == 0) ? b_.f64[0] : b_.f64[1]; return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(__PGI) #define simde_mm_shuffle_pd(a, b, imm8) _mm_shuffle_pd((a), (b), (imm8)) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_shuffle_pd(a, b, imm8) (__extension__ ({ \ simde__m128d_from_private((simde__m128d_private) { .f64 = \ SIMDE_SHUFFLE_VECTOR_(64, 16, \ simde__m128d_to_private(a).f64, \ simde__m128d_to_private(b).f64, \ (((imm8) ) & 1), \ (((imm8) >> 1) & 1) + 2) }); })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_shuffle_pd(a, b, imm8) simde_mm_shuffle_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_shufflehi_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i++) { r_.i16[i] = a_.i16[i]; } for (size_t i = ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[((imm8 >> ((i - 4) * 2)) & 3) + 4]; } return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_shufflehi_epi16(a, imm8) _mm_shufflehi_epi16((a), (imm8)) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm_shufflehi_epi16(a, imm8) \ (__extension__ ({ \ int16x8_t simde_mm_shufflehi_epi16_a_ = simde__m128i_to_neon_i16(a); \ int16x8_t simde_mm_shufflehi_epi16_r_ = simde_mm_shufflehi_epi16_a_; \ simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) ) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 4); \ simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 2) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 5); \ simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 4) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 6); \ simde_mm_shufflehi_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflehi_epi16_a_, (((imm8) >> 6) & 0x3) + 4), simde_mm_shufflehi_epi16_r_, 7); \ simde__m128i_from_neon_i16(simde_mm_shufflehi_epi16_r_); \ })) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_shufflehi_epi16(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ simde__m128i_from_private((simde__m128i_private) { .wasm_v128 = \ wasm_i16x8_shuffle( \ (simde_tmp_a_).wasm_v128, \ (simde_tmp_a_).wasm_v128, \ 0, 1, 2, 3, \ (((imm8) ) & 3) + 4, \ (((imm8) >> 2) & 3) + 4, \ (((imm8) >> 4) & 3) + 4, \ (((imm8) >> 6) & 3) + 4) }); })) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_shufflehi_epi16(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ simde__m128i_from_private((simde__m128i_private) { .i16 = \ SIMDE_SHUFFLE_VECTOR_(16, 16, \ (simde_tmp_a_).i16, \ (simde_tmp_a_).i16, \ 0, 1, 2, 3, \ (((imm8) ) & 3) + 4, \ (((imm8) >> 2) & 3) + 4, \ (((imm8) >> 4) & 3) + 4, \ (((imm8) >> 6) & 3) + 4) }); })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_shufflehi_epi16(a, imm8) simde_mm_shufflehi_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_shufflelo_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) { r_.i16[i] = a_.i16[((imm8 >> (i * 2)) & 3)]; } SIMDE_VECTORIZE for (size_t i = ((sizeof(a_.i16) / sizeof(a_.i16[0])) / 2) ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[i]; } return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_shufflelo_epi16(a, imm8) _mm_shufflelo_epi16((a), (imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_shufflelo_epi16(a, imm8) \ simde__m128i_from_wasm_v128( \ wasm_i16x8_shuffle( \ simde__m128i_to_wasm_v128((a)), \ wasm_i16x8_splat(0), \ (((imm8) & 0x03) ), \ (((imm8) & 0x0c) >> 2), \ (((imm8) & 0x30) >> 4), \ (((imm8) & 0xc0) >> 6), \ 4, 5, 6, 7)) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm_shufflelo_epi16(a, imm8) \ (__extension__({ \ int16x8_t simde_mm_shufflelo_epi16_a_ = simde__m128i_to_neon_i16(a); \ int16x8_t simde_mm_shufflelo_epi16_r_ = simde_mm_shufflelo_epi16_a_; \ simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) ) & 0x3)), simde_mm_shufflelo_epi16_r_, 0); \ simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 2) & 0x3)), simde_mm_shufflelo_epi16_r_, 1); \ simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 4) & 0x3)), simde_mm_shufflelo_epi16_r_, 2); \ simde_mm_shufflelo_epi16_r_ = vsetq_lane_s16(vgetq_lane_s16(simde_mm_shufflelo_epi16_a_, (((imm8) >> 6) & 0x3)), simde_mm_shufflelo_epi16_r_, 3); \ simde__m128i_from_neon_i16(simde_mm_shufflelo_epi16_r_); \ })) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_shufflelo_epi16(a, imm8) (__extension__ ({ \ const simde__m128i_private simde_tmp_a_ = simde__m128i_to_private(a); \ simde__m128i_from_private((simde__m128i_private) { .i16 = \ SIMDE_SHUFFLE_VECTOR_(16, 16, \ (simde_tmp_a_).i16, \ (simde_tmp_a_).i16, \ (((imm8) ) & 3), \ (((imm8) >> 2) & 3), \ (((imm8) >> 4) & 3), \ (((imm8) >> 6) & 3), \ 4, 5, 6, 7) }); })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_shufflelo_epi16(a, imm8) simde_mm_shufflelo_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sll_epi16 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sll_epi16(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); if (count_.u64[0] > 15) return simde_mm_setzero_si128(); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.u16 = (a_.u16 << count_.u64[0]); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, count_.u64[0]))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 16) ? wasm_i16x8_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.u16[i] << count_.u64[0])); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sll_epi16(a, count) simde_mm_sll_epi16((a), (count)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sll_epi32 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sll_epi32(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); if (count_.u64[0] > 31) return simde_mm_setzero_si128(); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.u32 = (a_.u32 << count_.u64[0]); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, count_.u64[0]))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 32) ? wasm_i32x4_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i32x4_const(0,0,0,0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (a_.u32[i] << count_.u64[0])); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sll_epi32(a, count) (simde_mm_sll_epi32(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sll_epi64 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sll_epi64(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); if (count_.u64[0] > 63) return simde_mm_setzero_si128(); const int_fast16_t s = HEDLEY_STATIC_CAST(int_fast16_t, count_.u64[0]); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(HEDLEY_STATIC_CAST(int64_t, s))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = (s < 64) ? wasm_i64x2_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, s)) : wasm_i64x2_const(0,0); #else #if !defined(SIMDE_BUG_GCC_94488) SIMDE_VECTORIZE #endif for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = a_.u64[i] << s; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sll_epi64(a, count) (simde_mm_sll_epi64(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_sqrt_pd (simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sqrt_pd(a); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsqrtq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_sqrt(a_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = vec_sqrt(a_.altivec_f64); #elif defined(simde_math_sqrt) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_sqrt(a_.f64[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sqrt_pd(a) simde_mm_sqrt_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_sqrt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sqrt_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_sqrt_pd(b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_sqrt_pd(simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(simde_math_sqrt) r_.f64[0] = simde_math_sqrt(b_.f64[0]); r_.f64[1] = a_.f64[1]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sqrt_sd(a, b) simde_mm_sqrt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srl_epi16 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_srl_epi16(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 16 ? 16 : count_.i64[0])); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = a_.u16[i] >> cnt; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srl_epi16(a, count) (simde_mm_srl_epi16(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srl_epi32 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_srl_epi32(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 32 ? 32 : count_.i64[0])); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, -cnt))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] >> cnt; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srl_epi32(a, count) (simde_mm_srl_epi32(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srl_epi64 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_srl_epi64(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 64 ? 64 : count_.i64[0])); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(HEDLEY_STATIC_CAST(int64_t, -cnt))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u64x2_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else #if !defined(SIMDE_BUG_GCC_94488) SIMDE_VECTORIZE #endif for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = a_.u64[i] >> cnt; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srl_epi64(a, count) (simde_mm_srl_epi64(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srai_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_RANGE(imm8, 0, 255) { /* MSVC requires a range of (0, 255). */ simde__m128i_private r_, a_ = simde__m128i_to_private(a); const int cnt = (imm8 & ~15) ? 15 : imm8; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vshlq_s16(a_.neon_i16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[i] >> cnt; } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_srai_epi16(a, imm8) _mm_srai_epi16((a), (imm8)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srai_epi16(a, imm8) simde_mm_srai_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srai_epi32 (simde__m128i a, const int imm8) SIMDE_REQUIRE_RANGE(imm8, 0, 255) { /* MSVC requires a range of (0, 255). */ simde__m128i_private r_, a_ = simde__m128i_to_private(a); const int cnt = (imm8 & ~31) ? 31 : imm8; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vshlq_s32(a_.neon_i32, vdupq_n_s32(-cnt)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] >> cnt; } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_srai_epi32(a, imm8) _mm_srai_epi32((a), (imm8)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srai_epi32(a, imm8) simde_mm_srai_epi32(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sra_epi16 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sra_epi16(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); const int cnt = HEDLEY_STATIC_CAST(int, (count_.i64[0] > 15 ? 15 : count_.i64[0])); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vshlq_s16(a_.neon_i16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, -cnt))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[i] >> cnt; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sra_epi16(a, count) (simde_mm_sra_epi16(a, count)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sra_epi32 (simde__m128i a, simde__m128i count) { #if defined(SIMDE_X86_SSE2_NATIVE) && !defined(SIMDE_BUG_GCC_BAD_MM_SRA_EPI32) return _mm_sra_epi32(a, count); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), count_ = simde__m128i_to_private(count); const int cnt = count_.u64[0] > 31 ? 31 : HEDLEY_STATIC_CAST(int, count_.u64[0]); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vshlq_s32(a_.neon_i32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, -cnt))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shr(a_.wasm_v128, HEDLEY_STATIC_CAST(uint32_t, cnt)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] >> cnt; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sra_epi32(a, count) (simde_mm_sra_epi32(a, (count))) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_slli_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { if (HEDLEY_UNLIKELY((imm8 > 15))) { return simde_mm_setzero_si128(); } simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.i16 = a_.i16 << SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff); #else const int s = (imm8 > HEDLEY_STATIC_CAST(int, sizeof(r_.i16[0]) * CHAR_BIT) - 1) ? 0 : imm8; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, a_.i16[i] << s); } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_slli_epi16(a, imm8) _mm_slli_epi16(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_slli_epi16(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_i16( \ ((imm8) > 15) ? \ vandq_s16(simde__m128i_to_neon_i16(a), vdupq_n_s16(0)) : \ vshlq_n_s16(simde__m128i_to_neon_i16(a), ((imm8) & 15)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_slli_epi16(a, imm8) \ ((imm8 < 16) ? wasm_i16x8_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i16x8_const(0,0,0,0,0,0,0,0)) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #define simde_mm_slli_epi16(a, imm8) \ ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sl(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8))))) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_slli_epi16(a, imm8) simde_mm_slli_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_slli_epi32 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { if (HEDLEY_UNLIKELY((imm8 > 31))) { return simde_mm_setzero_si128(); } simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.i32 = a_.i32 << imm8; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] << (imm8 & 0xff); } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_slli_epi32(a, imm8) _mm_slli_epi32(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_slli_epi32(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_i32( \ ((imm8) > 31) ? \ vandq_s32(simde__m128i_to_neon_i32(a), vdupq_n_s32(0)) : \ vshlq_n_s32(simde__m128i_to_neon_i32(a), ((imm8) & 31)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_slli_epi32(a, imm8) \ ((imm8 < 32) ? wasm_i32x4_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i32x4_const(0,0,0,0)) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #define simde_mm_slli_epi32(a, imm8) \ (__extension__ ({ \ simde__m128i ret; \ if ((imm8) <= 0) { \ ret = a; \ } else if ((imm8) > 31) { \ ret = simde_mm_setzero_si128(); \ } else { \ ret = simde__m128i_from_altivec_i32( \ vec_sl(simde__m128i_to_altivec_i32(a), \ vec_splats(HEDLEY_STATIC_CAST(unsigned int, (imm8) & 31)))); \ } \ ret; \ })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_slli_epi32(a, imm8) simde_mm_slli_epi32(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_slli_epi64 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { if (HEDLEY_UNLIKELY((imm8 > 63))) { return simde_mm_setzero_si128(); } simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.i64 = a_.i64 << imm8; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] << (imm8 & 0xff); } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_slli_epi64(a, imm8) _mm_slli_epi64(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_slli_epi64(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_i64( \ ((imm8) > 63) ? \ vandq_s64(simde__m128i_to_neon_i64(a), vdupq_n_s64(0)) : \ vshlq_n_s64(simde__m128i_to_neon_i64(a), ((imm8) & 63)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_slli_epi64(a, imm8) \ ((imm8 < 64) ? wasm_i64x2_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_slli_epi64(a, imm8) simde_mm_slli_epi64(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srli_epi16 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { if (HEDLEY_UNLIKELY((imm8 > 15))) { return simde_mm_setzero_si128(); } simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.u16[i] = a_.u16[i] >> (imm8 & 0xff); } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_srli_epi16(a, imm8) _mm_srli_epi16(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_srli_epi16(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_u16( \ ((imm8) > 15) ? \ vandq_u16(simde__m128i_to_neon_u16(a), vdupq_n_u16(0)) : \ vshrq_n_u16(simde__m128i_to_neon_u16(a), ((imm8) & 15) | (((imm8) & 15) == 0)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_srli_epi16(a, imm8) \ ((imm8 < 16) ? wasm_u16x8_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i16x8_const(0,0,0,0,0,0,0,0)) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #define simde_mm_srli_epi16(a, imm8) \ ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sr(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8))))) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srli_epi16(a, imm8) simde_mm_srli_epi16(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srli_epi32 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { if (HEDLEY_UNLIKELY((imm8 > 31))) { return simde_mm_setzero_si128(); } simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.u32[i] = a_.u32[i] >> (imm8 & 0xff); } #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_srli_epi32(a, imm8) _mm_srli_epi32(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_srli_epi32(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_u32( \ ((imm8) > 31) ? \ vandq_u32(simde__m128i_to_neon_u32(a), vdupq_n_u32(0)) : \ vshrq_n_u32(simde__m128i_to_neon_u32(a), ((imm8) & 31) | (((imm8) & 31) == 0)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_srli_epi32(a, imm8) \ ((imm8 < 32) ? wasm_u32x4_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i32x4_const(0,0,0,0)) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #define simde_mm_srli_epi32(a, imm8) \ (__extension__ ({ \ simde__m128i ret; \ if ((imm8) <= 0) { \ ret = a; \ } else if ((imm8) > 31) { \ ret = simde_mm_setzero_si128(); \ } else { \ ret = simde__m128i_from_altivec_i32( \ vec_sr(simde__m128i_to_altivec_i32(a), \ vec_splats(HEDLEY_STATIC_CAST(unsigned int, (imm8) & 31)))); \ } \ ret; \ })) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srli_epi32(a, imm8) simde_mm_srli_epi32(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_srli_epi64 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a); if (HEDLEY_UNLIKELY((imm8 & 63) != imm8)) return simde_mm_setzero_si128(); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(-imm8)); #else #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_94488) r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.u64[i] = a_.u64[i] >> imm8; } #endif #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE2_NATIVE) #define simde_mm_srli_epi64(a, imm8) _mm_srli_epi64(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_srli_epi64(a, imm8) \ (((imm8) <= 0) ? \ (a) : \ simde__m128i_from_neon_u64( \ ((imm8) > 63) ? \ vandq_u64(simde__m128i_to_neon_u64(a), vdupq_n_u64(0)) : \ vshrq_n_u64(simde__m128i_to_neon_u64(a), ((imm8) & 63) | (((imm8) & 63) == 0)))) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_srli_epi64(a, imm8) \ ((imm8 < 64) ? wasm_u64x2_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0)) #endif #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_srli_epi64(a, imm8) simde_mm_srli_epi64(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_store_pd(mem_addr, a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64(mem_addr, simde__m128d_to_private(a).neon_f64); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s64(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), simde__m128d_to_private(a).neon_i64); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128d), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_store_pd(mem_addr, a) simde_mm_store_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store1_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_store1_pd(mem_addr, a); #else simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64(mem_addr, vdupq_laneq_f64(a_.neon_f64, 0)); #else mem_addr[0] = a_.f64[0]; mem_addr[1] = a_.f64[0]; #endif #endif } #define simde_mm_store_pd1(mem_addr, a) simde_mm_store1_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_store1_pd(mem_addr, a) simde_mm_store1_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #define _mm_store_pd1(mem_addr, a) simde_mm_store_pd1(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store_sd (simde_float64* mem_addr, simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_store_sd(mem_addr, a); #else simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) const simde_float64 v = vgetq_lane_f64(a_.neon_f64, 0); simde_memcpy(mem_addr, &v, sizeof(v)); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) const int64_t v = vgetq_lane_s64(a_.neon_i64, 0); simde_memcpy(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), &v, sizeof(v)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 0); #else simde_float64 v = a_.f64[0]; simde_memcpy(mem_addr, &v, sizeof(simde_float64)); #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_store_sd(mem_addr, a) simde_mm_store_sd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_store_si128 (simde__m128i* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_store_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a); #else simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s32(HEDLEY_REINTERPRET_CAST(int32_t*, mem_addr), a_.neon_i32); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m128i), &a_, sizeof(a_)); #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_store_si128(mem_addr, a) simde_mm_store_si128(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeh_pd (simde_float64* mem_addr, simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storeh_pd(mem_addr, a); #else simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) *mem_addr = vgetq_lane_f64(a_.neon_f64, 1); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), a_.wasm_v128, 1); #else *mem_addr = a_.f64[1]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeh_pd(mem_addr, a) simde_mm_storeh_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storel_epi64 (simde__m128i* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storel_epi64(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a); #else simde__m128i_private a_ = simde__m128i_to_private(a); int64_t tmp; /* memcpy to prevent aliasing, tmp because we can't take the * address of a vector element. */ #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) tmp = vgetq_lane_s64(a_.neon_i64, 0); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; #endif tmp = vec_extract(a_.altivec_i64, 0); #else tmp = a_.i64[0]; #endif simde_memcpy(mem_addr, &tmp, sizeof(tmp)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storel_epi64(mem_addr, a) simde_mm_storel_epi64(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storel_pd (simde_float64* mem_addr, simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storel_pd(mem_addr, a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store64_lane(HEDLEY_REINTERPRET_CAST(void*, mem_addr), simde__m128d_to_wasm_v128(a), 0); #else simde__m128d_private a_ = simde__m128d_to_private(a); simde_float64 tmp; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) tmp = vgetq_lane_f64(a_.neon_f64, 0); #else tmp = a_.f64[0]; #endif simde_memcpy(mem_addr, &tmp, sizeof(tmp)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storel_pd(mem_addr, a) simde_mm_storel_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storer_pd (simde_float64 mem_addr[2], simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storer_pd(mem_addr, a); #else simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s64(HEDLEY_REINTERPRET_CAST(int64_t*, mem_addr), vextq_s64(a_.neon_i64, a_.neon_i64, 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) a_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, a_.wasm_v128, 1, 0); simde_mm_store_pd(mem_addr, simde__m128d_from_private(a_)); #elif defined(SIMDE_SHUFFLE_VECTOR_) a_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 1, 0); simde_mm_store_pd(mem_addr, simde__m128d_from_private(a_)); #else mem_addr[0] = a_.f64[1]; mem_addr[1] = a_.f64[0]; #endif #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storer_pd(mem_addr, a) simde_mm_storer_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_pd (simde_float64* mem_addr, simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storeu_pd(mem_addr, a); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64(mem_addr, simde__m128d_to_private(a).neon_f64); #else simde_memcpy(mem_addr, &a, sizeof(a)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeu_pd(mem_addr, a) simde_mm_storeu_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_si128 (void* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_storeu_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a); #else simde_memcpy(mem_addr, &a, sizeof(a)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeu_si128(mem_addr, a) simde_mm_storeu_si128(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_si16 (void* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_GCC_VERSION_CHECK(11,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1)) _mm_storeu_si16(mem_addr, a); #else int16_t val = simde_x_mm_cvtsi128_si16(a); simde_memcpy(mem_addr, &val, sizeof(val)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeu_si16(mem_addr, a) simde_mm_storeu_si16(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_si32 (void* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_GCC_VERSION_CHECK(11,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1)) _mm_storeu_si32(mem_addr, a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store32_lane(mem_addr, simde__m128i_to_wasm_v128(a), 0); #else int32_t val = simde_mm_cvtsi128_si32(a); simde_memcpy(mem_addr, &val, sizeof(val)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeu_si32(mem_addr, a) simde_mm_storeu_si32(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_storeu_si64 (void* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(8,0,0) || \ HEDLEY_GCC_VERSION_CHECK(11,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(20,21,1)) _mm_storeu_si64(mem_addr, a); #else int64_t val = simde_mm_cvtsi128_si64(a); simde_memcpy(mem_addr, &val, sizeof(val)); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_storeu_si64(mem_addr, a) simde_mm_storeu_si64(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_stream_pd(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \ defined(SIMDE_VECTOR_SUBSCRIPT) || defined(SIMDE_ARM_NEON_A64V8_NATIVE) || \ defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || \ defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr)); #else simde_mm_store_pd(mem_addr, a); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_stream_pd(mem_addr, a) simde_mm_stream_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_si128 (simde__m128i* mem_addr, simde__m128i a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) _mm_stream_si128(HEDLEY_STATIC_CAST(__m128i*, mem_addr), a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && ( \ defined(SIMDE_VECTOR_SUBSCRIPT) || defined(SIMDE_ARM_NEON_A32V7_NATIVE) || \ defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \ defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr)); #else simde_mm_store_si128(mem_addr, a); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_stream_si128(mem_addr, a) simde_mm_stream_si128(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_si32 (int32_t* mem_addr, int32_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_stream_si32(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) __builtin_nontemporal_store(a, mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_lane_s32(mem_addr, vdupq_n_s32(a), 0); #else *mem_addr = a; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_stream_si32(mem_addr, a) simde_mm_stream_si32(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_stream_si64 (int64_t* mem_addr, int64_t a) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64) && !defined(HEDLEY_MSVC_VERSION) _mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(long long int*, int64_t*, mem_addr), a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) __builtin_nontemporal_store(a, mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_s64(mem_addr, vdup_n_s64(a)); #else *mem_addr = a; #endif } #define simde_mm_stream_si64x(mem_addr, a) simde_mm_stream_si64(mem_addr, a) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_stream_si64(mem_addr, a) simde_mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(int64_t*, __int64*, mem_addr), a) #define _mm_stream_si64x(mem_addr, a) simde_mm_stream_si64(SIMDE_CHECKED_REINTERPRET_CAST(int64_t*, __int64*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sub_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vsubq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_sub(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i8 = a_.i8 - b_.i8; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[i] - b_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_epi8(a, b) simde_mm_sub_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sub_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vsubq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_sub(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i16 = a_.i16 - b_.i16; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i16[i] - b_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_epi16(a, b) simde_mm_sub_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sub_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vsubq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_sub(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = a_.i32 - b_.i32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] - b_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_epi32(a, b) simde_mm_sub_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sub_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_epi64(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vsubq_s64(a_.neon_i64, b_.neon_i64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_sub(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 - b_.i64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] - b_.i64[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_epi64(a, b) simde_mm_sub_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_sub_epu32 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.u32 = a_.u32 - b_.u32; #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vsubq_u32(a_.neon_u32, b_.neon_u32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] - b_.u32[i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_sub_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 - b_.f64; #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vsubq_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_sub(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] - b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_pd(a, b) simde_mm_sub_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_sub_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_sub_sd(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_sd(a, simde_mm_sub_pd(a, b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_sd(a, simde_mm_sub_pd(simde_x_mm_broadcastlow_pd(a), simde_x_mm_broadcastlow_pd(b))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); r_.f64[0] = a_.f64[0] - b_.f64[0]; r_.f64[1] = a_.f64[1]; return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_sd(a, b) simde_mm_sub_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_sub_si64 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSE2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_sub_si64(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 - b_.i64; #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vsub_s64(a_.neon_i64, b_.neon_i64); #else r_.i64[0] = a_.i64[0] - b_.i64[0]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_sub_si64(a, b) simde_mm_sub_si64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_subs_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_subs_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vqsubq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_sub_sat(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = simde_math_subs_i8(a_.i8[i], b_.i8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_subs_epi8(a, b) simde_mm_subs_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_subs_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_subs_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vqsubq_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_sub_sat(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = simde_math_subs_i16(a_.i16[i], b_.i16[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_subs_epi16(a, b) simde_mm_subs_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_subs_epu8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_subs_epu8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u8 = vqsubq_u8(a_.neon_u8, b_.neon_u8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u8x16_sub_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u8 = vec_subs(a_.altivec_u8, b_.altivec_u8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.u8[0])) ; i++) { r_.u8[i] = simde_math_subs_u8(a_.u8[i], b_.u8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_subs_epu8(a, b) simde_mm_subs_epu8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_subs_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_subs_epu16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vqsubq_u16(a_.neon_u16, b_.neon_u16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_sub_sat(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u16 = vec_subs(a_.altivec_u16, b_.altivec_u16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = simde_math_subs_u16(a_.u16[i], b_.u16[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_subs_epu16(a, b) simde_mm_subs_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomieq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomieq_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan)))); uint64x2_t a_eq_b = vceqq_f64(a_.neon_f64, b_.neon_f64); r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_eq_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) == wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] == b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] == b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomieq_sd(a, b) simde_mm_ucomieq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomige_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomige_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan); uint64x2_t a_ge_b = vcgeq_f64(a_.neon_f64, b_.neon_f64); r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_ge_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) >= wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] >= b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] >= b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomige_sd(a, b) simde_mm_ucomige_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomigt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomigt_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan); uint64x2_t a_gt_b = vcgtq_f64(a_.neon_f64, b_.neon_f64); r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_gt_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) > wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] > b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] > b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomigt_sd(a, b) simde_mm_ucomigt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomile_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomile_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan)))); uint64x2_t a_le_b = vcleq_f64(a_.neon_f64, b_.neon_f64); r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_le_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) <= wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] <= b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] <= b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomile_sd(a, b) simde_mm_ucomile_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomilt_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomilt_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_or_b_nan = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vandq_u64(a_not_nan, b_not_nan)))); uint64x2_t a_lt_b = vcltq_f64(a_.neon_f64, b_.neon_f64); r = !!(vgetq_lane_u64(vorrq_u64(a_or_b_nan, a_lt_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) < wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] < b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] < b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomilt_sd(a, b) simde_mm_ucomilt_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_ucomineq_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_ucomineq_sd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); int r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) uint64x2_t a_not_nan = vceqq_f64(a_.neon_f64, a_.neon_f64); uint64x2_t b_not_nan = vceqq_f64(b_.neon_f64, b_.neon_f64); uint64x2_t a_and_b_not_nan = vandq_u64(a_not_nan, b_not_nan); uint64x2_t a_neq_b = vreinterpretq_u64_u32(vmvnq_u32(vreinterpretq_u32_u64(vceqq_f64(a_.neon_f64, b_.neon_f64)))); r = !!(vgetq_lane_u64(vandq_u64(a_and_b_not_nan, a_neq_b), 0) != 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return wasm_f64x2_extract_lane(a_.wasm_v128, 0) != wasm_f64x2_extract_lane(b_.wasm_v128, 0); #elif defined(SIMDE_HAVE_FENV_H) fenv_t envp; int x = feholdexcept(&envp); r = a_.f64[0] != b_.f64[0]; if (HEDLEY_LIKELY(x == 0)) fesetenv(&envp); #else r = a_.f64[0] != b_.f64[0]; #endif return r; #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_ucomineq_sd(a, b) simde_mm_ucomineq_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_lfence (void) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_lfence(); #else simde_mm_sfence(); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_lfence() simde_mm_lfence() #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_mfence (void) { #if defined(SIMDE_X86_SSE2_NATIVE) _mm_mfence(); #else simde_mm_sfence(); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_mfence() simde_mm_mfence() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpackhi_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpackhi_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i8 = vzip2q_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x8_t a1 = vreinterpret_s8_s16(vget_high_s16(a_.neon_i16)); int8x8_t b1 = vreinterpret_s8_s16(vget_high_s16(b_.neon_i16)); int8x8x2_t result = vzip_s8(a1, b1); r_.neon_i8 = vcombine_s8(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_shuffle(a_.wasm_v128, b_.wasm_v128, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, b_.i8, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i8[0])) / 2) ; i++) { r_.i8[(i * 2)] = a_.i8[i + ((sizeof(r_) / sizeof(r_.i8[0])) / 2)]; r_.i8[(i * 2) + 1] = b_.i8[i + ((sizeof(r_) / sizeof(r_.i8[0])) / 2)]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpackhi_epi8(a, b) simde_mm_unpackhi_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpackhi_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpackhi_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vzip2q_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4_t a1 = vget_high_s16(a_.neon_i16); int16x4_t b1 = vget_high_s16(b_.neon_i16); int16x4x2_t result = vzip_s16(a1, b1); r_.neon_i16 = vcombine_s16(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 4, 12, 5, 13, 6, 14, 7, 15); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 4, 12, 5, 13, 6, 14, 7, 15); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i16[0])) / 2) ; i++) { r_.i16[(i * 2)] = a_.i16[i + ((sizeof(r_) / sizeof(r_.i16[0])) / 2)]; r_.i16[(i * 2) + 1] = b_.i16[i + ((sizeof(r_) / sizeof(r_.i16[0])) / 2)]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpackhi_epi16(a, b) simde_mm_unpackhi_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpackhi_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpackhi_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i32 = vzip2q_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2_t a1 = vget_high_s32(a_.neon_i32); int32x2_t b1 = vget_high_s32(b_.neon_i32); int32x2x2_t result = vzip_s32(a1, b1); r_.neon_i32 = vcombine_s32(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 2, 6, 3, 7); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 2, 6, 3, 7); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i32[0])) / 2) ; i++) { r_.i32[(i * 2)] = a_.i32[i + ((sizeof(r_) / sizeof(r_.i32[0])) / 2)]; r_.i32[(i * 2) + 1] = b_.i32[i + ((sizeof(r_) / sizeof(r_.i32[0])) / 2)]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpackhi_epi32(a, b) simde_mm_unpackhi_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpackhi_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpackhi_epi64(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x1_t a_h = vget_high_s64(a_.neon_i64); int64x1_t b_h = vget_high_s64(b_.neon_i64); r_.neon_i64 = vcombine_s64(a_h, b_h); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.i64, b_.i64, 1, 3); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i64[0])) / 2) ; i++) { r_.i64[(i * 2)] = a_.i64[i + ((sizeof(r_) / sizeof(r_.i64[0])) / 2)]; r_.i64[(i * 2) + 1] = b_.i64[i + ((sizeof(r_) / sizeof(r_.i64[0])) / 2)]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpackhi_epi64(a, b) simde_mm_unpackhi_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_unpackhi_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpackhi_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vzip2q_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 1, 3); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.f64[0])) / 2) ; i++) { r_.f64[(i * 2)] = a_.f64[i + ((sizeof(r_) / sizeof(r_.f64[0])) / 2)]; r_.f64[(i * 2) + 1] = b_.f64[i + ((sizeof(r_) / sizeof(r_.f64[0])) / 2)]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpackhi_pd(a, b) simde_mm_unpackhi_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpacklo_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i8 = vzip1q_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x8_t a1 = vreinterpret_s8_s16(vget_low_s16(a_.neon_i16)); int8x8_t b1 = vreinterpret_s8_s16(vget_low_s16(b_.neon_i16)); int8x8x2_t result = vzip_s8(a1, b1); r_.neon_i8 = vcombine_s8(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i8 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, b_.i8, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i8[0])) / 2) ; i++) { r_.i8[(i * 2)] = a_.i8[i]; r_.i8[(i * 2) + 1] = b_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpacklo_epi8(a, b) simde_mm_unpacklo_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpacklo_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vzip1q_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4_t a1 = vget_low_s16(a_.neon_i16); int16x4_t b1 = vget_low_s16(b_.neon_i16); int16x4x2_t result = vzip_s16(a1, b1); r_.neon_i16 = vcombine_s16(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 8, 1, 9, 2, 10, 3, 11); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 0, 8, 1, 9, 2, 10, 3, 11); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i16[0])) / 2) ; i++) { r_.i16[(i * 2)] = a_.i16[i]; r_.i16[(i * 2) + 1] = b_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpacklo_epi16(a, b) simde_mm_unpacklo_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpacklo_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i32 = vzip1q_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2_t a1 = vget_low_s32(a_.neon_i32); int32x2_t b1 = vget_low_s32(b_.neon_i32); int32x2x2_t result = vzip_s32(a1, b1); r_.neon_i32 = vcombine_s32(result.val[0], result.val[1]); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 4, 1, 5); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 0, 4, 1, 5); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i32[0])) / 2) ; i++) { r_.i32[(i * 2)] = a_.i32[i]; r_.i32[(i * 2) + 1] = b_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpacklo_epi32(a, b) simde_mm_unpacklo_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_unpacklo_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi64(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x1_t a_l = vget_low_s64(a_.neon_i64); int64x1_t b_l = vget_low_s64(b_.neon_i64); r_.neon_i64 = vcombine_s64(a_l, b_l); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.i64, b_.i64, 0, 2); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.i64[0])) / 2) ; i++) { r_.i64[(i * 2)] = a_.i64[i]; r_.i64[(i * 2) + 1] = b_.i64[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpacklo_epi64(a, b) simde_mm_unpacklo_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_unpacklo_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vzip1q_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 0, 2); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < ((sizeof(r_) / sizeof(r_.f64[0])) / 2) ; i++) { r_.f64[(i * 2)] = a_.f64[i]; r_.f64[(i * 2) + 1] = b_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_unpacklo_pd(a, b) simde_mm_unpacklo_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_negate_pd(simde__m128d a) { #if defined(SIMDE_X86_SSE2_NATIVE) return simde_mm_xor_pd(a, _mm_set1_pd(SIMDE_FLOAT64_C(-0.0))); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0)) r_.altivec_f64 = vec_neg(a_.altivec_f64); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vnegq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_neg(a_.wasm_v128); #elif defined(SIMDE_VECTOR_NEGATE) r_.f64 = -a_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = -a_.f64[i]; } #endif return simde__m128d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_xor_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE2_NATIVE) return _mm_xor_si128(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = veorq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_xor(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_xor(b_.wasm_v128, a_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f ^ b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] ^ b_.i32f[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _mm_xor_si128(a, b) simde_mm_xor_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_not_si128 (simde__m128i a) { #if defined(SIMDE_X86_AVX512VL_NATIVE) return _mm_ternarylogic_epi32(a, a, a, 0x55); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vmvnq_s32(a_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i32 = vec_nor(a_.altivec_i32, a_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_v128_not(a_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~(a_.i32f[i]); } #endif return simde__m128i_from_private(r_); #endif } #define SIMDE_MM_SHUFFLE2(x, y) (((x) << 1) | (y)) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #define _MM_SHUFFLE2(x, y) SIMDE_MM_SHUFFLE2(x, y) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE2_H) */ /* :: End simde/simde/x86/sse2.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_deinterleaveeven_epi16 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vuzp1q_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = t.val[0]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6, 8, 10, 12, 14); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 0, 2, 4, 6, 8, 10, 12, 14); #else const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.i16[i] = a_.i16[2 * i]; r_.i16[i + halfway_point] = b_.i16[2 * i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_deinterleaveodd_epi16 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vuzp2q_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = t.val[1]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7, 9, 11, 13, 15); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, b_.i16, 1, 3, 5, 7, 9, 11, 13, 15); #else const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.i16[i] = a_.i16[2 * i + 1]; r_.i16[i + halfway_point] = b_.i16[2 * i + 1]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_deinterleaveeven_epi32 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i32 = vuzp1q_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x4x2_t t = vuzpq_s32(a_.neon_i32, b_.neon_i32); r_.neon_i32 = t.val[0]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 0, 2, 4, 6); #else const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.i32[i] = a_.i32[2 * i]; r_.i32[i + halfway_point] = b_.i32[2 * i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_deinterleaveodd_epi32 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i32 = vuzp2q_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x4x2_t t = vuzpq_s32(a_.neon_i32, b_.neon_i32); r_.neon_i32 = t.val[1]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, b_.i32, 1, 3, 5, 7); #else const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.i32[i] = a_.i32[2 * i + 1]; r_.i32[i + halfway_point] = b_.i32[2 * i + 1]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_x_mm_deinterleaveeven_ps (simde__m128 a, simde__m128 b) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vuzp1q_f32(a_.neon_f32, b_.neon_f32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4x2_t t = vuzpq_f32(a_.neon_f32, b_.neon_f32); r_.neon_f32 = t.val[0]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2, 4, 6); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 0, 2, 4, 6); #else const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.f32[i] = a_.f32[2 * i]; r_.f32[i + halfway_point] = b_.f32[2 * i]; } #endif return simde__m128_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_x_mm_deinterleaveodd_ps (simde__m128 a, simde__m128 b) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vuzp2q_f32(a_.neon_f32, b_.neon_f32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4x2_t t = vuzpq_f32(a_.neon_f32, b_.neon_f32); r_.neon_f32 = t.val[1]; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3, 5, 7); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, b_.f32, 1, 3, 5, 7); #else const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.f32[i] = a_.f32[2 * i + 1]; r_.f32[i + halfway_point] = b_.f32[2 * i + 1]; } #endif return simde__m128_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_deinterleaveeven_pd (simde__m128d a, simde__m128d b) { simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vuzp1q_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 0, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 0, 2); #else const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.f64[i] = a_.f64[2 * i]; r_.f64[i + halfway_point] = b_.f64[2 * i]; } #endif return simde__m128d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_x_mm_deinterleaveodd_pd (simde__m128d a, simde__m128d b) { simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vuzp2q_f64(a_.neon_f64, b_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, b_.wasm_v128, 1, 3); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, b_.f64, 1, 3); #else const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2; for(size_t i = 0 ; i < halfway_point ; i++) { r_.f64[i] = a_.f64[2 * i + 1]; r_.f64[i + halfway_point] = b_.f64[2 * i + 1]; } #endif return simde__m128d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_addsub_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_addsub_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float64x2_t rs = vsubq_f64(a_.neon_f64, b_.neon_f64); float64x2_t ra = vaddq_f64(a_.neon_f64, b_.neon_f64); return vcombine_f64(vget_low_f64(rs), vget_high_f64(ra)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64 - b_.f64, a_.f64 + b_.f64, 0, 3); #else for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) { r_.f64[ i ] = a_.f64[ i ] - b_.f64[ i ]; r_.f64[1 + i] = a_.f64[1 + i] + b_.f64[1 + i]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_addsub_pd(a, b) simde_mm_addsub_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_addsub_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_addsub_ps(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) float32x4_t rs = vsubq_f32(a_.neon_f32, b_.neon_f32); float32x4_t ra = vaddq_f32(a_.neon_f32, b_.neon_f32); return vtrn2q_f32(vreinterpretq_f32_s32(vrev64q_s32(vreinterpretq_s32_f32(rs))), ra); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32 - b_.f32, a_.f32 + b_.f32, 0, 5, 2, 7); #else for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) { r_.f32[ i ] = a_.f32[ i ] - b_.f32[ i ]; r_.f32[1 + i] = a_.f32[1 + i] + b_.f32[1 + i]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_addsub_ps(a, b) simde_mm_addsub_ps((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_hadd_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_hadd_pd(a, b); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return simde__m128d_from_neon_f64(vpaddq_f64(simde__m128d_to_neon_f64(a), simde__m128d_to_neon_f64(b))); #else return simde_mm_add_pd(simde_x_mm_deinterleaveeven_pd(a, b), simde_x_mm_deinterleaveodd_pd(a, b)); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_pd(a, b) simde_mm_hadd_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_hadd_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_hadd_ps(a, b); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return simde__m128_from_neon_f32(vpaddq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b))); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4x2_t t = vuzpq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b)); return simde__m128_from_neon_f32(vaddq_f32(t.val[0], t.val[1])); #else return simde_mm_add_ps(simde_x_mm_deinterleaveeven_ps(a, b), simde_x_mm_deinterleaveodd_ps(a, b)); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_ps(a, b) simde_mm_hadd_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_hsub_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_hsub_pd(a, b); #else return simde_mm_sub_pd(simde_x_mm_deinterleaveeven_pd(a, b), simde_x_mm_deinterleaveodd_pd(a, b)); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_pd(a, b) simde_mm_hsub_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_hsub_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_hsub_ps(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x4x2_t t = vuzpq_f32(simde__m128_to_neon_f32(a), simde__m128_to_neon_f32(b)); return simde__m128_from_neon_f32(vaddq_f32(t.val[0], vnegq_f32(t.val[1]))); #else return simde_mm_sub_ps(simde_x_mm_deinterleaveeven_ps(a, b), simde_x_mm_deinterleaveodd_ps(a, b)); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_ps(a, b) simde_mm_hsub_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_lddqu_si128 (simde__m128i const* mem_addr) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_lddqu_si128(mem_addr); #else simde__m128i_private r_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vld1q_s32(HEDLEY_REINTERPRET_CAST(int32_t const*, mem_addr)); #else simde_memcpy(&r_, mem_addr, sizeof(r_)); #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_lddqu_si128(mem_addr) simde_mm_lddqu_si128(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_loaddup_pd (simde_float64 const* mem_addr) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_loaddup_pd(mem_addr); #else simde__m128d_private r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vdupq_n_f64(*mem_addr); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vdupq_n_s64(*HEDLEY_REINTERPRET_CAST(int64_t const*, mem_addr)); #else r_.f64[0] = *mem_addr; r_.f64[1] = *mem_addr; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_loaddup_pd(mem_addr) simde_mm_loaddup_pd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_movedup_pd (simde__m128d a) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_movedup_pd(a); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vdupq_laneq_f64(a_.neon_f64, 0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.f64, a_.f64, 0, 0); #else r_.f64[0] = a_.f64[0]; r_.f64[1] = a_.f64[0]; #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_movedup_pd(a) simde_mm_movedup_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_movehdup_ps (simde__m128 a) { #if defined(SIMDE_X86_SSE3_NATIVE) return _mm_movehdup_ps(a); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vtrn2q_f32(a_.neon_f32, a_.neon_f32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 1, 1, 3, 3); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 1, 1, 3, 3); #else r_.f32[0] = a_.f32[1]; r_.f32[1] = a_.f32[1]; r_.f32[2] = a_.f32[3]; r_.f32[3] = a_.f32[3]; #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_movehdup_ps(a) simde_mm_movehdup_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_moveldup_ps (simde__m128 a) { #if defined(SIMDE__SSE3_NATIVE) return _mm_moveldup_ps(a); #else simde__m128_private r_, a_ = simde__m128_to_private(a); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vtrn1q_f32(a_.neon_f32, a_.neon_f32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_shuffle(a_.wasm_v128, a_.wasm_v128, 0, 0, 2, 2); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.f32, a_.f32, 0, 0, 2, 2); #else r_.f32[0] = a_.f32[0]; r_.f32[1] = a_.f32[0]; r_.f32[2] = a_.f32[2]; r_.f32[3] = a_.f32[2]; #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE3_ENABLE_NATIVE_ALIASES) # define _mm_moveldup_ps(a) simde_mm_moveldup_ps(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE3_H) */ /* :: End simde/simde/x86/sse3.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_abs_epi8 (simde__m128i a) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_abs_epi8(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_min_epu8(a, _mm_sub_epi8(_mm_setzero_si128(), a)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vabsq_s8(a_.neon_i8); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_abs(a_.altivec_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_abs(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.i8[i] < 0) ? (- a_.i8[i]) : a_.i8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_epi8(a) simde_mm_abs_epi8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_abs_epi16 (simde__m128i a) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_abs_epi16(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_max_epi16(a, _mm_sub_epi16(_mm_setzero_si128(), a)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vabsq_s16(a_.neon_i16); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = vec_abs(a_.altivec_i16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_abs(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.i16[i] < 0) ? (- a_.i16[i]) : a_.i16[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_epi16(a) simde_mm_abs_epi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_abs_epi32 (simde__m128i a) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_abs_epi32(a); #elif defined(SIMDE_X86_SSE2_NATIVE) const __m128i m = _mm_cmpgt_epi32(_mm_setzero_si128(), a); return _mm_sub_epi32(_mm_xor_si128(a, m), m); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vabsq_s32(a_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_abs(a_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_abs(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { #if defined(_MSC_VER) HEDLEY_DIAGNOSTIC_PUSH #pragma warning(disable:4146) #endif r_.u32[i] = (a_.i32[i] < 0) ? (- HEDLEY_STATIC_CAST(uint32_t, a_.i32[i])) : HEDLEY_STATIC_CAST(uint32_t, a_.i32[i]); #if defined(_MSC_VER) HEDLEY_DIAGNOSTIC_POP #endif } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_epi32(a) simde_mm_abs_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_abs_pi8 (simde__m64 a) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_abs_pi8(a); #else simde__m64_private r_, a_ = simde__m64_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vabs_s8(a_.neon_i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.u8[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.i8[i] < 0) ? (- a_.i8[i]) : a_.i8[i]); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_pi8(a) simde_mm_abs_pi8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_abs_pi16 (simde__m64 a) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_abs_pi16(a); #else simde__m64_private r_, a_ = simde__m64_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i16 = vabs_s16(a_.neon_i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.i16[i] < 0) ? (- a_.i16[i]) : a_.i16[i]); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_pi16(a) simde_mm_abs_pi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_abs_pi32 (simde__m64 a) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_abs_pi32(a); #else simde__m64_private r_, a_ = simde__m64_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vabs_s32(a_.neon_i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (a_.i32[i] < 0) ? (- a_.i32[i]) : a_.i32[i]); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_abs_pi32(a) simde_mm_abs_pi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_alignr_epi8 (simde__m128i a, simde__m128i b, int count) SIMDE_REQUIRE_CONSTANT_RANGE(count, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); if (HEDLEY_UNLIKELY(count > 31)) return simde_mm_setzero_si128(); for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { const int srcpos = count + HEDLEY_STATIC_CAST(int, i); if (srcpos > 31) { r_.i8[i] = 0; } else if (srcpos > 15) { r_.i8[i] = a_.i8[(srcpos) & 15]; } else { r_.i8[i] = b_.i8[srcpos]; } } return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSSE3_NATIVE) #define simde_mm_alignr_epi8(a, b, count) _mm_alignr_epi8(a, b, count) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_alignr_epi8(a, b, count) \ ( \ ((count) > 31) \ ? simde__m128i_from_neon_i8(vdupq_n_s8(0)) \ : ( \ ((count) > 15) \ ? (simde__m128i_from_neon_i8(vextq_s8(simde__m128i_to_neon_i8(a), vdupq_n_s8(0), (count) & 15))) \ : (simde__m128i_from_neon_i8(vextq_s8(simde__m128i_to_neon_i8(b), simde__m128i_to_neon_i8(a), ((count) & 15)))))) #endif #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) #define _mm_alignr_epi8(a, b, count) simde_mm_alignr_epi8(a, b, count) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_alignr_pi8 (simde__m64 a, simde__m64 b, const int count) SIMDE_REQUIRE_CONSTANT(count) { simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); if (HEDLEY_UNLIKELY(count > 15)) return simde_mm_setzero_si64(); for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { const int srcpos = count + HEDLEY_STATIC_CAST(int, i); if (srcpos > 15) { r_.i8[i] = 0; } else if (srcpos > 7) { r_.i8[i] = a_.i8[(srcpos) & 7]; } else { r_.i8[i] = b_.i8[srcpos]; } } return simde__m64_from_private(r_); } #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) # define simde_mm_alignr_pi8(a, b, count) _mm_alignr_pi8(a, b, count) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_alignr_pi8(a, b, count) \ ( \ ((count) > 15) \ ? simde__m64_from_neon_i8(vdup_n_s8(0)) \ : ( \ ((count) > 7) \ ? (simde__m64_from_neon_i8(vext_s8(simde__m64_to_neon_i8(a), vdup_n_s8(0), (count) & 7))) \ : (simde__m64_from_neon_i8(vext_s8(simde__m64_to_neon_i8(b), simde__m64_to_neon_i8(a), ((count) & 7)))))) #endif #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_alignr_pi8(a, b, count) simde_mm_alignr_pi8(a, b, count) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_shuffle_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_shuffle_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i8 = vqtbl1q_s8(a_.neon_i8, vandq_u8(b_.neon_u8, vdupq_n_u8(0x8F))); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* Mask out the bits we're not interested in. vtbl will result in 0 * for any values outside of [0, 15], so if the high bit is set it * will return 0, just like in SSSE3. */ b_.neon_i8 = vandq_s8(b_.neon_i8, vdupq_n_s8(HEDLEY_STATIC_CAST(int8_t, (1 << 7) | 15))); /* Convert a from an int8x16_t to an int8x8x2_t */ int8x8x2_t i; i.val[0] = vget_low_s8(a_.neon_i8); i.val[1] = vget_high_s8(a_.neon_i8); /* Table lookups */ int8x8_t l = vtbl2_s8(i, vget_low_s8(b_.neon_i8)); int8x8_t h = vtbl2_s8(i, vget_high_s8(b_.neon_i8)); r_.neon_i8 = vcombine_s8(l, h); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) /* This is a bit ugly because of the casts and the awful type * macros (SIMDE_POWER_ALTIVEC_VECTOR), but it's really just * vec_sel(vec_perm(a, a, b), 0, vec_cmplt(b, 0)) */ SIMDE_POWER_ALTIVEC_VECTOR(signed char) z = { 0, }; SIMDE_POWER_ALTIVEC_VECTOR(signed char) msb_mask = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_cmplt(b_.altivec_i8, z)); SIMDE_POWER_ALTIVEC_VECTOR(signed char) c = vec_perm(a_.altivec_i8, a_.altivec_i8, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), b_.altivec_i8)); r_.altivec_i8 = vec_sel(c, z, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), msb_mask)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_swizzle( a_.wasm_v128, wasm_v128_and(b_.wasm_v128, wasm_i8x16_splat(0x8F))); #else for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[b_.i8[i] & 15] & (~(b_.i8[i]) >> 7); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_shuffle_epi8(a, b) simde_mm_shuffle_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_shuffle_pi8 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_shuffle_pi8(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) b_.neon_i8 = vand_s8(b_.neon_i8, vdup_n_s8(HEDLEY_STATIC_CAST(int8_t, (1 << 7) | 7))); r_.neon_i8 = vtbl1_s8(a_.neon_i8, b_.neon_i8); #else for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) { r_.i8[i] = a_.i8[b_.i8[i] & 7] & (~(b_.i8[i]) >> 7); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_shuffle_pi8(a, b) simde_mm_shuffle_pi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hadd_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hadd_epi16(a, b); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return simde__m128i_from_neon_i16(vpaddq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b))); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b)); return simde__m128i_from_neon_i16(vaddq_s16(t.val[0], t.val[1])); #else return simde_mm_add_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_epi16(a, b) simde_mm_hadd_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hadd_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hadd_epi32(a, b); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) return simde__m128i_from_neon_i32(vpaddq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b))); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x4x2_t t = vuzpq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b)); return simde__m128i_from_neon_i32(vaddq_s32(t.val[0], t.val[1])); #else return simde_mm_add_epi32(simde_x_mm_deinterleaveeven_epi32(a, b), simde_x_mm_deinterleaveodd_epi32(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_epi32(a, b) simde_mm_hadd_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hadd_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hadd_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i16 = vpadd_s16(a_.neon_i16, b_.neon_i16); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = vadd_s16(t.val[0], t.val[1]); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 0, 2, 4, 6) + SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 1, 3, 5, 7); #else r_.i16[0] = a_.i16[0] + a_.i16[1]; r_.i16[1] = a_.i16[2] + a_.i16[3]; r_.i16[2] = b_.i16[0] + b_.i16[1]; r_.i16[3] = b_.i16[2] + b_.i16[3]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_pi16(a, b) simde_mm_hadd_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hadd_pi32 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hadd_pi32(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_i32 = vpadd_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2x2_t t = vuzp_s32(a_.neon_i32, b_.neon_i32); r_.neon_i32 = vadd_s32(t.val[0], t.val[1]); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 0, 2) + SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 1, 3); #else r_.i32[0] = a_.i32[0] + a_.i32[1]; r_.i32[1] = b_.i32[0] + b_.i32[1]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadd_pi32(a, b) simde_mm_hadd_pi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hadds_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hadds_epi16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b)); return simde__m128i_from_neon_i16(vqaddq_s16(t.val[0], t.val[1])); #else return simde_mm_adds_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadds_epi16(a, b) simde_mm_hadds_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hadds_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hadds_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = vqadd_s16(t.val[0], t.val[1]); #else for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) { int32_t ta = HEDLEY_STATIC_CAST(int32_t, a_.i16[i * 2]) + HEDLEY_STATIC_CAST(int32_t, a_.i16[(i * 2) + 1]); r_.i16[ i ] = HEDLEY_LIKELY(ta > INT16_MIN) ? (HEDLEY_LIKELY(ta < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ta) : INT16_MAX) : INT16_MIN; int32_t tb = HEDLEY_STATIC_CAST(int32_t, b_.i16[i * 2]) + HEDLEY_STATIC_CAST(int32_t, b_.i16[(i * 2) + 1]); r_.i16[i + 2] = HEDLEY_LIKELY(tb > INT16_MIN) ? (HEDLEY_LIKELY(tb < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, tb) : INT16_MAX) : INT16_MIN; } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hadds_pi16(a, b) simde_mm_hadds_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hsub_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hsub_epi16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b)); return simde__m128i_from_neon_i16(vsubq_s16(t.val[0], t.val[1])); #else return simde_mm_sub_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_epi16(a, b) simde_mm_hsub_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hsub_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hsub_epi32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x4x2_t t = vuzpq_s32(simde__m128i_to_neon_i32(a), simde__m128i_to_neon_i32(b)); return simde__m128i_from_neon_i32(vsubq_s32(t.val[0], t.val[1])); #else return simde_mm_sub_epi32(simde_x_mm_deinterleaveeven_epi32(a, b), simde_x_mm_deinterleaveodd_epi32(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_epi32(a, b) simde_mm_hsub_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hsub_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hsub_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = vsub_s16(t.val[0], t.val[1]); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 0, 2, 4, 6) - SIMDE_SHUFFLE_VECTOR_(16, 8, a_.i16, b_.i16, 1, 3, 5, 7); #else r_.i16[0] = a_.i16[0] - a_.i16[1]; r_.i16[1] = a_.i16[2] - a_.i16[3]; r_.i16[2] = b_.i16[0] - b_.i16[1]; r_.i16[3] = b_.i16[2] - b_.i16[3]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_pi16(a, b) simde_mm_hsub_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hsub_pi32 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hsub_pi32(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2x2_t t = vuzp_s32(a_.neon_i32, b_.neon_i32); r_.neon_i32 = vsub_s32(t.val[0], t.val[1]); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 0, 2) - SIMDE_SHUFFLE_VECTOR_(32, 8, a_.i32, b_.i32, 1, 3); #else r_.i32[0] = a_.i32[0] - a_.i32[1]; r_.i32[1] = b_.i32[0] - b_.i32[1]; #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsub_pi32(a, b) simde_mm_hsub_pi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_hsubs_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_hsubs_epi16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8x2_t t = vuzpq_s16(simde__m128i_to_neon_i16(a), simde__m128i_to_neon_i16(b)); return simde__m128i_from_neon_i16(vqsubq_s16(t.val[0], t.val[1])); #else return simde_mm_subs_epi16(simde_x_mm_deinterleaveeven_epi16(a, b), simde_x_mm_deinterleaveodd_epi16(a, b)); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsubs_epi16(a, b) simde_mm_hsubs_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_hsubs_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_hsubs_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t t = vuzp_s16(a_.neon_i16, b_.neon_i16); r_.neon_i16 = vqsub_s16(t.val[0], t.val[1]); #else for (size_t i = 0 ; i < ((sizeof(r_.i16) / sizeof(r_.i16[0])) / 2) ; i++) { r_.i16[ i ] = simde_math_subs_i16(a_.i16[i * 2], a_.i16[(i * 2) + 1]); r_.i16[i + 2] = simde_math_subs_i16(b_.i16[i * 2], b_.i16[(i * 2) + 1]); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_hsubs_pi16(a, b) simde_mm_hsubs_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_maddubs_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_maddubs_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* Zero extend a */ int16x8_t a_odd = vreinterpretq_s16_u16(vshrq_n_u16(a_.neon_u16, 8)); int16x8_t a_even = vreinterpretq_s16_u16(vbicq_u16(a_.neon_u16, vdupq_n_u16(0xff00))); /* Sign extend by shifting left then shifting right. */ int16x8_t b_even = vshrq_n_s16(vshlq_n_s16(b_.neon_i16, 8), 8); int16x8_t b_odd = vshrq_n_s16(b_.neon_i16, 8); /* multiply */ int16x8_t prod1 = vmulq_s16(a_even, b_even); int16x8_t prod2 = vmulq_s16(a_odd, b_odd); /* saturated add */ r_.neon_i16 = vqaddq_s16(prod1, prod2); #else for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { const int idx = HEDLEY_STATIC_CAST(int, i) << 1; int32_t ts = (HEDLEY_STATIC_CAST(int16_t, a_.u8[ idx ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[ idx ])) + (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1])); r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_maddubs_epi16(a, b) simde_mm_maddubs_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_maddubs_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_maddubs_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) int16x8_t ai = vreinterpretq_s16_u16(vmovl_u8(a_.neon_u8)); int16x8_t bi = vmovl_s8(b_.neon_i8); int16x8_t p = vmulq_s16(ai, bi); int16x4_t l = vget_low_s16(p); int16x4_t h = vget_high_s16(p); r_.neon_i16 = vqadd_s16(vuzp1_s16(l, h), vuzp2_s16(l, h)); #else for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { const int idx = HEDLEY_STATIC_CAST(int, i) << 1; int32_t ts = (HEDLEY_STATIC_CAST(int16_t, a_.u8[ idx ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[ idx ])) + (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1])); r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN; } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_maddubs_pi16(a, b) simde_mm_maddubs_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mulhrs_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_mulhrs_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* Multiply */ int32x4_t mul_lo = vmull_s16(vget_low_s16(a_.neon_i16), vget_low_s16(b_.neon_i16)); int32x4_t mul_hi = vmull_s16(vget_high_s16(a_.neon_i16), vget_high_s16(b_.neon_i16)); /* Rounding narrowing shift right * narrow = (int16_t)((mul + 16384) >> 15); */ int16x4_t narrow_lo = vrshrn_n_s32(mul_lo, 15); int16x4_t narrow_hi = vrshrn_n_s32(mul_hi, 15); /* Join together */ r_.neon_i16 = vcombine_s16(narrow_lo, narrow_hi); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t __lo = wasm_i32x4_mul(wasm_i32x4_extend_low_i16x8(a_.wasm_v128), wasm_i32x4_extend_low_i16x8(b_.wasm_v128)); v128_t __hi = wasm_i32x4_mul(wasm_i32x4_extend_high_i16x8(a_.wasm_v128), wasm_i32x4_extend_high_i16x8(b_.wasm_v128)); const v128_t __inc = wasm_i32x4_splat(0x4000); __lo = wasm_i32x4_add(__lo, __inc); __hi = wasm_i32x4_add(__hi, __inc); __lo = wasm_i32x4_add(__lo, __lo); __hi = wasm_i32x4_add(__hi, __hi); r_.wasm_v128 = wasm_i16x8_shuffle(__lo, __hi, 1, 3, 5, 7, 9, 11, 13, 15); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (((HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) + 0x4000) >> 15)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_mulhrs_epi16(a, b) simde_mm_mulhrs_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_mulhrs_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_mulhrs_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* Multiply */ int32x4_t mul = vmull_s16(a_.neon_i16, b_.neon_i16); /* Rounding narrowing shift right * narrow = (int16_t)((mul + 16384) >> 15); */ int16x4_t narrow = vrshrn_n_s32(mul, 15); /* Join together */ r_.neon_i16 = narrow; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = HEDLEY_STATIC_CAST(int16_t, (((HEDLEY_STATIC_CAST(int32_t, a_.i16[i]) * HEDLEY_STATIC_CAST(int32_t, b_.i16[i])) + 0x4000) >> 15)); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_mulhrs_pi16(a, b) simde_mm_mulhrs_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sign_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_sign_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t aneg_mask = vreinterpretq_u8_s8(vshrq_n_s8(b_.neon_i8, 7)); uint8x16_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqzq_s8(b_.neon_i8); #else bnz_mask = vceqq_s8(b_.neon_i8, vdupq_n_s8(0)); #endif bnz_mask = vmvnq_u8(bnz_mask); r_.neon_i8 = vbslq_s8(aneg_mask, vnegq_s8(a_.neon_i8), vandq_s8(a_.neon_i8, vreinterpretq_s8_u8(bnz_mask))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) simde__m128i mask = wasm_i8x16_shr(b_.wasm_v128, 7); simde__m128i zeromask = simde_mm_cmpeq_epi8(b_.wasm_v128, simde_mm_setzero_si128()); r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi8(a_.wasm_v128, mask), mask)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = (b_.i8[i] < 0) ? (- a_.i8[i]) : ((b_.i8[i] != 0) ? (a_.i8[i]) : INT8_C(0)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_epi8(a, b) simde_mm_sign_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sign_epi16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_sign_epi16(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x8_t aneg_mask = vreinterpretq_u16_s16(vshrq_n_s16(b_.neon_i16, 15)); uint16x8_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqzq_s16(b_.neon_i16); #else bnz_mask = vceqq_s16(b_.neon_i16, vdupq_n_s16(0)); #endif bnz_mask = vmvnq_u16(bnz_mask); r_.neon_i16 = vbslq_s16(aneg_mask, vnegq_s16(a_.neon_i16), vandq_s16(a_.neon_i16, vreinterpretq_s16_u16(bnz_mask))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) simde__m128i mask = simde_mm_srai_epi16(b_.wasm_v128, 15); simde__m128i zeromask = simde_mm_cmpeq_epi16(b_.wasm_v128, simde_mm_setzero_si128()); r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi16(a_.wasm_v128, mask), mask)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (b_.i16[i] < 0) ? (- a_.i16[i]) : ((b_.i16[i] != 0) ? (a_.i16[i]) : INT16_C(0)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_epi16(a, b) simde_mm_sign_epi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_sign_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSSE3_NATIVE) return _mm_sign_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x4_t aneg_mask = vreinterpretq_u32_s32(vshrq_n_s32(b_.neon_i32, 31)); uint32x4_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqzq_s32(b_.neon_i32); #else bnz_mask = vceqq_s32(b_.neon_i32, vdupq_n_s32(0)); #endif bnz_mask = vmvnq_u32(bnz_mask); r_.neon_i32 = vbslq_s32(aneg_mask, vnegq_s32(a_.neon_i32), vandq_s32(a_.neon_i32, vreinterpretq_s32_u32(bnz_mask))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) simde__m128i mask = simde_mm_srai_epi32(b_.wasm_v128, 31); simde__m128i zeromask = simde_mm_cmpeq_epi32(b_.wasm_v128, simde_mm_setzero_si128()); r_.wasm_v128 = simde_mm_andnot_si128(zeromask, simde_mm_xor_si128(simde_mm_add_epi32(a_.wasm_v128, mask), mask)); #else for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = (b_.i32[i] < 0) ? (- a_.i32[i]) : ((b_.i32[i] != 0) ? (a_.i32[i]) : INT32_C(0)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_epi32(a, b) simde_mm_sign_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_sign_pi8 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_sign_pi8(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8_t aneg_mask = vreinterpret_u8_s8(vshr_n_s8(b_.neon_i8, 7)); uint8x8_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqz_s8(b_.neon_i8); #else bnz_mask = vceq_s8(b_.neon_i8, vdup_n_s8(0)); #endif bnz_mask = vmvn_u8(bnz_mask); r_.neon_i8 = vbsl_s8(aneg_mask, vneg_s8(a_.neon_i8), vand_s8(a_.neon_i8, vreinterpret_s8_u8(bnz_mask))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = (b_.i8[i] < 0) ? (- a_.i8[i]) : ((b_.i8[i] != 0) ? (a_.i8[i]) : INT8_C(0)); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_pi8(a, b) simde_mm_sign_pi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_sign_pi16 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_sign_pi16(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x4_t aneg_mask = vreinterpret_u16_s16(vshr_n_s16(b_.neon_i16, 15)); uint16x4_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqz_s16(b_.neon_i16); #else bnz_mask = vceq_s16(b_.neon_i16, vdup_n_s16(0)); #endif bnz_mask = vmvn_u16(bnz_mask); r_.neon_i16 = vbsl_s16(aneg_mask, vneg_s16(a_.neon_i16), vand_s16(a_.neon_i16, vreinterpret_s16_u16(bnz_mask))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = (b_.i16[i] < 0) ? (- a_.i16[i]) : ((b_.i16[i] > 0) ? (a_.i16[i]) : INT16_C(0)); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_pi16(a, b) simde_mm_sign_pi16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m64 simde_mm_sign_pi32 (simde__m64 a, simde__m64 b) { #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) return _mm_sign_pi32(a, b); #else simde__m64_private r_, a_ = simde__m64_to_private(a), b_ = simde__m64_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x2_t aneg_mask = vreinterpret_u32_s32(vshr_n_s32(b_.neon_i32, 31)); uint32x2_t bnz_mask; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) bnz_mask = vceqz_s32(b_.neon_i32); #else bnz_mask = vceq_s32(b_.neon_i32, vdup_n_s32(0)); #endif bnz_mask = vmvn_u32(bnz_mask); r_.neon_i32 = vbsl_s32(aneg_mask, vneg_s32(a_.neon_i32), vand_s32(a_.neon_i32, vreinterpret_s32_u32(bnz_mask))); #else for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = (b_.i32[i] < 0) ? (- a_.i32[i]) : ((b_.i32[i] > 0) ? (a_.i32[i]) : INT32_C(0)); } #endif return simde__m64_from_private(r_); #endif } #if defined(SIMDE_X86_SSSE3_ENABLE_NATIVE_ALIASES) # define _mm_sign_pi32(a, b) simde_mm_sign_pi32(a, b) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE2_H) */ /* :: End simde/simde/x86/ssse3.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ENABLE_NATIVE_ALIASES) # define SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_blend_epi16 (simde__m128i a, simde__m128i b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = ((imm8 >> i) & 1) ? b_.u16[i] : a_.u16[i]; } return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #define simde_mm_blend_epi16(a, b, imm8) _mm_blend_epi16(a, b, imm8) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_blend_epi16(a, b, imm8) \ (__extension__ ({ \ simde__m128i_private \ simde_mm_blend_epi16_a_ = simde__m128i_to_private(a), \ simde_mm_blend_epi16_b_ = simde__m128i_to_private(b), \ simde_mm_blend_epi16_r_; \ \ simde_mm_blend_epi16_r_.i16 = \ SIMDE_SHUFFLE_VECTOR_( \ 16, 16, \ simde_mm_blend_epi16_a_.i16, \ simde_mm_blend_epi16_b_.i16, \ ((imm8) & (1 << 0)) ? 8 : 0, \ ((imm8) & (1 << 1)) ? 9 : 1, \ ((imm8) & (1 << 2)) ? 10 : 2, \ ((imm8) & (1 << 3)) ? 11 : 3, \ ((imm8) & (1 << 4)) ? 12 : 4, \ ((imm8) & (1 << 5)) ? 13 : 5, \ ((imm8) & (1 << 6)) ? 14 : 6, \ ((imm8) & (1 << 7)) ? 15 : 7 \ ); \ \ simde__m128i_from_private(simde_mm_blend_epi16_r_); \ })) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blend_epi16 #define _mm_blend_epi16(a, b, imm8) simde_mm_blend_epi16(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_blend_pd (simde__m128d a, simde__m128d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = ((imm8 >> i) & 1) ? b_.f64[i] : a_.f64[i]; } return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #define simde_mm_blend_pd(a, b, imm8) _mm_blend_pd(a, b, imm8) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_blend_pd(a, b, imm8) \ (__extension__ ({ \ simde__m128d_private \ simde_mm_blend_pd_a_ = simde__m128d_to_private(a), \ simde_mm_blend_pd_b_ = simde__m128d_to_private(b), \ simde_mm_blend_pd_r_; \ \ simde_mm_blend_pd_r_.f64 = \ SIMDE_SHUFFLE_VECTOR_( \ 64, 16, \ simde_mm_blend_pd_a_.f64, \ simde_mm_blend_pd_b_.f64, \ ((imm8) & (1 << 0)) ? 2 : 0, \ ((imm8) & (1 << 1)) ? 3 : 1 \ ); \ \ simde__m128d_from_private(simde_mm_blend_pd_r_); \ })) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blend_pd #define _mm_blend_pd(a, b, imm8) simde_mm_blend_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_blend_ps (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = ((imm8 >> i) & 1) ? b_.f32[i] : a_.f32[i]; } return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) # define simde_mm_blend_ps(a, b, imm8) _mm_blend_ps(a, b, imm8) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm_blend_ps(a, b, imm8) \ (__extension__ ({ \ simde__m128_private \ simde_mm_blend_ps_a_ = simde__m128_to_private(a), \ simde_mm_blend_ps_b_ = simde__m128_to_private(b), \ simde_mm_blend_ps_r_; \ \ simde_mm_blend_ps_r_.f32 = \ SIMDE_SHUFFLE_VECTOR_( \ 32, 16, \ simde_mm_blend_ps_a_.f32, \ simde_mm_blend_ps_b_.f32, \ ((imm8) & (1 << 0)) ? 4 : 0, \ ((imm8) & (1 << 1)) ? 5 : 1, \ ((imm8) & (1 << 2)) ? 6 : 2, \ ((imm8) & (1 << 3)) ? 7 : 3 \ ); \ \ simde__m128_from_private(simde_mm_blend_ps_r_); \ })) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blend_ps #define _mm_blend_ps(a, b, imm8) simde_mm_blend_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_blendv_epi8 (simde__m128i a, simde__m128i b, simde__m128i mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_blendv_epi8(a, b, mask); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i m = _mm_cmpgt_epi8(_mm_setzero_si128(), mask); return _mm_xor_si128(_mm_subs_epu8(_mm_xor_si128(a, b), m), b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), mask_ = simde__m128i_to_private(mask); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* Use a signed shift right to create a mask with the sign bit */ mask_.neon_i8 = vshrq_n_s8(mask_.neon_i8, 7); r_.neon_i8 = vbslq_s8(mask_.neon_u8, b_.neon_i8, a_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_i8x16_shr(mask_.wasm_v128, 7); r_.wasm_v128 = wasm_v128_bitselect(b_.wasm_v128, a_.wasm_v128, m); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_sel(a_.altivec_i8, b_.altivec_i8, vec_cmplt(mask_.altivec_i8, vec_splat_s8(0))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) /* https://software.intel.com/en-us/forums/intel-c-compiler/topic/850087 */ #if defined(HEDLEY_INTEL_VERSION_CHECK) __typeof__(mask_.i8) z = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; mask_.i8 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i8), mask_.i8 < z); #else mask_.i8 >>= (CHAR_BIT * sizeof(mask_.i8[0])) - 1; #endif r_.i8 = (mask_.i8 & b_.i8) | (~mask_.i8 & a_.i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { int8_t m = mask_.i8[i] >> 7; r_.i8[i] = (m & b_.i8[i]) | (~m & a_.i8[i]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blendv_epi8 #define _mm_blendv_epi8(a, b, mask) simde_mm_blendv_epi8(a, b, mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_blendv_epi16 (simde__m128i a, simde__m128i b, simde__m128i mask) { #if defined(SIMDE_X86_SSE2_NATIVE) mask = simde_mm_srai_epi16(mask, 15); return simde_mm_or_si128(simde_mm_and_si128(mask, b), simde_mm_andnot_si128(mask, a)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), mask_ = simde__m128i_to_private(mask); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) mask_ = simde__m128i_to_private(simde_mm_cmplt_epi16(mask, simde_mm_setzero_si128())); r_.neon_i16 = vbslq_s16(mask_.neon_u16, b_.neon_i16, a_.neon_i16); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i16 = vec_sel(a_.altivec_i16, b_.altivec_i16, vec_cmplt(mask_.altivec_i16, vec_splat_s16(0))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) #if defined(HEDLEY_INTEL_VERSION_CHECK) __typeof__(mask_.i16) z = { 0, 0, 0, 0, 0, 0, 0, 0 }; mask_.i16 = mask_.i16 < z; #else mask_.i16 >>= (CHAR_BIT * sizeof(mask_.i16[0])) - 1; #endif r_.i16 = (mask_.i16 & b_.i16) | (~mask_.i16 & a_.i16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { int16_t m = mask_.i16[i] >> 15; r_.i16[i] = (m & b_.i16[i]) | (~m & a_.i16[i]); } #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_blendv_epi32 (simde__m128i a, simde__m128i b, simde__m128i mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_castps_si128(_mm_blendv_ps(_mm_castsi128_ps(a), _mm_castsi128_ps(b), _mm_castsi128_ps(mask))); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), mask_ = simde__m128i_to_private(mask); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) mask_ = simde__m128i_to_private(simde_mm_cmplt_epi32(mask, simde_mm_setzero_si128())); r_.neon_i32 = vbslq_s32(mask_.neon_u32, b_.neon_i32, a_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_i32x4_shr(mask_.wasm_v128, 31); r_.wasm_v128 = wasm_v128_or(wasm_v128_and(b_.wasm_v128, m), wasm_v128_andnot(a_.wasm_v128, m)); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_sel(a_.altivec_i32, b_.altivec_i32, vec_cmplt(mask_.altivec_i32, vec_splat_s32(0))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) #if defined(HEDLEY_INTEL_VERSION_CHECK) __typeof__(mask_.i32) z = { 0, 0, 0, 0 }; mask_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i32), mask_.i32 < z); #else mask_.i32 >>= (CHAR_BIT * sizeof(mask_.i32[0])) - 1; #endif r_.i32 = (mask_.i32 & b_.i32) | (~mask_.i32 & a_.i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { int32_t m = mask_.i32[i] >> 31; r_.i32[i] = (m & b_.i32[i]) | (~m & a_.i32[i]); } #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_blendv_epi64 (simde__m128i a, simde__m128i b, simde__m128i mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_castpd_si128(_mm_blendv_pd(_mm_castsi128_pd(a), _mm_castsi128_pd(b), _mm_castsi128_pd(mask))); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), mask_ = simde__m128i_to_private(mask); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) mask_.neon_u64 = vcltq_s64(mask_.neon_i64, vdupq_n_s64(UINT64_C(0))); r_.neon_i64 = vbslq_s64(mask_.neon_u64, b_.neon_i64, a_.neon_i64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_i64x2_shr(mask_.wasm_v128, 63); r_.wasm_v128 = wasm_v128_or(wasm_v128_and(b_.wasm_v128, m), wasm_v128_andnot(a_.wasm_v128, m)); #elif (defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && !defined(SIMDE_BUG_CLANG_46770)) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i64 = vec_sel(a_.altivec_i64, b_.altivec_i64, vec_cmplt(mask_.altivec_i64, vec_splats(HEDLEY_STATIC_CAST(signed long long, 0)))); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(signed long long) selector = vec_sra(mask_.altivec_i64, vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 63))); r_.altivec_i32 = vec_sel(a_.altivec_i32, b_.altivec_i32, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), selector)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) #if defined(HEDLEY_INTEL_VERSION_CHECK) __typeof__(mask_.i64) z = { 0, 0 }; mask_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(mask_.i64), mask_.i64 < z); #else mask_.i64 >>= (CHAR_BIT * sizeof(mask_.i64[0])) - 1; #endif r_.i64 = (mask_.i64 & b_.i64) | (~mask_.i64 & a_.i64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { int64_t m = mask_.i64[i] >> 63; r_.i64[i] = (m & b_.i64[i]) | (~m & a_.i64[i]); } #endif return simde__m128i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_blendv_pd (simde__m128d a, simde__m128d b, simde__m128d mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_blendv_pd(a, b, mask); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m_ = wasm_i64x2_shr(HEDLEY_REINTERPRET_CAST(v128_t, mask), 63); return simde__m128d_from_wasm_v128(wasm_v128_bitselect(simde__m128d_to_wasm_v128(b), simde__m128d_to_wasm_v128(a), m_)); #else return simde_mm_castsi128_pd(simde_x_mm_blendv_epi64(simde_mm_castpd_si128(a), simde_mm_castpd_si128(b), simde_mm_castpd_si128(mask))); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blendv_pd #define _mm_blendv_pd(a, b, mask) simde_mm_blendv_pd(a, b, mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_blendv_ps (simde__m128 a, simde__m128 b, simde__m128 mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_blendv_ps(a, b, mask); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m_ = wasm_i32x4_shr(HEDLEY_REINTERPRET_CAST(v128_t, mask), 31); return simde__m128d_from_wasm_v128(wasm_v128_bitselect(simde__m128d_to_wasm_v128(b), simde__m128d_to_wasm_v128(a), m_)); #else return simde_mm_castsi128_ps(simde_x_mm_blendv_epi32(simde_mm_castps_si128(a), simde_mm_castps_si128(b), simde_mm_castps_si128(mask))); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_blendv_ps #define _mm_blendv_ps(a, b, mask) simde_mm_blendv_ps(a, b, mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_round_pd (simde__m128d a, int rounding) SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) { simde__m128d_private r_, a_ = simde__m128d_to_private(a); /* For architectures which lack a current direction SIMD instruction. */ #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) if ((rounding & 7) == SIMDE_MM_FROUND_CUR_DIRECTION) rounding = HEDLEY_STATIC_CAST(int, SIMDE_MM_GET_ROUNDING_MODE()) << 13; #endif switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) { case SIMDE_MM_FROUND_CUR_DIRECTION: #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_round(a_.altivec_f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vrndiq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_nearest(a_.wasm_v128); #elif defined(simde_math_nearbyint) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_nearbyint(a_.f64[i]); } #else HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); #endif break; case SIMDE_MM_FROUND_TO_NEAREST_INT: #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_round(a_.altivec_f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vrndaq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_nearest(a_.wasm_v128); #elif defined(simde_math_roundeven) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_roundeven(a_.f64[i]); } #else HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); #endif break; case SIMDE_MM_FROUND_TO_NEG_INF: #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_floor(a_.altivec_f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vrndmq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_floor(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_floor(a_.f64[i]); } #endif break; case SIMDE_MM_FROUND_TO_POS_INF: #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_ceil(a_.altivec_f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vrndpq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_ceil(a_.wasm_v128); #elif defined(simde_math_ceil) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_ceil(a_.f64[i]); } #else HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); #endif break; case SIMDE_MM_FROUND_TO_ZERO: #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_f64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(double), vec_trunc(a_.altivec_f64)); #elif defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vrndq_f64(a_.neon_f64); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_trunc(a_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_trunc(a_.f64[i]); } #endif break; default: HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); } return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #define simde_mm_round_pd(a, rounding) _mm_round_pd(a, rounding) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_round_pd #define _mm_round_pd(a, rounding) simde_mm_round_pd(a, rounding) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_ceil_pd (simde__m128d a) { #if defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128d_from_wasm_v128(wasm_f64x2_ceil(simde__m128d_to_wasm_v128(a))); #endif return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF); } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_ceil_pd #define _mm_ceil_pd(a) simde_mm_ceil_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_ceil_ps (simde__m128 a) { #if defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128_from_wasm_v128(wasm_f32x4_ceil(simde__m128_to_wasm_v128(a))); #endif return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF); } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_ceil_ps #define _mm_ceil_ps(a) simde_mm_ceil_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_ceil_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_ceil_sd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(simde_math_ceilf) r_ = simde__m128d_to_private(simde_mm_set_pd(a_.f64[1], simde_math_ceil(b_.f64[0]))); #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_ceil_sd #define _mm_ceil_sd(a, b) simde_mm_ceil_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_ceil_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_ceil_ss(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_ceil_ps(b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_ceil_ps(simde_x_mm_broadcastlow_ps(b))); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(simde_math_ceilf) r_ = simde__m128_to_private(simde_mm_set_ps(a_.f32[3], a_.f32[2], a_.f32[1], simde_math_ceilf(b_.f32[0]))); #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_ceil_ss #define _mm_ceil_ss(a, b) simde_mm_ceil_ss(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpeq_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cmpeq_epi64(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vceqq_u64(a_.neon_u64, b_.neon_u64); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* (a == b) -> (a_lo == b_lo) && (a_hi == b_hi) */ uint32x4_t cmp = vceqq_u32(a_.neon_u32, b_.neon_u32); uint32x4_t swapped = vrev64q_u32(cmp); r_.neon_u32 = vandq_u32(cmp, swapped); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 == b_.i64); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_i64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), vec_cmpeq(a_.altivec_i64, b_.altivec_i64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = (a_.u64[i] == b_.u64[i]) ? ~UINT64_C(0) : UINT64_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cmpeq_epi64 #define _mm_cmpeq_epi64(a, b) simde_mm_cmpeq_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi8_epi16 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi8_epi16(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_srai_epi16(_mm_unpacklo_epi8(a, a), 8); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x16_t s8x16 = a_.neon_i8; /* xxxx xxxx xxxx DCBA */ int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16)); /* 0x0x 0x0x 0D0C 0B0A */ r_.neon_i16 = s16x8; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i16x8_extend_low_i8x16(a_.wasm_v128); #elif defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8, -1, 0, -1, 1, -1, 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7)); r_.i16 >>= 8; #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.i16, a_.m64_private[0].i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi8_epi16 #define _mm_cvtepi8_epi16(a) simde_mm_cvtepi8_epi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi8_epi32 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi8_epi32(a); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i tmp = _mm_unpacklo_epi8(a, a); tmp = _mm_unpacklo_epi16(tmp, tmp); return _mm_srai_epi32(tmp, 24); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x16_t s8x16 = a_.neon_i8; /* xxxx xxxx xxxx DCBA */ int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16)); /* 0x0x 0x0x 0D0C 0B0A */ int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000D 000C 000B 000A */ r_.neon_i32 = s32x4; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_extend_low_i16x8(wasm_i16x8_extend_low_i8x16(a_.wasm_v128)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8, -1, -1, -1, 0, -1, -1, -1, 1, -1, -1, -1, 2, -1, -1, -1, 3)); r_.i32 >>= 24; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi8_epi32 #define _mm_cvtepi8_epi32(a) simde_mm_cvtepi8_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi8_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi8_epi64(a); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x16_t s8x16 = a_.neon_i8; /* xxxx xxxx xxxx xxBA */ int16x8_t s16x8 = vmovl_s8(vget_low_s8(s8x16)); /* 0x0x 0x0x 0x0x 0B0A */ int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000x 000x 000B 000A */ int64x2_t s64x2 = vmovl_s32(vget_low_s32(s32x4)); /* 0000 000B 0000 000A */ r_.neon_i64 = s64x2; #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t extra = wasm_i32x4_extend_low_i16x8(wasm_i16x8_extend_low_i8x16(a_.wasm_v128)); v128_t sign = wasm_i32x4_gt(wasm_i64x2_const(0, 0), extra); r_.wasm_v128 = wasm_i32x4_shuffle(extra, sign, 0, 4, 1, 5); #elif (!defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) /* Disabled on x86 due to lack of 64-bit arithmetic shift until * until AVX-512 (at which point we would be using the native * _mm_cvtepi_epi64 anyways). */ r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, a_.i8, -1, -1, -1, -1, -1, -1, -1, 0, -1, -1, -1, -1, -1, -1, -1, 1)); r_.i64 >>= 56; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi8_epi64 #define _mm_cvtepi8_epi64(a) simde_mm_cvtepi8_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu8_epi16 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu8_epi16(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi8(a, _mm_setzero_si128()); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t u8x16 = a_.neon_u8; /* xxxx xxxx xxxx DCBA */ uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16)); /* 0x0x 0x0x 0D0C 0B0A */ r_.neon_u16 = u16x8; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_extend_low_u8x16(a_.wasm_v128); #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.i8) z = { 0, }; r_.i16 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i16), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23)); #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_CLANG_45541) && (!defined(SIMDE_ARCH_POWER) || !defined(__clang__)) SIMDE_CONVERT_VECTOR_(r_.i16, a_.m64_private[0].u8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a_.u8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu8_epi16 #define _mm_cvtepu8_epi16(a) simde_mm_cvtepu8_epi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu8_epi32 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu8_epi32(a); #elif defined(SIMDE_X86_SSSE3_NATIVE) __m128i s = _mm_set_epi8( HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x03), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x02), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x01), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x00)); return _mm_shuffle_epi8(a, s); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i z = _mm_setzero_si128(); return _mm_unpacklo_epi16(_mm_unpacklo_epi8(a, z), z); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t u8x16 = a_.neon_u8; /* xxxx xxxx xxxx DCBA */ uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16)); /* 0x0x 0x0x 0D0C 0B0A */ uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000D 000C 000B 000A */ r_.neon_u32 = u32x4; #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_extend_low_u16x8(wasm_u16x8_extend_low_u8x16(a_.wasm_v128)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.i8) z = { 0, }; r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z, 0, 17, 18, 19, 1, 21, 22, 23, 2, 25, 26, 27, 3, 29, 30, 31)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.u8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu8_epi32 #define _mm_cvtepu8_epi32(a) simde_mm_cvtepu8_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu8_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu8_epi64(a); #elif defined(SIMDE_X86_SSSE3_NATIVE) __m128i s = _mm_set_epi8( HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x01), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x80), HEDLEY_STATIC_CAST(char, 0x00)); return _mm_shuffle_epi8(a, s); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i z = _mm_setzero_si128(); return _mm_unpacklo_epi32(_mm_unpacklo_epi16(_mm_unpacklo_epi8(a, z), z), z); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t u8x16 = a_.neon_u8; /* xxxx xxxx xxxx xxBA */ uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16)); /* 0x0x 0x0x 0x0x 0B0A */ uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */ uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */ r_.neon_u64 = u64x2; #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.i8) z = { 0, }; r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(8, 16, a_.i8, z, 0, 17, 18, 19, 20, 21, 22, 23, 1, 25, 26, 27, 28, 29, 30, 31)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.u8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu8_epi64 #define _mm_cvtepu8_epi64(a) simde_mm_cvtepu8_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi16_epi32 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi16_epi32(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_srai_epi32(_mm_unpacklo_epi16(a, a), 16); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vmovl_s16(vget_low_s16(a_.neon_i16)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_extend_low_i16x8(a_.wasm_v128); #elif !defined(SIMDE_ARCH_X86) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, a_.i16, 8, 0, 10, 1, 12, 2, 14, 3)); r_.i32 >>= 16; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi16_epi32 #define _mm_cvtepi16_epi32(a) simde_mm_cvtepi16_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu16_epi32 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu16_epi32(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi16(a, _mm_setzero_si128()); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vmovl_u16(vget_low_u16(a_.neon_u16)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_extend_low_u16x8(a_.wasm_v128); #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.u16) z = { 0, }; r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.u16, z, 0, 9, 1, 11, 2, 13, 3, 15)); #elif defined(SIMDE_CONVERT_VECTOR_) && !defined(SIMDE_BUG_CLANG_45541) && (!defined(SIMDE_ARCH_POWER) || !defined(__clang__)) SIMDE_CONVERT_VECTOR_(r_.i32, a_.m64_private[0].u16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.u16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu16_epi32 #define _mm_cvtepu16_epi32(a) simde_mm_cvtepu16_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu16_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu16_epi64(a); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i z = _mm_setzero_si128(); return _mm_unpacklo_epi32(_mm_unpacklo_epi16(a, z), z); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x8_t u16x8 = a_.neon_u16; /* xxxx xxxx xxxx 0B0A */ uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000x 000x 000B 000A */ uint64x2_t u64x2 = vmovl_u32(vget_low_u32(u32x4)); /* 0000 000B 0000 000A */ r_.neon_u64 = u64x2; #elif defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.u16) z = { 0, }; r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.u16, z, 0, 9, 10, 11, 1, 13, 14, 15)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.u16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu16_epi64 #define _mm_cvtepu16_epi64(a) simde_mm_cvtepu16_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi16_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi16_epi64(a); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x8_t s16x8 = a_.neon_i16; /* xxxx xxxx xxxx 0B0A */ int32x4_t s32x4 = vmovl_s16(vget_low_s16(s16x8)); /* 000x 000x 000B 000A */ int64x2_t s64x2 = vmovl_s32(vget_low_s32(s32x4)); /* 0000 000B 0000 000A */ r_.neon_i64 = s64x2; #elif (!defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(16, 16, a_.i16, a_.i16, 8, 9, 10, 0, 12, 13, 14, 1)); r_.i64 >>= 48; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi16_epi64 #define _mm_cvtepi16_epi64(a) simde_mm_cvtepi16_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepi32_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepi32_epi64(a); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i tmp = _mm_shuffle_epi32(a, 0x50); tmp = _mm_srai_epi32(tmp, 31); tmp = _mm_shuffle_epi32(tmp, 0xed); return _mm_unpacklo_epi32(a, tmp); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i64 = vmovl_s32(vget_low_s32(a_.neon_i32)); #elif !defined(SIMDE_ARCH_X86) && defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_VECTOR_SCALAR) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(32, 16, a_.i32, a_.i32, -1, 0, -1, 1)); r_.i64 >>= 32; #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepi32_epi64 #define _mm_cvtepi32_epi64(a) simde_mm_cvtepi32_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cvtepu32_epi64 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_cvtepu32_epi64(a); #elif defined(SIMDE_X86_SSE2_NATIVE) return _mm_unpacklo_epi32(a, _mm_setzero_si128()); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u64 = vmovl_u32(vget_low_u32(a_.neon_u32)); #elif defined(SIMDE_VECTOR_SCALAR) && defined(SIMDE_SHUFFLE_VECTOR_) && (SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE) __typeof__(r_.u32) z = { 0, }; r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), SIMDE_SHUFFLE_VECTOR_(32, 16, a_.u32, z, 0, 4, 1, 6)); #elif defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.i64, a_.m64_private[0].u32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.u32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_cvtepu32_epi64 #define _mm_cvtepu32_epi64(a) simde_mm_cvtepu32_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_dp_pd (simde__m128d a, simde__m128d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f64 = vmulq_f64(a_.neon_f64, b_.neon_f64); switch (imm8) { case 0xff: r_.neon_f64 = vaddq_f64(r_.neon_f64, vextq_f64(r_.neon_f64, r_.neon_f64, 1)); break; case 0x13: r_.neon_f64 = vdupq_lane_f64(vget_low_f64(r_.neon_f64), 0); break; default: { /* imm8 is a compile-time constant, so this all becomes just a load */ uint64_t mask_data[] = { (imm8 & (1 << 4)) ? ~UINT64_C(0) : UINT64_C(0), (imm8 & (1 << 5)) ? ~UINT64_C(0) : UINT64_C(0), }; r_.neon_f64 = vreinterpretq_f64_u64(vandq_u64(vld1q_u64(mask_data), vreinterpretq_u64_f64(r_.neon_f64))); } r_.neon_f64 = vdupq_n_f64(vaddvq_f64(r_.neon_f64)); { uint64_t mask_data[] = { (imm8 & 1) ? ~UINT64_C(0) : UINT64_C(0), (imm8 & 2) ? ~UINT64_C(0) : UINT64_C(0) }; r_.neon_f64 = vreinterpretq_f64_u64(vandq_u64(vld1q_u64(mask_data), vreinterpretq_u64_f64(r_.neon_f64))); } break; } #else simde_float64 sum = SIMDE_FLOAT64_C(0.0); SIMDE_VECTORIZE_REDUCTION(+:sum) for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { sum += ((imm8 >> (i + 4)) & 1) ? (a_.f64[i] * b_.f64[i]) : 0.0; } SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = ((imm8 >> i) & 1) ? sum : 0.0; } #endif return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) # define simde_mm_dp_pd(a, b, imm8) _mm_dp_pd(a, b, imm8) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_dp_pd #define _mm_dp_pd(a, b, imm8) simde_mm_dp_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_dp_ps (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_f32 = vmulq_f32(a_.neon_f32, b_.neon_f32); switch (imm8) { case 0xff: r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32)); break; case 0x7f: r_.neon_f32 = vsetq_lane_f32(0, r_.neon_f32, 3); r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32)); break; default: { { uint32_t mask_data[] = { (imm8 & (1 << 4)) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & (1 << 5)) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & (1 << 6)) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & (1 << 7)) ? ~UINT32_C(0) : UINT32_C(0) }; r_.neon_f32 = vreinterpretq_f32_u32(vandq_u32(vld1q_u32(mask_data), vreinterpretq_u32_f32(r_.neon_f32))); } r_.neon_f32 = vdupq_n_f32(vaddvq_f32(r_.neon_f32)); { uint32_t mask_data[] = { (imm8 & 1) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & 2) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & 4) ? ~UINT32_C(0) : UINT32_C(0), (imm8 & 8) ? ~UINT32_C(0) : UINT32_C(0) }; r_.neon_f32 = vreinterpretq_f32_u32(vandq_u32(vld1q_u32(mask_data), vreinterpretq_u32_f32(r_.neon_f32))); } } break; } #else simde_float32 sum = SIMDE_FLOAT32_C(0.0); SIMDE_VECTORIZE_REDUCTION(+:sum) for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { sum += ((imm8 >> (i + 4)) & 1) ? (a_.f32[i] * b_.f32[i]) : SIMDE_FLOAT32_C(0.0); } SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = ((imm8 >> i) & 1) ? sum : SIMDE_FLOAT32_C(0.0); } #endif return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #if defined(HEDLEY_MCST_LCC_VERSION) #define simde_mm_dp_ps(a, b, imm8) (__extension__ ({ \ SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS \ _mm_dp_ps((a), (b), (imm8)); \ SIMDE_LCC_REVERT_DEPRECATED_WARNINGS \ })) #else #define simde_mm_dp_ps(a, b, imm8) _mm_dp_ps(a, b, imm8) #endif #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_dp_ps #define _mm_dp_ps(a, b, imm8) simde_mm_dp_ps(a, b, imm8) #endif #if defined(simde_mm_extract_epi8) # undef simde_mm_extract_epi8 #endif SIMDE_FUNCTION_ATTRIBUTES int8_t simde_mm_extract_epi8 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; (void) imm8; #endif return vec_extract(a_.altivec_i8, imm8); #else return a_.i8[imm8 & 15]; #endif } #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_BUG_GCC_BAD_MM_EXTRACT_EPI8) # define simde_mm_extract_epi8(a, imm8) HEDLEY_STATIC_CAST(int8_t, _mm_extract_epi8(a, imm8)) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_extract_epi8(a, imm8) vgetq_lane_s8(simde__m128i_to_neon_i8(a), imm8) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_extract_epi8(a, imm8) wasm_u8x16_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 15) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_extract_epi8 #define _mm_extract_epi8(a, imm8) HEDLEY_STATIC_CAST(int, simde_mm_extract_epi8(a, imm8)) #endif #if defined(simde_mm_extract_epi32) # undef simde_mm_extract_epi32 #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_extract_epi32 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; (void) imm8; #endif return vec_extract(a_.altivec_i32, imm8); #else return a_.i32[imm8 & 3]; #endif } #if defined(SIMDE_X86_SSE4_1_NATIVE) # define simde_mm_extract_epi32(a, imm8) _mm_extract_epi32(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_extract_epi32(a, imm8) vgetq_lane_s32(simde__m128i_to_neon_i32(a), imm8) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) # define simde_mm_extract_epi32(a, imm8) HEDLEY_STATIC_CAST(int32_t, vec_extract(simde__m128i_to_altivec_i32(a), imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_extract_epi32(a, imm8) wasm_i32x4_extract_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 3) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_extract_epi32 #define _mm_extract_epi32(a, imm8) simde_mm_extract_epi32(a, imm8) #endif #if defined(simde_mm_extract_epi64) # undef simde_mm_extract_epi64 #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_mm_extract_epi64 (simde__m128i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m128i_private a_ = simde__m128i_to_private(a); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) #if defined(SIMDE_BUG_GCC_95227) (void) a_; (void) imm8; #endif return vec_extract(a_.altivec_i64, imm8); #else return a_.i64[imm8 & 1]; #endif } #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ARCH_AMD64) # define simde_mm_extract_epi64(a, imm8) _mm_extract_epi64(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_extract_epi64(a, imm8) vgetq_lane_s64(simde__m128i_to_neon_i64(a), imm8) #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) # define simde_mm_extract_epi64(a, imm8) HEDLEY_STATIC_CAST(int64_t, vec_extract(simde__m128i_to_altivec_i64(a), imm8)) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #undef _mm_extract_epi64 #define _mm_extract_epi64(a, imm8) simde_mm_extract_epi64(a, imm8) #endif #if defined(simde_mm_extract_ps) # undef simde_mm_extract_ps #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm_extract_ps (simde__m128 a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128_private a_ = simde__m128_to_private(a); return a_.i32[imm8 & 3]; } #if defined(SIMDE_X86_SSE4_1_NATIVE) #define simde_mm_extract_ps(a, imm8) _mm_extract_ps(a, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_mm_extract_ps(a, imm8) vgetq_lane_s32(simde__m128_to_neon_i32(a), imm8) #elif defined(SIMDE_WASM_SIMD128_NATIVE) #define simde_mm_extract_ps(a, imm8) wasm_i32x4_extract_lane(simde__m128_to_wasm_v128((a)), (imm8) & 3) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_extract_ps #define _mm_extract_ps(a, imm8) simde_mm_extract_ps(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_floor_pd (simde__m128d a) { #if defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128d_from_wasm_v128(wasm_f64x2_floor(simde__m128d_to_wasm_v128(a))); #endif return simde_mm_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF); } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_floor_pd #define _mm_floor_pd(a) simde_mm_floor_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_floor_ps (simde__m128 a) { #if defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128_from_wasm_v128(wasm_f32x4_floor(simde__m128_to_wasm_v128(a))); #endif return simde_mm_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF); } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_floor_ps #define _mm_floor_ps(a) simde_mm_floor_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_floor_sd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_floor_sd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(simde_math_floor) r_.f64[0] = simde_math_floor(b_.f64[0]); r_.f64[1] = a_.f64[1]; #else HEDLEY_UNREACHABLE(); #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_floor_sd #define _mm_floor_sd(a, b) simde_mm_floor_sd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_floor_ss (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_floor_ss(a, b); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_FAST_EXCEPTIONS) return simde_mm_move_ss(a, simde_mm_floor_ps(b)); #elif (SIMDE_NATURAL_VECTOR_SIZE > 0) return simde_mm_move_ss(a, simde_mm_floor_ps(simde_x_mm_broadcastlow_ps(b))); #else simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(simde_math_floorf) r_.f32[0] = simde_math_floorf(b_.f32[0]); for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i]; } #else HEDLEY_UNREACHABLE(); #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_floor_ss #define _mm_floor_ss(a, b) simde_mm_floor_ss(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_insert_epi8 (simde__m128i a, int i, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m128i_private r_ = simde__m128i_to_private(a); r_.i8[imm8] = HEDLEY_STATIC_CAST(int8_t, i); return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) /* clang-3.8 returns an incompatible type, so we need the cast. MSVC * can't handle the cast ("error C2440: 'type cast': cannot convert * from '__m128i' to '__m128i'"). */ #if defined(__clang__) #define simde_mm_insert_epi8(a, i, imm8) HEDLEY_REINTERPRET_CAST(__m128i, _mm_insert_epi8(a, i, imm8)) #else #define simde_mm_insert_epi8(a, i, imm8) _mm_insert_epi8(a, i, imm8) #endif #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_insert_epi8(a, i, imm8) simde__m128i_from_neon_i8(vsetq_lane_s8(i, simde__m128i_to_neon_i8(a), imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_insert_epi8(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i8x16_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 15, HEDLEY_STATIC_CAST(int8_t, (i)))) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_insert_epi8 #define _mm_insert_epi8(a, i, imm8) simde_mm_insert_epi8(a, i, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_insert_epi32 (simde__m128i a, int i, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128i_private r_ = simde__m128i_to_private(a); r_.i32[imm8] = HEDLEY_STATIC_CAST(int32_t, i); return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #if defined(__clang__) #define simde_mm_insert_epi32(a, i, imm8) HEDLEY_REINTERPRET_CAST(__m128i, _mm_insert_epi32(a, i, imm8)) #else #define simde_mm_insert_epi32(a, i, imm8) _mm_insert_epi32(a, i, imm8) #endif #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_insert_epi32(a, i, imm8) simde__m128i_from_neon_i32(vsetq_lane_s32(i, simde__m128i_to_neon_i32(a), imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_insert_epi32(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i32x4_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 3, (i))) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_insert_epi32 #define _mm_insert_epi32(a, i, imm8) simde_mm_insert_epi32(a, i, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_insert_epi64 (simde__m128i a, int64_t i, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { #if defined(SIMDE_BUG_GCC_94482) simde__m128i_private a_ = simde__m128i_to_private(a); switch(imm8) { case 0: return simde_mm_set_epi64x(a_.i64[1], i); break; case 1: return simde_mm_set_epi64x(i, a_.i64[0]); break; default: HEDLEY_UNREACHABLE(); break; } #else simde__m128i_private r_ = simde__m128i_to_private(a); r_.i64[imm8] = i; return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_ARCH_AMD64) # define simde_mm_insert_epi64(a, i, imm8) _mm_insert_epi64(a, i, imm8) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) # define simde_mm_insert_epi64(a, i, imm8) simde__m128i_from_neon_i64(vsetq_lane_s64(i, simde__m128i_to_neon_i64(a), imm8)) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_insert_epi64(a, i, imm8) simde__m128i_from_wasm_v128(wasm_i64x2_replace_lane(simde__m128i_to_wasm_v128((a)), (imm8) & 1, (i))) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #undef _mm_insert_epi64 #define _mm_insert_epi64(a, i, imm8) simde_mm_insert_epi64(a, i, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_insert_ps (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128_private r_, a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); float tmp1_ = b_.f32[(imm8 >> 6) & 3]; a_.f32[(imm8 >> 4) & 3] = tmp1_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = ((imm8 >> i) & 1 ) ? SIMDE_FLOAT32_C(0.0) : a_.f32[i]; } return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) # define simde_mm_insert_ps(a, b, imm8) _mm_insert_ps(a, b, imm8) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_insert_ps #define _mm_insert_ps(a, b, imm8) simde_mm_insert_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI) return _mm_max_epi8(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i m = _mm_cmpgt_epi8(a, b); return _mm_or_si128(_mm_and_si128(m, a), _mm_andnot_si128(m, b)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vmaxq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_max(a_.altivec_i8, b_.altivec_i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[i] > b_.i8[i] ? a_.i8[i] : b_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_max_epi8 #define _mm_max_epi8(a, b) simde_mm_max_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI) return _mm_max_epi32(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i m = _mm_cmpgt_epi32(a, b); return _mm_or_si128(_mm_and_si128(m, a), _mm_andnot_si128(m, b)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vmaxq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_max(a_.altivec_i32, b_.altivec_i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] > b_.i32[i] ? a_.i32[i] : b_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_max_epi32 #define _mm_max_epi32(a, b) simde_mm_max_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_max_epu16(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) /* https://github.com/simd-everywhere/simde/issues/855#issuecomment-881656284 */ return _mm_add_epi16(b, _mm_subs_epu16(a, b)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vmaxq_u16(a_.neon_u16, b_.neon_u16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u16 = vec_max(a_.altivec_u16, b_.altivec_u16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = a_.u16[i] > b_.u16[i] ? a_.u16[i] : b_.u16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_max_epu16 #define _mm_max_epu16(a, b) simde_mm_max_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_max_epu32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_max_epu32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vmaxq_u32(a_.neon_u32, b_.neon_u32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_max(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u32 = vec_max(a_.altivec_u32, b_.altivec_u32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] > b_.u32[i] ? a_.u32[i] : b_.u32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_max_epu32 #define _mm_max_epu32(a, b) simde_mm_max_epu32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epi8 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI) return _mm_min_epi8(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i8 = vminq_s8(a_.neon_i8, b_.neon_i8); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i8x16_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i8 = vec_min(a_.altivec_i8, b_.altivec_i8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a_.i8[i] < b_.i8[i] ? a_.i8[i] : b_.i8[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_min_epi8 #define _mm_min_epi8(a, b) simde_mm_min_epi8(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(__PGI) return _mm_min_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vminq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_i32 = vec_min(a_.altivec_i32, b_.altivec_i32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] < b_.i32[i] ? a_.i32[i] : b_.i32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_min_epi32 #define _mm_min_epi32(a, b) simde_mm_min_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epu16 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_min_epu16(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) /* https://github.com/simd-everywhere/simde/issues/855#issuecomment-881656284 */ return _mm_sub_epi16(a, _mm_subs_epu16(a, b)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vminq_u16(a_.neon_u16, b_.neon_u16); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u16 = vec_min(a_.altivec_u16, b_.altivec_u16); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { r_.u16[i] = a_.u16[i] < b_.u16[i] ? a_.u16[i] : b_.u16[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_min_epu16 #define _mm_min_epu16(a, b) simde_mm_min_epu16(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_min_epu32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_min_epu32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vminq_u32(a_.neon_u32, b_.neon_u32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u32x4_min(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE) r_.altivec_u32 = vec_min(a_.altivec_u32, b_.altivec_u32); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] < b_.u32[i] ? a_.u32[i] : b_.u32[i]; } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_min_epu32 #define _mm_min_epu32(a, b) simde_mm_min_epu32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_minpos_epu16 (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_minpos_epu16(a); #else simde__m128i_private r_ = simde__m128i_to_private(simde_mm_setzero_si128()), a_ = simde__m128i_to_private(a); r_.u16[0] = UINT16_MAX; for (size_t i = 0 ; i < (sizeof(r_.u16) / sizeof(r_.u16[0])) ; i++) { if (a_.u16[i] < r_.u16[0]) { r_.u16[0] = a_.u16[i]; r_.u16[1] = HEDLEY_STATIC_CAST(uint16_t, i); } } return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_minpos_epu16 #define _mm_minpos_epu16(a) simde_mm_minpos_epu16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mpsadbw_epu8 (simde__m128i a, simde__m128i b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); const int a_offset = imm8 & 4; const int b_offset = (imm8 & 3) << 2; #if defined(simde_math_abs) for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, (sizeof(r_.u16) / sizeof(r_.u16[0]))) ; i++) { r_.u16[i] = HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 0] - b_.u8[b_offset + 0]))) + HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 1] - b_.u8[b_offset + 1]))) + HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 2] - b_.u8[b_offset + 2]))) + HEDLEY_STATIC_CAST(uint16_t, simde_math_abs(HEDLEY_STATIC_CAST(int, a_.u8[a_offset + i + 3] - b_.u8[b_offset + 3]))); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128i_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) && !defined(SIMDE_BUG_PGI_30107) # define simde_mm_mpsadbw_epu8(a, b, imm8) _mm_mpsadbw_epu8(a, b, imm8) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_mpsadbw_epu8 #define _mm_mpsadbw_epu8(a, b, imm8) simde_mm_mpsadbw_epu8(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mul_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_mul_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) // vmull_s32 upcasts instead of masking, so we downcast. int32x2_t a_lo = vmovn_s64(a_.neon_i64); int32x2_t b_lo = vmovn_s64(b_.neon_i64); r_.neon_i64 = vmull_s32(a_lo, b_lo); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_make( wasm_i32x4_extract_lane(a_.wasm_v128, 0) * HEDLEY_STATIC_CAST(int64_t, wasm_i32x4_extract_lane(b_.wasm_v128, 0)), wasm_i32x4_extract_lane(a_.wasm_v128, 2) * HEDLEY_STATIC_CAST(int64_t, wasm_i32x4_extract_lane(b_.wasm_v128, 2))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i32[i * 2]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i * 2]); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_mul_epi32 #define _mm_mul_epi32(a, b) simde_mm_mul_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_mullo_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_mullo_epi32(a, b); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_i32 = vmulq_s32(a_.neon_i32, b_.neon_i32); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) (void) a_; (void) b_; r_.altivec_i32 = vec_mul(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i32x4_mul(a_.wasm_v128, b_.wasm_v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.u32[i] = HEDLEY_STATIC_CAST(uint32_t, (HEDLEY_STATIC_CAST(uint64_t, (HEDLEY_STATIC_CAST(int64_t, a_.i32[i]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i]))) & 0xffffffff)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_mullo_epi32 #define _mm_mullo_epi32(a, b) simde_mm_mullo_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_x_mm_mullo_epu32 (simde__m128i a, simde__m128i b) { simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u32 = vmulq_u32(a_.neon_u32, b_.neon_u32); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.u32 = a_.u32 * b_.u32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] * b_.u32[i]; } #endif return simde__m128i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_packus_epi32 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_packus_epi32(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) const __m128i max = _mm_set1_epi32(UINT16_MAX); const __m128i tmpa = _mm_andnot_si128(_mm_srai_epi32(a, 31), a); const __m128i tmpb = _mm_andnot_si128(_mm_srai_epi32(b, 31), b); return _mm_packs_epi32( _mm_srai_epi32(_mm_slli_epi32(_mm_or_si128(tmpa, _mm_cmpgt_epi32(tmpa, max)), 16), 16), _mm_srai_epi32(_mm_slli_epi32(_mm_or_si128(tmpb, _mm_cmpgt_epi32(tmpb, max)), 16), 16) ); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b), r_; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_46840) r_.neon_u16 = vqmovun_high_s32(vreinterpret_s16_u16(vqmovun_s32(a_.neon_i32)), b_.neon_i32); #else r_.neon_u16 = vqmovun_high_s32(vqmovun_s32(a_.neon_i32), b_.neon_i32); #endif #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r_.neon_u16 = vcombine_u16( vqmovun_s32(a_.neon_i32), vqmovun_s32(b_.neon_i32) ); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r_.altivec_u16 = vec_packsu(a_.altivec_i32, b_.altivec_i32); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_u16x8_narrow_i32x4(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_CONVERT_VECTOR_) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) int32_t v SIMDE_VECTOR(32) = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 1, 2, 3, 4, 5, 6, 7); v &= ~(v >> 31); v |= HEDLEY_REINTERPRET_CAST(__typeof__(v), v > UINT16_MAX); SIMDE_CONVERT_VECTOR_(r_.i16, v); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { int32_t v = (i < (sizeof(a_.i32) / sizeof(a_.i32[0]))) ? a_.i32[i] : b_.i32[i & 3]; r_.u16[i] = (v < 0) ? UINT16_C(0) : ((v > UINT16_MAX) ? UINT16_MAX : HEDLEY_STATIC_CAST(uint16_t, v)); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_packus_epi32 #define _mm_packus_epi32(a, b) simde_mm_packus_epi32(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_round_sd (simde__m128d a, simde__m128d b, int rounding) SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) { simde__m128d_private r_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) { #if defined(simde_math_nearbyint) case SIMDE_MM_FROUND_TO_NEAREST_INT: case SIMDE_MM_FROUND_CUR_DIRECTION: r_.f64[0] = simde_math_nearbyint(b_.f64[0]); break; #endif #if defined(simde_math_floor) case SIMDE_MM_FROUND_TO_NEG_INF: r_.f64[0] = simde_math_floor(b_.f64[0]); break; #endif #if defined(simde_math_ceil) case SIMDE_MM_FROUND_TO_POS_INF: r_.f64[0] = simde_math_ceil(b_.f64[0]); break; #endif #if defined(simde_math_trunc) case SIMDE_MM_FROUND_TO_ZERO: r_.f64[0] = simde_math_trunc(b_.f64[0]); break; #endif default: HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); } return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) # define simde_mm_round_sd(a, b, rounding) _mm_round_sd(a, b, rounding) #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) && defined(SIMDE_FAST_EXCEPTIONS) # define simde_mm_round_sd(a, b, rounding) simde_mm_move_sd(a, simde_mm_round_pd(b, rounding)) #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) #define simde_mm_round_sd(a, b, rounding) simde_mm_move_sd(a, simde_mm_round_pd(simde_x_mm_broadcastlow_pd(b), rounding)) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_round_sd #define _mm_round_sd(a, b, rounding) simde_mm_round_sd(a, b, rounding) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_round_ss (simde__m128 a, simde__m128 b, int rounding) SIMDE_REQUIRE_CONSTANT_RANGE(rounding, 0, 15) { simde__m128_private r_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) { #if defined(simde_math_nearbyintf) case SIMDE_MM_FROUND_TO_NEAREST_INT: case SIMDE_MM_FROUND_CUR_DIRECTION: r_.f32[0] = simde_math_nearbyintf(b_.f32[0]); break; #endif #if defined(simde_math_floorf) case SIMDE_MM_FROUND_TO_NEG_INF: r_.f32[0] = simde_math_floorf(b_.f32[0]); break; #endif #if defined(simde_math_ceilf) case SIMDE_MM_FROUND_TO_POS_INF: r_.f32[0] = simde_math_ceilf(b_.f32[0]); break; #endif #if defined(simde_math_truncf) case SIMDE_MM_FROUND_TO_ZERO: r_.f32[0] = simde_math_truncf(b_.f32[0]); break; #endif default: HEDLEY_UNREACHABLE_RETURN(simde_mm_undefined_pd()); } return simde__m128_from_private(r_); } #if defined(SIMDE_X86_SSE4_1_NATIVE) #define simde_mm_round_ss(a, b, rounding) _mm_round_ss(a, b, rounding) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 && defined(SIMDE_FAST_EXCEPTIONS) #define simde_mm_round_ss(a, b, rounding) simde_mm_move_ss((a), simde_mm_round_ps((b), (rounding))) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_mm_round_ss(a, b, rounding) simde_mm_move_ss((a), simde_mm_round_ps(simde_x_mm_broadcastlow_ps(b), (rounding))) #endif #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_round_ss #define _mm_round_ss(a, b, rounding) simde_mm_round_ss(a, b, rounding) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_stream_load_si128 (const simde__m128i* mem_addr) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_stream_load_si128(HEDLEY_CONST_CAST(simde__m128i*, mem_addr)); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_load) && ( \ defined(SIMDE_ARM_NEON_A32V7_NATIVE) || defined(SIMDE_VECTOR_SUBSCRIPT) || \ defined(SIMDE_WASM_SIMD128_NATIVE) || defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || \ defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)) return __builtin_nontemporal_load(mem_addr); #else return simde_mm_load_si128(mem_addr); #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_stream_load_si128 #define _mm_stream_load_si128(mem_addr) simde_mm_stream_load_si128(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_test_all_ones (simde__m128i a) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_test_all_ones(a); #else simde__m128i_private a_ = simde__m128i_to_private(a); int r; #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r = vec_all_eq(a_.altivec_i32, vec_splats(~0)); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r = ((vgetq_lane_s64(a_.neon_i64, 0) & vgetq_lane_s64(a_.neon_i64, 1)) == ~HEDLEY_STATIC_CAST(int64_t, 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(a_.wasm_v128, 0) & wasm_i64x2_extract_lane(a_.wasm_v128, 1)) == 0xFFFFFFFFFFFFFFFFull; #else int_fast32_t r_ = ~HEDLEY_STATIC_CAST(int_fast32_t, 0); SIMDE_VECTORIZE_REDUCTION(&:r_) for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) { r_ &= a_.i32f[i]; } r = (r_ == ~HEDLEY_STATIC_CAST(int_fast32_t, 0)); #endif return r; #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_test_all_ones #define _mm_test_all_ones(a) simde_mm_test_all_ones(a) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_test_all_zeros (simde__m128i a, simde__m128i mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_test_all_zeros(a, mask); #else simde__m128i_private tmp_ = simde__m128i_to_private(simde_mm_and_si128(a, mask)); int r; #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) r = vec_all_eq(tmp_.altivec_i32, vec_splats(0)); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) r = !(vgetq_lane_s64(tmp_.neon_i64, 0) | vgetq_lane_s64(tmp_.neon_i64, 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r = (wasm_i64x2_extract_lane(tmp_.wasm_v128, 0) | wasm_i64x2_extract_lane(tmp_.wasm_v128, 1)) == 0; #else int_fast32_t r_ = HEDLEY_STATIC_CAST(int_fast32_t, 0); SIMDE_VECTORIZE_REDUCTION(|:r_) for (size_t i = 0 ; i < (sizeof(tmp_.i32f) / sizeof(tmp_.i32f[0])) ; i++) { r_ |= tmp_.i32f[i]; } r = !r_; #endif return r; #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_test_all_zeros #define _mm_test_all_zeros(a, mask) simde_mm_test_all_zeros(a, mask) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_test_mix_ones_zeros (simde__m128i a, simde__m128i mask) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_test_mix_ones_zeros(a, mask); #else simde__m128i_private a_ = simde__m128i_to_private(a), mask_ = simde__m128i_to_private(mask); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x2_t s640 = vandq_s64(a_.neon_i64, mask_.neon_i64); int64x2_t s641 = vandq_s64(vreinterpretq_s64_s32(vmvnq_s32(vreinterpretq_s32_s64(a_.neon_i64))), mask_.neon_i64); return (((vgetq_lane_s64(s640, 0) | vgetq_lane_s64(s640, 1)) & (vgetq_lane_s64(s641, 0) | vgetq_lane_s64(s641, 1)))!=0); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_v128_and(a_.wasm_v128, mask_.wasm_v128); long long c0 = wasm_i64x2_extract_lane(m, 0); long long c1 = wasm_i64x2_extract_lane(m, 1); long long ones = c0 | c1; long long zeros = ~(c0 & c1); return ones && zeros; #else for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) if (((a_.u64[i] & mask_.u64[i]) != 0) && ((~a_.u64[i] & mask_.u64[i]) != 0)) return 1; return 0; #endif #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_test_mix_ones_zeros #define _mm_test_mix_ones_zeros(a, mask) simde_mm_test_mix_ones_zeros(a, mask) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testc_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_testc_si128(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x2_t s64 = vbicq_s64(b_.neon_i64, a_.neon_i64); return !(vgetq_lane_s64(s64, 0) | vgetq_lane_s64(s64, 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128); return (wasm_i64x2_extract_lane(m, 0) | wasm_i64x2_extract_lane(m, 1)) == 0; #else int_fast32_t r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) { r |= ~a_.i32f[i] & b_.i32f[i]; } return HEDLEY_STATIC_CAST(int, !r); #endif #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_testc_si128 #define _mm_testc_si128(a, b) simde_mm_testc_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testnzc_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_testnzc_si128(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x2_t s640 = vandq_s64(b_.neon_i64, a_.neon_i64); int64x2_t s641 = vbicq_s64(b_.neon_i64, a_.neon_i64); return !( !(vgetq_lane_s64(s641, 0) || vgetq_lane_s64(s641, 1)) \ || !(vgetq_lane_s64(s640, 0) || vgetq_lane_s64(s640, 1)) ); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m1 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128); v128_t m2 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128); return (wasm_i64x2_extract_lane(m1, 0) | wasm_i64x2_extract_lane(m1, 1)) \ && (wasm_i64x2_extract_lane(m2, 0) | wasm_i64x2_extract_lane(m2, 1)); #else for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { if (((a_.u64[i] & b_.u64[i]) != 0) && ((~a_.u64[i] & b_.u64[i]) != 0)) return 1; } return 0; #endif #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_testnzc_si128 #define _mm_testnzc_si128(a, b) simde_mm_testnzc_si128(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testz_si128 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_1_NATIVE) return _mm_testz_si128(a, b); #else simde__m128i_private a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) int64x2_t s64 = vandq_s64(a_.neon_i64, b_.neon_i64); return !(vgetq_lane_s64(s64, 0) | vgetq_lane_s64(s64, 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_v128_and(a_.wasm_v128, b_.wasm_v128); return (wasm_i64x2_extract_lane(m, 0) | wasm_i64x2_extract_lane(m, 1)) == 0; #elif defined(SIMDE_HAVE_INT128_) if ((a_.u128[0] & b_.u128[0]) == 0) { return 1; } return 0; #else for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { if ((a_.u64[i] & b_.u64[i]) > 0) return 0; } #endif return 1; #endif } #if defined(SIMDE_X86_SSE4_1_ENABLE_NATIVE_ALIASES) #undef _mm_testz_si128 #define _mm_testz_si128(a, b) simde_mm_testz_si128(a, b) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE4_1_H) */ /* :: End simde/simde/x86/sse4.1.h :: */ #if defined(__ARM_ACLE) || (defined(__GNUC__) && defined(__ARM_FEATURE_CRC32)) #include #endif HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_X86_SSE4_2_NATIVE) #define SIMDE_SIDD_UBYTE_OPS _SIDD_UBYTE_OPS #define SIMDE_SIDD_UWORD_OPS _SIDD_UWORD_OPS #define SIMDE_SIDD_SBYTE_OPS _SIDD_SBYTE_OPS #define SIMDE_SIDD_SWORD_OPS _SIDD_SWORD_OPS #define SIMDE_SIDD_CMP_EQUAL_ANY _SIDD_CMP_EQUAL_ANY #define SIMDE_SIDD_CMP_RANGES _SIDD_CMP_RANGES #define SIMDE_SIDD_CMP_EQUAL_EACH _SIDD_CMP_EQUAL_EACH #define SIMDE_SIDD_CMP_EQUAL_ORDERED _SIDD_CMP_EQUAL_ORDERED #define SIMDE_SIDD_POSITIVE_POLARITY _SIDD_POSITIVE_POLARITY #define SIMDE_SIDD_NEGATIVE_POLARITY _SIDD_NEGATIVE_POLARITY #define SIMDE_SIDD_MASKED_POSITIVE_POLARITY _SIDD_MASKED_POSITIVE_POLARITY #define SIMDE_SIDD_MASKED_NEGATIVE_POLARITY _SIDD_MASKED_NEGATIVE_POLARITY #define SIMDE_SIDD_LEAST_SIGNIFICANT _SIDD_LEAST_SIGNIFICANT #define SIMDE_SIDD_MOST_SIGNIFICANT _SIDD_MOST_SIGNIFICANT #define SIMDE_SIDD_BIT_MASK _SIDD_BIT_MASK #define SIMDE_SIDD_UNIT_MASK _SIDD_UNIT_MASK #else #define SIMDE_SIDD_UBYTE_OPS 0x00 #define SIMDE_SIDD_UWORD_OPS 0x01 #define SIMDE_SIDD_SBYTE_OPS 0x02 #define SIMDE_SIDD_SWORD_OPS 0x03 #define SIMDE_SIDD_CMP_EQUAL_ANY 0x00 #define SIMDE_SIDD_CMP_RANGES 0x04 #define SIMDE_SIDD_CMP_EQUAL_EACH 0x08 #define SIMDE_SIDD_CMP_EQUAL_ORDERED 0x0c #define SIMDE_SIDD_POSITIVE_POLARITY 0x00 #define SIMDE_SIDD_NEGATIVE_POLARITY 0x10 #define SIMDE_SIDD_MASKED_POSITIVE_POLARITY 0x20 #define SIMDE_SIDD_MASKED_NEGATIVE_POLARITY 0x30 #define SIMDE_SIDD_LEAST_SIGNIFICANT 0x00 #define SIMDE_SIDD_MOST_SIGNIFICANT 0x40 #define SIMDE_SIDD_BIT_MASK 0x00 #define SIMDE_SIDD_UNIT_MASK 0x40 #endif #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) && !defined(_SIDD_UBYTE_OPS) #define _SIDD_UBYTE_OPS SIMDE_SIDD_UBYTE_OPS #define _SIDD_UWORD_OPS SIMDE_SIDD_UWORD_OPS #define _SIDD_SBYTE_OPS SIMDE_SIDD_SBYTE_OPS #define _SIDD_SWORD_OPS SIMDE_SIDD_SWORD_OPS #define _SIDD_CMP_EQUAL_ANY SIMDE_SIDD_CMP_EQUAL_ANY #define _SIDD_CMP_RANGES SIMDE_SIDD_CMP_RANGES #define _SIDD_CMP_EQUAL_EACH SIMDE_SIDD_CMP_EQUAL_EACH #define _SIDD_CMP_EQUAL_ORDERED SIMDE_SIDD_CMP_EQUAL_ORDERED #define _SIDD_POSITIVE_POLARITY SIMDE_SIDD_POSITIVE_POLARITY #define _SIDD_NEGATIVE_POLARITY SIMDE_SIDD_NEGATIVE_POLARITY #define _SIDD_MASKED_POSITIVE_POLARITY SIMDE_SIDD_MASKED_POSITIVE_POLARITY #define _SIDD_MASKED_NEGATIVE_POLARITY SIMDE_SIDD_MASKED_NEGATIVE_POLARITY #define _SIDD_LEAST_SIGNIFICANT SIMDE_SIDD_LEAST_SIGNIFICANT #define _SIDD_MOST_SIGNIFICANT SIMDE_SIDD_MOST_SIGNIFICANT #define _SIDD_BIT_MASK SIMDE_SIDD_BIT_MASK #define _SIDD_UNIT_MASK SIMDE_SIDD_UNIT_MASK #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpestrs (simde__m128i a, int la, simde__m128i b, int lb, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { #if !defined(HEDLEY_PGI_VERSION) /* https://www.pgroup.com/userforum/viewtopic.php?f=4&p=27590&sid=cf89f8bf30be801831fe4a2ff0a2fa6c */ (void) a; (void) b; #endif (void) la; (void) lb; return la <= ((128 / ((imm8 & SIMDE_SIDD_UWORD_OPS) ? 16 : 8)) - 1); } #if defined(SIMDE_X86_SSE4_2_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) #define simde_mm_cmpestrs(a, la, b, lb, imm8) \ _mm_cmpestrs( \ HEDLEY_REINTERPRET_CAST(__v16qi, a), la, \ HEDLEY_REINTERPRET_CAST(__v16qi, b), lb, \ imm8) #else #define simde_mm_cmpestrs(a, la, b, lb, imm8) _mm_cmpestrs(a, la, b, lb, imm8) #endif #endif #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #undef _mm_cmpestrs #define _mm_cmpestrs(a, la, b, lb, imm8) simde_mm_cmpestrs(a, la, b, lb, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpestrz (simde__m128i a, int la, simde__m128i b, int lb, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { #if !defined(HEDLEY_PGI_VERSION) /* https://www.pgroup.com/userforum/viewtopic.php?f=4&p=27590&sid=cf89f8bf30be801831fe4a2ff0a2fa6c */ (void) a; (void) b; #endif (void) la; (void) lb; return lb <= ((128 / ((imm8 & SIMDE_SIDD_UWORD_OPS) ? 16 : 8)) - 1); } #if defined(SIMDE_X86_SSE4_2_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) #define simde_mm_cmpestrz(a, la, b, lb, imm8) \ _mm_cmpestrz( \ HEDLEY_REINTERPRET_CAST(__v16qi, a), la, \ HEDLEY_REINTERPRET_CAST(__v16qi, b), lb, \ imm8) #else #define simde_mm_cmpestrz(a, la, b, lb, imm8) _mm_cmpestrz(a, la, b, lb, imm8) #endif #endif #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #undef _mm_cmpestrz #define _mm_cmpestrz(a, la, b, lb, imm8) simde_mm_cmpestrz(a, la, b, lb, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm_cmpgt_epi64 (simde__m128i a, simde__m128i b) { #if defined(SIMDE_X86_SSE4_2_NATIVE) return _mm_cmpgt_epi64(a, b); #elif defined(SIMDE_X86_SSE2_NATIVE) /* https://stackoverflow.com/a/65175746/501126 */ __m128i r = _mm_and_si128(_mm_cmpeq_epi32(a, b), _mm_sub_epi64(b, a)); r = _mm_or_si128(r, _mm_cmpgt_epi32(a, b)); return _mm_shuffle_epi32(r, _MM_SHUFFLE(3, 3, 1, 1)); #else simde__m128i_private r_, a_ = simde__m128i_to_private(a), b_ = simde__m128i_to_private(b); #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r_.neon_u64 = vcgtq_s64(a_.neon_i64, b_.neon_i64); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) /* https://stackoverflow.com/a/65223269/501126 */ r_.neon_i64 = vshrq_n_s64(vqsubq_s64(b_.neon_i64, a_.neon_i64), 63); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) r_.altivec_u64 = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_cmpgt(a_.altivec_i64, b_.altivec_i64)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_i64x2_gt(a_.wasm_v128, b_.wasm_v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), a_.i64 > b_.i64); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = (a_.i64[i] > b_.i64[i]) ? ~INT64_C(0) : INT64_C(0); } #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #undef _mm_cmpgt_epi64 #define _mm_cmpgt_epi64(a, b) simde_mm_cmpgt_epi64(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpistrs_8_(simde__m128i a) { simde__m128i_private a_= simde__m128i_to_private(a); const int upper_bound = (128 / 8) - 1; int a_invalid = 0; SIMDE_VECTORIZE for (int i = 0 ; i <= upper_bound ; i++) { if(!a_.i8[i]) a_invalid = 1; } return a_invalid; } SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpistrs_16_(simde__m128i a) { simde__m128i_private a_= simde__m128i_to_private(a); const int upper_bound = (128 / 16) - 1; int a_invalid = 0; SIMDE_VECTORIZE for (int i = 0 ; i <= upper_bound ; i++) { if(!a_.i16[i]) a_invalid = 1; } return a_invalid; } #if defined(SIMDE_X86_SSE4_2_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) #define simde_mm_cmpistrs(a, b, imm8) \ _mm_cmpistrs( \ HEDLEY_REINTERPRET_CAST(__v16qi, a), \ HEDLEY_REINTERPRET_CAST(__v16qi, b), \ imm8) #else #define simde_mm_cmpistrs(a, b, imm8) _mm_cmpistrs(a, b, imm8) #endif #else #define simde_mm_cmpistrs(a, b, imm8) \ (((imm8) & SIMDE_SIDD_UWORD_OPS) \ ? simde_mm_cmpistrs_16_((a)) \ : simde_mm_cmpistrs_8_((a))) #endif #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #undef _mm_cmpistrs #define _mm_cmpistrs(a, b, imm8) simde_mm_cmpistrs(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpistrz_8_(simde__m128i b) { simde__m128i_private b_= simde__m128i_to_private(b); const int upper_bound = (128 / 8) - 1; int b_invalid = 0; SIMDE_VECTORIZE for (int i = 0 ; i <= upper_bound ; i++) { if(!b_.i8[i]) b_invalid = 1; } return b_invalid; } SIMDE_FUNCTION_ATTRIBUTES int simde_mm_cmpistrz_16_(simde__m128i b) { simde__m128i_private b_= simde__m128i_to_private(b); const int upper_bound = (128 / 16) - 1; int b_invalid = 0; SIMDE_VECTORIZE for (int i = 0 ; i <= upper_bound ; i++) { if(!b_.i16[i]) b_invalid = 1; } return b_invalid; } #if defined(SIMDE_X86_SSE4_2_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) #define simde_mm_cmpistrz(a, b, imm8) \ _mm_cmpistrz( \ HEDLEY_REINTERPRET_CAST(__v16qi, a), \ HEDLEY_REINTERPRET_CAST(__v16qi, b), \ imm8) #else #define simde_mm_cmpistrz(a, b, imm8) _mm_cmpistrz(a, b, imm8) #endif #else #define simde_mm_cmpistrz(a, b, imm8) \ (((imm8) & SIMDE_SIDD_UWORD_OPS) \ ? simde_mm_cmpistrz_16_((b)) \ : simde_mm_cmpistrz_8_((b))) #endif #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #undef _mm_cmpistrz #define _mm_cmpistrz(a, b, imm8) simde_mm_cmpistrz(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_mm_crc32_u8(uint32_t prevcrc, uint8_t v) { #if defined(SIMDE_X86_SSE4_2_NATIVE) return _mm_crc32_u8(prevcrc, v); #else #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32) return __crc32cb(prevcrc, v); #else uint32_t crc = prevcrc; crc ^= v; for(int bit = 0 ; bit < 8 ; bit++) { if (crc & 1) crc = (crc >> 1) ^ UINT32_C(0x82f63b78); else crc = (crc >> 1); } return crc; #endif #endif } #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #define _mm_crc32_u8(prevcrc, v) simde_mm_crc32_u8(prevcrc, v) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_mm_crc32_u16(uint32_t prevcrc, uint16_t v) { #if defined(SIMDE_X86_SSE4_2_NATIVE) return _mm_crc32_u16(prevcrc, v); #else #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32) return __crc32ch(prevcrc, v); #else uint32_t crc = prevcrc; crc = simde_mm_crc32_u8(crc, v & 0xff); crc = simde_mm_crc32_u8(crc, (v >> 8) & 0xff); return crc; #endif #endif } #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #define _mm_crc32_u16(prevcrc, v) simde_mm_crc32_u16(prevcrc, v) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_mm_crc32_u32(uint32_t prevcrc, uint32_t v) { #if defined(SIMDE_X86_SSE4_2_NATIVE) return _mm_crc32_u32(prevcrc, v); #else #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32) return __crc32cw(prevcrc, v); #else uint32_t crc = prevcrc; crc = simde_mm_crc32_u16(crc, v & 0xffff); crc = simde_mm_crc32_u16(crc, (v >> 16) & 0xffff); return crc; #endif #endif } #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) #define _mm_crc32_u32(prevcrc, v) simde_mm_crc32_u32(prevcrc, v) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_mm_crc32_u64(uint64_t prevcrc, uint64_t v) { #if defined(SIMDE_X86_SSE4_2_NATIVE) && defined(SIMDE_ARCH_AMD64) return _mm_crc32_u64(prevcrc, v); #else #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_CRC32) return __crc32cd(HEDLEY_STATIC_CAST(uint32_t, prevcrc), v); #else uint64_t crc = prevcrc; crc = simde_mm_crc32_u32(HEDLEY_STATIC_CAST(uint32_t, crc), v & 0xffffffff); crc = simde_mm_crc32_u32(HEDLEY_STATIC_CAST(uint32_t, crc), (v >> 32) & 0xffffffff); return crc; #endif #endif } #if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #define _mm_crc32_u64(prevcrc, v) simde_mm_crc32_u64(prevcrc, v) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_SSE4_2_H) */ /* :: End simde/simde/x86/sse4.2.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ typedef union { #if defined(SIMDE_VECTOR_SUBSCRIPT) SIMDE_ALIGN_TO_32 int8_t i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int16_t i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int32_t i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int64_t i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint8_t u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint16_t u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint32_t u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint64_t u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #endif SIMDE_ALIGN_TO_32 simde_float32 f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_float64 f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int_fast32_t i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_32 int8_t i8[32]; SIMDE_ALIGN_TO_32 int16_t i16[16]; SIMDE_ALIGN_TO_32 int32_t i32[8]; SIMDE_ALIGN_TO_32 int64_t i64[4]; SIMDE_ALIGN_TO_32 uint8_t u8[32]; SIMDE_ALIGN_TO_32 uint16_t u16[16]; SIMDE_ALIGN_TO_32 uint32_t u32[8]; SIMDE_ALIGN_TO_32 uint64_t u64[4]; SIMDE_ALIGN_TO_32 int_fast32_t i32f[32 / sizeof(int_fast32_t)]; SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)]; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128[2]; SIMDE_ALIGN_TO_32 simde_uint128 u128[2]; #endif SIMDE_ALIGN_TO_32 simde_float32 f32[8]; SIMDE_ALIGN_TO_32 simde_float64 f64[4]; #endif SIMDE_ALIGN_TO_32 simde__m128_private m128_private[2]; SIMDE_ALIGN_TO_32 simde__m128 m128[2]; #if defined(SIMDE_X86_AVX_NATIVE) SIMDE_ALIGN_TO_32 __m256 n; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) altivec_u8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) altivec_u16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char) altivec_i8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short) altivec_i16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(int) altivec_i32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float) altivec_f32[2]; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(long long) altivec_i64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double) altivec_f64[2]; #endif #endif } simde__m256_private; typedef union { #if defined(SIMDE_VECTOR_SUBSCRIPT) SIMDE_ALIGN_TO_32 int8_t i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int16_t i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int32_t i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int64_t i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint8_t u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint16_t u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint32_t u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint64_t u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #endif SIMDE_ALIGN_TO_32 simde_float32 f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_float64 f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int_fast32_t i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_32 int8_t i8[32]; SIMDE_ALIGN_TO_32 int16_t i16[16]; SIMDE_ALIGN_TO_32 int32_t i32[8]; SIMDE_ALIGN_TO_32 int64_t i64[4]; SIMDE_ALIGN_TO_32 uint8_t u8[32]; SIMDE_ALIGN_TO_32 uint16_t u16[16]; SIMDE_ALIGN_TO_32 uint32_t u32[8]; SIMDE_ALIGN_TO_32 uint64_t u64[4]; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128[2]; SIMDE_ALIGN_TO_32 simde_uint128 u128[2]; #endif SIMDE_ALIGN_TO_32 simde_float32 f32[8]; SIMDE_ALIGN_TO_32 simde_float64 f64[4]; SIMDE_ALIGN_TO_32 int_fast32_t i32f[32 / sizeof(int_fast32_t)]; SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)]; #endif SIMDE_ALIGN_TO_32 simde__m128d_private m128d_private[2]; SIMDE_ALIGN_TO_32 simde__m128d m128d[2]; #if defined(SIMDE_X86_AVX_NATIVE) SIMDE_ALIGN_TO_32 __m256d n; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) altivec_u8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) altivec_u16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char) altivec_i8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short) altivec_i16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float) altivec_f32[2]; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long) altivec_i64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double) altivec_f64[2]; #endif #endif } simde__m256d_private; typedef union { #if defined(SIMDE_VECTOR_SUBSCRIPT) SIMDE_ALIGN_TO_32 int8_t i8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int16_t i16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int32_t i32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int64_t i64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint8_t u8 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint16_t u16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint32_t u32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint64_t u64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_uint128 u128 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #endif #if defined(SIMDE_FLOAT16_VECTOR) SIMDE_ALIGN_TO_32 simde_float16 f16 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_32 simde_float16 f16[16]; #endif SIMDE_ALIGN_TO_32 simde_float32 f32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 simde_float64 f64 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 int_fast32_t i32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; SIMDE_ALIGN_TO_32 uint_fast32_t u32f SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #else SIMDE_ALIGN_TO_32 int8_t i8[32]; SIMDE_ALIGN_TO_32 int16_t i16[16]; SIMDE_ALIGN_TO_32 int32_t i32[8]; SIMDE_ALIGN_TO_32 int64_t i64[4]; SIMDE_ALIGN_TO_32 uint8_t u8[32]; SIMDE_ALIGN_TO_32 uint16_t u16[16]; SIMDE_ALIGN_TO_32 uint32_t u32[8]; SIMDE_ALIGN_TO_32 uint64_t u64[4]; SIMDE_ALIGN_TO_32 int_fast32_t i32f[32 / sizeof(int_fast32_t)]; SIMDE_ALIGN_TO_32 uint_fast32_t u32f[32 / sizeof(uint_fast32_t)]; #if defined(SIMDE_HAVE_INT128_) SIMDE_ALIGN_TO_32 simde_int128 i128[2]; SIMDE_ALIGN_TO_32 simde_uint128 u128[2]; #endif SIMDE_ALIGN_TO_32 simde_float16 f16[16]; SIMDE_ALIGN_TO_32 simde_float32 f32[8]; SIMDE_ALIGN_TO_32 simde_float64 f64[4]; #endif SIMDE_ALIGN_TO_32 simde__m128i_private m128i_private[2]; SIMDE_ALIGN_TO_32 simde__m128i m128i[2]; #if defined(SIMDE_X86_AVX_NATIVE) SIMDE_ALIGN_TO_32 __m256i n; #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) altivec_u8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) altivec_u16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) altivec_u32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed char) altivec_i8[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed short) altivec_i16[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed int) altivec_i32[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(float) altivec_f32[2]; #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) altivec_u64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(signed long long) altivec_i64[2]; SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(double) altivec_f64[2]; #endif #endif } simde__m256i_private; #if defined(SIMDE_X86_AVX_NATIVE) typedef __m256 simde__m256; typedef __m256i simde__m256i; typedef __m256d simde__m256d; #elif defined(SIMDE_VECTOR_SUBSCRIPT) typedef simde_float32 simde__m256 SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; typedef int_fast32_t simde__m256i SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; typedef simde_float64 simde__m256d SIMDE_ALIGN_TO_32 SIMDE_VECTOR(32) SIMDE_MAY_ALIAS; #else typedef simde__m256_private simde__m256; typedef simde__m256i_private simde__m256i; typedef simde__m256d_private simde__m256d; #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #if !defined(HEDLEY_INTEL_VERSION) && !defined(_AVXINTRIN_H_INCLUDED) && !defined(__AVXINTRIN_H) && !defined(_CMP_EQ_OQ) typedef simde__m256 __m256; typedef simde__m256i __m256i; typedef simde__m256d __m256d; #else #undef __m256 #define __m256 simde__m256 #undef __m256i #define __m256i simde__m256i #undef __m256d #define __m256d simde__m256d #endif #endif HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256), "simde__m256 size incorrect"); HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256_private), "simde__m256_private size incorrect"); HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256i), "simde__m256i size incorrect"); HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256i_private), "simde__m256i_private size incorrect"); HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256d), "simde__m256d size incorrect"); HEDLEY_STATIC_ASSERT(32 == sizeof(simde__m256d_private), "simde__m256d_private size incorrect"); #if defined(SIMDE_CHECK_ALIGNMENT) && defined(SIMDE_ALIGN_OF) HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256) == 32, "simde__m256 is not 32-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256_private) == 32, "simde__m256_private is not 32-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256i) == 32, "simde__m256i is not 32-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256i_private) == 32, "simde__m256i_private is not 32-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256d) == 32, "simde__m256d is not 32-byte aligned"); HEDLEY_STATIC_ASSERT(SIMDE_ALIGN_OF(simde__m256d_private) == 32, "simde__m256d_private is not 32-byte aligned"); #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde__m256_from_private(simde__m256_private v) { simde__m256 r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m256_private simde__m256_to_private(simde__m256 v) { simde__m256_private r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde__m256i_from_private(simde__m256i_private v) { simde__m256i r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m256i_private simde__m256i_to_private(simde__m256i v) { simde__m256i_private r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde__m256d_from_private(simde__m256d_private v) { simde__m256d r; simde_memcpy(&r, &v, sizeof(r)); return r; } SIMDE_FUNCTION_ATTRIBUTES simde__m256d_private simde__m256d_to_private(simde__m256d v) { simde__m256d_private r; simde_memcpy(&r, &v, sizeof(r)); return r; } #define SIMDE_CMP_EQ_OQ 0 #define SIMDE_CMP_LT_OS 1 #define SIMDE_CMP_LE_OS 2 #define SIMDE_CMP_UNORD_Q 3 #define SIMDE_CMP_NEQ_UQ 4 #define SIMDE_CMP_NLT_US 5 #define SIMDE_CMP_NLE_US 6 #define SIMDE_CMP_ORD_Q 7 #define SIMDE_CMP_EQ_UQ 8 #define SIMDE_CMP_NGE_US 9 #define SIMDE_CMP_NGT_US 10 #define SIMDE_CMP_FALSE_OQ 11 #define SIMDE_CMP_NEQ_OQ 12 #define SIMDE_CMP_GE_OS 13 #define SIMDE_CMP_GT_OS 14 #define SIMDE_CMP_TRUE_UQ 15 #define SIMDE_CMP_EQ_OS 16 #define SIMDE_CMP_LT_OQ 17 #define SIMDE_CMP_LE_OQ 18 #define SIMDE_CMP_UNORD_S 19 #define SIMDE_CMP_NEQ_US 20 #define SIMDE_CMP_NLT_UQ 21 #define SIMDE_CMP_NLE_UQ 22 #define SIMDE_CMP_ORD_S 23 #define SIMDE_CMP_EQ_US 24 #define SIMDE_CMP_NGE_UQ 25 #define SIMDE_CMP_NGT_UQ 26 #define SIMDE_CMP_FALSE_OS 27 #define SIMDE_CMP_NEQ_OS 28 #define SIMDE_CMP_GE_OQ 29 #define SIMDE_CMP_GT_OQ 30 #define SIMDE_CMP_TRUE_US 31 #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) && !defined(_CMP_EQ_OQ) #define _CMP_EQ_OQ SIMDE_CMP_EQ_OQ #define _CMP_LT_OS SIMDE_CMP_LT_OS #define _CMP_LE_OS SIMDE_CMP_LE_OS #define _CMP_UNORD_Q SIMDE_CMP_UNORD_Q #define _CMP_NEQ_UQ SIMDE_CMP_NEQ_UQ #define _CMP_NLT_US SIMDE_CMP_NLT_US #define _CMP_NLE_US SIMDE_CMP_NLE_US #define _CMP_ORD_Q SIMDE_CMP_ORD_Q #define _CMP_EQ_UQ SIMDE_CMP_EQ_UQ #define _CMP_NGE_US SIMDE_CMP_NGE_US #define _CMP_NGT_US SIMDE_CMP_NGT_US #define _CMP_FALSE_OQ SIMDE_CMP_FALSE_OQ #define _CMP_NEQ_OQ SIMDE_CMP_NEQ_OQ #define _CMP_GE_OS SIMDE_CMP_GE_OS #define _CMP_GT_OS SIMDE_CMP_GT_OS #define _CMP_TRUE_UQ SIMDE_CMP_TRUE_UQ #define _CMP_EQ_OS SIMDE_CMP_EQ_OS #define _CMP_LT_OQ SIMDE_CMP_LT_OQ #define _CMP_LE_OQ SIMDE_CMP_LE_OQ #define _CMP_UNORD_S SIMDE_CMP_UNORD_S #define _CMP_NEQ_US SIMDE_CMP_NEQ_US #define _CMP_NLT_UQ SIMDE_CMP_NLT_UQ #define _CMP_NLE_UQ SIMDE_CMP_NLE_UQ #define _CMP_ORD_S SIMDE_CMP_ORD_S #define _CMP_EQ_US SIMDE_CMP_EQ_US #define _CMP_NGE_UQ SIMDE_CMP_NGE_UQ #define _CMP_NGT_UQ SIMDE_CMP_NGT_UQ #define _CMP_FALSE_OS SIMDE_CMP_FALSE_OS #define _CMP_NEQ_OS SIMDE_CMP_NEQ_OS #define _CMP_GE_OQ SIMDE_CMP_GE_OQ #define _CMP_GT_OQ SIMDE_CMP_GT_OQ #define _CMP_TRUE_US SIMDE_CMP_TRUE_US #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_castps_pd (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castps_pd(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256d*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castps_pd #define _mm256_castps_pd(a) simde_mm256_castps_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_castps_si256 (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castps_si256(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256i*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castps_si256 #define _mm256_castps_si256(a) simde_mm256_castps_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_castsi256_pd (simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castsi256_pd(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256d*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castsi256_pd #define _mm256_castsi256_pd(a) simde_mm256_castsi256_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_castsi256_ps (simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castsi256_ps(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castsi256_ps #define _mm256_castsi256_ps(a) simde_mm256_castsi256_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_castpd_ps (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castpd_ps(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castpd_ps #define _mm256_castpd_ps(a) simde_mm256_castpd_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_castpd_si256 (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castpd_si256(a); #else return *HEDLEY_REINTERPRET_CAST(simde__m256i*, &a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castpd_si256 #define _mm256_castpd_si256(a) simde_mm256_castpd_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setzero_si256 (void) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setzero_si256(); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_setzero_si128(); r_.m128i[1] = simde_mm_setzero_si128(); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = 0; } #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setzero_si256 #define _mm256_setzero_si256() simde_mm256_setzero_si256() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_setzero_ps (void) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setzero_ps(); #else return simde_mm256_castsi256_ps(simde_mm256_setzero_si256()); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setzero_ps #define _mm256_setzero_ps() simde_mm256_setzero_ps() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_setzero_pd (void) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setzero_pd(); #else return simde_mm256_castsi256_pd(simde_mm256_setzero_si256()); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setzero_pd #define _mm256_setzero_pd() simde_mm256_setzero_pd() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_not_ps(simde__m256 a) { simde__m256_private r_, a_ = simde__m256_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = ~a_.i32; #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) r_.m128[0] = simde_x_mm_not_ps(a_.m128[0]); r_.m128[1] = simde_x_mm_not_ps(a_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = ~(a_.i32[i]); } #endif return simde__m256_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_select_ps(simde__m256 a, simde__m256 b, simde__m256 mask) { /* This function is for when you want to blend two elements together * according to a mask. It is similar to _mm256_blendv_ps, except that * it is undefined whether the blend is based on the highest bit in * each lane (like blendv) or just bitwise operations. This allows * us to implement the function efficiently everywhere. * * Basically, you promise that all the lanes in mask are either 0 or * ~0. */ #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_blendv_ps(a, b, mask); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b), mask_ = simde__m256_to_private(mask); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = a_.i32 ^ ((a_.i32 ^ b_.i32) & mask_.i32); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) r_.m128[0] = simde_x_mm_select_ps(a_.m128[0], b_.m128[0], mask_.m128[0]); r_.m128[1] = simde_x_mm_select_ps(a_.m128[1], b_.m128[1], mask_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a_.i32[i] ^ ((a_.i32[i] ^ b_.i32[i]) & mask_.i32[i]); } #endif return simde__m256_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_not_pd(simde__m256d a) { simde__m256d_private r_, a_ = simde__m256d_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = ~a_.i64; #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) r_.m128d[0] = simde_x_mm_not_pd(a_.m128d[0]); r_.m128d[1] = simde_x_mm_not_pd(a_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = ~(a_.i64[i]); } #endif return simde__m256d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_select_pd(simde__m256d a, simde__m256d b, simde__m256d mask) { /* This function is for when you want to blend two elements together * according to a mask. It is similar to _mm256_blendv_pd, except that * it is undefined whether the blend is based on the highest bit in * each lane (like blendv) or just bitwise operations. This allows * us to implement the function efficiently everywhere. * * Basically, you promise that all the lanes in mask are either 0 or * ~0. */ #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_blendv_pd(a, b, mask); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b), mask_ = simde__m256d_to_private(mask); #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = a_.i64 ^ ((a_.i64 ^ b_.i64) & mask_.i64); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) r_.m128d[0] = simde_x_mm_select_pd(a_.m128d[0], b_.m128d[0], mask_.m128d[0]); r_.m128d[1] = simde_x_mm_select_pd(a_.m128d[1], b_.m128d[1], mask_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a_.i64[i] ^ ((a_.i64[i] ^ b_.i64[i]) & mask_.i64[i]); } #endif return simde__m256d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_setone_si256 (void) { simde__m256i_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) __typeof__(r_.i32f) rv = { 0, }; r_.i32f = ~rv; #elif defined(SIMDE_X86_AVX2_NATIVE) __m256i t = _mm256_setzero_si256(); r_.n = _mm256_cmpeq_epi32(t, t); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~HEDLEY_STATIC_CAST(int_fast32_t, 0); } #endif return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_setone_ps (void) { return simde_mm256_castsi256_ps(simde_x_mm256_setone_si256()); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_setone_pd (void) { return simde_mm256_castsi256_pd(simde_x_mm256_setone_si256()); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set_epi8 (int8_t e31, int8_t e30, int8_t e29, int8_t e28, int8_t e27, int8_t e26, int8_t e25, int8_t e24, int8_t e23, int8_t e22, int8_t e21, int8_t e20, int8_t e19, int8_t e18, int8_t e17, int8_t e16, int8_t e15, int8_t e14, int8_t e13, int8_t e12, int8_t e11, int8_t e10, int8_t e9, int8_t e8, int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set_epi8( e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); r_.m128i[1] = simde_mm_set_epi8( e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16); #else r_.i8[ 0] = e0; r_.i8[ 1] = e1; r_.i8[ 2] = e2; r_.i8[ 3] = e3; r_.i8[ 4] = e4; r_.i8[ 5] = e5; r_.i8[ 6] = e6; r_.i8[ 7] = e7; r_.i8[ 8] = e8; r_.i8[ 9] = e9; r_.i8[10] = e10; r_.i8[11] = e11; r_.i8[12] = e12; r_.i8[13] = e13; r_.i8[14] = e14; r_.i8[15] = e15; r_.i8[16] = e16; r_.i8[17] = e17; r_.i8[18] = e18; r_.i8[19] = e19; r_.i8[20] = e20; r_.i8[21] = e21; r_.i8[22] = e22; r_.i8[23] = e23; r_.i8[24] = e24; r_.i8[25] = e25; r_.i8[26] = e26; r_.i8[27] = e27; r_.i8[28] = e28; r_.i8[29] = e29; r_.i8[30] = e30; r_.i8[31] = e31; #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_epi8 #define _mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_set_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set_epi16 (int16_t e15, int16_t e14, int16_t e13, int16_t e12, int16_t e11, int16_t e10, int16_t e9, int16_t e8, int16_t e7, int16_t e6, int16_t e5, int16_t e4, int16_t e3, int16_t e2, int16_t e1, int16_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set_epi16( e7, e6, e5, e4, e3, e2, e1, e0); r_.m128i[1] = simde_mm_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8); #else r_.i16[ 0] = e0; r_.i16[ 1] = e1; r_.i16[ 2] = e2; r_.i16[ 3] = e3; r_.i16[ 4] = e4; r_.i16[ 5] = e5; r_.i16[ 6] = e6; r_.i16[ 7] = e7; r_.i16[ 8] = e8; r_.i16[ 9] = e9; r_.i16[10] = e10; r_.i16[11] = e11; r_.i16[12] = e12; r_.i16[13] = e13; r_.i16[14] = e14; r_.i16[15] = e15; #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_epi16 #define _mm256_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_set_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set_epi32 (int32_t e7, int32_t e6, int32_t e5, int32_t e4, int32_t e3, int32_t e2, int32_t e1, int32_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set_epi32(e3, e2, e1, e0); r_.m128i[1] = simde_mm_set_epi32(e7, e6, e5, e4); #else r_.i32[ 0] = e0; r_.i32[ 1] = e1; r_.i32[ 2] = e2; r_.i32[ 3] = e3; r_.i32[ 4] = e4; r_.i32[ 5] = e5; r_.i32[ 6] = e6; r_.i32[ 7] = e7; #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_epi32 #define _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set_epi64x (int64_t e3, int64_t e2, int64_t e1, int64_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_epi64x(e3, e2, e1, e0); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set_epi64x(e1, e0); r_.m128i[1] = simde_mm_set_epi64x(e3, e2); #else r_.i64[0] = e0; r_.i64[1] = e1; r_.i64[2] = e2; r_.i64[3] = e3; #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_epi64x #define _mm256_set_epi64x(e3, e2, e1, e0) simde_mm256_set_epi64x(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_set_epu8 (uint8_t e31, uint8_t e30, uint8_t e29, uint8_t e28, uint8_t e27, uint8_t e26, uint8_t e25, uint8_t e24, uint8_t e23, uint8_t e22, uint8_t e21, uint8_t e20, uint8_t e19, uint8_t e18, uint8_t e17, uint8_t e16, uint8_t e15, uint8_t e14, uint8_t e13, uint8_t e12, uint8_t e11, uint8_t e10, uint8_t e9, uint8_t e8, uint8_t e7, uint8_t e6, uint8_t e5, uint8_t e4, uint8_t e3, uint8_t e2, uint8_t e1, uint8_t e0) { simde__m256i_private r_; r_.u8[ 0] = e0; r_.u8[ 1] = e1; r_.u8[ 2] = e2; r_.u8[ 3] = e3; r_.u8[ 4] = e4; r_.u8[ 5] = e5; r_.u8[ 6] = e6; r_.u8[ 7] = e7; r_.u8[ 8] = e8; r_.u8[ 9] = e9; r_.u8[10] = e10; r_.u8[11] = e11; r_.u8[12] = e12; r_.u8[13] = e13; r_.u8[14] = e14; r_.u8[15] = e15; r_.u8[16] = e16; r_.u8[17] = e17; r_.u8[18] = e18; r_.u8[19] = e19; r_.u8[20] = e20; r_.u8[20] = e20; r_.u8[21] = e21; r_.u8[22] = e22; r_.u8[23] = e23; r_.u8[24] = e24; r_.u8[25] = e25; r_.u8[26] = e26; r_.u8[27] = e27; r_.u8[28] = e28; r_.u8[29] = e29; r_.u8[30] = e30; r_.u8[31] = e31; return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_set_epu16 (uint16_t e15, uint16_t e14, uint16_t e13, uint16_t e12, uint16_t e11, uint16_t e10, uint16_t e9, uint16_t e8, uint16_t e7, uint16_t e6, uint16_t e5, uint16_t e4, uint16_t e3, uint16_t e2, uint16_t e1, uint16_t e0) { simde__m256i_private r_; r_.u16[ 0] = e0; r_.u16[ 1] = e1; r_.u16[ 2] = e2; r_.u16[ 3] = e3; r_.u16[ 4] = e4; r_.u16[ 5] = e5; r_.u16[ 6] = e6; r_.u16[ 7] = e7; r_.u16[ 8] = e8; r_.u16[ 9] = e9; r_.u16[10] = e10; r_.u16[11] = e11; r_.u16[12] = e12; r_.u16[13] = e13; r_.u16[14] = e14; r_.u16[15] = e15; return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_set_epu32 (uint32_t e7, uint32_t e6, uint32_t e5, uint32_t e4, uint32_t e3, uint32_t e2, uint32_t e1, uint32_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_epi32(HEDLEY_STATIC_CAST(int32_t, e7), HEDLEY_STATIC_CAST(int32_t, e6), HEDLEY_STATIC_CAST(int32_t, e5), HEDLEY_STATIC_CAST(int32_t, e4), HEDLEY_STATIC_CAST(int32_t, e3), HEDLEY_STATIC_CAST(int32_t, e2), HEDLEY_STATIC_CAST(int32_t, e1), HEDLEY_STATIC_CAST(int32_t, e0)); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set_epi32(HEDLEY_STATIC_CAST(int32_t, e3), HEDLEY_STATIC_CAST(int32_t, e2), HEDLEY_STATIC_CAST(int32_t, e1), HEDLEY_STATIC_CAST(int32_t, e0)); r_.m128i[1] = simde_mm_set_epi32(HEDLEY_STATIC_CAST(int32_t, e7), HEDLEY_STATIC_CAST(int32_t, e6), HEDLEY_STATIC_CAST(int32_t, e5), HEDLEY_STATIC_CAST(int32_t, e4)); #else r_.u32[ 0] = e0; r_.u32[ 1] = e1; r_.u32[ 2] = e2; r_.u32[ 3] = e3; r_.u32[ 4] = e4; r_.u32[ 5] = e5; r_.u32[ 6] = e6; r_.u32[ 7] = e7; #endif return simde__m256i_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_set_epu64x (uint64_t e3, uint64_t e2, uint64_t e1, uint64_t e0) { simde__m256i_private r_; r_.u64[0] = e0; r_.u64[1] = e1; r_.u64[2] = e2; r_.u64[3] = e3; return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_set_ps (simde_float32 e7, simde_float32 e6, simde_float32 e5, simde_float32 e4, simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0); #else simde__m256_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_set_ps(e3, e2, e1, e0); r_.m128[1] = simde_mm_set_ps(e7, e6, e5, e4); #else r_.f32[0] = e0; r_.f32[1] = e1; r_.f32[2] = e2; r_.f32[3] = e3; r_.f32[4] = e4; r_.f32[5] = e5; r_.f32[6] = e6; r_.f32[7] = e7; #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_ps #define _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_set_pd (simde_float64 e3, simde_float64 e2, simde_float64 e1, simde_float64 e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set_pd(e3, e2, e1, e0); #else simde__m256d_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_set_pd(e1, e0); r_.m128d[1] = simde_mm_set_pd(e3, e2); #else r_.f64[0] = e0; r_.f64[1] = e1; r_.f64[2] = e2; r_.f64[3] = e3; #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_pd #define _mm256_set_pd(e3, e2, e1, e0) \ simde_mm256_set_pd(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_set_m128 (simde__m128 e1, simde__m128 e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_ps(_mm256_castps128_ps256(e0), e1, 1); #else simde__m256_private r_; simde__m128_private e1_ = simde__m128_to_private(e1), e0_ = simde__m128_to_private(e0); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128_private[0] = e0_; r_.m128_private[1] = e1_; #elif defined(SIMDE_HAVE_INT128_) r_.i128[0] = e0_.i128[0]; r_.i128[1] = e1_.i128[0]; #else r_.i64[0] = e0_.i64[0]; r_.i64[1] = e0_.i64[1]; r_.i64[2] = e1_.i64[0]; r_.i64[3] = e1_.i64[1]; #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_m128 #define _mm256_set_m128(e1, e0) simde_mm256_set_m128(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_set_m128d (simde__m128d e1, simde__m128d e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_pd(_mm256_castpd128_pd256(e0), e1, 1); #else simde__m256d_private r_; simde__m128d_private e1_ = simde__m128d_to_private(e1), e0_ = simde__m128d_to_private(e0); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d_private[0] = e0_; r_.m128d_private[1] = e1_; #else r_.i64[0] = e0_.i64[0]; r_.i64[1] = e0_.i64[1]; r_.i64[2] = e1_.i64[0]; r_.i64[3] = e1_.i64[1]; #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_m128d #define _mm256_set_m128d(e1, e0) simde_mm256_set_m128d(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set_m128i (simde__m128i e1, simde__m128i e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_si256(_mm256_castsi128_si256(e0), e1, 1); #else simde__m256i_private r_; simde__m128i_private e1_ = simde__m128i_to_private(e1), e0_ = simde__m128i_to_private(e0); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i_private[0] = e0_; r_.m128i_private[1] = e1_; #else r_.i64[0] = e0_.i64[0]; r_.i64[1] = e0_.i64[1]; r_.i64[2] = e1_.i64[0]; r_.i64[3] = e1_.i64[1]; #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set_m128i #define _mm256_set_m128i(e1, e0) simde_mm256_set_m128i(e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set1_epi8 (int8_t a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_epi8(a); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set1_epi8(a); r_.m128i[1] = simde_mm_set1_epi8(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) { r_.i8[i] = a; } #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_epi8 #define _mm256_set1_epi8(a) simde_mm256_set1_epi8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set1_epi16 (int16_t a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_epi16(a); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set1_epi16(a); r_.m128i[1] = simde_mm_set1_epi16(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) { r_.i16[i] = a; } #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_epi16 #define _mm256_set1_epi16(a) simde_mm256_set1_epi16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set1_epi32 (int32_t a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_epi32(a); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set1_epi32(a); r_.m128i[1] = simde_mm_set1_epi32(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) { r_.i32[i] = a; } #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_epi32 #define _mm256_set1_epi32(a) simde_mm256_set1_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_set1_epi64x (int64_t a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_epi64x(a); #else simde__m256i_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_mm_set1_epi64x(a); r_.m128i[1] = simde_mm_set1_epi64x(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) { r_.i64[i] = a; } #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_epi64x #define _mm256_set1_epi64x(a) simde_mm256_set1_epi64x(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_set1_ps (simde_float32 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_ps(a); #else simde__m256_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_set1_ps(a); r_.m128[1] = simde_mm_set1_ps(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_ps #define _mm256_set1_ps(a) simde_mm256_set1_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_set1_pd (simde_float64 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_set1_pd(a); #else simde__m256d_private r_; #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_set1_pd(a); r_.m128d[1] = simde_mm_set1_pd(a); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_set1_pd #define _mm256_set1_pd(a) simde_mm256_set1_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_deinterleaveeven_epi16 (simde__m256i a, simde__m256i b) { simde__m256i_private r_, a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_x_mm_deinterleaveeven_epi16(a_.m128i[0], b_.m128i[0]); r_.m128i[1] = simde_x_mm_deinterleaveeven_epi16(a_.m128i[1], b_.m128i[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 0, 2, 4, 6, 16, 18, 20, 22, 8, 10, 12, 14, 24, 26, 28, 30); #else const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2; const size_t quarter_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.i16[i] = a_.i16[2 * i]; r_.i16[i + quarter_point] = b_.i16[2 * i]; r_.i16[halfway_point + i] = a_.i16[halfway_point + 2 * i]; r_.i16[halfway_point + i + quarter_point] = b_.i16[halfway_point + 2 * i]; } #endif return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_deinterleaveodd_epi16 (simde__m256i a, simde__m256i b) { simde__m256i_private r_, a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_x_mm_deinterleaveodd_epi16(a_.m128i[0], b_.m128i[0]); r_.m128i[1] = simde_x_mm_deinterleaveodd_epi16(a_.m128i[1], b_.m128i[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i16 = SIMDE_SHUFFLE_VECTOR_(16, 32, a_.i16, b_.i16, 1, 3, 5, 7, 17, 19, 21, 23, 9, 11, 13, 15, 25, 27, 29, 31); #else const size_t halfway_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 2; const size_t quarter_point = (sizeof(r_.i16) / sizeof(r_.i16[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.i16[i] = a_.i16[2 * i + 1]; r_.i16[i + quarter_point] = b_.i16[2 * i + 1]; r_.i16[halfway_point + i] = a_.i16[halfway_point + 2 * i + 1]; r_.i16[halfway_point + i + quarter_point] = b_.i16[halfway_point + 2 * i + 1]; } #endif return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_deinterleaveeven_epi32 (simde__m256i a, simde__m256i b) { simde__m256i_private r_, a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_x_mm_deinterleaveeven_epi32(a_.m128i[0], b_.m128i[0]); r_.m128i[1] = simde_x_mm_deinterleaveeven_epi32(a_.m128i[1], b_.m128i[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 0, 2, 8, 10, 4, 6, 12, 14); #else const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2; const size_t quarter_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.i32[i] = a_.i32[2 * i]; r_.i32[i + quarter_point] = b_.i32[2 * i]; r_.i32[halfway_point + i] = a_.i32[halfway_point + 2 * i]; r_.i32[halfway_point + i + quarter_point] = b_.i32[halfway_point + 2 * i]; } #endif return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_x_mm256_deinterleaveodd_epi32 (simde__m256i a, simde__m256i b) { simde__m256i_private r_, a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128i[0] = simde_x_mm_deinterleaveodd_epi32(a_.m128i[0], b_.m128i[0]); r_.m128i[1] = simde_x_mm_deinterleaveodd_epi32(a_.m128i[1], b_.m128i[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.i32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.i32, b_.i32, 1, 3, 9, 11, 5, 7, 13, 15); #else const size_t halfway_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 2; const size_t quarter_point = (sizeof(r_.i32) / sizeof(r_.i32[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.i32[i] = a_.i32[2 * i + 1]; r_.i32[i + quarter_point] = b_.i32[2 * i + 1]; r_.i32[halfway_point + i] = a_.i32[halfway_point + 2 * i + 1]; r_.i32[halfway_point + i + quarter_point] = b_.i32[halfway_point + 2 * i + 1]; } #endif return simde__m256i_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_deinterleaveeven_ps (simde__m256 a, simde__m256 b) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_x_mm_deinterleaveeven_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_x_mm_deinterleaveeven_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 0, 2, 8, 10, 4, 6, 12, 14); #else const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2; const size_t quarter_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.f32[i] = a_.f32[2 * i]; r_.f32[i + quarter_point] = b_.f32[2 * i]; r_.f32[halfway_point + i] = a_.f32[halfway_point + 2 * i]; r_.f32[halfway_point + i + quarter_point] = b_.f32[halfway_point + 2 * i]; } #endif return simde__m256_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_deinterleaveodd_ps (simde__m256 a, simde__m256 b) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_x_mm_deinterleaveodd_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_x_mm_deinterleaveodd_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 1, 3, 9, 11, 5, 7, 13, 15); #else const size_t halfway_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 2; const size_t quarter_point = (sizeof(r_.f32) / sizeof(r_.f32[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.f32[i] = a_.f32[2 * i + 1]; r_.f32[i + quarter_point] = b_.f32[2 * i + 1]; r_.f32[halfway_point + i] = a_.f32[halfway_point + 2 * i + 1]; r_.f32[halfway_point + i + quarter_point] = b_.f32[halfway_point + 2 * i + 1]; } #endif return simde__m256_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_deinterleaveeven_pd (simde__m256d a, simde__m256d b) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_x_mm_deinterleaveeven_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_x_mm_deinterleaveeven_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 0, 4, 2, 6); #else const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2; const size_t quarter_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.f64[i] = a_.f64[2 * i]; r_.f64[i + quarter_point] = b_.f64[2 * i]; r_.f64[halfway_point + i] = a_.f64[halfway_point + 2 * i]; r_.f64[halfway_point + i + quarter_point] = b_.f64[halfway_point + 2 * i]; } #endif return simde__m256d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_deinterleaveodd_pd (simde__m256d a, simde__m256d b) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_x_mm_deinterleaveodd_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_x_mm_deinterleaveodd_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 1, 5, 3, 7); #else const size_t halfway_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 2; const size_t quarter_point = (sizeof(r_.f64) / sizeof(r_.f64[0])) / 4; for (size_t i = 0 ; i < quarter_point ; i++) { r_.f64[i] = a_.f64[2 * i + 1]; r_.f64[i + quarter_point] = b_.f64[2 * i + 1]; r_.f64[halfway_point + i] = a_.f64[halfway_point + 2 * i + 1]; r_.f64[halfway_point + i + quarter_point] = b_.f64[halfway_point + 2 * i + 1]; } #endif return simde__m256d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_abs_ps(simde__m256 a) { simde__m256_private r_, a_ = simde__m256_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_fabsf(a_.f32[i]); } return simde__m256_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_abs_pd(simde__m256d a) { simde__m256d_private r_, a_ = simde__m256d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_fabs(a_.f64[i]); } return simde__m256d_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_add_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_add_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_add_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_add_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f32 = a_.f32 + b_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i] + b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_add_ps #define _mm256_add_ps(a, b) simde_mm256_add_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_hadd_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_hadd_ps(a, b); #else return simde_mm256_add_ps(simde_x_mm256_deinterleaveeven_ps(a, b), simde_x_mm256_deinterleaveodd_ps(a, b)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_hadd_ps #define _mm256_hadd_ps(a, b) simde_mm256_hadd_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_add_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_add_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_add_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_add_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 + b_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] + b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_add_pd #define _mm256_add_pd(a, b) simde_mm256_add_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_hadd_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_hadd_pd(a, b); #else return simde_mm256_add_pd(simde_x_mm256_deinterleaveeven_pd(a, b), simde_x_mm256_deinterleaveodd_pd(a, b)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_hadd_pd #define _mm256_hadd_pd(a, b) simde_mm256_hadd_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_addsub_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_addsub_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_addsub_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_addsub_ps(a_.m128[1], b_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) { r_.f32[ i ] = a_.f32[ i ] - b_.f32[ i ]; r_.f32[i + 1] = a_.f32[i + 1] + b_.f32[i + 1]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_addsub_ps #define _mm256_addsub_ps(a, b) simde_mm256_addsub_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_addsub_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_addsub_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_addsub_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_addsub_pd(a_.m128d[1], b_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) { r_.f64[ i ] = a_.f64[ i ] - b_.f64[ i ]; r_.f64[i + 1] = a_.f64[i + 1] + b_.f64[i + 1]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_addsub_pd #define _mm256_addsub_pd(a, b) simde_mm256_addsub_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_and_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_and_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_and_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_and_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] & b_.i32f[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_and_ps #define _mm256_and_ps(a, b) simde_mm256_and_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_and_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_and_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_and_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_and_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = a_.i32f[i] & b_.i32f[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_and_pd #define _mm256_and_pd(a, b) simde_mm256_and_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_andnot_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_andnot_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_andnot_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_andnot_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~a_.i32f[i] & b_.i32f[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_andnot_ps #define _mm256_andnot_ps(a, b) simde_mm256_andnot_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_andnot_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_andnot_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_andnot_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_andnot_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = ~a_.i32f & b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i32f) / sizeof(r_.i32f[0])) ; i++) { r_.i32f[i] = ~a_.i32f[i] & b_.i32f[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_andnot_pd #define _mm256_andnot_pd(a, b) simde_mm256_andnot_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_blend_ps (simde__m256 a, simde__m256 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = ((imm8 >> i) & 1) ? b_.f32[i] : a_.f32[i]; } return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_blend_ps(a, b, imm8) _mm256_blend_ps(a, b, imm8) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) # define simde_mm256_blend_ps(a, b, imm8) \ simde_mm256_set_m128( \ simde_mm_blend_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), (imm8) >> 4), \ simde_mm_blend_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), (imm8) & 0x0F)) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_blend_ps #define _mm256_blend_ps(a, b, imm8) simde_mm256_blend_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_blend_pd (simde__m256d a, simde__m256d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = ((imm8 >> i) & 1) ? b_.f64[i] : a_.f64[i]; } return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_blend_pd(a, b, imm8) _mm256_blend_pd(a, b, imm8) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) # define simde_mm256_blend_pd(a, b, imm8) \ simde_mm256_set_m128d( \ simde_mm_blend_pd(simde_mm256_extractf128_pd(a, 1), simde_mm256_extractf128_pd(b, 1), (imm8) >> 2), \ simde_mm_blend_pd(simde_mm256_extractf128_pd(a, 0), simde_mm256_extractf128_pd(b, 0), (imm8) & 3)) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_blend_pd #define _mm256_blend_pd(a, b, imm8) simde_mm256_blend_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_blendv_ps (simde__m256 a, simde__m256 b, simde__m256 mask) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_blendv_ps(a, b, mask); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b), mask_ = simde__m256_to_private(mask); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_blendv_ps(a_.m128[0], b_.m128[0], mask_.m128[0]); r_.m128[1] = simde_mm_blendv_ps(a_.m128[1], b_.m128[1], mask_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.f32[i] = (mask_.u32[i] & (UINT32_C(1) << 31)) ? b_.f32[i] : a_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_blendv_ps #define _mm256_blendv_ps(a, b, imm8) simde_mm256_blendv_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_blendv_pd (simde__m256d a, simde__m256d b, simde__m256d mask) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_blendv_pd(a, b, mask); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b), mask_ = simde__m256d_to_private(mask); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_blendv_pd(a_.m128d[0], b_.m128d[0], mask_.m128d[0]); r_.m128d[1] = simde_mm_blendv_pd(a_.m128d[1], b_.m128d[1], mask_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.f64[i] = (mask_.u64[i] & (UINT64_C(1) << 63)) ? b_.f64[i] : a_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_blendv_pd #define _mm256_blendv_pd(a, b, imm8) simde_mm256_blendv_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_broadcast_pd (simde__m128d const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_broadcast_pd(mem_addr); #else simde__m256d_private r_; simde__m128d tmp = simde_mm_loadu_pd(HEDLEY_REINTERPRET_CAST(simde_float64 const*, mem_addr)); r_.m128d[0] = tmp; r_.m128d[1] = tmp; return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_broadcast_pd #define _mm256_broadcast_pd(mem_addr) simde_mm256_broadcast_pd(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_broadcast_ps (simde__m128 const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_broadcast_ps(mem_addr); #else simde__m256_private r_; simde__m128 tmp = simde_mm_loadu_ps(HEDLEY_REINTERPRET_CAST(simde_float32 const*, mem_addr)); r_.m128[0] = tmp; r_.m128[1] = tmp; return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_broadcast_ps #define _mm256_broadcast_ps(mem_addr) simde_mm256_broadcast_ps(HEDLEY_REINTERPRET_CAST(simde__m128 const*, mem_addr)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_broadcast_sd (simde_float64 const * a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_broadcast_sd(a); #else return simde_mm256_set1_pd(*a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_broadcast_sd #define _mm256_broadcast_sd(mem_addr) simde_mm256_broadcast_sd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr)) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_broadcast_ss (simde_float32 const * a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_broadcast_ss(a); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde__m128_from_wasm_v128(wasm_v128_load32_splat(a)); #else return simde_mm_set1_ps(*a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_broadcast_ss #define _mm_broadcast_ss(mem_addr) simde_mm_broadcast_ss(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_broadcast_ss (simde_float32 const * a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_broadcast_ss(a); #else return simde_mm256_set1_ps(*a); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_broadcast_ss #define _mm256_broadcast_ss(mem_addr) simde_mm256_broadcast_ss(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_castpd128_pd256 (simde__m128d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castpd128_pd256(a); #else simde__m256d_private r_; simde__m128d_private a_ = simde__m128d_to_private(a); r_.m128d_private[0] = a_; return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castpd128_pd256 #define _mm256_castpd128_pd256(a) simde_mm256_castpd128_pd256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm256_castpd256_pd128 (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castpd256_pd128(a); #else simde__m256d_private a_ = simde__m256d_to_private(a); return a_.m128d[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castpd256_pd128 #define _mm256_castpd256_pd128(a) simde_mm256_castpd256_pd128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_castps128_ps256 (simde__m128 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castps128_ps256(a); #else simde__m256_private r_; simde__m128_private a_ = simde__m128_to_private(a); r_.m128_private[0] = a_; return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castps128_ps256 #define _mm256_castps128_ps256(a) simde_mm256_castps128_ps256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm256_castps256_ps128 (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castps256_ps128(a); #else simde__m256_private a_ = simde__m256_to_private(a); return a_.m128[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castps256_ps128 #define _mm256_castps256_ps128(a) simde_mm256_castps256_ps128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_castsi128_si256 (simde__m128i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castsi128_si256(a); #else simde__m256i_private r_; simde__m128i_private a_ = simde__m128i_to_private(a); r_.m128i_private[0] = a_; return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castsi128_si256 #define _mm256_castsi128_si256(a) simde_mm256_castsi128_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm256_castsi256_si128 (simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_castsi256_si128(a); #else simde__m256i_private a_ = simde__m256i_to_private(a); return a_.m128i[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_castsi256_si128 #define _mm256_castsi256_si128(a) simde_mm256_castsi256_si128(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_round_ps (simde__m256 a, const int rounding) { simde__m256_private r_, a_ = simde__m256_to_private(a); switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) { #if defined(simde_math_nearbyintf) case SIMDE_MM_FROUND_CUR_DIRECTION: for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_nearbyintf(a_.f32[i]); } break; #endif #if defined(simde_math_roundf) case SIMDE_MM_FROUND_TO_NEAREST_INT: for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_roundf(a_.f32[i]); } break; #endif #if defined(simde_math_floorf) case SIMDE_MM_FROUND_TO_NEG_INF: for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_floorf(a_.f32[i]); } break; #endif #if defined(simde_math_ceilf) case SIMDE_MM_FROUND_TO_POS_INF: for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_ceilf(a_.f32[i]); } break; #endif #if defined(simde_math_truncf) case SIMDE_MM_FROUND_TO_ZERO: for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_truncf(a_.f32[i]); } break; #endif default: HEDLEY_UNREACHABLE_RETURN(simde_mm256_undefined_ps()); } return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_round_ps(a, rounding) _mm256_round_ps(a, rounding) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm256_round_ps(a, rounding) SIMDE_STATEMENT_EXPR_(({ \ simde__m256_private \ simde_mm256_round_ps_r_ = simde__m256_to_private(simde_mm256_setzero_ps()), \ simde_mm256_round_ps_a_ = simde__m256_to_private(a); \ \ for (size_t simde_mm256_round_ps_i = 0 ; simde_mm256_round_ps_i < (sizeof(simde_mm256_round_ps_r_.m128) / sizeof(simde_mm256_round_ps_r_.m128[0])) ; simde_mm256_round_ps_i++) { \ simde_mm256_round_ps_r_.m128[simde_mm256_round_ps_i] = simde_mm_round_ps(simde_mm256_round_ps_a_.m128[simde_mm256_round_ps_i], rounding); \ } \ \ simde__m256_from_private(simde_mm256_round_ps_r_); \ })) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_round_ps #define _mm256_round_ps(a, rounding) simde_mm256_round_ps(a, rounding) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_round_pd (simde__m256d a, const int rounding) { simde__m256d_private r_, a_ = simde__m256d_to_private(a); switch (rounding & ~SIMDE_MM_FROUND_NO_EXC) { #if defined(simde_math_nearbyint) case SIMDE_MM_FROUND_CUR_DIRECTION: for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_nearbyint(a_.f64[i]); } break; #endif #if defined(simde_math_round) case SIMDE_MM_FROUND_TO_NEAREST_INT: for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_round(a_.f64[i]); } break; #endif #if defined(simde_math_floor) case SIMDE_MM_FROUND_TO_NEG_INF: for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_floor(a_.f64[i]); } break; #endif #if defined(simde_math_ceil) case SIMDE_MM_FROUND_TO_POS_INF: for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_ceil(a_.f64[i]); } break; #endif #if defined(simde_math_trunc) case SIMDE_MM_FROUND_TO_ZERO: for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_trunc(a_.f64[i]); } break; #endif default: HEDLEY_UNREACHABLE_RETURN(simde_mm256_undefined_pd()); } return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_round_pd(a, rounding) _mm256_round_pd(a, rounding) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) && defined(SIMDE_STATEMENT_EXPR_) #define simde_mm256_round_pd(a, rounding) SIMDE_STATEMENT_EXPR_(({ \ simde__m256d_private \ simde_mm256_round_pd_r_ = simde__m256d_to_private(simde_mm256_setzero_pd()), \ simde_mm256_round_pd_a_ = simde__m256d_to_private(a); \ \ for (size_t simde_mm256_round_pd_i = 0 ; simde_mm256_round_pd_i < (sizeof(simde_mm256_round_pd_r_.m128d) / sizeof(simde_mm256_round_pd_r_.m128d[0])) ; simde_mm256_round_pd_i++) { \ simde_mm256_round_pd_r_.m128d[simde_mm256_round_pd_i] = simde_mm_round_pd(simde_mm256_round_pd_a_.m128d[simde_mm256_round_pd_i], rounding); \ } \ \ simde__m256d_from_private(simde_mm256_round_pd_r_); \ })) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_round_pd #define _mm256_round_pd(a, rounding) simde_mm256_round_pd(a, rounding) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_ceil_pd (simde__m256d a) { return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_POS_INF); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_ceil_pd #define _mm256_ceil_pd(a) simde_mm256_ceil_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_ceil_ps (simde__m256 a) { return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_POS_INF); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_ceil_ps #define _mm256_ceil_ps(a) simde_mm256_ceil_ps(a) #endif HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL /* This implementation does not support signaling NaNs (yet?) */ SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmp_pd (simde__m128d a, simde__m128d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { switch (imm8) { case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: return simde_mm_or_pd(simde_mm_cmpunord_pd(a, b), simde_mm_cmpeq_pd(a, b)); break; case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: return simde_mm_cmpeq_pd(a, b); break; case SIMDE_CMP_NGE_US: case SIMDE_CMP_NGE_UQ: return simde_x_mm_not_pd(simde_mm_cmpge_pd(a, b)); break; case SIMDE_CMP_LT_OS: case SIMDE_CMP_LT_OQ: return simde_mm_cmplt_pd(a, b); break; case SIMDE_CMP_NGT_US: case SIMDE_CMP_NGT_UQ: return simde_x_mm_not_pd(simde_mm_cmpgt_pd(a, b)); break; case SIMDE_CMP_LE_OS: case SIMDE_CMP_LE_OQ: return simde_mm_cmple_pd(a, b); break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: return simde_mm_cmpneq_pd(a, b); break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: return simde_mm_and_pd(simde_mm_cmpord_pd(a, b), simde_mm_cmpneq_pd(a, b)); break; case SIMDE_CMP_NLT_US: case SIMDE_CMP_NLT_UQ: return simde_x_mm_not_pd(simde_mm_cmplt_pd(a, b)); break; case SIMDE_CMP_GE_OS: case SIMDE_CMP_GE_OQ: return simde_mm_cmpge_pd(a, b); break; case SIMDE_CMP_NLE_US: case SIMDE_CMP_NLE_UQ: return simde_x_mm_not_pd(simde_mm_cmple_pd(a, b)); break; case SIMDE_CMP_GT_OS: case SIMDE_CMP_GT_OQ: return simde_mm_cmpgt_pd(a, b); break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: return simde_mm_setzero_pd(); break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: return simde_x_mm_setone_pd(); break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: return simde_mm_cmpunord_pd(a, b); break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: return simde_mm_cmpord_pd(a, b); break; } HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_pd()); } #if defined(__clang__) && defined(__AVX512DQ__) #define simde_mm_cmp_pd(a, b, imm8) (__extension__ ({ \ simde__m128d simde_mm_cmp_pd_r; \ switch (imm8) { \ case SIMDE_CMP_FALSE_OQ: \ case SIMDE_CMP_FALSE_OS: \ simde_mm_cmp_pd_r = simde_mm_setzero_pd(); \ break; \ case SIMDE_CMP_TRUE_UQ: \ case SIMDE_CMP_TRUE_US: \ simde_mm_cmp_pd_r = simde_x_mm_setone_pd(); \ break; \ default: \ simde_mm_cmp_pd_r = simde_mm_cmp_pd(a, b, imm8); \ break; \ } \ simde_mm_cmp_pd_r; \ })) #elif defined(SIMDE_X86_AVX_NATIVE) # define simde_mm_cmp_pd(a, b, imm8) _mm_cmp_pd(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_cmp_pd #define _mm_cmp_pd(a, b, imm8) simde_mm_cmp_pd(a, b, imm8) #endif SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_cmp_ps (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { switch (imm8) { case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: return simde_mm_or_ps(simde_mm_cmpunord_ps(a, b), simde_mm_cmpeq_ps(a, b)); break; case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: return simde_mm_cmpeq_ps(a, b); break; case SIMDE_CMP_NGE_US: case SIMDE_CMP_NGE_UQ: return simde_x_mm_not_ps(simde_mm_cmpge_ps(a, b)); break; case SIMDE_CMP_LT_OS: case SIMDE_CMP_LT_OQ: return simde_mm_cmplt_ps(a, b); break; case SIMDE_CMP_NGT_US: case SIMDE_CMP_NGT_UQ: return simde_x_mm_not_ps(simde_mm_cmpgt_ps(a, b)); break; case SIMDE_CMP_LE_OS: case SIMDE_CMP_LE_OQ: return simde_mm_cmple_ps(a, b); break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: return simde_mm_cmpneq_ps(a, b); break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: return simde_mm_and_ps(simde_mm_cmpord_ps(a, b), simde_mm_cmpneq_ps(a, b)); break; case SIMDE_CMP_NLT_US: case SIMDE_CMP_NLT_UQ: return simde_x_mm_not_ps(simde_mm_cmplt_ps(a, b)); break; case SIMDE_CMP_GE_OS: case SIMDE_CMP_GE_OQ: return simde_mm_cmpge_ps(a, b); break; case SIMDE_CMP_NLE_US: case SIMDE_CMP_NLE_UQ: return simde_x_mm_not_ps(simde_mm_cmple_ps(a, b)); break; case SIMDE_CMP_GT_OS: case SIMDE_CMP_GT_OQ: return simde_mm_cmpgt_ps(a, b); break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: return simde_mm_setzero_ps(); break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: return simde_x_mm_setone_ps(); break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: return simde_mm_cmpunord_ps(a, b); break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: return simde_mm_cmpord_ps(a, b); break; } HEDLEY_UNREACHABLE_RETURN(simde_mm_setzero_ps()); } /* Prior to 9.0 clang has problems with _mm{,256}_cmp_{ps,pd} for all four of the true/false * comparisons, but only when AVX-512 is enabled. */ #if defined(__clang__) && defined(__AVX512DQ__) #define simde_mm_cmp_ps(a, b, imm8) (__extension__ ({ \ simde__m128 simde_mm_cmp_ps_r; \ switch (imm8) { \ case SIMDE_CMP_FALSE_OQ: \ case SIMDE_CMP_FALSE_OS: \ simde_mm_cmp_ps_r = simde_mm_setzero_ps(); \ break; \ case SIMDE_CMP_TRUE_UQ: \ case SIMDE_CMP_TRUE_US: \ simde_mm_cmp_ps_r = simde_x_mm_setone_ps(); \ break; \ default: \ simde_mm_cmp_ps_r = simde_mm_cmp_ps(a, b, imm8); \ break; \ } \ simde_mm_cmp_ps_r; \ })) #elif defined(SIMDE_X86_AVX_NATIVE) #define simde_mm_cmp_ps(a, b, imm8) _mm_cmp_ps(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_cmp_ps #define _mm_cmp_ps(a, b, imm8) simde_mm_cmp_ps(a, b, imm8) #endif SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_cmp_sd (simde__m128d a, simde__m128d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); switch (imm8) { case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: a_.i64[0] = (a_.f64[0] == b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_LT_OQ: case SIMDE_CMP_LT_OS: a_.i64[0] = (a_.f64[0] < b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_LE_OQ: case SIMDE_CMP_LE_OS: a_.i64[0] = (a_.f64[0] <= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: a_.i64[0] = ((a_.f64[0] != a_.f64[0]) || (b_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0]) & (a_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0]) & (a_.f64[0] != b_.f64[0])) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NLT_UQ: case SIMDE_CMP_NLT_US: a_.i64[0] = !(a_.f64[0] < b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NLE_UQ: case SIMDE_CMP_NLE_US: a_.i64[0] = !(a_.f64[0] <= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: a_.i64[0] = ((a_.f64[0] == a_.f64[0]) & (b_.f64[0] == b_.f64[0])) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: a_.i64[0] = ((a_.f64[0] != a_.f64[0]) | (b_.f64[0] != b_.f64[0]) | (a_.f64[0] == b_.f64[0])) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NGE_UQ: case SIMDE_CMP_NGE_US: a_.i64[0] = !(a_.f64[0] >= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_NGT_UQ: case SIMDE_CMP_NGT_US: a_.i64[0] = !(a_.f64[0] > b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: a_.i64[0] = INT64_C(0); break; case SIMDE_CMP_GE_OQ: case SIMDE_CMP_GE_OS: a_.i64[0] = (a_.f64[0] >= b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_GT_OQ: case SIMDE_CMP_GT_OS: a_.i64[0] = (a_.f64[0] > b_.f64[0]) ? ~INT64_C(0) : INT64_C(0); break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: a_.i64[0] = ~INT64_C(0); break; default: HEDLEY_UNREACHABLE(); } return simde__m128d_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm_cmp_sd(a, b, imm8) _mm_cmp_sd(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_cmp_sd #define _mm_cmp_sd(a, b, imm8) simde_mm_cmp_sd(a, b, imm8) #endif SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_cmp_ss (simde__m128 a, simde__m128 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); switch (imm8) { case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: a_.i32[0] = (a_.f32[0] == b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_LT_OQ: case SIMDE_CMP_LT_OS: a_.i32[0] = (a_.f32[0] < b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_LE_OQ: case SIMDE_CMP_LE_OS: a_.i32[0] = (a_.f32[0] <= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: a_.i32[0] = ((a_.f32[0] != a_.f32[0]) || (b_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0]) & (a_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0]) & (a_.f32[0] != b_.f32[0])) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NLT_UQ: case SIMDE_CMP_NLT_US: a_.i32[0] = !(a_.f32[0] < b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NLE_UQ: case SIMDE_CMP_NLE_US: a_.i32[0] = !(a_.f32[0] <= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: a_.i32[0] = ((a_.f32[0] == a_.f32[0]) & (b_.f32[0] == b_.f32[0])) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: a_.i32[0] = ((a_.f32[0] != a_.f32[0]) | (b_.f32[0] != b_.f32[0]) | (a_.f32[0] == b_.f32[0])) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NGE_UQ: case SIMDE_CMP_NGE_US: a_.i32[0] = !(a_.f32[0] >= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_NGT_UQ: case SIMDE_CMP_NGT_US: a_.i32[0] = !(a_.f32[0] > b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: a_.i32[0] = INT32_C(0); break; case SIMDE_CMP_GE_OQ: case SIMDE_CMP_GE_OS: a_.i32[0] = (a_.f32[0] >= b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_GT_OQ: case SIMDE_CMP_GT_OS: a_.i32[0] = (a_.f32[0] > b_.f32[0]) ? ~INT32_C(0) : INT32_C(0); break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: a_.i32[0] = ~INT32_C(0); break; default: HEDLEY_UNREACHABLE(); } return simde__m128_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm_cmp_ss(a, b, imm8) _mm_cmp_ss(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_cmp_ss #define _mm_cmp_ss(a, b, imm8) simde_mm_cmp_ss(a, b, imm8) #endif SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m256d #if defined(__clang__) && defined(__AVX512DQ__) simde_mm256_cmp_pd_internal_ #else simde_mm256_cmp_pd #endif (simde__m256d a, simde__m256d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); switch (imm8) { case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] == b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_LT_OQ: case SIMDE_CMP_LT_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 < b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] < b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_LE_OQ: case SIMDE_CMP_LE_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 <= b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] <= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != a_.f64) | (b_.f64 != b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = ((a_.f64[i] != a_.f64[i]) || (b_.f64[i] != b_.f64[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] != b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 == a_.f64) & (b_.f64 == b_.f64) & (a_.f64 != b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = ((a_.f64[i] == a_.f64[i]) & (b_.f64[i] == b_.f64[i]) & (a_.f64[i] != b_.f64[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NLT_UQ: case SIMDE_CMP_NLT_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 < b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = !(a_.f64[i] < b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NLE_UQ: case SIMDE_CMP_NLE_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 <= b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = !(a_.f64[i] <= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ((a_.f64 == a_.f64) & (b_.f64 == b_.f64))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = ((a_.f64[i] == a_.f64[i]) & (b_.f64[i] == b_.f64[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 != a_.f64) | (b_.f64 != b_.f64) | (a_.f64 == b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = ((a_.f64[i] != a_.f64[i]) | (b_.f64[i] != b_.f64[i]) | (a_.f64[i] == b_.f64[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NGE_UQ: case SIMDE_CMP_NGE_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 >= b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = !(a_.f64[i] >= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NGT_UQ: case SIMDE_CMP_NGT_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), ~(a_.f64 > b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = !(a_.f64[i] > b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: r_ = simde__m256d_to_private(simde_mm256_setzero_pd()); break; case SIMDE_CMP_GE_OQ: case SIMDE_CMP_GE_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 >= b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] >= b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_GT_OQ: case SIMDE_CMP_GT_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i64 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i64), (a_.f64 > b_.f64)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.i64[i] = (a_.f64[i] > b_.f64[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: r_ = simde__m256d_to_private(simde_x_mm256_setone_pd()); break; default: HEDLEY_UNREACHABLE(); } return simde__m256d_from_private(r_); } #if defined(__clang__) && defined(__AVX512DQ__) #define simde_mm256_cmp_pd(a, b, imm8) (__extension__ ({ \ simde__m256d simde_mm256_cmp_pd_r; \ switch (imm8) { \ case SIMDE_CMP_FALSE_OQ: \ case SIMDE_CMP_FALSE_OS: \ simde_mm256_cmp_pd_r = simde_mm256_setzero_pd(); \ break; \ case SIMDE_CMP_TRUE_UQ: \ case SIMDE_CMP_TRUE_US: \ simde_mm256_cmp_pd_r = simde_x_mm256_setone_pd(); \ break; \ default: \ simde_mm256_cmp_pd_r = simde_mm256_cmp_pd_internal_(a, b, imm8); \ break; \ } \ simde_mm256_cmp_pd_r; \ })) #elif defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_cmp_pd(a, b, imm8) _mm256_cmp_pd(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cmp_pd #define _mm256_cmp_pd(a, b, imm8) simde_mm256_cmp_pd(a, b, imm8) #endif SIMDE_HUGE_FUNCTION_ATTRIBUTES simde__m256 #if defined(__clang__) && defined(__AVX512DQ__) simde_mm256_cmp_ps_internal_ #else simde_mm256_cmp_ps #endif (simde__m256 a, simde__m256 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 31) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); switch (imm8) { case SIMDE_CMP_EQ_OQ: case SIMDE_CMP_EQ_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 == b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] == b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_LT_OQ: case SIMDE_CMP_LT_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 < b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] < b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_LE_OQ: case SIMDE_CMP_LE_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 <= b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] <= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_UNORD_Q: case SIMDE_CMP_UNORD_S: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != a_.f32) | (b_.f32 != b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = ((a_.f32[i] != a_.f32[i]) || (b_.f32[i] != b_.f32[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NEQ_UQ: case SIMDE_CMP_NEQ_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] != b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NEQ_OQ: case SIMDE_CMP_NEQ_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 == a_.f32) & (b_.f32 == b_.f32) & (a_.f32 != b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = ((a_.f32[i] == a_.f32[i]) & (b_.f32[i] == b_.f32[i]) & (a_.f32[i] != b_.f32[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NLT_UQ: case SIMDE_CMP_NLT_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 < b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = !(a_.f32[i] < b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NLE_UQ: case SIMDE_CMP_NLE_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 <= b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = !(a_.f32[i] <= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_ORD_Q: case SIMDE_CMP_ORD_S: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ((a_.f32 == a_.f32) & (b_.f32 == b_.f32))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = ((a_.f32[i] == a_.f32[i]) & (b_.f32[i] == b_.f32[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_EQ_UQ: case SIMDE_CMP_EQ_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 != a_.f32) | (b_.f32 != b_.f32) | (a_.f32 == b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = ((a_.f32[i] != a_.f32[i]) | (b_.f32[i] != b_.f32[i]) | (a_.f32[i] == b_.f32[i])) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NGE_UQ: case SIMDE_CMP_NGE_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 >= b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = !(a_.f32[i] >= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_NGT_UQ: case SIMDE_CMP_NGT_US: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), ~(a_.f32 > b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = !(a_.f32[i] > b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_FALSE_OQ: case SIMDE_CMP_FALSE_OS: r_ = simde__m256_to_private(simde_mm256_setzero_ps()); break; case SIMDE_CMP_GE_OQ: case SIMDE_CMP_GE_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 >= b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] >= b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_GT_OQ: case SIMDE_CMP_GT_OS: #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32 = HEDLEY_REINTERPRET_CAST(__typeof__(r_.i32), (a_.f32 > b_.f32)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.i32[i] = (a_.f32[i] > b_.f32[i]) ? ~INT32_C(0) : INT32_C(0); } #endif break; case SIMDE_CMP_TRUE_UQ: case SIMDE_CMP_TRUE_US: r_ = simde__m256_to_private(simde_x_mm256_setone_ps()); break; default: HEDLEY_UNREACHABLE(); } return simde__m256_from_private(r_); } #if defined(__clang__) && defined(__AVX512DQ__) #define simde_mm256_cmp_ps(a, b, imm8) (__extension__ ({ \ simde__m256 simde_mm256_cmp_ps_r; \ switch (imm8) { \ case SIMDE_CMP_FALSE_OQ: \ case SIMDE_CMP_FALSE_OS: \ simde_mm256_cmp_ps_r = simde_mm256_setzero_ps(); \ break; \ case SIMDE_CMP_TRUE_UQ: \ case SIMDE_CMP_TRUE_US: \ simde_mm256_cmp_ps_r = simde_x_mm256_setone_ps(); \ break; \ default: \ simde_mm256_cmp_ps_r = simde_mm256_cmp_ps_internal_(a, b, imm8); \ break; \ } \ simde_mm256_cmp_ps_r; \ })) #elif defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_cmp_ps(a, b, imm8) _mm256_cmp_ps(a, b, imm8) #elif defined(SIMDE_STATEMENT_EXPR_) && SIMDE_NATURAL_VECTOR_SIZE_LE(128) #define simde_mm256_cmp_ps(a, b, imm8) SIMDE_STATEMENT_EXPR_(({ \ simde__m256_private \ simde_mm256_cmp_ps_r_ = simde__m256_to_private(simde_mm256_setzero_ps()), \ simde_mm256_cmp_ps_a_ = simde__m256_to_private((a)), \ simde_mm256_cmp_ps_b_ = simde__m256_to_private((b)); \ \ for (size_t i = 0 ; i < (sizeof(simde_mm256_cmp_ps_r_.m128) / sizeof(simde_mm256_cmp_ps_r_.m128[0])) ; i++) { \ simde_mm256_cmp_ps_r_.m128[i] = simde_mm_cmp_ps(simde_mm256_cmp_ps_a_.m128[i], simde_mm256_cmp_ps_b_.m128[i], (imm8)); \ } \ \ simde__m256_from_private(simde_mm256_cmp_ps_r_); \ })) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cmp_ps #define _mm256_cmp_ps(a, b, imm8) simde_mm256_cmp_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_copysign_ps(simde__m256 dest, simde__m256 src) { simde__m256_private r_, dest_ = simde__m256_to_private(dest), src_ = simde__m256_to_private(src); #if defined(simde_math_copysignf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_copysignf(dest_.f32[i], src_.f32[i]); } #else simde__m256 sgnbit = simde_mm256_xor_ps(simde_mm256_set1_ps(SIMDE_FLOAT32_C(0.0)), simde_mm256_set1_ps(-SIMDE_FLOAT32_C(0.0))); return simde_mm256_xor_ps(simde_mm256_and_ps(sgnbit, src), simde_mm256_andnot_ps(sgnbit, dest)); #endif return simde__m256_from_private(r_); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_copysign_pd(simde__m256d dest, simde__m256d src) { simde__m256d_private r_, dest_ = simde__m256d_to_private(dest), src_ = simde__m256d_to_private(src); #if defined(simde_math_copysign) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_copysign(dest_.f64[i], src_.f64[i]); } #else simde__m256d sgnbit = simde_mm256_xor_pd(simde_mm256_set1_pd(SIMDE_FLOAT64_C(0.0)), simde_mm256_set1_pd(-SIMDE_FLOAT64_C(0.0))); return simde_mm256_xor_pd(simde_mm256_and_pd(sgnbit, src), simde_mm256_andnot_pd(sgnbit, dest)); #endif return simde__m256d_from_private(r_); } HEDLEY_DIAGNOSTIC_POP /* -Wfloat-equal */ SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_cvtepi32_pd (simde__m128i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtepi32_pd(a); #else simde__m256d_private r_; simde__m128i_private a_ = simde__m128i_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = HEDLEY_STATIC_CAST(simde_float64, a_.i32[i]); } return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtepi32_pd #define _mm256_cvtepi32_pd(a) simde_mm256_cvtepi32_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_cvtepi32_ps (simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtepi32_ps(a); #else simde__m256_private r_; simde__m256i_private a_ = simde__m256i_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = HEDLEY_STATIC_CAST(simde_float32, a_.i32[i]); } return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtepi32_ps #define _mm256_cvtepi32_ps(a) simde_mm256_cvtepi32_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm256_cvtpd_epi32 (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtpd_epi32(a); #else simde__m128i_private r_; simde__m256d_private a_ = simde__m256d_to_private(a); #if defined(simde_math_nearbyint) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) { r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_nearbyint(a_.f64[i])); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtpd_epi32 #define _mm256_cvtpd_epi32(a) simde_mm256_cvtpd_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm256_cvtpd_ps (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtpd_ps(a); #else simde__m128_private r_; simde__m256d_private a_ = simde__m256d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = HEDLEY_STATIC_CAST(simde_float32, a_.f64[i]); } return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtpd_ps #define _mm256_cvtpd_ps(a) simde_mm256_cvtpd_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_cvtps_epi32 (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtps_epi32(a); #else simde__m256i_private r_; simde__m256_private a_ = simde__m256_to_private(a); #if defined(simde_math_nearbyintf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_nearbyintf(a_.f32[i])); } #else HEDLEY_UNREACHABLE(); #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtps_epi32 #define _mm256_cvtps_epi32(a) simde_mm256_cvtps_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_cvtps_pd (simde__m128 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvtps_pd(a); #else simde__m256d_private r_; simde__m128_private a_ = simde__m128_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { r_.f64[i] = HEDLEY_STATIC_CAST(double, a_.f32[i]); } return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtps_pd #define _mm256_cvtps_pd(a) simde_mm256_cvtps_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64 simde_mm256_cvtsd_f64 (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \ HEDLEY_GCC_VERSION_CHECK(7,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \ HEDLEY_MSVC_VERSION_CHECK(19,14,0)) return _mm256_cvtsd_f64(a); #else simde__m256d_private a_ = simde__m256d_to_private(a); return a_.f64[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtsd_f64 #define _mm256_cvtsd_f64(a) simde_mm256_cvtsd_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm256_cvtsi256_si32 (simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \ HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \ HEDLEY_MSVC_VERSION_CHECK(19,14,0)) return _mm256_cvtsi256_si32(a); #else simde__m256i_private a_ = simde__m256i_to_private(a); return a_.i32[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtsi256_si32 #define _mm256_cvtsi256_si32(a) simde_mm256_cvtsi256_si32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32 simde_mm256_cvtss_f32 (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) && ( \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,9,0) || \ HEDLEY_GCC_VERSION_CHECK(7,0,0) || \ HEDLEY_INTEL_VERSION_CHECK(13,0,0) || \ HEDLEY_MSVC_VERSION_CHECK(19,14,0)) return _mm256_cvtss_f32(a); #else simde__m256_private a_ = simde__m256_to_private(a); return a_.f32[0]; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvtss_f32 #define _mm256_cvtss_f32(a) simde_mm256_cvtss_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm256_cvttpd_epi32 (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvttpd_epi32(a); #else simde__m128i_private r_; simde__m256d_private a_ = simde__m256d_to_private(a); #if defined(simde_math_trunc) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) { r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_trunc(a_.f64[i])); } #else HEDLEY_UNREACHABLE(); #endif return simde__m128i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvttpd_epi32 #define _mm256_cvttpd_epi32(a) simde_mm256_cvttpd_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_cvttps_epi32 (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_cvttps_epi32(a); #else simde__m256i_private r_; simde__m256_private a_ = simde__m256_to_private(a); #if defined(simde_math_truncf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { r_.i32[i] = SIMDE_CONVERT_FTOI(int32_t, simde_math_truncf(a_.f32[i])); } #else HEDLEY_UNREACHABLE(); #endif return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_cvttps_epi32 #define _mm256_cvttps_epi32(a) simde_mm256_cvttps_epi32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_div_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_div_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_div_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_div_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f32 = a_.f32 / b_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i] / b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_div_ps #define _mm256_div_ps(a, b) simde_mm256_div_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_div_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_div_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_div_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_div_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 / b_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] / b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_div_pd #define _mm256_div_pd(a, b) simde_mm256_div_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm256_extractf128_pd (simde__m256d a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256d_private a_ = simde__m256d_to_private(a); return a_.m128d[imm8]; } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_extractf128_pd(a, imm8) _mm256_extractf128_pd(a, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_extractf128_pd #define _mm256_extractf128_pd(a, imm8) simde_mm256_extractf128_pd(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm256_extractf128_ps (simde__m256 a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256_private a_ = simde__m256_to_private(a); return a_.m128[imm8]; } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_extractf128_ps(a, imm8) _mm256_extractf128_ps(a, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_extractf128_ps #define _mm256_extractf128_ps(a, imm8) simde_mm256_extractf128_ps(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128i simde_mm256_extractf128_si256 (simde__m256i a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256i_private a_ = simde__m256i_to_private(a); return a_.m128i[imm8]; } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_extractf128_si256(a, imm8) _mm256_extractf128_si256(a, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_extractf128_si256 #define _mm256_extractf128_si256(a, imm8) simde_mm256_extractf128_si256(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_floor_pd (simde__m256d a) { return simde_mm256_round_pd(a, SIMDE_MM_FROUND_TO_NEG_INF); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_floor_pd #define _mm256_floor_pd(a) simde_mm256_floor_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_floor_ps (simde__m256 a) { return simde_mm256_round_ps(a, SIMDE_MM_FROUND_TO_NEG_INF); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_floor_ps #define _mm256_floor_ps(a) simde_mm256_floor_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_insert_epi8 (simde__m256i a, int8_t i, const int index) SIMDE_REQUIRE_RANGE(index, 0, 31) { simde__m256i_private a_ = simde__m256i_to_private(a); a_.i8[index] = i; return simde__m256i_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0)) #define simde_mm256_insert_epi8(a, i, index) _mm256_insert_epi8(a, i, index) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insert_epi8 #define _mm256_insert_epi8(a, i, index) simde_mm256_insert_epi8(a, i, index) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_insert_epi16 (simde__m256i a, int16_t i, const int index) SIMDE_REQUIRE_RANGE(index, 0, 15) { simde__m256i_private a_ = simde__m256i_to_private(a); a_.i16[index] = i; return simde__m256i_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0)) #define simde_mm256_insert_epi16(a, i, index) _mm256_insert_epi16(a, i, index) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insert_epi16 #define _mm256_insert_epi16(a, i, imm8) simde_mm256_insert_epi16(a, i, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_insert_epi32 (simde__m256i a, int32_t i, const int index) SIMDE_REQUIRE_RANGE(index, 0, 7) { simde__m256i_private a_ = simde__m256i_to_private(a); a_.i32[index] = i; return simde__m256i_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0)) #define simde_mm256_insert_epi32(a, i, index) _mm256_insert_epi32(a, i, index) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insert_epi32 #define _mm256_insert_epi32(a, i, index) simde_mm256_insert_epi32(a, i, index) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_insert_epi64 (simde__m256i a, int64_t i, const int index) SIMDE_REQUIRE_RANGE(index, 0, 3) { simde__m256i_private a_ = simde__m256i_to_private(a); a_.i64[index] = i; return simde__m256i_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) && defined(SIMDE_ARCH_AMD64) && \ (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) && \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,7,0) #define simde_mm256_insert_epi64(a, i, index) _mm256_insert_epi64(a, i, index) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #undef _mm256_insert_epi64 #define _mm256_insert_epi64(a, i, index) simde_mm256_insert_epi64(a, i, index) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_insertf128_pd(simde__m256d a, simde__m128d b, int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256d_private a_ = simde__m256d_to_private(a); simde__m128d_private b_ = simde__m128d_to_private(b); a_.m128d_private[imm8] = b_; return simde__m256d_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_insertf128_pd(a, b, imm8) _mm256_insertf128_pd(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insertf128_pd #define _mm256_insertf128_pd(a, b, imm8) simde_mm256_insertf128_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_insertf128_ps(simde__m256 a, simde__m128 b, int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256_private a_ = simde__m256_to_private(a); simde__m128_private b_ = simde__m128_to_private(b); a_.m128_private[imm8] = b_; return simde__m256_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_insertf128_ps(a, b, imm8) _mm256_insertf128_ps(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insertf128_ps #define _mm256_insertf128_ps(a, b, imm8) simde_mm256_insertf128_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_insertf128_si256(simde__m256i a, simde__m128i b, int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) { simde__m256i_private a_ = simde__m256i_to_private(a); simde__m128i_private b_ = simde__m128i_to_private(b); a_.m128i_private[imm8] = b_; return simde__m256i_from_private(a_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_insertf128_si256(a, b, imm8) _mm256_insertf128_si256(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_insertf128_si256 #define _mm256_insertf128_si256(a, b, imm8) simde_mm256_insertf128_si256(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_dp_ps(a, b, imm8) _mm256_dp_ps(a, b, imm8) #else # define simde_mm256_dp_ps(a, b, imm8) \ simde_mm256_set_m128( \ simde_mm_dp_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), imm8), \ simde_mm_dp_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), imm8)) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_dp_ps #define _mm256_dp_ps(a, b, imm8) simde_mm256_dp_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_mm256_extract_epi32 (simde__m256i a, const int index) SIMDE_REQUIRE_RANGE(index, 0, 7) { simde__m256i_private a_ = simde__m256i_to_private(a); return a_.i32[index]; } #if defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,10,0)) #define simde_mm256_extract_epi32(a, index) _mm256_extract_epi32(a, index) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_extract_epi32 #define _mm256_extract_epi32(a, index) simde_mm256_extract_epi32(a, index) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_mm256_extract_epi64 (simde__m256i a, const int index) SIMDE_REQUIRE_RANGE(index, 0, 3) { simde__m256i_private a_ = simde__m256i_to_private(a); return a_.i64[index]; } #if defined(SIMDE_X86_AVX_NATIVE) && defined(SIMDE_ARCH_AMD64) #if !defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0) #define simde_mm256_extract_epi64(a, index) _mm256_extract_epi64(a, index) #endif #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_AMD64)) #undef _mm256_extract_epi64 #define _mm256_extract_epi64(a, index) simde_mm256_extract_epi64(a, index) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_lddqu_si256 (simde__m256i const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(mem_addr); #else simde__m256i r; simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_lddqu_si256 #define _mm256_lddqu_si256(a) simde_mm256_lddqu_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_load_pd (const double mem_addr[HEDLEY_ARRAY_PARAM(4)]) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_load_pd(mem_addr); #else simde__m256d r; simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_load_pd #define _mm256_load_pd(a) simde_mm256_load_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_load_ps (const float mem_addr[HEDLEY_ARRAY_PARAM(8)]) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_load_ps(mem_addr); #else simde__m256 r; simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_load_ps #define _mm256_load_ps(a) simde_mm256_load_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_load_si256 (simde__m256i const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_load_si256(mem_addr); #else simde__m256i r; simde_memcpy(&r, SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_load_si256 #define _mm256_load_si256(a) simde_mm256_load_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_loadu_pd (const double a[HEDLEY_ARRAY_PARAM(4)]) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_pd(a); #else simde__m256d r; simde_memcpy(&r, a, sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu_pd #define _mm256_loadu_pd(a) simde_mm256_loadu_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_loadu_ps (const float a[HEDLEY_ARRAY_PARAM(8)]) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_ps(a); #else simde__m256 r; simde_memcpy(&r, a, sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu_ps #define _mm256_loadu_ps(a) simde_mm256_loadu_ps(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \ && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm256_loadu_epi8(mem_addr) _mm256_loadu_epi8(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu_epi8(void const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); #else simde__m256i r; simde_memcpy(&r, mem_addr, sizeof(r)); return r; #endif } #endif #define simde_x_mm256_loadu_epi8(mem_addr) simde_mm256_loadu_epi8(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm256_loadu_epi8 #define _mm256_loadu_epi8(a) simde_mm256_loadu_epi8(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE) \ && !defined(SIMDE_BUG_GCC_95483) && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm256_loadu_epi16(mem_addr) _mm256_loadu_epi16(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu_epi16(void const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); #else simde__m256i r; simde_memcpy(&r, mem_addr, sizeof(r)); return r; #endif } #endif #define simde_x_mm256_loadu_epi16(mem_addr) simde_mm256_loadu_epi16(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm256_loadu_epi16 #define _mm256_loadu_epi16(a) simde_mm256_loadu_epi16(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \ && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm256_loadu_epi32(mem_addr) _mm256_loadu_epi32(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu_epi32(void const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); #else simde__m256i r; simde_memcpy(&r, mem_addr, sizeof(r)); return r; #endif } #endif #define simde_x_mm256_loadu_epi32(mem_addr) simde_mm256_loadu_epi32(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm256_loadu_epi32 #define _mm256_loadu_epi32(a) simde_mm256_loadu_epi32(a) #endif #if defined(SIMDE_X86_AVX512VL_NATIVE) && !defined(SIMDE_BUG_GCC_95483) \ && !defined(SIMDE_BUG_CLANG_REV_344862) \ && (!defined(HEDLEY_MSVC_VERSION) || HEDLEY_MSVC_VERSION_CHECK(19,20,0)) #define simde_mm256_loadu_epi64(mem_addr) _mm256_loadu_epi64(mem_addr) #else SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu_epi64(void const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(SIMDE_ALIGN_CAST(__m256i const *, mem_addr)); #else simde__m256i r; simde_memcpy(&r, mem_addr, sizeof(r)); return r; #endif } #endif #define simde_x_mm256_loadu_epi64(mem_addr) simde_mm256_loadu_epi64(mem_addr) #if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && (defined(SIMDE_BUG_GCC_95483) || defined(SIMDE_BUG_CLANG_REV_344862))) #undef _mm256_loadu_epi64 #define _mm256_loadu_epi64(a) simde_mm256_loadu_epi64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu_si256 (void const * mem_addr) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_loadu_si256(SIMDE_ALIGN_CAST(const __m256i*, mem_addr)); #else simde__m256i r; simde_memcpy(&r, mem_addr, sizeof(r)); return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu_si256 #define _mm256_loadu_si256(mem_addr) simde_mm256_loadu_si256(mem_addr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_loadu2_m128 (const float hiaddr[HEDLEY_ARRAY_PARAM(4)], const float loaddr[HEDLEY_ARRAY_PARAM(4)]) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) return _mm256_loadu2_m128(hiaddr, loaddr); #else return simde_mm256_insertf128_ps(simde_mm256_castps128_ps256(simde_mm_loadu_ps(loaddr)), simde_mm_loadu_ps(hiaddr), 1); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu2_m128 #define _mm256_loadu2_m128(hiaddr, loaddr) simde_mm256_loadu2_m128(hiaddr, loaddr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_loadu2_m128d (const double hiaddr[HEDLEY_ARRAY_PARAM(2)], const double loaddr[HEDLEY_ARRAY_PARAM(2)]) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) return _mm256_loadu2_m128d(hiaddr, loaddr); #else return simde_mm256_insertf128_pd(simde_mm256_castpd128_pd256(simde_mm_loadu_pd(loaddr)), simde_mm_loadu_pd(hiaddr), 1); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu2_m128d #define _mm256_loadu2_m128d(hiaddr, loaddr) simde_mm256_loadu2_m128d(hiaddr, loaddr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_loadu2_m128i (const simde__m128i* hiaddr, const simde__m128i* loaddr) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) return _mm256_loadu2_m128i(hiaddr, loaddr); #else return simde_mm256_insertf128_si256(simde_mm256_castsi128_si256(simde_mm_loadu_si128(loaddr)), simde_mm_loadu_si128(hiaddr), 1); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_loadu2_m128i #define _mm256_loadu2_m128i(hiaddr, loaddr) simde_mm256_loadu2_m128i(hiaddr, loaddr) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_maskload_pd (const simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) return _mm_maskload_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128d, mask)); #else return _mm_maskload_pd(mem_addr, mask); #endif #else simde__m128d_private r_; simde__m128i_private mask_ = simde__m128i_to_private(mask), mask_shr_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) mask_shr_.neon_i64 = vshrq_n_s64(mask_.neon_i64, 63); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde_mm_and_pd(simde_mm_load_pd(mem_addr), simde__m128d_from_wasm_v128(wasm_i64x2_shr(mask_.wasm_v128, 63))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(mask_.i64) / sizeof(mask_.i64[0])) ; i++) { mask_shr_.i64[i] = mask_.i64[i] >> 63; } #endif SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = mask_shr_.i64[i] ? mem_addr[i] : SIMDE_FLOAT64_C(0.0); } return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_maskload_pd #define _mm_maskload_pd(mem_addr, mask) simde_mm_maskload_pd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr), mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_maskload_pd (const simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) return _mm256_maskload_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256d, mask)); #else return _mm256_maskload_pd(mem_addr, mask); #endif #else simde__m256d_private r_; simde__m256i_private mask_ = simde__m256i_to_private(mask); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (mask_.i64[i] >> 63) ? mem_addr[i] : SIMDE_FLOAT64_C(0.0); } return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_maskload_pd #define _mm256_maskload_pd(mem_addr, mask) simde_mm256_maskload_pd(HEDLEY_REINTERPRET_CAST(double const*, mem_addr), mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_maskload_ps (const simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) return _mm_maskload_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128, mask)); #else return _mm_maskload_ps(mem_addr, mask); #endif #else simde__m128_private r_; simde__m128i_private mask_ = simde__m128i_to_private(mask), mask_shr_; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) mask_shr_.neon_i32 = vshrq_n_s32(mask_.neon_i32, 31); #elif defined(SIMDE_WASM_SIMD128_NATIVE) return simde_mm_and_ps(simde_mm_load_ps(mem_addr), simde__m128_from_wasm_v128(wasm_i32x4_shr(mask_.wasm_v128, 31))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(mask_.i32) / sizeof(mask_.i32[0])) ; i++) { mask_shr_.i32[i] = mask_.i32[i] >> 31; } #endif SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = mask_shr_.i32[i] ? mem_addr[i] : SIMDE_FLOAT32_C(0.0); } return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_maskload_ps #define _mm_maskload_ps(mem_addr, mask) simde_mm_maskload_ps(HEDLEY_REINTERPRET_CAST(float const*, mem_addr), mask) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_maskload_ps (const simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(8)], simde__m256i mask) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) return _mm256_maskload_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256, mask)); #else return _mm256_maskload_ps(mem_addr, mask); #endif #else simde__m256_private r_; simde__m256i_private mask_ = simde__m256i_to_private(mask); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = (mask_.i32[i] >> 31) ? mem_addr[i] : SIMDE_FLOAT32_C(0.0); } return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_maskload_ps #define _mm256_maskload_ps(mem_addr, mask) simde_mm256_maskload_ps(HEDLEY_REINTERPRET_CAST(float const*, mem_addr), mask) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_maskstore_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(2)], simde__m128i mask, simde__m128d a) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) _mm_maskstore_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128d, mask), a); #else _mm_maskstore_pd(mem_addr, mask, a); #endif #else simde__m128i_private mask_ = simde__m128i_to_private(mask); simde__m128d_private a_ = simde__m128d_to_private(a); #if defined(SIMDE_WASM_SIMD128_NATIVE) if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(mask_.wasm_v128, 0)) & 0x8000000000000000ull) != 0) mem_addr[0] = wasm_f64x2_extract_lane(a_.wasm_v128, 0); if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i64x2_extract_lane(mask_.wasm_v128, 1)) & 0x8000000000000000ull) != 0) mem_addr[1] = wasm_f64x2_extract_lane(a_.wasm_v128, 1); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) { if (mask_.u64[i] >> 63) mem_addr[i] = a_.f64[i]; } #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_maskstore_pd #define _mm_maskstore_pd(mem_addr, mask, a) simde_mm_maskstore_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), mask, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_maskstore_pd (simde_float64 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m256i mask, simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) _mm256_maskstore_pd(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256d, mask), a); #else _mm256_maskstore_pd(mem_addr, mask, a); #endif #else simde__m256i_private mask_ = simde__m256i_to_private(mask); simde__m256d_private a_ = simde__m256d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) { if (mask_.u64[i] & (UINT64_C(1) << 63)) mem_addr[i] = a_.f64[i]; } #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_maskstore_pd #define _mm256_maskstore_pd(mem_addr, mask, a) simde_mm256_maskstore_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), mask, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm_maskstore_ps (simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(4)], simde__m128i mask, simde__m128 a) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) _mm_maskstore_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m128, mask), a); #else _mm_maskstore_ps(mem_addr, mask, a); #endif #else simde__m128i_private mask_ = simde__m128i_to_private(mask); simde__m128_private a_ = simde__m128_to_private(a); #if defined(SIMDE_WASM_SIMD128_NATIVE) if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 0)) & 0x80000000ull) != 0) mem_addr[0] = wasm_f32x4_extract_lane(a_.wasm_v128, 0); if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 1)) & 0x80000000ull) != 0) mem_addr[1] = wasm_f32x4_extract_lane(a_.wasm_v128, 1); if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 2)) & 0x80000000ull) != 0) mem_addr[2] = wasm_f32x4_extract_lane(a_.wasm_v128, 2); if ((HEDLEY_STATIC_CAST(unsigned long long, wasm_i32x4_extract_lane(mask_.wasm_v128, 3)) & 0x80000000ull) != 0) mem_addr[3] = wasm_f32x4_extract_lane(a_.wasm_v128, 3); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { if (mask_.u32[i] & (UINT32_C(1) << 31)) mem_addr[i] = a_.f32[i]; } #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_maskstore_ps #define _mm_maskstore_ps(mem_addr, mask, a) simde_mm_maskstore_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), mask, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_maskstore_ps (simde_float32 mem_addr[HEDLEY_ARRAY_PARAM(8)], simde__m256i mask, simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(3,8,0) _mm256_maskstore_ps(mem_addr, HEDLEY_REINTERPRET_CAST(simde__m256, mask), a); #else _mm256_maskstore_ps(mem_addr, mask, a); #endif #else simde__m256i_private mask_ = simde__m256i_to_private(mask); simde__m256_private a_ = simde__m256_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { if (mask_.u32[i] & (UINT32_C(1) << 31)) mem_addr[i] = a_.f32[i]; } #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_maskstore_ps #define _mm256_maskstore_ps(mem_addr, mask, a) simde_mm256_maskstore_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), mask, a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_min_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_min_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_min_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_min_ps(a_.m128[1], b_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = (a_.f32[i] < b_.f32[i]) ? a_.f32[i] : b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_min_ps #define _mm256_min_ps(a, b) simde_mm256_min_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_min_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_min_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_min_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_min_pd(a_.m128d[1], b_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (a_.f64[i] < b_.f64[i]) ? a_.f64[i] : b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_min_pd #define _mm256_min_pd(a, b) simde_mm256_min_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_max_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_max_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_max_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_max_ps(a_.m128[1], b_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = (a_.f32[i] > b_.f32[i]) ? a_.f32[i] : b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_max_ps #define _mm256_max_ps(a, b) simde_mm256_max_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_max_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_max_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_max_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_max_pd(a_.m128d[1], b_.m128d[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = (a_.f64[i] > b_.f64[i]) ? a_.f64[i] : b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_max_pd #define _mm256_max_pd(a, b) simde_mm256_max_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_movedup_pd (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_movedup_pd(a); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, a_.f64, 0, 0, 2, 2); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i += 2) { r_.f64[i] = r_.f64[i + 1] = a_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_movedup_pd #define _mm256_movedup_pd(a) simde_mm256_movedup_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_movehdup_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_movehdup_ps(a); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, a_.f32, 1, 1, 3, 3, 5, 5, 7, 7); #else SIMDE_VECTORIZE for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) { r_.f32[i - 1] = r_.f32[i] = a_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_movehdup_ps #define _mm256_movehdup_ps(a) simde_mm256_movehdup_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_moveldup_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_moveldup_ps(a); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, a_.f32, 0, 0, 2, 2, 4, 4, 6, 6); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i += 2) { r_.f32[i] = r_.f32[i + 1] = a_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_moveldup_ps #define _mm256_moveldup_ps(a) simde_mm256_moveldup_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_movemask_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_movemask_ps(a); #else simde__m256_private a_ = simde__m256_to_private(a); int r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.f32) / sizeof(a_.f32[0])) ; i++) { r |= (a_.u32[i] >> 31) << i; } return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_movemask_ps #define _mm256_movemask_ps(a) simde_mm256_movemask_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_movemask_pd (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_movemask_pd(a); #else simde__m256d_private a_ = simde__m256d_to_private(a); int r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.f64) / sizeof(a_.f64[0])) ; i++) { r |= (a_.u64[i] >> 63) << i; } return r; #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_movemask_pd #define _mm256_movemask_pd(a) simde_mm256_movemask_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_mul_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_mul_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_mul_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_mul_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f32 = a_.f32 * b_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i] * b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_mul_ps #define _mm256_mul_ps(a, b) simde_mm256_mul_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_mul_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_mul_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_mul_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_mul_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 * b_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] * b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_mul_pd #define _mm256_mul_pd(a, b) simde_mm256_mul_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_or_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_or_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_or_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_or_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f | b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] | b_.u32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_or_ps #define _mm256_or_ps(a, b) simde_mm256_or_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_or_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_or_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_or_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_or_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f | b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = a_.u64[i] | b_.u64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_or_pd #define _mm256_or_pd(a, b) simde_mm256_or_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_permute_ps (simde__m256 a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256_private r_, a_ = simde__m256_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.m128_private[i >> 2].f32[(imm8 >> ((i << 1) & 7)) & 3]; } return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_permute_ps(a, imm8) _mm256_permute_ps(a, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permute_ps #define _mm256_permute_ps(a, imm8) simde_mm256_permute_ps(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_permute_pd (simde__m256d a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m256d_private r_, a_ = simde__m256d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[((imm8 >> i) & 1) + (i & 2)]; } return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_permute_pd(a, imm8) _mm256_permute_pd(a, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permute_pd #define _mm256_permute_pd(a, imm8) simde_mm256_permute_pd(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_permute_ps (simde__m128 a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m128_private r_, a_ = simde__m128_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[(imm8 >> ((i << 1) & 7)) & 3]; } return simde__m128_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm_permute_ps(a, imm8) _mm_permute_ps(a, imm8) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_permute_ps(a, imm8) simde__m128_from_wasm_v128(wasm_i32x4_shuffle(simde__m128_to_wasm_v128(a), simde__m128_to_wasm_v128(a), ((imm8) & 3), (((imm8) >> 2) & 3 ), (((imm8) >> 4) & 3), (((imm8) >> 6) & 3))) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_permute_ps #define _mm_permute_ps(a, imm8) simde_mm_permute_ps(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_permute_pd (simde__m128d a, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) { simde__m128d_private r_, a_ = simde__m128d_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[((imm8 >> i) & 1) + (i & 2)]; } return simde__m128d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm_permute_pd(a, imm8) _mm_permute_pd(a, imm8) #elif defined(SIMDE_WASM_SIMD128_NATIVE) # define simde_mm_permute_pd(a, imm8) simde__m128d_from_wasm_v128(wasm_i64x2_shuffle(simde__m128d_to_wasm_v128(a), simde__m128d_to_wasm_v128(a), ((imm8) & 1), (((imm8) >> 1) & 1 ))) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_permute_pd #define _mm_permute_pd(a, imm8) simde_mm_permute_pd(a, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128 simde_mm_permutevar_ps (simde__m128 a, simde__m128i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_permutevar_ps(a, b); #else simde__m128_private r_, a_ = simde__m128_to_private(a); simde__m128i_private b_ = simde__m128i_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f32x4_make( (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 0) & 3]), (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 1) & 3]), (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 2) & 3]), (a_.f32[wasm_i32x4_extract_lane(b_.wasm_v128, 3) & 3])); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[b_.i32[i] & 3]; } #endif return simde__m128_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_permutevar_ps #define _mm_permutevar_ps(a, b) simde_mm_permutevar_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m128d simde_mm_permutevar_pd (simde__m128d a, simde__m128i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_permutevar_pd(a, b); #else simde__m128d_private r_, a_ = simde__m128d_to_private(a); simde__m128i_private b_ = simde__m128i_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.wasm_v128 = wasm_f64x2_make( (a_.f64[(wasm_i64x2_extract_lane(b_.wasm_v128, 0) >> 1) & 1]), (a_.f64[(wasm_i64x2_extract_lane(b_.wasm_v128, 1) >> 1) & 1])); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[(b_.i64[i] & 2) >> 1]; } #endif return simde__m128d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_permutevar_pd #define _mm_permutevar_pd(a, b) simde_mm_permutevar_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_permutevar_ps (simde__m256 a, simde__m256i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_permutevar_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a); simde__m256i_private b_ = simde__m256i_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[(b_.i32[i] & 3) + (i & 4)]; } return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permutevar_ps #define _mm256_permutevar_ps(a, b) simde_mm256_permutevar_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_permutevar_pd (simde__m256d a, simde__m256i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_permutevar_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a); simde__m256i_private b_ = simde__m256i_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[((b_.i64[i] & 2) >> 1) + (i & 2)]; } return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permutevar_pd #define _mm256_permutevar_pd(a, b) simde_mm256_permutevar_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_permute2f128_ps (simde__m256 a, simde__m256 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); r_.m128_private[0] = (imm8 & 0x08) ? simde__m128_to_private(simde_mm_setzero_ps()) : ((imm8 & 0x02) ? b_.m128_private[(imm8 ) & 1] : a_.m128_private[(imm8 ) & 1]); r_.m128_private[1] = (imm8 & 0x80) ? simde__m128_to_private(simde_mm_setzero_ps()) : ((imm8 & 0x20) ? b_.m128_private[(imm8 >> 4) & 1] : a_.m128_private[(imm8 >> 4) & 1]); return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_permute2f128_ps(a, b, imm8) _mm256_permute2f128_ps(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permute2f128_ps #define _mm256_permute2f128_ps(a, b, imm8) simde_mm256_permute2f128_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_permute2f128_pd (simde__m256d a, simde__m256d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); r_.m128d_private[0] = (imm8 & 0x08) ? simde__m128d_to_private(simde_mm_setzero_pd()) : ((imm8 & 0x02) ? b_.m128d_private[(imm8 ) & 1] : a_.m128d_private[(imm8 ) & 1]); r_.m128d_private[1] = (imm8 & 0x80) ? simde__m128d_to_private(simde_mm_setzero_pd()) : ((imm8 & 0x20) ? b_.m128d_private[(imm8 >> 4) & 1] : a_.m128d_private[(imm8 >> 4) & 1]); return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_permute2f128_pd(a, b, imm8) _mm256_permute2f128_pd(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permute2f128_pd #define _mm256_permute2f128_pd(a, b, imm8) simde_mm256_permute2f128_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_permute2f128_si256 (simde__m256i a, simde__m256i b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256i_private r_, a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); r_.m128i_private[0] = (imm8 & 0x08) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x02) ? b_.m128i_private[(imm8 ) & 1] : a_.m128i_private[(imm8 ) & 1]); r_.m128i_private[1] = (imm8 & 0x80) ? simde__m128i_to_private(simde_mm_setzero_si128()) : ((imm8 & 0x20) ? b_.m128i_private[(imm8 >> 4) & 1] : a_.m128i_private[(imm8 >> 4) & 1]); return simde__m256i_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) # define simde_mm256_permute2f128_si128(a, b, imm8) _mm256_permute2f128_si128(a, b, imm8) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_permute2f128_si256 #define _mm256_permute2f128_si256(a, b, imm8) simde_mm256_permute2f128_si256(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_rcp_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_rcp_ps(a); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_rcp_ps(a_.m128[0]); r_.m128[1] = simde_mm_rcp_ps(a_.m128[1]); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = SIMDE_FLOAT32_C(1.0) / a_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_rcp_ps #define _mm256_rcp_ps(a) simde_mm256_rcp_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_rsqrt_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_rsqrt_ps(a); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_rsqrt_ps #define _mm256_rsqrt_ps(a) simde_mm256_rsqrt_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setr_epi8 ( int8_t e31, int8_t e30, int8_t e29, int8_t e28, int8_t e27, int8_t e26, int8_t e25, int8_t e24, int8_t e23, int8_t e22, int8_t e21, int8_t e20, int8_t e19, int8_t e18, int8_t e17, int8_t e16, int8_t e15, int8_t e14, int8_t e13, int8_t e12, int8_t e11, int8_t e10, int8_t e9, int8_t e8, int8_t e7, int8_t e6, int8_t e5, int8_t e4, int8_t e3, int8_t e2, int8_t e1, int8_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_epi8( e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm256_set_epi8( e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19, e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_epi8 #define _mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_setr_epi8(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setr_epi16 ( int16_t e15, int16_t e14, int16_t e13, int16_t e12, int16_t e11, int16_t e10, int16_t e9, int16_t e8, int16_t e7, int16_t e6, int16_t e5, int16_t e4, int16_t e3, int16_t e2, int16_t e1, int16_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_epi16( e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm256_set_epi16( e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_epi16 #define _mm256_setr_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_setr_epi16(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setr_epi32 ( int32_t e7, int32_t e6, int32_t e5, int32_t e4, int32_t e3, int32_t e2, int32_t e1, int32_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm256_set_epi32(e0, e1, e2, e3, e4, e5, e6, e7); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_epi32 #define _mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_setr_epi32(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setr_epi64x (int64_t e3, int64_t e2, int64_t e1, int64_t e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_epi64x(e3, e2, e1, e0); #else return simde_mm256_set_epi64x(e0, e1, e2, e3); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_epi64x #define _mm256_setr_epi64x(e3, e2, e1, e0) \ simde_mm256_setr_epi64x(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_setr_ps ( simde_float32 e7, simde_float32 e6, simde_float32 e5, simde_float32 e4, simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0); #else return simde_mm256_set_ps(e0, e1, e2, e3, e4, e5, e6, e7); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_ps #define _mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0) \ simde_mm256_setr_ps(e7, e6, e5, e4, e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_setr_pd (simde_float64 e3, simde_float64 e2, simde_float64 e1, simde_float64 e0) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_setr_pd(e3, e2, e1, e0); #else return simde_mm256_set_pd(e0, e1, e2, e3); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_pd #define _mm256_setr_pd(e3, e2, e1, e0) \ simde_mm256_setr_pd(e3, e2, e1, e0) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_setr_m128 (simde__m128 lo, simde__m128 hi) { #if defined(SIMDE_X86_AVX_NATIVE) && \ !defined(SIMDE_BUG_GCC_REV_247851) && \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0) return _mm256_setr_m128(lo, hi); #else return simde_mm256_set_m128(hi, lo); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_m128 #define _mm256_setr_m128(lo, hi) \ simde_mm256_setr_m128(lo, hi) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_setr_m128d (simde__m128d lo, simde__m128d hi) { #if defined(SIMDE_X86_AVX_NATIVE) && \ !defined(SIMDE_BUG_GCC_REV_247851) && \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0) return _mm256_setr_m128d(lo, hi); #else return simde_mm256_set_m128d(hi, lo); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_m128d #define _mm256_setr_m128d(lo, hi) \ simde_mm256_setr_m128d(lo, hi) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_setr_m128i (simde__m128i lo, simde__m128i hi) { #if defined(SIMDE_X86_AVX_NATIVE) && \ !defined(SIMDE_BUG_GCC_REV_247851) && \ SIMDE_DETECT_CLANG_VERSION_CHECK(3,6,0) return _mm256_setr_m128i(lo, hi); #else return simde_mm256_set_m128i(hi, lo); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_setr_m128i #define _mm256_setr_m128i(lo, hi) \ simde_mm256_setr_m128i(lo, hi) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_shuffle_ps (simde__m256 a, simde__m256 b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) { simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); r_.f32[0] = a_.m128_private[0].f32[(imm8 >> 0) & 3]; r_.f32[1] = a_.m128_private[0].f32[(imm8 >> 2) & 3]; r_.f32[2] = b_.m128_private[0].f32[(imm8 >> 4) & 3]; r_.f32[3] = b_.m128_private[0].f32[(imm8 >> 6) & 3]; r_.f32[4] = a_.m128_private[1].f32[(imm8 >> 0) & 3]; r_.f32[5] = a_.m128_private[1].f32[(imm8 >> 2) & 3]; r_.f32[6] = b_.m128_private[1].f32[(imm8 >> 4) & 3]; r_.f32[7] = b_.m128_private[1].f32[(imm8 >> 6) & 3]; return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_shuffle_ps(a, b, imm8) _mm256_shuffle_ps(a, b, imm8) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) #define simde_mm256_shuffle_ps(a, b, imm8) \ simde_mm256_set_m128( \ simde_mm_shuffle_ps(simde_mm256_extractf128_ps(a, 1), simde_mm256_extractf128_ps(b, 1), (imm8)), \ simde_mm_shuffle_ps(simde_mm256_extractf128_ps(a, 0), simde_mm256_extractf128_ps(b, 0), (imm8))) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm256_shuffle_ps(a, b, imm8) \ SIMDE_SHUFFLE_VECTOR_(32, 32, a, b, \ (((imm8) >> 0) & 3) + 0, \ (((imm8) >> 2) & 3) + 0, \ (((imm8) >> 4) & 3) + 8, \ (((imm8) >> 6) & 3) + 8, \ (((imm8) >> 0) & 3) + 4, \ (((imm8) >> 2) & 3) + 4, \ (((imm8) >> 4) & 3) + 12, \ (((imm8) >> 6) & 3) + 12) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_shuffle_ps #define _mm256_shuffle_ps(a, b, imm8) simde_mm256_shuffle_ps(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_shuffle_pd (simde__m256d a, simde__m256d b, const int imm8) SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 15) { simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); r_.f64[0] = a_.f64[((imm8 ) & 1) ]; r_.f64[1] = b_.f64[((imm8 >> 1) & 1) ]; r_.f64[2] = a_.f64[((imm8 >> 2) & 1) | 2]; r_.f64[3] = b_.f64[((imm8 >> 3) & 1) | 2]; return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_NATIVE) #define simde_mm256_shuffle_pd(a, b, imm8) _mm256_shuffle_pd(a, b, imm8) #elif SIMDE_NATURAL_VECTOR_SIZE_LE(128) #define simde_mm256_shuffle_pd(a, b, imm8) \ simde_mm256_set_m128d( \ simde_mm_shuffle_pd(simde_mm256_extractf128_pd(a, 1), simde_mm256_extractf128_pd(b, 1), (imm8 >> 2) & 3), \ simde_mm_shuffle_pd(simde_mm256_extractf128_pd(a, 0), simde_mm256_extractf128_pd(b, 0), (imm8 >> 0) & 3)) #elif defined(SIMDE_SHUFFLE_VECTOR_) #define simde_mm256_shuffle_pd(a, b, imm8) \ SIMDE_SHUFFLE_VECTOR_(64, 32, a, b, \ (((imm8) >> 0) & 1) + 0, \ (((imm8) >> 1) & 1) + 4, \ (((imm8) >> 2) & 1) + 2, \ (((imm8) >> 3) & 1) + 6) #endif #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_shuffle_pd #define _mm256_shuffle_pd(a, b, imm8) simde_mm256_shuffle_pd(a, b, imm8) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_sqrt_ps (simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_sqrt_ps(a); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_sqrt_ps(a_.m128[0]); r_.m128[1] = simde_mm_sqrt_ps(a_.m128[1]); #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_sqrt_ps #define _mm256_sqrt_ps(a) simde_mm256_sqrt_ps(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_sqrt_pd (simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_sqrt_pd(a); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_sqrt_pd(a_.m128d[0]); r_.m128d[1] = simde_mm_sqrt_pd(a_.m128d[1]); #elif defined(simde_math_sqrt) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = simde_math_sqrt(a_.f64[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_sqrt_pd #define _mm256_sqrt_pd(a) simde_mm256_sqrt_pd(a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_store_ps (simde_float32 mem_addr[8], simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_store_ps(mem_addr, a); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_store_ps #define _mm256_store_ps(mem_addr, a) simde_mm256_store_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_store_pd (simde_float64 mem_addr[4], simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_store_pd(mem_addr, a); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_store_pd #define _mm256_store_pd(mem_addr, a) simde_mm256_store_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_store_si256 (simde__m256i* mem_addr, simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_store_si256(mem_addr, a); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_store_si256 #define _mm256_store_si256(mem_addr, a) simde_mm256_store_si256(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu_ps (simde_float32 mem_addr[8], simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_storeu_ps(mem_addr, a); #else simde_memcpy(mem_addr, &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu_ps #define _mm256_storeu_ps(mem_addr, a) simde_mm256_storeu_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu_pd (simde_float64 mem_addr[4], simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_storeu_pd(mem_addr, a); #else simde_memcpy(mem_addr, &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu_pd #define _mm256_storeu_pd(mem_addr, a) simde_mm256_storeu_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu_si256 (void* mem_addr, simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_storeu_si256(SIMDE_ALIGN_CAST(__m256i*, mem_addr), a); #else simde_memcpy(mem_addr, &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu_si256 #define _mm256_storeu_si256(mem_addr, a) simde_mm256_storeu_si256(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu2_m128 (simde_float32 hi_addr[4], simde_float32 lo_addr[4], simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) _mm256_storeu2_m128(hi_addr, lo_addr, a); #else simde_mm_storeu_ps(lo_addr, simde_mm256_castps256_ps128(a)); simde_mm_storeu_ps(hi_addr, simde_mm256_extractf128_ps(a, 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu2_m128 #define _mm256_storeu2_m128(hi_addr, lo_addr, a) simde_mm256_storeu2_m128(hi_addr, lo_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu2_m128d (simde_float64 hi_addr[2], simde_float64 lo_addr[2], simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) _mm256_storeu2_m128d(hi_addr, lo_addr, a); #else simde_mm_storeu_pd(lo_addr, simde_mm256_castpd256_pd128(a)); simde_mm_storeu_pd(hi_addr, simde_mm256_extractf128_pd(a, 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu2_m128d #define _mm256_storeu2_m128d(hi_addr, lo_addr, a) simde_mm256_storeu2_m128d(hi_addr, lo_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_storeu2_m128i (simde__m128i* hi_addr, simde__m128i* lo_addr, simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_MCST_LCC_MISSING_AVX_LOAD_STORE_M128_FUNCS) _mm256_storeu2_m128i(hi_addr, lo_addr, a); #else simde_mm_storeu_si128(lo_addr, simde_mm256_castsi256_si128(a)); simde_mm_storeu_si128(hi_addr, simde_mm256_extractf128_si256(a, 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_storeu2_m128i #define _mm256_storeu2_m128i(hi_addr, lo_addr, a) simde_mm256_storeu2_m128i(hi_addr, lo_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_stream_ps (simde_float32 mem_addr[8], simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_stream_ps(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT) __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr)); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_stream_ps #define _mm256_stream_ps(mem_addr, a) simde_mm256_stream_ps(HEDLEY_REINTERPRET_CAST(float*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_stream_pd (simde_float64 mem_addr[4], simde__m256d a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_stream_pd(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT) __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr)); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256d), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_stream_pd #define _mm256_stream_pd(mem_addr, a) simde_mm256_stream_pd(HEDLEY_REINTERPRET_CAST(double*, mem_addr), a) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_mm256_stream_si256 (simde__m256i* mem_addr, simde__m256i a) { #if defined(SIMDE_X86_AVX_NATIVE) _mm256_stream_si256(mem_addr, a); #elif HEDLEY_HAS_BUILTIN(__builtin_nontemporal_store) && defined(SIMDE_VECTOR_SUBSCRIPT) __builtin_nontemporal_store(a, SIMDE_ALIGN_CAST(__typeof__(a)*, mem_addr)); #else simde_memcpy(SIMDE_ALIGN_ASSUME_LIKE(mem_addr, simde__m256i), &a, sizeof(a)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_stream_si256 #define _mm256_stream_si256(mem_addr, a) simde_mm256_stream_si256(mem_addr, a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_sub_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_sub_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_sub_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_sub_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f32 = a_.f32 - b_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = a_.f32[i] - b_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_sub_ps #define _mm256_sub_ps(a, b) simde_mm256_sub_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_hsub_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_hsub_ps(a, b); #else return simde_mm256_sub_ps(simde_x_mm256_deinterleaveeven_ps(a, b), simde_x_mm256_deinterleaveodd_ps(a, b)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_hsub_ps #define _mm256_hsub_ps(a, b) simde_mm256_hsub_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_sub_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_sub_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_sub_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_sub_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.f64 = a_.f64 - b_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = a_.f64[i] - b_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_sub_pd #define _mm256_sub_pd(a, b) simde_mm256_sub_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_hsub_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_hsub_pd(a, b); #else return simde_mm256_sub_pd(simde_x_mm256_deinterleaveeven_pd(a, b), simde_x_mm256_deinterleaveodd_pd(a, b)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_hsub_pd #define _mm256_hsub_pd(a, b) simde_mm256_hsub_pd(a, b) #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_PUSH SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_ #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_undefined_ps (void) { simde__m256_private r_; #if \ defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \ (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256)) r_.n = _mm256_undefined_ps(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m256_to_private(simde_mm256_setzero_ps()); #endif return simde__m256_from_private(r_); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_undefined_ps #define _mm256_undefined_ps() simde_mm256_undefined_ps() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_undefined_pd (void) { simde__m256d_private r_; #if \ defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \ (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256)) r_.n = _mm256_undefined_pd(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m256d_to_private(simde_mm256_setzero_pd()); #endif return simde__m256d_from_private(r_); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_undefined_pd #define _mm256_undefined_pd() simde_mm256_undefined_pd() #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_undefined_si256 (void) { simde__m256i_private r_; #if \ defined(SIMDE_X86_AVX_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(5,0,0)) && \ (!defined(__has_builtin) || HEDLEY_HAS_BUILTIN(__builtin_ia32_undef256)) r_.n = _mm256_undefined_si256(); #elif !defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) r_ = simde__m256i_to_private(simde_mm256_setzero_si256()); #endif return simde__m256i_from_private(r_); } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_undefined_si256 #define _mm256_undefined_si256() simde_mm256_undefined_si256() #endif #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) HEDLEY_DIAGNOSTIC_POP #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_xor_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_xor_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128[0] = simde_mm_xor_ps(a_.m128[0], b_.m128[0]); r_.m128[1] = simde_mm_xor_ps(a_.m128[1], b_.m128[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f ^ b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) { r_.u32[i] = a_.u32[i] ^ b_.u32[i]; } #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_xor_ps #define _mm256_xor_ps(a, b) simde_mm256_xor_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_xor_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_xor_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r_.m128d[0] = simde_mm_xor_pd(a_.m128d[0], b_.m128d[0]); r_.m128d[1] = simde_mm_xor_pd(a_.m128d[1], b_.m128d[1]); #elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS) r_.i32f = a_.i32f ^ b_.i32f; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) { r_.u64[i] = a_.u64[i] ^ b_.u64[i]; } #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_xor_pd #define _mm256_xor_pd(a, b) simde_mm256_xor_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_xorsign_ps(simde__m256 dest, simde__m256 src) { return simde_mm256_xor_ps(simde_mm256_and_ps(simde_mm256_set1_ps(-0.0f), src), dest); } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_xorsign_pd(simde__m256d dest, simde__m256d src) { return simde_mm256_xor_pd(simde_mm256_and_pd(simde_mm256_set1_pd(-0.0), src), dest); } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_x_mm256_negate_ps(simde__m256 a) { #if defined(SIMDE_X86_AVX_NATIVE) return simde_mm256_xor_ps(a,_mm256_set1_ps(SIMDE_FLOAT32_C(-0.0))); #else simde__m256_private r_, a_ = simde__m256_to_private(a); #if defined(SIMDE_VECTOR_NEGATE) r_.f32 = -a_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = -a_.f32[i]; } #endif return simde__m256_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_x_mm256_negate_pd(simde__m256d a) { #if defined(SIMDE_X86_AVX2_NATIVE) return simde_mm256_xor_pd(a, _mm256_set1_pd(SIMDE_FLOAT64_C(-0.0))); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a); #if defined(SIMDE_VECTOR_NEGATE) r_.f64 = -a_.f64; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) { r_.f64[i] = -a_.f64[i]; } #endif return simde__m256d_from_private(r_); #endif } SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_unpackhi_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_unpackhi_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 2, 10, 3, 11, 6, 14, 7, 15); #else r_.f32[0] = a_.f32[2]; r_.f32[1] = b_.f32[2]; r_.f32[2] = a_.f32[3]; r_.f32[3] = b_.f32[3]; r_.f32[4] = a_.f32[6]; r_.f32[5] = b_.f32[6]; r_.f32[6] = a_.f32[7]; r_.f32[7] = b_.f32[7]; #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_unpackhi_ps #define _mm256_unpackhi_ps(a, b) simde_mm256_unpackhi_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_unpackhi_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_unpackhi_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 1, 5, 3, 7); #else r_.f64[0] = a_.f64[1]; r_.f64[1] = b_.f64[1]; r_.f64[2] = a_.f64[3]; r_.f64[3] = b_.f64[3]; #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_unpackhi_pd #define _mm256_unpackhi_pd(a, b) simde_mm256_unpackhi_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_unpacklo_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_unpacklo_ps(a, b); #else simde__m256_private r_, a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f32 = SIMDE_SHUFFLE_VECTOR_(32, 32, a_.f32, b_.f32, 0, 8, 1, 9, 4, 12, 5, 13); #else r_.f32[0] = a_.f32[0]; r_.f32[1] = b_.f32[0]; r_.f32[2] = a_.f32[1]; r_.f32[3] = b_.f32[1]; r_.f32[4] = a_.f32[4]; r_.f32[5] = b_.f32[4]; r_.f32[6] = a_.f32[5]; r_.f32[7] = b_.f32[5]; #endif return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_unpacklo_ps #define _mm256_unpacklo_ps(a, b) simde_mm256_unpacklo_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_unpacklo_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_unpacklo_pd(a, b); #else simde__m256d_private r_, a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); #if defined(SIMDE_SHUFFLE_VECTOR_) r_.f64 = SIMDE_SHUFFLE_VECTOR_(64, 32, a_.f64, b_.f64, 0, 4, 2, 6); #else r_.f64[0] = a_.f64[0]; r_.f64[1] = b_.f64[0]; r_.f64[2] = a_.f64[2]; r_.f64[3] = b_.f64[2]; #endif return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_unpacklo_pd #define _mm256_unpacklo_pd(a, b) simde_mm256_unpacklo_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256 simde_mm256_zextps128_ps256 (simde__m128 a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_ps(_mm256_setzero_ps(), a, 0); #else simde__m256_private r_; r_.m128_private[0] = simde__m128_to_private(a); r_.m128_private[1] = simde__m128_to_private(simde_mm_setzero_ps()); return simde__m256_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_zextps128_ps256 #define _mm256_zextps128_ps256(a) simde_mm256_zextps128_ps256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256d simde_mm256_zextpd128_pd256 (simde__m128d a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_pd(_mm256_setzero_pd(), a, 0); #else simde__m256d_private r_; r_.m128d_private[0] = simde__m128d_to_private(a); r_.m128d_private[1] = simde__m128d_to_private(simde_mm_setzero_pd()); return simde__m256d_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_zextpd128_pd256 #define _mm256_zextpd128_pd256(a) simde_mm256_zextpd128_pd256(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde__m256i simde_mm256_zextsi128_si256 (simde__m128i a) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_insertf128_si256(_mm256_setzero_si256(), a, 0); #else simde__m256i_private r_; r_.m128i_private[0] = simde__m128i_to_private(a); r_.m128i_private[1] = simde__m128i_to_private(simde_mm_setzero_si128()); return simde__m256i_from_private(r_); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_zextsi128_si256 #define _mm256_zextsi128_si256(a) simde_mm256_zextsi128_si256(a) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testc_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testc_ps(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u32x4_shr(wasm_v128_or(wasm_v128_not(b_.wasm_v128), a_.wasm_v128), 31); m = wasm_v128_and(m, simde_mm_movehl_ps(m, m)); m = wasm_v128_and(m, simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(m, 0); #else uint_fast32_t r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { r |= ~a_.u32[i] & b_.u32[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testc_ps #define _mm_testc_ps(a, b) simde_mm_testc_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testc_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testc_pd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u64x2_shr(wasm_v128_or(wasm_v128_not(b_.wasm_v128), a_.wasm_v128), 63); return HEDLEY_STATIC_CAST(int, wasm_i64x2_extract_lane(m, 0) & wasm_i64x2_extract_lane(m, 1)); #else uint_fast64_t r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { r |= ~a_.u64[i] & b_.u64[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testc_pd #define _mm_testc_pd(a, b) simde_mm_testc_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testc_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testc_ps(a, b); #else uint_fast32_t r = 0; simde__m256_private a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { r |= ~a_.u32[i] & b_.u32[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testc_ps #define _mm256_testc_ps(a, b) simde_mm256_testc_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testc_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testc_pd(a, b); #else uint_fast64_t r = 0; simde__m256d_private a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { r |= ~a_.u64[i] & b_.u64[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testc_pd #define _mm256_testc_pd(a, b) simde_mm256_testc_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testc_si256 (simde__m256i a, simde__m256i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testc_si256(a, b); #else int_fast32_t r = 0; simde__m256i_private a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) { r |= ~a_.i32f[i] & b_.i32f[i]; } return HEDLEY_STATIC_CAST(int, !r); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testc_si256 #define _mm256_testc_si256(a, b) simde_mm256_testc_si256(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testz_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testz_ps(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u32x4_shr(wasm_v128_not(wasm_v128_and(a_.wasm_v128, b_.wasm_v128)), 31); m = wasm_v128_and(m, simde_mm_movehl_ps(m, m)); m = wasm_v128_and(m, simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(m, 0); #else uint_fast32_t r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { r |= a_.u32[i] & b_.u32[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testz_ps #define _mm_testz_ps(a, b) simde_mm_testz_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testz_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testz_pd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u64x2_shr(wasm_v128_not(wasm_v128_and(a_.wasm_v128, b_.wasm_v128)), 63); return HEDLEY_STATIC_CAST(int, wasm_i64x2_extract_lane(m, 0) & wasm_i64x2_extract_lane(m, 1)); #else uint_fast64_t r = 0; SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { r |= a_.u64[i] & b_.u64[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testz_pd #define _mm_testz_pd(a, b) simde_mm_testz_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testz_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testz_ps(a, b); #else uint_fast32_t r = 0; simde__m256_private a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { r |= a_.u32[i] & b_.u32[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 31) & 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testz_ps #define _mm256_testz_ps(a, b) simde_mm256_testz_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testz_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testz_pd(a, b); #else uint_fast64_t r = 0; simde__m256d_private a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { r |= a_.u64[i] & b_.u64[i]; } return HEDLEY_STATIC_CAST(int, ((~r >> 63) & 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testz_pd #define _mm256_testz_pd(a, b) simde_mm256_testz_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testz_si256 (simde__m256i a, simde__m256i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testz_si256(a, b); #else int_fast32_t r = 0; simde__m256i_private a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); #if SIMDE_NATURAL_VECTOR_SIZE_LE(128) r = simde_mm_testz_si128(a_.m128i[0], b_.m128i[0]) && simde_mm_testz_si128(a_.m128i[1], b_.m128i[1]); #else SIMDE_VECTORIZE_REDUCTION(|:r) for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) { r |= a_.i32f[i] & b_.i32f[i]; } r = !r; #endif return HEDLEY_STATIC_CAST(int, r); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testz_si256 #define _mm256_testz_si256(a, b) simde_mm256_testz_si256(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testnzc_ps (simde__m128 a, simde__m128 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testnzc_ps(a, b); #else simde__m128_private a_ = simde__m128_to_private(a), b_ = simde__m128_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u32x4_shr(wasm_v128_and(a_.wasm_v128, b_.wasm_v128), 31); v128_t m2 = wasm_u32x4_shr(wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128), 31); m = wasm_v128_or(m, simde_mm_movehl_ps(m, m)); m2 = wasm_v128_or(m2, simde_mm_movehl_ps(m2, m2)); m = wasm_v128_or(m, simde_mm_shuffle_epi32(m, SIMDE_MM_SHUFFLE(3, 2, 0, 1))); m2 = wasm_v128_or(m2, simde_mm_shuffle_epi32(m2, SIMDE_MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(m, 0) & wasm_i32x4_extract_lane(m2, 0); #else uint32_t rz = 0, rc = 0; for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { rc |= ~a_.u32[i] & b_.u32[i]; rz |= a_.u32[i] & b_.u32[i]; } return (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) & (rz >> ((sizeof(rz) * CHAR_BIT) - 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testnzc_ps #define _mm_testnzc_ps(a, b) simde_mm_testnzc_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm_testnzc_pd (simde__m128d a, simde__m128d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm_testnzc_pd(a, b); #else simde__m128d_private a_ = simde__m128d_to_private(a), b_ = simde__m128d_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t m = wasm_u64x2_shr(wasm_v128_and(a_.wasm_v128, b_.wasm_v128), 63); v128_t m2 = wasm_u64x2_shr(wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128), 63); return HEDLEY_STATIC_CAST(int, (wasm_i64x2_extract_lane(m, 0) | wasm_i64x2_extract_lane(m, 1)) & (wasm_i64x2_extract_lane(m2, 0) | wasm_i64x2_extract_lane(m2, 1))); #else uint64_t rc = 0, rz = 0; for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { rc |= ~a_.u64[i] & b_.u64[i]; rz |= a_.u64[i] & b_.u64[i]; } return (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) & (rz >> ((sizeof(rz) * CHAR_BIT) - 1)); #endif #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm_testnzc_pd #define _mm_testnzc_pd(a, b) simde_mm_testnzc_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testnzc_ps (simde__m256 a, simde__m256 b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testnzc_ps(a, b); #else uint32_t rc = 0, rz = 0; simde__m256_private a_ = simde__m256_to_private(a), b_ = simde__m256_to_private(b); for (size_t i = 0 ; i < (sizeof(a_.u32) / sizeof(a_.u32[0])) ; i++) { rc |= ~a_.u32[i] & b_.u32[i]; rz |= a_.u32[i] & b_.u32[i]; } return (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) & (rz >> ((sizeof(rz) * CHAR_BIT) - 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testnzc_ps #define _mm256_testnzc_ps(a, b) simde_mm256_testnzc_ps(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testnzc_pd (simde__m256d a, simde__m256d b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testnzc_pd(a, b); #else uint64_t rc = 0, rz = 0; simde__m256d_private a_ = simde__m256d_to_private(a), b_ = simde__m256d_to_private(b); for (size_t i = 0 ; i < (sizeof(a_.u64) / sizeof(a_.u64[0])) ; i++) { rc |= ~a_.u64[i] & b_.u64[i]; rz |= a_.u64[i] & b_.u64[i]; } return (rc >> ((sizeof(rc) * CHAR_BIT) - 1)) & (rz >> ((sizeof(rz) * CHAR_BIT) - 1)); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testnzc_pd #define _mm256_testnzc_pd(a, b) simde_mm256_testnzc_pd(a, b) #endif SIMDE_FUNCTION_ATTRIBUTES int simde_mm256_testnzc_si256 (simde__m256i a, simde__m256i b) { #if defined(SIMDE_X86_AVX_NATIVE) return _mm256_testnzc_si256(a, b); #else int32_t rc = 0, rz = 0; simde__m256i_private a_ = simde__m256i_to_private(a), b_ = simde__m256i_to_private(b); for (size_t i = 0 ; i < (sizeof(a_.i32f) / sizeof(a_.i32f[0])) ; i++) { rc |= ~a_.i32f[i] & b_.i32f[i]; rz |= a_.i32f[i] & b_.i32f[i]; } return !!(rc & rz); #endif } #if defined(SIMDE_X86_AVX_ENABLE_NATIVE_ALIASES) #undef _mm256_testnzc_si256 #define _mm256_testnzc_si256(a, b) simde_mm256_testnzc_si256(a, b) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_X86_AVX_H) */ /* :: End simde/simde/x86/avx.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int8_t simde_vqrshlb_s8(int8_t a, int8_t b) { int8_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqrshlb_s8(a, b); #else if (b < -8) { r = 0; } else if (b < 0) { r = HEDLEY_STATIC_CAST(int8_t, a <= 0 ? ((a + (1 << (-b - 1))) >> -b) : HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t, (a + (1 << (-b - 1)))) >> -b) & 0x7FUL))); } else if (b == 0) { r = a; } else if (b < 7) { r = HEDLEY_STATIC_CAST(int8_t, a << b); if ((r >> b) != a) { r = (a < 0) ? INT8_MIN : INT8_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT8_MIN : INT8_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshlb_s8 #define vqrshlb_s8(a, b) simde_vqrshlb_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_vqrshlh_s16(int16_t a, int16_t b) { int16_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqrshlh_s16(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 <= -16) { r = 0; } else if (b8 < 0) { r = HEDLEY_STATIC_CAST(int16_t, a <= 0 ? ((a + (1 << (-b8 - 1))) >> -b8) : HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t, (a + (1 << (-b8 - 1)))) >> -b8) & 0x7FFFUL))); } else if (b8 == 0) { r = a; } else if (b8 < 15) { r = HEDLEY_STATIC_CAST(int16_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT16_MIN : INT16_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT16_MIN : INT16_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshlh_s16 #define vqrshlh_s16(a, b) simde_vqrshlh_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_vqrshls_s32(int32_t a, int32_t b) { int32_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqrshls_s32(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 <= -32) { r = 0; } else if (b8 < 0) { r = a <= 0 ? ((a + (1 << (-b8 - 1))) >> -b8) : HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t, (a + (1 << (-b8 - 1)))) >> -b8) & 0x7FFFFFFFUL)); } else if (b8 == 0) { r = a; } else if (b8 < 31) { r = HEDLEY_STATIC_CAST(int32_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT32_MIN : INT32_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT32_MIN : INT32_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshls_s32 #define vqrshls_s32(a, b) simde_vqrshls_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vqrshld_s64(int64_t a, int64_t b) { int64_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqrshld_s64(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 <= -64) { r = 0; } else if (b8 < 0) { r = a <= 0 ? ((a + (INT64_C(1) << (-b8 - 1))) >> -b8) : HEDLEY_STATIC_CAST(int64_t, ((HEDLEY_STATIC_CAST(uint64_t, (a + (INT64_C(1) << (-b8 - 1)))) >> -b8) & 0x7FFFFFFFFFFFFFFFUL)); } else if (b8 == 0) { r = a; } else if (b8 < 63) { r = HEDLEY_STATIC_CAST(int64_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT64_MIN : INT64_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT64_MIN : INT64_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshld_s64 #define vqrshld_s64(a, b) simde_vqrshld_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vqrshlb_u8(uint8_t a, int8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqrshlb_u8(a, HEDLEY_STATIC_CAST(uint8_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") /* https://github.com/llvm/llvm-project/commit/f0a78bdfdc6d56b25e0081884580b3960a3c2429 */ HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqrshlb_u8(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqrshlb_u8(a, b); #endif #else uint8_t r; if (b < -8) { r = 0; } else if (b < 0) { r = (a >> -b) + ((a >> (-b - 1)) & 1); } else if (b == 0) { r = a; } else if (b < 7) { r = HEDLEY_STATIC_CAST(uint8_t, a << b); if ((r >> b) != a) { r = UINT8_MAX; } } else if (a == 0) { r = 0; } else { r = UINT8_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshlb_u8 #define vqrshlb_u8(a, b) simde_vqrshlb_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vqrshlh_u16(uint16_t a, int16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqrshlh_u16(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqrshlh_u16(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqrshlh_u16(a, b); #endif #else b = HEDLEY_STATIC_CAST(int8_t, b); uint16_t r; if (b < -16) { r = 0; } else if (b < 0) { r = (a >> -b) + ((a >> (-b - 1)) & 1); } else if (b == 0) { r = a; } else if (b < 15) { r = HEDLEY_STATIC_CAST(uint16_t, a << b); if ((r >> b) != a) { r = UINT16_MAX; } } else if (a == 0) { r = 0; } else { r = UINT16_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshlh_u16 #define vqrshlh_u16(a, b) simde_vqrshlh_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vqrshls_u32(uint32_t a, int32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqrshls_u32(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqrshls_u32(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqrshls_u32(a, b); #endif #else b = HEDLEY_STATIC_CAST(int8_t, b); uint32_t r; if (b < -32) { r = 0; } else if (b < 0) { r = (a >> -b) + ((a >> (-b - 1)) & 1); } else if (b == 0) { r = a; } else if (b < 31) { r = HEDLEY_STATIC_CAST(uint32_t, a << b); if ((r >> b) != a) { r = UINT32_MAX; } } else if (a == 0) { r = 0; } else { r = UINT32_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshls_u32 #define vqrshls_u32(a, b) simde_vqrshls_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vqrshld_u64(uint64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqrshld_u64(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqrshld_u64(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqrshld_u64(a, b); #endif #else b = HEDLEY_STATIC_CAST(int8_t, b); uint64_t r; if (b < -64) { r = 0; } else if (b < 0) { r = (a >> -b) + ((a >> (-b - 1)) & 1); } else if (b == 0) { r = a; } else if (b < 63) { r = HEDLEY_STATIC_CAST(uint64_t, a << b); if ((r >> b) != a) { r = UINT64_MAX; } } else if (a == 0) { r = 0; } else { r = UINT64_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshld_u64 #define vqrshld_u64(a, b) simde_vqrshld_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqrshl_s8 (const simde_int8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlb_s8(a_.values[i], b_.values[i]); } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_s8 #define vqrshl_s8(a, b) simde_vqrshl_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vqrshl_s16 (const simde_int16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlh_s16(a_.values[i], b_.values[i]); } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_s16 #define vqrshl_s16(a, b) simde_vqrshl_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vqrshl_s32 (const simde_int32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshls_s32(a_.values[i], b_.values[i]); } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_s32 #define vqrshl_s32(a, b) simde_vqrshl_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vqrshl_s64 (const simde_int64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_s64(a, b); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a), b_ = simde_int64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshld_s64(a_.values[i], b_.values[i]); } return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_s64 #define vqrshl_s64(a, b) simde_vqrshl_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqrshl_u8 (const simde_uint8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlb_u8(a_.values[i], b_.values[i]); } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_u8 #define vqrshl_u8(a, b) simde_vqrshl_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vqrshl_u16 (const simde_uint16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlh_u16(a_.values[i], b_.values[i]); } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_u16 #define vqrshl_u16(a, b) simde_vqrshl_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vqrshl_u32 (const simde_uint32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshls_u32(a_.values[i], b_.values[i]); } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_u32 #define vqrshl_u32(a, b) simde_vqrshl_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vqrshl_u64 (const simde_uint64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshl_u64(a, b); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); simde_int64x1_private b_ = simde_int64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshld_u64(a_.values[i], b_.values[i]); } return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshl_u64 #define vqrshl_u64(a, b) simde_vqrshl_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqrshlq_s8 (const simde_int8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlb_s8(a_.values[i], b_.values[i]); } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_s8 #define vqrshlq_s8(a, b) simde_vqrshlq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqrshlq_s16 (const simde_int16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlh_s16(a_.values[i], b_.values[i]); } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_s16 #define vqrshlq_s16(a, b) simde_vqrshlq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqrshlq_s32 (const simde_int32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshls_s32(a_.values[i], b_.values[i]); } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_s32 #define vqrshlq_s32(a, b) simde_vqrshlq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vqrshlq_s64 (const simde_int64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshld_s64(a_.values[i], b_.values[i]); } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_s64 #define vqrshlq_s64(a, b) simde_vqrshlq_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqrshlq_u8 (const simde_uint8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlb_u8(a_.values[i], b_.values[i]); } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_u8 #define vqrshlq_u8(a, b) simde_vqrshlq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqrshlq_u16 (const simde_uint16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshlh_u16(a_.values[i], b_.values[i]); } return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_u16 #define vqrshlq_u16(a, b) simde_vqrshlq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqrshlq_u32 (const simde_uint32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshls_u32(a_.values[i], b_.values[i]); } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_u32 #define vqrshlq_u32(a, b) simde_vqrshlq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vqrshlq_u64 (const simde_uint64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqrshlq_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); simde_int64x2_private b_ = simde_int64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqrshld_u64(a_.values[i], b_.values[i]); } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshlq_u64 #define vqrshlq_u64(a, b) simde_vqrshlq_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QRSHL_H) */ /* :: End simde/simde/arm/neon/qrshl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qrshrn_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QRSHRN_HIGH_N_H) #define SIMDE_ARM_NEON_QRSHRN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqrshrn_high_n_s16(simde_int8x8_t r, simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int16_t tmp = HEDLEY_STATIC_CAST(int16_t, (a_.values[i] + (1 << (n - 1))) >> n); if (tmp > INT8_MAX) tmp = INT8_MAX; else if (tmp < INT8_MIN) tmp = INT8_MIN; r_.values[i] = HEDLEY_STATIC_CAST(int8_t, tmp); } return simde_vcombine_s8(r, simde_vqmovn_s16(simde_int16x8_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_s16(r, a, n) vqrshrn_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_s16 #define vqrshrn_high_n_s16(r, a, n) simde_vqrshrn_high_n_s16((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqrshrn_high_n_s32(simde_int16x4_t r, simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int32_t tmp = (a_.values[i] >> ((n == 32) ? 31 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << (n - 1))) != 0); if (tmp > INT16_MAX) tmp = INT16_MAX; else if (tmp < INT16_MIN) tmp = INT16_MIN; r_.values[i] = HEDLEY_STATIC_CAST(int16_t, tmp); } return simde_vcombine_s16(r, simde_vqmovn_s32(simde_int32x4_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_s32(r, a, n) vqrshrn_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_s32 #define vqrshrn_high_n_s32(r, a, n) simde_vqrshrn_high_n_s32((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqrshrn_high_n_s64(simde_int32x2_t r, simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int64x2_private r_, a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int64_t tmp = (a_.values[i] >> ((n == 64) ? 63 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << (n - 1))) != 0); if (tmp > INT32_MAX) tmp = INT32_MAX; else if (tmp < INT32_MIN) tmp = INT32_MIN; r_.values[i] = HEDLEY_STATIC_CAST(int32_t, tmp); } return simde_vcombine_s32(r, simde_vqmovn_s64(simde_int64x2_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_s64(r, a, n) vqrshrn_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_s64 #define vqrshrn_high_n_s64(r, a, n) simde_vqrshrn_high_n_s64((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqrshrn_high_n_u16(simde_uint8x8_t r, simde_uint16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { uint16_t tmp = HEDLEY_STATIC_CAST(uint16_t, (a_.values[i] + (1 << (n - 1))) >> n); if (tmp > UINT8_MAX) tmp = UINT8_MAX; r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, tmp); } return simde_vcombine_u8(r, simde_vqmovn_u16(simde_uint16x8_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_u16(r, a, n) vqrshrn_high_n_u16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_u16 #define vqrshrn_high_n_u16(r, a, n) simde_vqrshrn_high_n_u16((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqrshrn_high_n_u32(simde_uint16x4_t r, simde_uint32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { uint32_t tmp = (a_.values[i] >> ((n == 32) ? 31 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(uint32_t, UINT32_C(1) << (n - 1))) != 0); if (tmp > UINT16_MAX) tmp = UINT16_MAX; r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, tmp); } return simde_vcombine_u16(r, simde_vqmovn_u32(simde_uint32x4_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_u32(r, a, n) vqrshrn_high_n_u32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_u32 #define vqrshrn_high_n_u32(r, a, n) simde_vqrshrn_high_n_u32((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqrshrn_high_n_u64(simde_uint32x2_t r, simde_uint64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { uint64_t tmp = (a_.values[i] >> ((n == 64) ? 63 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(uint64_t, UINT64_C(1) << (n - 1))) != 0); if (tmp > UINT32_MAX) tmp = UINT32_MAX; r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, tmp); } return simde_vcombine_u32(r, simde_vqmovn_u64(simde_uint64x2_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrn_high_n_u64(r, a, n) vqrshrn_high_n_u64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrn_high_n_u64 #define vqrshrn_high_n_u64(r, a, n) simde_vqrshrn_high_n_u64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSHRN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/qrshrn_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qrshrn_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QRSHRN_N_H) #define SIMDE_ARM_NEON_QRSHRN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rshr_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSHR_N_H) #define SIMDE_ARM_NEON_RSHR_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/tst.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TST_H) #define SIMDE_ARM_NEON_TST_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vtstd_s64(int64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(uint64_t, vtstd_s64(a, b)); #else return ((a & b) != 0) ? UINT64_MAX : 0; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtstd_s64 #define vtstd_s64(a, b) simde_vtstd_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vtstd_u64(uint64_t a, uint64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(uint64_t, vtstd_u64(a, b)); #else return ((a & b) != 0) ? UINT64_MAX : 0; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtstd_u64 #define vtstd_u64(a, b) simde_vtstd_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vtstq_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_s8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u8(simde_vceqzq_s8(simde_vandq_s8(a, b))); #else simde_int8x16_private a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); simde_uint8x16_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i8x16_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_s8 #define vtstq_s8(a, b) simde_vtstq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vtstq_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_s16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u16(simde_vceqzq_s16(simde_vandq_s16(a, b))); #else simde_int16x8_private a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); simde_uint16x8_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i16x8_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT16_MAX : 0; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_s16 #define vtstq_s16(a, b) simde_vtstq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vtstq_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_s32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u32(simde_vceqzq_s32(simde_vandq_s32(a, b))); #else simde_int32x4_private a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); simde_uint32x4_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i32x4_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT32_MAX : 0; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_s32 #define vtstq_s32(a, b) simde_vtstq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vtstq_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtstq_s64(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vceqzq_u64(simde_vceqzq_s64(simde_vandq_s64(a, b))); #else simde_int64x2_private a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); simde_uint64x2_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vtstd_s64(a_.values[i], b_.values[i]); } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtstq_s64 #define vtstq_s64(a, b) simde_vtstq_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vtstq_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_u8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u8(simde_vceqzq_u8(simde_vandq_u8(a, b))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i8x16_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_u8 #define vtstq_u8(a, b) simde_vtstq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vtstq_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_u16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u16(simde_vceqzq_u16(simde_vandq_u16(a, b))); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i16x8_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT16_MAX : 0; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_u16 #define vtstq_u16(a, b) simde_vtstq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vtstq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_u32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvnq_u32(simde_vceqzq_u32(simde_vandq_u32(a, b))); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_ne(wasm_v128_and(a_.v128, b_.v128), wasm_i32x4_splat(0)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT32_MAX : 0; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_u32 #define vtstq_u32(a, b) simde_vtstq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vtstq_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtstq_u64(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vceqzq_u64(simde_vceqzq_u64(simde_vandq_u64(a, b))); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vtstd_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtstq_u64 #define vtstq_u64(a, b) simde_vtstq_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtst_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_s8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u8(simde_vceqz_s8(simde_vand_s8(a, b))); #else simde_int8x8_private a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); simde_uint8x8_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_s8 #define vtst_s8(a, b) simde_vtst_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vtst_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_s16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u16(simde_vceqz_s16(simde_vand_s16(a, b))); #else simde_int16x4_private a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); simde_uint16x4_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT16_MAX : 0; } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_s16 #define vtst_s16(a, b) simde_vtst_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vtst_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_s32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u32(simde_vceqz_s32(simde_vand_s32(a, b))); #else simde_int32x2_private a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); simde_uint32x2_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT32_MAX : 0; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_s32 #define vtst_s32(a, b) simde_vtst_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vtst_s64(simde_int64x1_t a, simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtst_s64(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vceqz_u64(simde_vceqz_s64(simde_vand_s64(a, b))); #else simde_int64x1_private a_ = simde_int64x1_to_private(a), b_ = simde_int64x1_to_private(b); simde_uint64x1_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vtstd_s64(a_.values[i], b_.values[i]); } #endif return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtst_s64 #define vtst_s64(a, b) simde_vtst_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtst_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_u8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u8(simde_vceqz_u8(simde_vand_u8(a, b))); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_u8 #define vtst_u8(a, b) simde_vtst_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vtst_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_u16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u16(simde_vceqz_u16(simde_vand_u16(a, b))); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT16_MAX : 0; } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_u16 #define vtst_u16(a, b) simde_vtst_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vtst_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_u32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmvn_u32(simde_vceqz_u32(simde_vand_u32(a, b))); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT32_MAX : 0; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_u32 #define vtst_u32(a, b) simde_vtst_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vtst_u64(simde_uint64x1_t a, simde_uint64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtst_u64(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vceqz_u64(simde_vceqz_u64(simde_vand_u64(a, b))); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a), b_ = simde_uint64x1_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values & b_.values) != 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vtstd_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtst_u64 #define vtst_u64(a, b) simde_vtst_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtst_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtst_p8(a, b); #else simde_poly8x8_private a_ = simde_poly8x8_to_private(a), b_ = simde_poly8x8_to_private(b); simde_uint8x8_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtst_p8 #define vtst_p8(a, b) simde_vtst_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vtst_p64(simde_poly64x1_t a, simde_poly64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtst_p64(a, b); #else simde_poly64x1_private a_ = simde_poly64x1_to_private(a), b_ = simde_poly64x1_to_private(b); simde_uint64x1_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT64_MAX : 0; } return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtst_p64 #define vtst_p64(a, b) simde_vtst_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vtstq_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtstq_p8(a, b); #else simde_poly8x16_private a_ = simde_poly8x16_to_private(a), b_ = simde_poly8x16_to_private(b); simde_uint8x16_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT8_MAX : 0; } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtstq_p8 #define vtstq_p8(a, b) simde_vtstq_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vtstq_p64(simde_poly64x2_t a, simde_poly64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtstq_p64(a, b); #else simde_poly64x2_private a_ = simde_poly64x2_to_private(a), b_ = simde_poly64x2_to_private(b); simde_uint64x2_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] & b_.values[i]) != 0) ? UINT64_MAX : 0; } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtstq_p64 #define vtstq_p64(a, b) simde_vtstq_p64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TST_H) */ /* :: End simde/simde/arm/neon/tst.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int16_t simde_x_vrshrh_n_s16(int16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { return (a >> ((n == 16) ? 15 : n)) + ((a & HEDLEY_STATIC_CAST(int16_t, UINT16_C(1) << (n - 1))) != 0); } SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_x_vrshrh_n_u16(uint16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { return ((n == 16) ? 0 : (a >> n)) + ((a & (UINT32_C(1) << (n - 1))) != 0); } SIMDE_FUNCTION_ATTRIBUTES int32_t simde_x_vrshrs_n_s32(int32_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { return (a >> ((n == 32) ? 31 : n)) + ((a & HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << (n - 1))) != 0); } SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_x_vrshrs_n_u32(uint32_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { return ((n == 32) ? 0 : (a >> n)) + ((a & (UINT32_C(1) << (n - 1))) != 0); } SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vrshrd_n_s64(int64_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { return (a >> ((n == 64) ? 63 : n)) + ((a & HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << (n - 1))) != 0); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrd_n_s64(a, n) vrshrd_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrd_n_s64 #define vrshrd_n_s64(a, n) simde_vrshrd_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vrshrd_n_u64(uint64_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { return ((n == 64) ? 0 : (a >> n)) + ((a & (UINT64_C(1) << (n - 1))) != 0); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrd_n_u64(a, n) vrshrd_n_u64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrd_n_u64 #define vrshrd_n_u64(a, n) simde_vrshrd_n_u64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrshrq_n_s8 (const simde_int8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_int8x16_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_s8(a, n) vrshrq_n_s8((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_s8(a, n) simde_vsubq_s8(simde_vshrq_n_s8((a), (n)), simde_vreinterpretq_s8_u8( \ simde_vtstq_u8(simde_vreinterpretq_u8_s8(a), \ simde_vdupq_n_u8(HEDLEY_STATIC_CAST(uint8_t, 1 << ((n) - 1)))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_s8 #define vrshrq_n_s8(a, n) simde_vrshrq_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vrshrq_n_s16 (const simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_int16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_s16(a, n) vrshrq_n_s16((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_s16(a, n) simde_vsubq_s16(simde_vshrq_n_s16((a), (n)), simde_vreinterpretq_s16_u16( \ simde_vtstq_u16(simde_vreinterpretq_u16_s16(a), \ simde_vdupq_n_u16(HEDLEY_STATIC_CAST(uint16_t, 1 << ((n) - 1)))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_s16 #define vrshrq_n_s16(a, n) simde_vrshrq_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vrshrq_n_s32 (const simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] >> ((n == 32) ? 31 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << (n - 1))) != 0); } return simde_int32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_s32(a, n) vrshrq_n_s32((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_s32(a, n) simde_vsubq_s32(simde_vshrq_n_s32((a), (n)), \ simde_vreinterpretq_s32_u32(simde_vtstq_u32(simde_vreinterpretq_u32_s32(a), \ simde_vdupq_n_u32(UINT32_C(1) << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_s32 #define vrshrq_n_s32(a, n) simde_vrshrq_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vrshrq_n_s64 (const simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { simde_int64x2_private r_, a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] >> ((n == 64) ? 63 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << (n - 1))) != 0); } return simde_int64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_s64(a, n) vrshrq_n_s64((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_s64(a, n) simde_vsubq_s64(simde_vshrq_n_s64((a), (n)), \ simde_vreinterpretq_s64_u64(simde_vtstq_u64(simde_vreinterpretq_u64_s64(a), \ simde_vdupq_n_u64(UINT64_C(1) << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_s64 #define vrshrq_n_s64(a, n) simde_vrshrq_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrshrq_n_u8 (const simde_uint8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_uint8x16_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_u8(a, n) vrshrq_n_u8((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_u8(a, n) simde_vsubq_u8(simde_vshrq_n_u8((a), (n)), \ simde_vtstq_u8((a), simde_vdupq_n_u8(HEDLEY_STATIC_CAST(uint8_t, 1 << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_u8 #define vrshrq_n_u8(a, n) simde_vrshrq_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vrshrq_n_u16 (const simde_uint16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_uint16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_u16(a, n) vrshrq_n_u16((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_u16(a, n) simde_vsubq_u16(simde_vshrq_n_u16((a), (n)), \ simde_vtstq_u16((a), simde_vdupq_n_u16(HEDLEY_STATIC_CAST(uint16_t, 1 << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_u16 #define vrshrq_n_u16(a, n) simde_vrshrq_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrshrq_n_u32 (const simde_uint32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((n == 32) ? 0 : (a_.values[i] >> n)) + ((a_.values[i] & (UINT32_C(1) << (n - 1))) != 0); } return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_u32(a, n) vrshrq_n_u32((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_u32(a, n) simde_vsubq_u32(simde_vshrq_n_u32((a), (n)), \ simde_vtstq_u32((a), simde_vdupq_n_u32(UINT32_C(1) << ((n) - 1)))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_u32 #define vrshrq_n_u32(a, n) simde_vrshrq_n_u32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vrshrq_n_u64 (const simde_uint64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((n == 64) ? 0 : (a_.values[i] >> n)) + ((a_.values[i] & (UINT64_C(1) << (n - 1))) != 0); } return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrq_n_u64(a, n) vrshrq_n_u64((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshrq_n_u64(a, n) simde_vsubq_u64(simde_vshrq_n_u64((a), (n)), \ simde_vtstq_u64((a), simde_vdupq_n_u64(UINT64_C(1) << ((n) - 1)))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrq_n_u64 #define vrshrq_n_u64(a, n) simde_vrshrq_n_u64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrshr_n_s8 (const simde_int8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_int8x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_s8(a, n) vrshr_n_s8((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_s8(a, n) simde_vsub_s8(simde_vshr_n_s8((a), (n)), simde_vreinterpret_s8_u8( \ simde_vtst_u8(simde_vreinterpret_u8_s8(a), \ simde_vdup_n_u8(HEDLEY_STATIC_CAST(uint8_t, 1 << ((n) - 1)))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_s8 #define vrshr_n_s8(a, n) simde_vrshr_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrshr_n_s16 (const simde_int16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_int16x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_s16(a, n) vrshr_n_s16((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_s16(a, n) simde_vsub_s16(simde_vshr_n_s16((a), (n)), simde_vreinterpret_s16_u16( \ simde_vtst_u16(simde_vreinterpret_u16_s16(a), \ simde_vdup_n_u16(HEDLEY_STATIC_CAST(uint16_t, 1 << ((n) - 1)))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_s16 #define vrshr_n_s16(a, n) simde_vrshr_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vrshr_n_s32 (const simde_int32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int32x2_private r_, a_ = simde_int32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] >> ((n == 32) ? 31 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << (n - 1))) != 0); } return simde_int32x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_s32(a, n) vrshr_n_s32((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_s32(a, n) simde_vsub_s32(simde_vshr_n_s32((a), (n)), \ simde_vreinterpret_s32_u32(simde_vtst_u32(simde_vreinterpret_u32_s32(a), \ simde_vdup_n_u32(UINT32_C(1) << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_s32 #define vrshr_n_s32(a, n) simde_vrshr_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vrshr_n_s64 (const simde_int64x1_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { simde_int64x1_private r_, a_ = simde_int64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] >> ((n == 64) ? 63 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << (n - 1))) != 0); } return simde_int64x1_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_s64(a, n) vrshr_n_s64((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_s64(a, n) simde_vsub_s64(simde_vshr_n_s64((a), (n)), \ simde_vreinterpret_s64_u64(simde_vtst_u64(simde_vreinterpret_u64_s64(a), \ simde_vdup_n_u64(UINT64_C(1) << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_s64 #define vrshr_n_s64(a, n) simde_vrshr_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrshr_n_u8 (const simde_uint8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_uint8x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_u8(a, n) vrshr_n_u8((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_u8(a, n) simde_vsub_u8(simde_vshr_n_u8((a), (n)), \ simde_vtst_u8((a), simde_vdup_n_u8(HEDLEY_STATIC_CAST(uint8_t, 1 << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_u8 #define vrshr_n_u8(a, n) simde_vrshr_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrshr_n_u16 (const simde_uint16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (a_.values[i] + (1 << (n - 1))) >> n); } return simde_uint16x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_u16(a, n) vrshr_n_u16((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_u16(a, n) simde_vsub_u16(simde_vshr_n_u16((a), (n)), \ simde_vtst_u16((a), simde_vdup_n_u16(HEDLEY_STATIC_CAST(uint16_t, 1 << ((n) - 1))))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_u16 #define vrshr_n_u16(a, n) simde_vrshr_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrshr_n_u32 (const simde_uint32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((n == 32) ? 0 : (a_.values[i] >> n)) + ((a_.values[i] & (UINT32_C(1) << (n - 1))) != 0); } return simde_uint32x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_u32(a, n) vrshr_n_u32((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_u32(a, n) simde_vsub_u32(simde_vshr_n_u32((a), (n)), \ simde_vtst_u32((a), simde_vdup_n_u32(UINT32_C(1) << ((n) - 1)))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_u32 #define vrshr_n_u32(a, n) simde_vrshr_n_u32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vrshr_n_u64 (const simde_uint64x1_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) { simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((n == 64) ? 0 : (a_.values[i] >> n)) + ((a_.values[i] & (UINT64_C(1) << (n - 1))) != 0); } return simde_uint64x1_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshr_n_u64(a, n) vrshr_n_u64((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vrshr_n_u64(a, n) simde_vsub_u64(simde_vshr_n_u64((a), (n)), \ simde_vtst_u64((a), simde_vdup_n_u64(UINT64_C(1) << ((n) - 1)))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshr_n_u64 #define vrshr_n_u64(a, n) simde_vrshr_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSHR_N_H) */ /* :: End simde/simde/arm/neon/rshr_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrnh_n_s16(a, n) vqrshrnh_n_s16(a, n) #else #define simde_vqrshrnh_n_s16(a, n) simde_vqmovnh_s16(simde_x_vrshrh_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrnh_n_s16 #define vqrshrnh_n_s16(a, n) simde_vqrshrnh_n_s16(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrnh_n_u16(a, n) vqrshrnh_n_u16(a, n) #else #define simde_vqrshrnh_n_u16(a, n) simde_vqmovnh_u16(simde_x_vrshrh_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrnh_n_u16 #define vqrshrnh_n_u16(a, n) simde_vqrshrnh_n_u16(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrns_n_s32(a, n) vqrshrns_n_s32(a, n) #else #define simde_vqrshrns_n_s32(a, n) simde_vqmovns_s32(simde_x_vrshrs_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrns_n_s32 #define vqrshrns_n_s32(a, n) simde_vqrshrns_n_s32(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrns_n_u32(a, n) vqrshrns_n_u32(a, n) #else #define simde_vqrshrns_n_u32(a, n) simde_vqmovns_u32(simde_x_vrshrs_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrns_n_u32 #define vqrshrns_n_u32(a, n) simde_vqrshrns_n_u32(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrnd_n_s64(a, n) vqrshrnd_n_s64(a, n) #else #define simde_vqrshrnd_n_s64(a, n) simde_vqmovnd_s64(simde_vrshrd_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrnd_n_s64 #define vqrshrnd_n_s64(a, n) simde_vqrshrnd_n_s64(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqrshrnd_n_u64(a, n) vqrshrnd_n_u64(a, n) #else #define simde_vqrshrnd_n_u64(a, n) simde_vqmovnd_u64(simde_vrshrd_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrnd_n_u64 #define vqrshrnd_n_u64(a, n) simde_vqrshrnd_n_u64(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_s16(a, n) vqrshrn_n_s16((a), (n)) #else #define simde_vqrshrn_n_s16(a, n) simde_vqmovn_s16(simde_vrshrq_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_s16 #define vqrshrn_n_s16(a, n) simde_vqrshrn_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_s32(a, n) vqrshrn_n_s32((a), (n)) #else #define simde_vqrshrn_n_s32(a, n) simde_vqmovn_s32(simde_vrshrq_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_s32 #define vqrshrn_n_s32(a, n) simde_vqrshrn_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_s64(a, n) vqrshrn_n_s64((a), (n)) #else #define simde_vqrshrn_n_s64(a, n) simde_vqmovn_s64(simde_vrshrq_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_s64 #define vqrshrn_n_s64(a, n) simde_vqrshrn_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_u16(a, n) vqrshrn_n_u16((a), (n)) #else #define simde_vqrshrn_n_u16(a, n) simde_vqmovn_u16(simde_vrshrq_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_u16 #define vqrshrn_n_u16(a, n) simde_vqrshrn_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_u32(a, n) vqrshrn_n_u32((a), (n)) #else #define simde_vqrshrn_n_u32(a, n) simde_vqmovn_u32(simde_vrshrq_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_u32 #define vqrshrn_n_u32(a, n) simde_vqrshrn_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrn_n_u64(a, n) vqrshrn_n_u64((a), (n)) #else #define simde_vqrshrn_n_u64(a, n) simde_vqmovn_u64(simde_vrshrq_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrn_n_u64 #define vqrshrn_n_u64(a, n) simde_vqrshrn_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QRSHRN_N_H) */ /* :: End simde/simde/arm/neon/qrshrn_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qrshrun_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QRSHRUN_HIGH_N_H) #define SIMDE_ARM_NEON_QRSHRUN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqrshrun_high_n_s16(simde_uint8x8_t r, simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int16x8_private a_ = simde_int16x8_to_private(a); simde_uint16x8_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int16_t tmp = HEDLEY_STATIC_CAST(int16_t, (a_.values[i] + (1 << (n - 1))) >> n); if (tmp > UINT8_MAX) tmp = UINT8_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, tmp); } return simde_vcombine_u8(r, simde_vqmovn_u16(simde_uint16x8_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(__clang__) #define simde_vqrshrun_high_n_s16(r, a, n) vqrshrun_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrun_high_n_s16 #define vqrshrun_high_n_s16(r, a, n) simde_vqrshrun_high_n_s16((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqrshrun_high_n_s32(simde_uint16x4_t r, simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int32x4_private a_ = simde_int32x4_to_private(a); simde_uint32x4_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int32_t tmp = (a_.values[i] >> ((n == 32) ? 31 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << (n - 1))) != 0); if (tmp > UINT16_MAX) tmp = UINT16_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, tmp); } return simde_vcombine_u16(r, simde_vqmovn_u32(simde_uint32x4_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(__clang__) #define simde_vqrshrun_high_n_s32(r, a, n) vqrshrun_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrun_high_n_s32 #define vqrshrun_high_n_s32(r, a, n) simde_vqrshrun_high_n_s32((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqrshrun_high_n_s64(simde_uint32x2_t r, simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int64x2_private a_ = simde_int64x2_to_private(a); simde_uint64x2_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int64_t tmp = (a_.values[i] >> ((n == 64) ? 63 : n)) + ((a_.values[i] & HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << (n - 1))) != 0); if (tmp > UINT32_MAX) tmp = UINT32_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, tmp); } return simde_vcombine_u32(r, simde_vqmovn_u64(simde_uint64x2_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(__clang__) #define simde_vqrshrun_high_n_s64(r, a, n) vqrshrun_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrun_high_n_s64 #define vqrshrun_high_n_s64(r, a, n) simde_vqrshrun_high_n_s64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QRSHRUN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/qrshrun_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qrshrun_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QRSHRUN_N_H) #define SIMDE_ARM_NEON_QRSHRUN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qmovun.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) */ #if !defined(SIMDE_ARM_NEON_QMOVUN_H) #define SIMDE_ARM_NEON_QMOVUN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vqmovunh_s16(int16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(uint8_t, vqmovunh_s16(a)); #else return (a > UINT8_MAX) ? UINT8_MAX : ((a < 0) ? 0 : HEDLEY_STATIC_CAST(uint8_t, a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovunh_s16 #define vqmovunh_s16(a) simde_vqmovunh_s16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vqmovuns_s32(int32_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(uint16_t, vqmovuns_s32(a)); #else return (a > UINT16_MAX) ? UINT16_MAX : ((a < 0) ? 0 : HEDLEY_STATIC_CAST(uint16_t, a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovuns_s32 #define vqmovuns_s32(a) simde_vqmovuns_s32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vqmovund_s64(int64_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return HEDLEY_STATIC_CAST(uint32_t, vqmovund_s64(a)); #else return (a > UINT32_MAX) ? UINT32_MAX : ((a < 0) ? 0 : HEDLEY_STATIC_CAST(uint32_t, a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovund_s64 #define vqmovund_s64(a) simde_vqmovund_s64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqmovun_s16(simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqmovun_s16(a); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmovn_u16(simde_vreinterpretq_u16_s16(simde_vmaxq_s16(simde_vdupq_n_s16(0), simde_vminq_s16(simde_vdupq_n_s16(UINT8_MAX), a)))); #else simde_uint8x8_private r_; simde_int16x8_private a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqmovunh_s16(a_.values[i]); } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqmovun_s16 #define vqmovun_s16(a) simde_vqmovun_s16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vqmovun_s32(simde_int32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqmovun_s32(a); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmovn_u32(simde_vreinterpretq_u32_s32(simde_vmaxq_s32(simde_vdupq_n_s32(0), simde_vminq_s32(simde_vdupq_n_s32(UINT16_MAX), a)))); #else simde_uint16x4_private r_; simde_int32x4_private a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqmovuns_s32(a_.values[i]); } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqmovun_s32 #define vqmovun_s32(a) simde_vqmovun_s32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vqmovun_s64(simde_int64x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqmovun_s64(a); #elif SIMDE_NATURAL_VECTOR_SIZE > 0 return simde_vmovn_u64(simde_vreinterpretq_u64_s64(simde_x_vmaxq_s64(simde_vdupq_n_s64(0), simde_x_vminq_s64(simde_vdupq_n_s64(UINT32_MAX), a)))); #else simde_uint32x2_private r_; simde_int64x2_private a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqmovund_s64(a_.values[i]); } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqmovun_s64 #define vqmovun_s64(a) simde_vqmovun_s64((a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QMOVUN_H) */ /* :: End simde/simde/arm/neon/qmovun.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_71751) #define simde_vqrshruns_n_s32(a, n) HEDLEY_STATIC_CAST(uint16_t, vqrshruns_n_s32((a), (n))) #else #define simde_vqrshruns_n_s32(a, n) vqrshruns_n_s32((a), (n)) #endif #else #define simde_vqrshruns_n_s32(a, n) simde_vqmovuns_s32(simde_x_vrshrs_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshruns_n_s32 #define vqrshruns_n_s32(a, n) simde_vqrshruns_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_71751) #define simde_vqrshrund_n_s64(a, n) HEDLEY_STATIC_CAST(uint32_t, vqrshrund_n_s64((a), (n))) #else #define simde_vqrshrund_n_s64(a, n) vqrshrund_n_s64((a), (n)) #endif #else #define simde_vqrshrund_n_s64(a, n) simde_vqmovund_s64(simde_vrshrd_n_s64((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrund_n_s64 #define vqrshrund_n_s64(a, n) simde_vqrshrund_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_71751) #define simde_vqrshrunh_n_s16(a, n) HEDLEY_STATIC_CAST(uint8_t, vqrshrunh_n_s16((a), (n))) #else #define simde_vqrshrunh_n_s16(a, n) vqrshrunh_n_s16((a), (n)) #endif #else #define simde_vqrshrunh_n_s16(a, n) simde_vqmovunh_s16(simde_x_vrshrh_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqrshrunh_n_s16 #define vqrshrunh_n_s16(a, n) simde_vqrshrunh_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrun_n_s16(a, n) vqrshrun_n_s16((a), (n)) #else #define simde_vqrshrun_n_s16(a, n) simde_vqmovun_s16(simde_vrshrq_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrun_n_s16 #define vqrshrun_n_s16(a, n) simde_vqrshrun_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrun_n_s32(a, n) vqrshrun_n_s32((a), (n)) #else #define simde_vqrshrun_n_s32(a, n) simde_vqmovun_s32(simde_vrshrq_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrun_n_s32 #define vqrshrun_n_s32(a, n) simde_vqrshrun_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqrshrun_n_s64(a, n) vqrshrun_n_s64((a), (n)) #else #define simde_vqrshrun_n_s64(a, n) simde_vqmovun_s64(simde_vrshrq_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqrshrun_n_s64 #define vqrshrun_n_s64(a, n) simde_vqrshrun_n_s64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QRSHRUN_N_H) */ /* :: End simde/simde/arm/neon/qrshrun_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qmovn_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) */ #if !defined(SIMDE_ARM_NEON_QMOVN_HIGH_H) #define SIMDE_ARM_NEON_QMOVN_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqmovn_high_s16(simde_int8x8_t r, simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_s16(r, a); #else return simde_vcombine_s8(r, simde_vqmovn_s16(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_s16 #define vqmovn_high_s16(r, a) simde_vqmovn_high_s16((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqmovn_high_s32(simde_int16x4_t r, simde_int32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_s32(r, a); #else return simde_vcombine_s16(r, simde_vqmovn_s32(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_s32 #define vqmovn_high_s32(r, a) simde_vqmovn_high_s32((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqmovn_high_s64(simde_int32x2_t r, simde_int64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_s64(r, a); #else return simde_vcombine_s32(r, simde_vqmovn_s64(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_s64 #define vqmovn_high_s64(r, a) simde_vqmovn_high_s64((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqmovn_high_u16(simde_uint8x8_t r, simde_uint16x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_u16(r, a); #else return simde_vcombine_u8(r, simde_vqmovn_u16(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_u16 #define vqmovn_high_u16(r, a) simde_vqmovn_high_u16((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqmovn_high_u32(simde_uint16x4_t r, simde_uint32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_u32(r, a); #else return simde_vcombine_u16(r, simde_vqmovn_u32(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_u32 #define vqmovn_high_u32(r, a) simde_vqmovn_high_u32((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqmovn_high_u64(simde_uint32x2_t r, simde_uint64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovn_high_u64(r, a); #else return simde_vcombine_u32(r, simde_vqmovn_u64(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovn_high_u64 #define vqmovn_high_u64(r, a) simde_vqmovn_high_u64((r), (a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QMOVN_HIGH_H) */ /* :: End simde/simde/arm/neon/qmovn_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qmovun_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QMOVUN_HIGH_H) #define SIMDE_ARM_NEON_QMOVUN_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqmovun_high_s16(simde_uint8x8_t r, simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovun_high_s16(r, a); #else return simde_vcombine_u8(r, simde_vqmovun_s16(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovun_high_s16 #define vqmovun_high_s16(r, a) simde_vqmovun_high_s16((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqmovun_high_s32(simde_uint16x4_t r, simde_int32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovun_high_s32(r, a); #else return simde_vcombine_u16(r, simde_vqmovun_s32(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovun_high_s32 #define vqmovun_high_s32(r, a) simde_vqmovun_high_s32((r), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqmovun_high_s64(simde_uint32x2_t r, simde_int64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqmovun_high_s64(r, a); #else return simde_vcombine_u32(r, simde_vqmovun_s64(a)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqmovun_high_s64 #define vqmovun_high_s64(r, a) simde_vqmovun_high_s64((r), (a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QMOVUN_HIGH_H) */ /* :: End simde/simde/arm/neon/qmovun_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qneg.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson */ #if !defined(SIMDE_ARM_NEON_QNEG_H) #define SIMDE_ARM_NEON_QNEG_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #if !defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE) || 1 /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #endif HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int8_t simde_vqnegb_s8(int8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqnegb_s8(a); #else return a == INT8_MIN ? INT8_MAX : -a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqnegb_s8 #define vqnegb_s8(a) simde_vqnegb_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_vqnegh_s16(int16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqnegh_s16(a); #else return a == INT16_MIN ? INT16_MAX : -a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqnegh_s16 #define vqnegh_s16(a) simde_vqnegh_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_vqnegs_s32(int32_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqnegs_s32(a); #else return a == INT32_MIN ? INT32_MAX : -a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqnegs_s32 #define vqnegs_s32(a) simde_vqnegs_s32(a) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vqnegd_s64(int64_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqnegd_s64(a); #else return a == INT64_MIN ? INT64_MAX : -a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqnegd_s64 #define vqnegd_s64(a) simde_vqnegd_s64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqneg_s8(simde_int8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqneg_s8(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(64) return simde_vneg_s8(simde_vmax_s8(a, simde_vdup_n_s8(INT8_MIN + 1))); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT8_MIN) ? INT8_MAX : -(a_.values[i]); } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqneg_s8 #define vqneg_s8(a) simde_vqneg_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vqneg_s16(simde_int16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqneg_s16(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(64) return simde_vneg_s16(simde_vmax_s16(a, simde_vdup_n_s16(INT16_MIN + 1))); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT16_MIN) ? INT16_MAX : -(a_.values[i]); } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqneg_s16 #define vqneg_s16(a) simde_vqneg_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vqneg_s32(simde_int32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqneg_s32(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(64) return simde_vneg_s32(simde_vmax_s32(a, simde_vdup_n_s32(INT32_MIN + 1))); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT32_MIN) ? INT32_MAX : -(a_.values[i]); } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqneg_s32 #define vqneg_s32(a) simde_vqneg_s32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vqneg_s64(simde_int64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqneg_s64(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vneg_s64(simde_x_vmax_s64(a, simde_vdup_n_s64(INT64_MIN + 1))); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT64_MIN) ? INT64_MAX : -(a_.values[i]); } return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqneg_s64 #define vqneg_s64(a) simde_vqneg_s64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqnegq_s8(simde_int8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqnegq_s8(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vnegq_s8(simde_vmaxq_s8(a, simde_vdupq_n_s8(INT8_MIN + 1))); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT8_MIN) ? INT8_MAX : -(a_.values[i]); } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqnegq_s8 #define vqnegq_s8(a) simde_vqnegq_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqnegq_s16(simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqnegq_s16(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vnegq_s16(simde_vmaxq_s16(a, simde_vdupq_n_s16(INT16_MIN + 1))); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT16_MIN) ? INT16_MAX : -(a_.values[i]); } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqnegq_s16 #define vqnegq_s16(a) simde_vqnegq_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqnegq_s32(simde_int32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqnegq_s32(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vnegq_s32(simde_vmaxq_s32(a, simde_vdupq_n_s32(INT32_MIN + 1))); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT32_MIN) ? INT32_MAX : -(a_.values[i]); } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqnegq_s32 #define vqnegq_s32(a) simde_vqnegq_s32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vqnegq_s64(simde_int64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqnegq_s64(a); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vnegq_s64(simde_x_vmaxq_s64(a, simde_vdupq_n_s64(INT64_MIN + 1))); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] == INT64_MIN) ? INT64_MAX : -(a_.values[i]); } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqnegq_s64 #define vqnegq_s64(a) simde_vqnegq_s64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QNEG_H) */ /* :: End simde/simde/arm/neon/qneg.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshl.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHL_H) #define SIMDE_ARM_NEON_QSHL_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int8_t simde_vqshlb_s8(int8_t a, int8_t b) { int8_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqshlb_s8(a, b); #else if (b < -7) b = -7; if (b <= 0) { r = a >> -b; } else if (b < 7) { r = HEDLEY_STATIC_CAST(int8_t, a << b); if ((r >> b) != a) { r = (a < 0) ? INT8_MIN : INT8_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT8_MIN : INT8_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlb_s8 #define vqshlb_s8(a, b) simde_vqshlb_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_vqshlh_s16(int16_t a, int16_t b) { int16_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqshlh_s16(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 < -15) b8 = -15; if (b8 <= 0) { r = a >> -b8; } else if (b8 < 15) { r = HEDLEY_STATIC_CAST(int16_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT16_MIN : INT16_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT16_MIN : INT16_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlh_s16 #define vqshlh_s16(a, b) simde_vqshlh_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_vqshls_s32(int32_t a, int32_t b) { int32_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqshls_s32(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 < -31) b8 = -31; if (b8 <= 0) { r = a >> -b8; } else if (b8 < 31) { r = HEDLEY_STATIC_CAST(int32_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT32_MIN : INT32_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT32_MIN : INT32_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshls_s32 #define vqshls_s32(a, b) simde_vqshls_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vqshld_s64(int64_t a, int64_t b) { int64_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) r = vqshld_s64(a, b); #else int8_t b8 = HEDLEY_STATIC_CAST(int8_t, b); if (b8 < -63) b8 = -63; if (b8 <= 0) { r = a >> -b8; } else if (b8 < 63) { r = HEDLEY_STATIC_CAST(int64_t, a << b8); if ((r >> b8) != a) { r = (a < 0) ? INT64_MIN : INT64_MAX; } } else if (a == 0) { r = 0; } else { r = (a < 0) ? INT64_MIN : INT64_MAX; } #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshld_s64 #define vqshld_s64(a, b) simde_vqshld_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vqshlb_u8(uint8_t a, int8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqshlb_u8(a, HEDLEY_STATIC_CAST(uint8_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") /* https://github.com/llvm/llvm-project/commit/f0a78bdfdc6d56b25e0081884580b3960a3c2429 */ HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqshlb_u8(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqshlb_u8(a, b); #endif #else uint8_t r; if (b < -7) b = -7; if (b <= 0) { r = a >> -b; } else if (b < 7) { r = HEDLEY_STATIC_CAST(uint8_t, a << b); if ((r >> b) != a) { r = UINT8_MAX; } } else if (a == 0) { r = 0; } else { r = UINT8_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlb_u8 #define vqshlb_u8(a, b) simde_vqshlb_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vqshlh_u16(uint16_t a, int16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqshlh_u16(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqshlh_u16(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqshlh_u16(a, b); #endif #else uint16_t r; if (b < -15) b = -15; if (b <= 0) { r = a >> -b; } else if (b < 15) { r = HEDLEY_STATIC_CAST(uint16_t, a << b); if ((r >> b) != a) { r = UINT16_MAX; } } else if (a == 0) { r = 0; } else { r = UINT16_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlh_u16 #define vqshlh_u16(a, b) simde_vqshlh_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vqshls_u32(uint32_t a, int32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqshls_u32(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqshls_u32(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqshls_u32(a, b); #endif #else uint32_t r; if (b < -31) b = -31; if (b <= 0) { r = HEDLEY_STATIC_CAST(uint32_t, a >> -b); } else if (b < 31) { r = a << b; if ((r >> b) != a) { r = UINT32_MAX; } } else if (a == 0) { r = 0; } else { r = UINT32_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshls_u32 #define vqshls_u32(a, b) simde_vqshls_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vqshld_u64(uint64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(HEDLEY_GCC_VERSION) && !HEDLEY_GCC_VERSION_CHECK(11,0,0) return vqshld_u64(a, HEDLEY_STATIC_CAST(uint16_t, b)); #elif HEDLEY_HAS_WARNING("-Wsign-conversion") HEDLEY_DIAGNOSTIC_PUSH #pragma clang diagnostic ignored "-Wsign-conversion" return vqshld_u64(a, b); HEDLEY_DIAGNOSTIC_POP #else return vqshld_u64(a, b); #endif #else uint64_t r; if (b < -63) b = -63; if (b <= 0) { r = a >> -b; } else if (b < 63) { r = HEDLEY_STATIC_CAST(uint64_t, a << b); if ((r >> b) != a) { r = UINT64_MAX; } } else if (a == 0) { r = 0; } else { r = UINT64_MAX; } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshld_u64 #define vqshld_u64(a, b) simde_vqshld_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqshl_s8 (const simde_int8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlb_s8(a_.values[i], b_.values[i]); } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_s8 #define vqshl_s8(a, b) simde_vqshl_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vqshl_s16 (const simde_int16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlh_s16(a_.values[i], b_.values[i]); } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_s16 #define vqshl_s16(a, b) simde_vqshl_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vqshl_s32 (const simde_int32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_s32(a_.values[i], b_.values[i]); } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_s32 #define vqshl_s32(a, b) simde_vqshl_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vqshl_s64 (const simde_int64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_s64(a, b); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a), b_ = simde_int64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_s64(a_.values[i], b_.values[i]); } return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_s64 #define vqshl_s64(a, b) simde_vqshl_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqshl_u8 (const simde_uint8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlb_u8(a_.values[i], b_.values[i]); } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_u8 #define vqshl_u8(a, b) simde_vqshl_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vqshl_u16 (const simde_uint16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlh_u16(a_.values[i], b_.values[i]); } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_u16 #define vqshl_u16(a, b) simde_vqshl_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vqshl_u32 (const simde_uint32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_u32(a_.values[i], b_.values[i]); } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_u32 #define vqshl_u32(a, b) simde_vqshl_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vqshl_u64 (const simde_uint64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshl_u64(a, b); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); simde_int64x1_private b_ = simde_int64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_u64(a_.values[i], b_.values[i]); } return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_u64 #define vqshl_u64(a, b) simde_vqshl_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqshlq_s8 (const simde_int8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlb_s8(a_.values[i], b_.values[i]); } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_s8 #define vqshlq_s8(a, b) simde_vqshlq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqshlq_s16 (const simde_int16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlh_s16(a_.values[i], b_.values[i]); } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_s16 #define vqshlq_s16(a, b) simde_vqshlq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqshlq_s32 (const simde_int32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_s32(a_.values[i], b_.values[i]); } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_s32 #define vqshlq_s32(a, b) simde_vqshlq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vqshlq_s64 (const simde_int64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_s64(a_.values[i], b_.values[i]); } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_s64 #define vqshlq_s64(a, b) simde_vqshlq_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqshlq_u8 (const simde_uint8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlb_u8(a_.values[i], b_.values[i]); } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_u8 #define vqshlq_u8(a, b) simde_vqshlq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqshlq_u16 (const simde_uint16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshlh_u16(a_.values[i], b_.values[i]); } return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_u16 #define vqshlq_u16(a, b) simde_vqshlq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqshlq_u32 (const simde_uint32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_u32(a_.values[i], b_.values[i]); } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_u32 #define vqshlq_u32(a, b) simde_vqshlq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vqshlq_u64 (const simde_uint64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vqshlq_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); simde_int64x2_private b_ = simde_int64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_u64(a_.values[i], b_.values[i]); } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_u64 #define vqshlq_u64(a, b) simde_vqshlq_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHL_H) */ /* :: End simde/simde/arm/neon/qshl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshl_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHL_N_H) #define SIMDE_ARM_NEON_QSHL_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int8_t simde_vqshlb_n_s8(int8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { return simde_vqshlb_s8(a, HEDLEY_STATIC_CAST(int8_t, n)); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlb_n_s8(a, n) vqshlb_n_s8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlb_n_s8 #define vqshlb_n_s8(a, n) simde_vqshlb_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_vqshlh_n_s16(int16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { return simde_vqshlh_s16(a, HEDLEY_STATIC_CAST(int16_t, n)); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlh_n_s16(a, n) vqshlh_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlh_n_s16 #define vqshlh_n_s16(a, n) simde_vqshlh_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_vqshls_n_s32(int32_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { return simde_vqshls_s32(a, n); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshls_n_s32(a, n) vqshls_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshls_n_s32 #define vqshls_n_s32(a, n) simde_vqshls_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vqshld_n_s64(int64_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { return simde_vqshld_s64(a, n); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshld_n_s64(a, n) vqshld_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshld_n_s64 #define vqshld_n_s64(a, n) simde_vqshld_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vqshlb_n_u8(uint8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { return simde_vqshlb_u8(a, HEDLEY_STATIC_CAST(int8_t, n)); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlb_n_u8(a, n) vqshlb_n_u8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlb_n_u8 #define vqshlb_n_u8(a, n) simde_vqshlb_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vqshlh_n_u16(uint16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { return simde_vqshlh_u16(a, HEDLEY_STATIC_CAST(int16_t, n)); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlh_n_u16(a, n) vqshlh_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlh_n_u16 #define vqshlh_n_u16(a, n) simde_vqshlh_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vqshls_n_u32(uint32_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { return simde_vqshls_u32(a, n); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshls_n_u32(a, n) vqshls_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshls_n_u32 #define vqshls_n_u32(a, n) simde_vqshls_n_u32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vqshld_n_u64(uint64_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { return simde_vqshld_u64(a, n); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshld_n_u64(a, n) vqshld_n_u64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshld_n_u64 #define vqshld_n_u64(a, n) simde_vqshld_n_u64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqshl_n_s8 (const simde_int8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_8_(simde_vqshlb_n_s8, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_int8x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_s8(a, n) vqshl_n_s8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_s8 #define vqshl_n_s8(a, n) simde_vqshl_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vqshl_n_s16 (const simde_int16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_16_(simde_vqshlh_n_s16, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_int16x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_s16(a, n) vqshl_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_s16 #define vqshl_n_s16(a, n) simde_vqshl_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vqshl_n_s32 (const simde_int32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { simde_int32x2_private r_, a_ = simde_int32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_s32(a_.values[i], n); } return simde_int32x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_s32(a, n) vqshl_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_s32 #define vqshl_n_s32(a, n) simde_vqshl_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vqshl_n_s64 (const simde_int64x1_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { simde_int64x1_private r_, a_ = simde_int64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_s64(a_.values[i], n); } return simde_int64x1_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_s64(a, n) vqshl_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_s64 #define vqshl_n_s64(a, n) simde_vqshl_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqshl_n_u8 (const simde_uint8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_8_(simde_vqshlb_n_u8, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_uint8x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_u8(a, n) vqshl_n_u8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_u8 #define vqshl_n_u8(a, n) simde_vqshl_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vqshl_n_u16 (const simde_uint16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_16_(simde_vqshlh_n_u16, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_uint16x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_u16(a, n) vqshl_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_u16 #define vqshl_n_u16(a, n) simde_vqshl_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vqshl_n_u32 (const simde_uint32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_u32(a_.values[i], n); } return simde_uint32x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_u32(a, n) vqshl_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_u32 #define vqshl_n_u32(a, n) simde_vqshl_n_u32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vqshl_n_u64 (const simde_uint64x1_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_u64(a_.values[i], n); } return simde_uint64x1_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshl_n_u64(a, n) vqshl_n_u64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshl_n_u64 #define vqshl_n_u64(a, n) simde_vqshl_n_u64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqshlq_n_s8 (const simde_int8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_8_(simde_vqshlb_n_s8, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_int8x16_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_s8(a, n) vqshlq_n_s8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_s8 #define vqshlq_n_s8(a, n) simde_vqshlq_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vqshlq_n_s16 (const simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_16_(simde_vqshlh_n_s16, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_int16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_s16(a, n) vqshlq_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_s16 #define vqshlq_n_s16(a, n) simde_vqshlq_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vqshlq_n_s32 (const simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_s32(a_.values[i], n); } return simde_int32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_s32(a, n) vqshlq_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_s32 #define vqshlq_n_s32(a, n) simde_vqshlq_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vqshlq_n_s64 (const simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { simde_int64x2_private r_, a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_s64(a_.values[i], n); } return simde_int64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_s64(a, n) vqshlq_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_s64 #define vqshlq_n_s64(a, n) simde_vqshlq_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqshlq_n_u8 (const simde_uint8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_8_(simde_vqshlb_n_u8, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_uint8x16_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_u8(a, n) vqshlq_n_u8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_u8 #define vqshlq_n_u8(a, n) simde_vqshlq_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqshlq_n_u16 (const simde_uint16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { SIMDE_CONSTIFY_16_(simde_vqshlh_n_u16, r_.values[i], (HEDLEY_UNREACHABLE(), 0), n, a_.values[i]); } return simde_uint16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_u16(a, n) vqshlq_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_u16 #define vqshlq_n_u16(a, n) simde_vqshlq_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqshlq_n_u32 (const simde_uint32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshls_u32(a_.values[i], n); } return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_u32(a, n) vqshlq_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_u32 #define vqshlq_n_u32(a, n) simde_vqshlq_n_u32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vqshlq_n_u64 (const simde_uint64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vqshld_u64(a_.values[i], n); } return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlq_n_u64(a, n) vqshlq_n_u64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlq_n_u64 #define vqshlq_n_u64(a, n) simde_vqshlq_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHL_N_H) */ /* :: End simde/simde/arm/neon/qshl_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshlu_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Atharva Nimbalkar * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHLU_N_H) #define SIMDE_ARM_NEON_QSHLU_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #if defined(SIMDE_WASM_SIMD128_NATIVE) /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #endif HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vqshlub_n_s8(int8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { uint8_t r = HEDLEY_STATIC_CAST(uint8_t, a << n); r |= (((r >> n) != HEDLEY_STATIC_CAST(uint8_t, a)) ? UINT8_MAX : 0); return (a < 0) ? 0 : r; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlub_n_s8(a, n) HEDLEY_STATIC_CAST(uint8_t, vqshlub_n_s8(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlub_n_s8 #define vqshlub_n_s8(a, n) simde_vqshlub_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vqshluh_n_s16(int16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { uint16_t r = HEDLEY_STATIC_CAST(uint16_t, a << n); r |= (((r >> n) != HEDLEY_STATIC_CAST(uint16_t, a)) ? UINT16_MAX : 0); return (a < 0) ? 0 : r; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshluh_n_s16(a, n) HEDLEY_STATIC_CAST(uint16_t, vqshluh_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshluh_n_s16 #define vqshluh_n_s16(a, n) simde_vqshluh_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vqshlus_n_s32(int32_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { uint32_t r = HEDLEY_STATIC_CAST(uint32_t, a << n); r |= (((r >> n) != HEDLEY_STATIC_CAST(uint32_t, a)) ? UINT32_MAX : 0); return (a < 0) ? 0 : r; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlus_n_s32(a, n) HEDLEY_STATIC_CAST(uint32_t, vqshlus_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlus_n_s32 #define vqshlus_n_s32(a, n) simde_vqshlus_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vqshlud_n_s64(int64_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { uint32_t r = HEDLEY_STATIC_CAST(uint32_t, a << n); r |= (((r >> n) != HEDLEY_STATIC_CAST(uint32_t, a)) ? UINT32_MAX : 0); return (a < 0) ? 0 : r; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshlud_n_s64(a, n) HEDLEY_STATIC_CAST(uint64_t, vqshlud_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshlud_n_s64 #define vqshlud_n_s64(a, n) simde_vqshlud_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqshlu_n_s8(simde_int8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { #if defined(SIMDE_WASM_SIMD128_NATIVE) simde_int16x8_private R_, A_ = simde_int16x8_to_private(simde_vmovl_s8(a)); const v128_t shifted = wasm_i16x8_shl(A_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); R_.v128 = wasm_i16x8_min(shifted, wasm_i16x8_const_splat(UINT8_MAX)); R_.v128 = wasm_i16x8_max(R_.v128, wasm_i16x8_const_splat(0)); return simde_vmovn_u16(simde_vreinterpretq_u16_s16( simde_int16x8_from_private(R_))); #else simde_int8x8_private a_ = simde_int8x8_to_private(a); simde_uint8x8_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint8_t, a_.values[i])) ? UINT8_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlu_n_s8(a, n) vqshlu_n_s8(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlu_n_s8 #define vqshlu_n_s8(a, n) simde_vqshlu_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vqshlu_n_s16(simde_int16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { #if defined(SIMDE_WASM_SIMD128_NATIVE) simde_int32x4_private R_, A_ = simde_int32x4_to_private(simde_vmovl_s16(a)); const v128_t shifted = wasm_i32x4_shl(A_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); R_.v128 = wasm_i32x4_min(shifted, wasm_i32x4_const_splat(UINT16_MAX)); R_.v128 = wasm_i32x4_max(R_.v128, wasm_i32x4_const_splat(0)); return simde_vmovn_u32(simde_vreinterpretq_u32_s32( simde_int32x4_from_private(R_))); #else simde_int16x4_private a_ = simde_int16x4_to_private(a); simde_uint16x4_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint16_t, a_.values[i])) ? UINT16_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlu_n_s16(a, n) vqshlu_n_s16(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlu_n_s16 #define vqshlu_n_s16(a, n) simde_vqshlu_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vqshlu_n_s32(simde_int32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { #if defined(SIMDE_WASM_SIMD128_NATIVE) simde_int64x2_private R_, A_ = simde_int64x2_to_private(simde_vmovl_s32(a)); const v128_t max = wasm_i64x2_const_splat(UINT32_MAX); const v128_t shifted = wasm_i64x2_shl(A_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); R_.v128 = wasm_v128_bitselect(shifted, max, wasm_i64x2_gt(max, shifted)); R_.v128 = wasm_v128_and(R_.v128, wasm_i64x2_gt(R_.v128, wasm_i64x2_const_splat(0))); return simde_vmovn_u64(simde_vreinterpretq_u64_s64( simde_int64x2_from_private(R_))); #else simde_int32x2_private a_ = simde_int32x2_to_private(a); simde_uint32x2_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint32_t, a_.values[i])) ? UINT32_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlu_n_s32(a, n) vqshlu_n_s32(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlu_n_s32 #define vqshlu_n_s32(a, n) simde_vqshlu_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vqshlu_n_s64(simde_int64x1_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { #if defined(SIMDE_WASM_SIMD128_NATIVE) simde_uint64x2_private R_, A_ = simde_uint64x2_to_private(simde_vreinterpretq_u64_s64(simde_vcombine_s64(a, a))); R_.v128 = wasm_i64x2_shl(A_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); const v128_t overflow = wasm_i64x2_ne(A_.v128, wasm_u64x2_shr(R_.v128, HEDLEY_STATIC_CAST(uint32_t, n))); R_.v128 = wasm_v128_or(R_.v128, overflow); R_.v128 = wasm_v128_andnot(R_.v128, wasm_i64x2_shr(A_.v128, 63)); return simde_vget_low_u64(simde_uint64x2_from_private(R_)); #else simde_int64x1_private a_ = simde_int64x1_to_private(a); simde_uint64x1_private r_; #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint64_t, a_.values[i])) ? UINT64_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshlu_n_s64(a, n) vqshlu_n_s64(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshlu_n_s64 #define vqshlu_n_s64(a, n) simde_vqshlu_n_s64((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqshluq_n_s8(simde_int8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) { simde_int8x16_private a_ = simde_int8x16_to_private(a); simde_uint8x16_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shl(a_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); const v128_t overflow = wasm_i8x16_ne(a_.v128, wasm_u8x16_shr(r_.v128, HEDLEY_STATIC_CAST(uint32_t, n))); r_.v128 = wasm_v128_or(r_.v128, overflow); r_.v128 = wasm_v128_andnot(r_.v128, wasm_i8x16_shr(a_.v128, 7)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint8_t, a_.values[i])) ? UINT8_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint8x16_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshluq_n_s8(a, n) vqshluq_n_s8(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshluq_n_s8 #define vqshluq_n_s8(a, n) simde_vqshluq_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqshluq_n_s16(simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) { simde_int16x8_private a_ = simde_int16x8_to_private(a); simde_uint16x8_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_shl(a_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); const v128_t overflow = wasm_i16x8_ne(a_.v128, wasm_u16x8_shr(r_.v128, HEDLEY_STATIC_CAST(uint32_t, n))); r_.v128 = wasm_v128_or(r_.v128, overflow); r_.v128 = wasm_v128_andnot(r_.v128, wasm_i16x8_shr(a_.v128, 15)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint16_t, a_.values[i])) ? UINT16_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshluq_n_s16(a, n) vqshluq_n_s16(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshluq_n_s16 #define vqshluq_n_s16(a, n) simde_vqshluq_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqshluq_n_s32(simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) { simde_int32x4_private a_ = simde_int32x4_to_private(a); simde_uint32x4_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shl(a_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); const v128_t overflow = wasm_i32x4_ne(a_.v128, wasm_u32x4_shr(r_.v128, HEDLEY_STATIC_CAST(uint32_t, n))); r_.v128 = wasm_v128_or(r_.v128, overflow); r_.v128 = wasm_v128_andnot(r_.v128, wasm_i32x4_shr(a_.v128, 31)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint32_t, a_.values[i])) ? UINT32_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshluq_n_s32(a, n) vqshluq_n_s32(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshluq_n_s32 #define vqshluq_n_s32(a, n) simde_vqshluq_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vqshluq_n_s64(simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) { simde_int64x2_private a_ = simde_int64x2_to_private(a); simde_uint64x2_private r_; #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shl(a_.v128, HEDLEY_STATIC_CAST(uint32_t, n)); const v128_t overflow = wasm_i64x2_ne(a_.v128, wasm_u64x2_shr(r_.v128, HEDLEY_STATIC_CAST(uint32_t, n))); r_.v128 = wasm_v128_or(r_.v128, overflow); r_.v128 = wasm_v128_andnot(r_.v128, wasm_i64x2_shr(a_.v128, 63)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) __typeof__(r_.values) shifted = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values) << n; __typeof__(r_.values) overflow = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (shifted >> n) != HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values)); r_.values = (shifted & ~overflow) | overflow; r_.values &= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (a_.values >= 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i] << n); r_.values[i] |= (((r_.values[i] >> n) != HEDLEY_STATIC_CAST(uint64_t, a_.values[i])) ? UINT64_MAX : 0); r_.values[i] = (a_.values[i] < 0) ? 0 : r_.values[i]; } #endif return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshluq_n_s64(a, n) vqshluq_n_s64(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshluq_n_s64 #define vqshluq_n_s64(a, n) simde_vqshluq_n_s64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHLU_N_H) */ /* :: End simde/simde/arm/neon/qshlu_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshrn_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHRN_HIGH_N_H) #define SIMDE_ARM_NEON_QSHRN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_s16(r, a, n) vqshrn_high_n_s16((r), (a), (n)) #else #define simde_vqshrn_high_n_s16(r, a, n) simde_vcombine_s8(r, simde_vqmovn_s16(simde_vshrq_n_s16(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_s16 #define vqshrn_high_n_s16(r, a, n) simde_vqshrn_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_s32(r, a, n) vqshrn_high_n_s32((r), (a), (n)) #else #define simde_vqshrn_high_n_s32(r, a, n) simde_vcombine_s16(r, simde_vqmovn_s32(simde_vshrq_n_s32(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_s32 #define vqshrn_high_n_s32(r, a, n) simde_vqshrn_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_s64(r, a, n) vqshrn_high_n_s64((r), (a), (n)) #else #define simde_vqshrn_high_n_s64(r, a, n) simde_vcombine_s32(r, simde_vqmovn_s64(simde_vshrq_n_s64(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_s64 #define vqshrn_high_n_s64(r, a, n) simde_vqshrn_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_u16(r, a, n) vqshrn_high_n_u16((r), (a), (n)) #else #define simde_vqshrn_high_n_u16(r, a, n) simde_vcombine_u8(r, simde_vqmovn_u16(simde_vshrq_n_u16(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_u16 #define vqshrn_high_n_u16(r, a, n) simde_vqshrn_high_n_u16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_u32(r, a, n) vqshrn_high_n_u32((r), (a), (n)) #else #define simde_vqshrn_high_n_u32(r, a, n) simde_vcombine_u16(r, simde_vqmovn_u32(simde_vshrq_n_u32(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_u32 #define vqshrn_high_n_u32(r, a, n) simde_vqshrn_high_n_u32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrn_high_n_u64(r, a, n) vqshrn_high_n_u64((r), (a), (n)) #else #define simde_vqshrn_high_n_u64(r, a, n) simde_vcombine_u32(r, simde_vqmovn_u64(simde_vshrq_n_u64(a, n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrn_high_n_u64 #define vqshrn_high_n_u64(r, a, n) simde_vqshrn_high_n_u64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHRN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/qshrn_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshrn_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHRN_N_H) #define SIMDE_ARM_NEON_QSHRN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrnh_n_s16(a, n) vqshrnh_n_s16(a, n) #else #define simde_vqshrnh_n_s16(a, n) simde_vqmovnh_s16(simde_x_vshrh_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrnh_n_s16 #define vqshrnh_n_s16(a, n) simde_vqshrnh_n_s16(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrnh_n_u16(a, n) vqshrnh_n_u16(a, n) #else #define simde_vqshrnh_n_u16(a, n) simde_vqmovnh_u16(simde_x_vshrh_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrnh_n_u16 #define vqshrnh_n_u16(a, n) simde_vqshrnh_n_u16(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrns_n_s32(a, n) vqshrns_n_s32(a, n) #else #define simde_vqshrns_n_s32(a, n) simde_vqmovns_s32(simde_x_vshrs_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrns_n_s32 #define vqshrns_n_s32(a, n) simde_vqshrns_n_s32(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrns_n_u32(a, n) vqshrns_n_u32(a, n) #else #define simde_vqshrns_n_u32(a, n) simde_vqmovns_u32(simde_x_vshrs_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrns_n_u32 #define vqshrns_n_u32(a, n) simde_vqshrns_n_u32(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrnd_n_s64(a, n) vqshrnd_n_s64(a, n) #else #define simde_vqshrnd_n_s64(a, n) simde_vqmovnd_s64(simde_vshrd_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrnd_n_s64 #define vqshrnd_n_s64(a, n) simde_vqshrnd_n_s64(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrnd_n_u64(a, n) vqshrnd_n_u64(a, n) #else #define simde_vqshrnd_n_u64(a, n) simde_vqmovnd_u64(simde_vshrd_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrnd_n_u64 #define vqshrnd_n_u64(a, n) simde_vqshrnd_n_u64(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_s16(a, n) vqshrn_n_s16((a), (n)) #else #define simde_vqshrn_n_s16(a, n) simde_vqmovn_s16(simde_vshrq_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_s16 #define vqshrn_n_s16(a, n) simde_vqshrn_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_s32(a, n) vqshrn_n_s32((a), (n)) #else #define simde_vqshrn_n_s32(a, n) simde_vqmovn_s32(simde_vshrq_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_s32 #define vqshrn_n_s32(a, n) simde_vqshrn_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_s64(a, n) vqshrn_n_s64((a), (n)) #else #define simde_vqshrn_n_s64(a, n) simde_vqmovn_s64(simde_vshrq_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_s64 #define vqshrn_n_s64(a, n) simde_vqshrn_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_u16(a, n) vqshrn_n_u16((a), (n)) #else #define simde_vqshrn_n_u16(a, n) simde_vqmovn_u16(simde_vshrq_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_u16 #define vqshrn_n_u16(a, n) simde_vqshrn_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_u32(a, n) vqshrn_n_u32((a), (n)) #else #define simde_vqshrn_n_u32(a, n) simde_vqmovn_u32(simde_vshrq_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_u32 #define vqshrn_n_u32(a, n) simde_vqshrn_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrn_n_u64(a, n) vqshrn_n_u64((a), (n)) #else #define simde_vqshrn_n_u64(a, n) simde_vqmovn_u64(simde_vshrq_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrn_n_u64 #define vqshrn_n_u64(a, n) simde_vqshrn_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHRN_N_H) */ /* :: End simde/simde/arm/neon/qshrn_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshrun_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHRUN_HIGH_N_H) #define SIMDE_ARM_NEON_QSHRUN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqshrun_high_n_s16(simde_uint8x8_t r, simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int16x8_private a_ = simde_int16x8_to_private(a); simde_uint16x8_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int16_t tmp = (a_.values[i]) >> n; if (tmp > UINT8_MAX) tmp = UINT8_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, tmp); } return simde_vcombine_u8(r, simde_vqmovn_u16(simde_uint16x8_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71365) #define simde_vqshrun_high_n_s16(r, a, n) vqshrun_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrun_high_n_s16 #define vqshrun_high_n_s16(r, a, n) simde_vqshrun_high_n_s16((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vqshrun_high_n_s32(simde_uint16x4_t r, simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int32x4_private a_ = simde_int32x4_to_private(a); simde_uint32x4_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int32_t tmp = (a_.values[i] >> n); if (tmp > UINT16_MAX) tmp = UINT16_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, tmp); } return simde_vcombine_u16(r, simde_vqmovn_u32(simde_uint32x4_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71365) #define simde_vqshrun_high_n_s32(r, a, n) vqshrun_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrun_high_n_s32 #define vqshrun_high_n_s32(r, a, n) simde_vqshrun_high_n_s32((r), (a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vqshrun_high_n_s64(simde_uint32x2_t r, simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int64x2_private a_ = simde_int64x2_to_private(a); simde_uint64x2_private r_; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int64_t tmp = (a_.values[i] >> n); if (tmp > UINT32_MAX) tmp = UINT32_MAX; else if (tmp < 0) tmp = 0; r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, tmp); } return simde_vcombine_u32(r, simde_vqmovn_u64(simde_uint64x2_from_private(r_))); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71365) #define simde_vqshrun_high_n_s64(r, a, n) vqshrun_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrun_high_n_s64 #define vqshrun_high_n_s64(r, a, n) simde_vqshrun_high_n_s64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHRUN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/qshrun_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qshrun_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QSHRUN_N_H) #define SIMDE_ARM_NEON_QSHRUN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrunh_n_s16(a, n) HEDLEY_STATIC_CAST(uint8_t, vqshrunh_n_s16((a), (n))) #else #define simde_vqshrunh_n_s16(a, n) simde_vqmovunh_s16(simde_x_vshrh_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrunh_n_s16 #define vqshrunh_n_s16(a, n) simde_vqshrunh_n_s16(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshruns_n_s32(a, n) HEDLEY_STATIC_CAST(uint16_t, vqshruns_n_s32((a), (n))) #else #define simde_vqshruns_n_s32(a, n) simde_vqmovuns_s32(simde_x_vshrs_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshruns_n_s32 #define vqshruns_n_s32(a, n) simde_vqshruns_n_s32(a, n) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vqshrund_n_s64(a, n) HEDLEY_STATIC_CAST(uint32_t, vqshrund_n_s64((a), (n))) #else #define simde_vqshrund_n_s64(a, n) simde_vqmovund_s64(simde_vshrd_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqshrund_n_s64 #define vqshrund_n_s64(a, n) simde_vqshrund_n_s64(a, n) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrun_n_s16(a, n) vqshrun_n_s16((a), (n)) #else #define simde_vqshrun_n_s16(a, n) simde_vqmovun_s16(simde_vshrq_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrun_n_s16 #define vqshrun_n_s16(a, n) simde_vqshrun_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrun_n_s32(a, n) vqshrun_n_s32((a), (n)) #else #define simde_vqshrun_n_s32(a, n) simde_vqmovun_s32(simde_vshrq_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrun_n_s32 #define vqshrun_n_s32(a, n) simde_vqshrun_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vqshrun_n_s64(a, n) vqshrun_n_s64((a), (n)) #else #define simde_vqshrun_n_s64(a, n) simde_vqmovun_s64(simde_vshrq_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vqshrun_n_s64 #define vqshrun_n_s64(a, n) simde_vqshrun_n_s64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QSHRUN_N_H) */ /* :: End simde/simde/arm/neon/qshrun_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qtbl.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QTBL_H) #define SIMDE_ARM_NEON_QTBL_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbl1_u8(simde_uint8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t split; simde_memcpy(&split, &t, sizeof(split)); return vtbl2_u8(split, idx); #else simde_uint8x16_private t_ = simde_uint8x16_to_private(t); simde_uint8x8_private r_, idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); __m128i r128 = _mm_shuffle_epi8(t_.m128i, _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(15)))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 16) ? t_.values[idx_.values[i]] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1_u8 #define vqtbl1_u8(t, idx) simde_vqtbl1_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbl1_s8(simde_int8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1_s8(t, idx); #else return simde_vreinterpret_s8_u8(simde_vqtbl1_u8(simde_vreinterpretq_u8_s8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1_s8 #define vqtbl1_s8(t, idx) simde_vqtbl1_s8((t), (idx)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbl2_u8(simde_uint8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x4_t split; simde_memcpy(&split, &t, sizeof(split)); return vtbl4_u8(split, idx); #else simde_uint8x16_private t_[2] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]) }; simde_uint8x8_private r_, idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(31))); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128 = _mm_blendv_epi8(r128_0, r128_1, _mm_slli_epi32(idx128, 3)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 32) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2_u8 #define vqtbl2_u8(t, idx) simde_vqtbl2_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbl2_s8(simde_int8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2_s8(t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbl2_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2_s8 #define vqtbl2_s8(t, idx) simde_vqtbl2_s8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbl3_u8(simde_uint8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8_t idx_hi = vsub_u8(idx, vdup_n_u8(32)); uint8x8x4_t split_lo; uint8x8x2_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t lo = vtbl4_u8(split_lo, idx); uint8x8_t hi = vtbl2_u8(split_hi, idx_hi); return vorr_u8(lo, hi); #else simde_uint8x16_private t_[3] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]) }; simde_uint8x8_private r_, idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(47))); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128_01 = _mm_blendv_epi8(r128_0, r128_1, _mm_slli_epi32(idx128, 3)); __m128i r128_2 = _mm_shuffle_epi8(t_[2].m128i, idx128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_2, _mm_slli_epi32(idx128, 2)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 48) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3_u8 #define vqtbl3_u8(t, idx) simde_vqtbl3_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbl3_s8(simde_int8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3_s8(t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbl3_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3_s8 #define vqtbl3_s8(t, idx) simde_vqtbl3_s8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbl4_u8(simde_uint8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8_t idx_hi = vsub_u8(idx, vdup_n_u8(32)); uint8x8x4_t split_lo; uint8x8x4_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t lo = vtbl4_u8(split_lo, idx); uint8x8_t hi = vtbl4_u8(split_hi, idx_hi); return vorr_u8(lo, hi); #else simde_uint8x16_private t_[4] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]), simde_uint8x16_to_private(t.val[3]) }; simde_uint8x8_private r_, idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(63))); __m128i idx128_shl3 = _mm_slli_epi32(idx128, 3); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128_01 = _mm_blendv_epi8(r128_0, r128_1, idx128_shl3); __m128i r128_2 = _mm_shuffle_epi8(t_[2].m128i, idx128); __m128i r128_3 = _mm_shuffle_epi8(t_[3].m128i, idx128); __m128i r128_23 = _mm_blendv_epi8(r128_2, r128_3, idx128_shl3); __m128i r128 = _mm_blendv_epi8(r128_01, r128_23, _mm_slli_epi32(idx128, 2)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 64) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4_u8 #define vqtbl4_u8(t, idx) simde_vqtbl4_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbl4_s8(simde_int8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4_s8(t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbl4_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4_s8 #define vqtbl4_s8(t, idx) simde_vqtbl4_s8((t), (idx)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbl1q_u8(simde_uint8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1q_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t split; simde_memcpy(&split, &t, sizeof(split)); uint8x8_t lo = vtbl2_u8(split, vget_low_u8(idx)); uint8x8_t hi = vtbl2_u8(split, vget_high_u8(idx)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_and(vec_perm(t, t, idx), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 16)))); #else simde_uint8x16_private t_ = simde_uint8x16_to_private(t); simde_uint8x16_private r_, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m128i = _mm_shuffle_epi8(t_.m128i, _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(15)))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_swizzle(t_.v128, idx_.v128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 16) ? t_.values[idx_.values[i]] : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1q_u8 #define vqtbl1q_u8(t, idx) simde_vqtbl1q_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbl1q_s8(simde_int8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1q_s8(t, idx); #else return simde_vreinterpretq_s8_u8(simde_vqtbl1q_u8(simde_vreinterpretq_u8_s8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1q_s8 #define vqtbl1q_s8(t, idx) simde_vqtbl1q_s8((t), (idx)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbl2q_u8(simde_uint8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2q_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x4_t split; simde_memcpy(&split, &t, sizeof(split)); uint8x8_t lo = vtbl4_u8(split, vget_low_u8(idx)); uint8x8_t hi = vtbl4_u8(split, vget_high_u8(idx)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_and(vec_perm(t.val[0], t.val[1], idx), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 32)))); #else simde_uint8x16_private t_[2] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]) }; simde_uint8x16_private r_, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(31))); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); r_.m128i = _mm_blendv_epi8(r_0, r_1, _mm_slli_epi32(idx_.m128i, 3)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 32) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2q_u8 #define vqtbl2q_u8(t, idx) simde_vqtbl2q_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbl2q_s8(simde_int8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2q_s8(t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbl2q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2q_s8 #define vqtbl2q_s8(t, idx) simde_vqtbl2q_s8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbl3q_u8(simde_uint8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3q_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t idx_hi = vsubq_u8(idx, vdupq_n_u8(32)); uint8x8x4_t split_lo; uint8x8x2_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t hi_lo = vtbl2_u8(split_hi, vget_low_u8(idx_hi)); uint8x8_t hi_hi = vtbl2_u8(split_hi, vget_high_u8(idx_hi)); uint8x8_t lo = vtbx4_u8(hi_lo, split_lo, vget_low_u8(idx)); uint8x8_t hi = vtbx4_u8(hi_hi, split_lo, vget_high_u8(idx)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_01 = vec_perm(t.val[0], t.val[1], idx); SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_2 = vec_perm(t.val[2], t.val[2], idx); return vec_and(vec_sel(r_01, r_2, vec_cmpgt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 31)))), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 48)))); #else simde_uint8x16_private t_[3] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]) }; simde_uint8x16_private r_, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(47))); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); __m128i r_01 = _mm_blendv_epi8(r_0, r_1, _mm_slli_epi32(idx_.m128i, 3)); __m128i r_2 = _mm_shuffle_epi8(t_[2].m128i, idx_.m128i); r_.m128i = _mm_blendv_epi8(r_01, r_2, _mm_slli_epi32(idx_.m128i, 2)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))), wasm_i8x16_swizzle(t_[2].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(32)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 48) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3q_u8 #define vqtbl3q_u8(t, idx) simde_vqtbl3q_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbl3q_s8(simde_int8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3q_s8(t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbl3q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3q_s8 #define vqtbl3q_s8(t, idx) simde_vqtbl3q_s8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbl4q_u8(simde_uint8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4q_u8(t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t idx_hi = vsubq_u8(idx, vdupq_n_u8(32)); uint8x8x4_t split_lo; uint8x8x4_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t lo_lo = vtbl4_u8(split_lo, vget_low_u8(idx)); uint8x8_t lo_hi = vtbl4_u8(split_lo, vget_high_u8(idx)); uint8x8_t lo = vtbx4_u8(lo_lo, split_hi, vget_low_u8(idx_hi)); uint8x8_t hi = vtbx4_u8(lo_hi, split_hi, vget_high_u8(idx_hi)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_01 = vec_perm(t.val[0], t.val[1], idx); SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_23 = vec_perm(t.val[2], t.val[3], idx); return vec_and(vec_sel(r_01, r_23, vec_cmpgt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 31)))), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 64)))); #else simde_uint8x16_private t_[4] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]), simde_uint8x16_to_private(t.val[3]) }; simde_uint8x16_private r_, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(63))); __m128i idx_shl3 = _mm_slli_epi32(idx_.m128i, 3); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); __m128i r_01 = _mm_blendv_epi8(r_0, r_1, idx_shl3); __m128i r_2 = _mm_shuffle_epi8(t_[2].m128i, idx_.m128i); __m128i r_3 = _mm_shuffle_epi8(t_[3].m128i, idx_.m128i); __m128i r_23 = _mm_blendv_epi8(r_2, r_3, idx_shl3); r_.m128i = _mm_blendv_epi8(r_01, r_23, _mm_slli_epi32(idx_.m128i, 2)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))), wasm_v128_or(wasm_i8x16_swizzle(t_[2].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(32))), wasm_i8x16_swizzle(t_[3].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(48))))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 64) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : 0; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4q_u8 #define vqtbl4q_u8(t, idx) simde_vqtbl4q_u8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbl4q_s8(simde_int8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4q_s8(t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbl4q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4q_s8 #define vqtbl4q_s8(t, idx) simde_vqtbl4q_s8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbl1_p8(simde_poly8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1_p8(t, idx); #else return simde_vreinterpret_p8_u8(simde_vqtbl1_u8(simde_vreinterpretq_u8_p8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1_p8 #define vqtbl1_p8(t, idx) simde_vqtbl1_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbl1q_p8(simde_poly8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl1q_p8(t, idx); #else return simde_vreinterpretq_p8_u8(simde_vqtbl1q_u8(simde_vreinterpretq_u8_p8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl1q_p8 #define vqtbl1q_p8(t, idx) simde_vqtbl1q_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbl2_p8(simde_poly8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2_p8(t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbl2_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2_p8 #define vqtbl2_p8(t, idx) simde_vqtbl2_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbl2q_p8(simde_poly8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl2q_p8(t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbl2q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl2q_p8 #define vqtbl2q_p8(t, idx) simde_vqtbl2q_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbl3_p8(simde_poly8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3_p8(t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbl3_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3_p8 #define vqtbl3_p8(t, idx) simde_vqtbl3_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbl3q_p8(simde_poly8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl3q_p8(t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbl3q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl3q_p8 #define vqtbl3q_p8(t, idx) simde_vqtbl3q_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbl4_p8(simde_poly8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4_p8(t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbl4_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4_p8 #define vqtbl4_p8(t, idx) simde_vqtbl4_p8((t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbl4q_p8(simde_poly8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbl4q_p8(t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbl4q_u8(t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbl4q_p8 #define vqtbl4q_p8(t, idx) simde_vqtbl4q_p8((t), (idx)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QTBL_H) */ /* :: End simde/simde/arm/neon/qtbl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/qtbx.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_QTBX_H) #define SIMDE_ARM_NEON_QTBX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbx1_u8(simde_uint8x8_t a, simde_uint8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t split; simde_memcpy(&split, &t, sizeof(split)); return vtbx2_u8(a, split, idx); #else simde_uint8x16_private t_ = simde_uint8x16_to_private(t); simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(15))); __m128i r128 = _mm_shuffle_epi8(t_.m128i, idx128); r128 = _mm_blendv_epi8(r128, _mm_set1_epi64(a_.m64), idx128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 16) ? t_.values[idx_.values[i]] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1_u8 #define vqtbx1_u8(a, t, idx) simde_vqtbx1_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbx1_s8(simde_int8x8_t a, simde_int8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1_s8(a, t, idx); #else return simde_vreinterpret_s8_u8(simde_vqtbx1_u8(simde_vreinterpret_u8_s8(a), simde_vreinterpretq_u8_s8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1_s8 #define vqtbx1_s8(a, t, idx) simde_vqtbx1_s8((a), (t), (idx)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbx2_u8(simde_uint8x8_t a, simde_uint8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x4_t split; simde_memcpy(&split, &t, sizeof(split)); return vtbx4_u8(a, split, idx); #else simde_uint8x16_private t_[2] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]) }; simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(31))); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128 = _mm_blendv_epi8(r128_0, r128_1, _mm_slli_epi32(idx128, 3)); r128 = _mm_blendv_epi8(r128, _mm_set1_epi64(a_.m64), idx128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 32) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2_u8 #define vqtbx2_u8(a, t, idx) simde_vqtbx2_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbx2_s8(simde_int8x8_t a, simde_int8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2_s8(a, t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbx2_u8(simde_vreinterpret_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2_s8 #define vqtbx2_s8(a, t, idx) simde_vqtbx2_s8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbx3_u8(simde_uint8x8_t a, simde_uint8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8_t idx_hi = vsub_u8(idx, vdup_n_u8(32)); uint8x8x4_t split_lo; uint8x8x2_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t hi = vtbx2_u8(a, split_hi, idx_hi); return vtbx4_u8(hi, split_lo, idx); #else simde_uint8x16_private t_[3] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]) }; simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(47))); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128_01 = _mm_blendv_epi8(r128_0, r128_1, _mm_slli_epi32(idx128, 3)); __m128i r128_2 = _mm_shuffle_epi8(t_[2].m128i, idx128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_2, _mm_slli_epi32(idx128, 2)); r128 = _mm_blendv_epi8(r128, _mm_set1_epi64(a_.m64), idx128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 48) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3_u8 #define vqtbx3_u8(a, t, idx) simde_vqtbx3_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbx3_s8(simde_int8x8_t a, simde_int8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3_s8(a, t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbx3_u8(simde_vreinterpret_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3_s8 #define vqtbx3_s8(a, t, idx) simde_vqtbx3_s8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vqtbx4_u8(simde_uint8x8_t a, simde_uint8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8_t idx_hi = vsub_u8(idx, vdup_n_u8(32)); uint8x8x4_t split_lo; uint8x8x4_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t lo = vtbx4_u8(a, split_lo, idx); return vtbx4_u8(lo, split_hi, idx_hi); #else simde_uint8x16_private t_[4] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]), simde_uint8x16_to_private(t.val[3]) }; simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), idx_ = simde_uint8x8_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i idx128 = _mm_set1_epi64(idx_.m64); idx128 = _mm_or_si128(idx128, _mm_cmpgt_epi8(idx128, _mm_set1_epi8(63))); __m128i idx128_shl3 = _mm_slli_epi32(idx128, 3); __m128i r128_0 = _mm_shuffle_epi8(t_[0].m128i, idx128); __m128i r128_1 = _mm_shuffle_epi8(t_[1].m128i, idx128); __m128i r128_01 = _mm_blendv_epi8(r128_0, r128_1, idx128_shl3); __m128i r128_2 = _mm_shuffle_epi8(t_[2].m128i, idx128); __m128i r128_3 = _mm_shuffle_epi8(t_[3].m128i, idx128); __m128i r128_23 = _mm_blendv_epi8(r128_2, r128_3, idx128_shl3); __m128i r128 = _mm_blendv_epi8(r128_01, r128_23, _mm_slli_epi32(idx128, 2)); r128 = _mm_blendv_epi8(r128, _mm_set1_epi64(a_.m64), idx128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 64) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4_u8 #define vqtbx4_u8(a, t, idx) simde_vqtbx4_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vqtbx4_s8(simde_int8x8_t a, simde_int8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4_s8(a, t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_s8_u8(simde_vqtbx4_u8(simde_vreinterpret_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4_s8 #define vqtbx4_s8(a, t, idx) simde_vqtbx4_s8((a), (t), (idx)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbx1q_u8(simde_uint8x16_t a, simde_uint8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1q_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t split; simde_memcpy(&split, &t, sizeof(split)); uint8x8_t lo = vtbx2_u8(vget_low_u8(a), split, vget_low_u8(idx)); uint8x8_t hi = vtbx2_u8(vget_high_u8(a), split, vget_high_u8(idx)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_sel(a, vec_perm(t, t, idx), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 16)))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), t_ = simde_uint8x16_to_private(t), idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(15))); r_.m128i = _mm_blendv_epi8(_mm_shuffle_epi8(t_.m128i, idx_.m128i), a_.m128i, idx_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_i8x16_swizzle(t_.v128, idx_.v128), wasm_v128_and(a_.v128, wasm_u8x16_gt(idx_.v128, wasm_i8x16_splat(15)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 16) ? t_.values[idx_.values[i]] : a_.values[i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1q_u8 #define vqtbx1q_u8(a, t, idx) simde_vqtbx1q_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbx1q_s8(simde_int8x16_t a, simde_int8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1q_s8(a, t, idx); #else return simde_vreinterpretq_s8_u8(simde_vqtbx1q_u8(simde_vreinterpretq_u8_s8(a), simde_vreinterpretq_u8_s8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1q_s8 #define vqtbx1q_s8(a, t, idx) simde_vqtbx1q_s8((a), (t), (idx)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbx2q_u8(simde_uint8x16_t a, simde_uint8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2q_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x4_t split; simde_memcpy(&split, &t, sizeof(split)); uint8x8_t lo = vtbx4_u8(vget_low_u8(a), split, vget_low_u8(idx)); uint8x8_t hi = vtbx4_u8(vget_high_u8(a), split, vget_high_u8(idx)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_sel(a, vec_perm(t.val[0], t.val[1], idx), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 32)))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), t_[2] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]) }, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(31))); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); __m128i r = _mm_blendv_epi8(r_0, r_1, _mm_slli_epi32(idx_.m128i, 3)); r_.m128i = _mm_blendv_epi8(r, a_.m128i, idx_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))), wasm_v128_and(a_.v128, wasm_u8x16_gt(idx_.v128, wasm_i8x16_splat(31)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 32) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2q_u8 #define vqtbx2q_u8(a, t, idx) simde_vqtbx2q_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbx2q_s8(simde_int8x16_t a, simde_int8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2q_s8(a, t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbx2q_u8(simde_vreinterpretq_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2q_s8 #define vqtbx2q_s8(a, t, idx) simde_vqtbx2q_s8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbx3q_u8(simde_uint8x16_t a, simde_uint8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3q_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t idx_hi = vsubq_u8(idx, vdupq_n_u8(32)); uint8x8x4_t split_lo; uint8x8x2_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t hi_lo = vtbx2_u8(vget_low_u8(a), split_hi, vget_low_u8(idx_hi)); uint8x8_t hi_hi = vtbx2_u8(vget_high_u8(a), split_hi, vget_high_u8(idx_hi)); uint8x8_t lo_lo = vtbx4_u8(hi_lo, split_lo, vget_low_u8(idx)); uint8x8_t lo_hi = vtbx4_u8(hi_hi, split_lo, vget_high_u8(idx)); return vcombine_u8(lo_lo, lo_hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_01 = vec_perm(t.val[0], t.val[1], idx); SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_2 = vec_perm(t.val[2], t.val[2], idx); return vec_sel(a, vec_sel(r_01, r_2, vec_cmpgt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 31)))), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 48)))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), t_[3] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]) }, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(47))); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); __m128i r_01 = _mm_blendv_epi8(r_0, r_1, _mm_slli_epi32(idx_.m128i, 3)); __m128i r_2 = _mm_shuffle_epi8(t_[2].m128i, idx_.m128i); __m128i r = _mm_blendv_epi8(r_01, r_2, _mm_slli_epi32(idx_.m128i, 2)); r_.m128i = _mm_blendv_epi8(r, a_.m128i, idx_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))), wasm_v128_or(wasm_i8x16_swizzle(t_[2].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(32))) , wasm_v128_and(a_.v128, wasm_u8x16_gt(idx_.v128, wasm_i8x16_splat(47))))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 48) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3q_u8 #define vqtbx3q_u8(a, t, idx) simde_vqtbx3q_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbx3q_s8(simde_int8x16_t a, simde_int8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3q_s8(a, t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbx3q_u8(simde_vreinterpretq_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3q_s8 #define vqtbx3q_s8(a, t, idx) simde_vqtbx3q_s8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vqtbx4q_u8(simde_uint8x16_t a, simde_uint8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4q_u8(a, t, idx); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x16_t idx_hi = vsubq_u8(idx, vdupq_n_u8(32)); uint8x8x4_t split_lo; uint8x8x4_t split_hi; simde_memcpy(&split_lo, &t.val[0], sizeof(split_lo)); simde_memcpy(&split_hi, &t.val[2], sizeof(split_hi)); uint8x8_t lo_lo = vtbx4_u8(vget_low_u8(a), split_lo, vget_low_u8(idx)); uint8x8_t lo_hi = vtbx4_u8(vget_high_u8(a), split_lo, vget_high_u8(idx)); uint8x8_t lo = vtbx4_u8(lo_lo, split_hi, vget_low_u8(idx_hi)); uint8x8_t hi = vtbx4_u8(lo_hi, split_hi, vget_high_u8(idx_hi)); return vcombine_u8(lo, hi); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_01 = vec_perm(t.val[0], t.val[1], idx); SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) r_23 = vec_perm(t.val[2], t.val[3], idx); return vec_sel(a, vec_sel(r_01, r_23, vec_cmpgt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 31)))), vec_cmplt(idx, vec_splats(HEDLEY_STATIC_CAST(unsigned char, 64)))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), t_[4] = { simde_uint8x16_to_private(t.val[0]), simde_uint8x16_to_private(t.val[1]), simde_uint8x16_to_private(t.val[2]), simde_uint8x16_to_private(t.val[3]) }, idx_ = simde_uint8x16_to_private(idx); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) idx_.m128i = _mm_or_si128(idx_.m128i, _mm_cmpgt_epi8(idx_.m128i, _mm_set1_epi8(63))); __m128i idx_shl3 = _mm_slli_epi32(idx_.m128i, 3); __m128i r_0 = _mm_shuffle_epi8(t_[0].m128i, idx_.m128i); __m128i r_1 = _mm_shuffle_epi8(t_[1].m128i, idx_.m128i); __m128i r_01 = _mm_blendv_epi8(r_0, r_1, idx_shl3); __m128i r_2 = _mm_shuffle_epi8(t_[2].m128i, idx_.m128i); __m128i r_3 = _mm_shuffle_epi8(t_[3].m128i, idx_.m128i); __m128i r_23 = _mm_blendv_epi8(r_2, r_3, idx_shl3); __m128i r = _mm_blendv_epi8(r_01, r_23, _mm_slli_epi32(idx_.m128i, 2)); r_.m128i = _mm_blendv_epi8(r, a_.m128i, idx_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_v128_or(wasm_v128_or(wasm_v128_or(wasm_i8x16_swizzle(t_[0].v128, idx_.v128), wasm_i8x16_swizzle(t_[1].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(16)))), wasm_v128_or(wasm_i8x16_swizzle(t_[2].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(32))), wasm_i8x16_swizzle(t_[3].v128, wasm_i8x16_sub(idx_.v128, wasm_i8x16_splat(48))))), wasm_v128_and(a_.v128, wasm_u8x16_gt(idx_.v128, wasm_i8x16_splat(63)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (idx_.values[i] < 64) ? t_[idx_.values[i] / 16].values[idx_.values[i] & 15] : a_.values[i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4q_u8 #define vqtbx4q_u8(a, t, idx) simde_vqtbx4q_u8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vqtbx4q_s8(simde_int8x16_t a, simde_int8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4q_s8(a, t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_s8_u8(simde_vqtbx4q_u8(simde_vreinterpretq_u8_s8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4q_s8 #define vqtbx4q_s8(a, t, idx) simde_vqtbx4q_s8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbx1_p8(simde_poly8x8_t a, simde_poly8x16_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1_p8(a, t, idx); #else return simde_vreinterpret_p8_u8(simde_vqtbx1_u8(simde_vreinterpret_u8_p8(a), simde_vreinterpretq_u8_p8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1_p8 #define vqtbx1_p8(a, t, idx) simde_vqtbx1_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbx1q_p8(simde_poly8x16_t a, simde_poly8x16_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx1q_p8(a, t, idx); #else return simde_vreinterpretq_p8_u8(simde_vqtbx1q_u8(simde_vreinterpretq_u8_p8(a), simde_vreinterpretq_u8_p8(t), idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx1q_p8 #define vqtbx1q_p8(a, t, idx) simde_vqtbx1q_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbx2_p8(simde_poly8x8_t a, simde_poly8x16x2_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2_p8(a, t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbx2_u8(simde_vreinterpret_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2_p8 #define vqtbx2_p8(a, t, idx) simde_vqtbx2_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbx2q_p8(simde_poly8x16_t a, simde_poly8x16x2_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx2q_p8(a, t, idx); #else simde_uint8x16x2_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbx2q_u8(simde_vreinterpretq_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx2q_p8 #define vqtbx2q_p8(a, t, idx) simde_vqtbx2q_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbx3_p8(simde_poly8x8_t a, simde_poly8x16x3_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3_p8(a, t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbx3_u8(simde_vreinterpret_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3_p8 #define vqtbx3_p8(a, t, idx) simde_vqtbx3_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbx3q_p8(simde_poly8x16_t a, simde_poly8x16x3_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx3q_p8(a, t, idx); #else simde_uint8x16x3_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbx3q_u8(simde_vreinterpretq_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx3q_p8 #define vqtbx3q_p8(a, t, idx) simde_vqtbx3q_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vqtbx4_p8(simde_poly8x8_t a, simde_poly8x16x4_t t, simde_uint8x8_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4_p8(a, t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpret_p8_u8(simde_vqtbx4_u8(simde_vreinterpret_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4_p8 #define vqtbx4_p8(a, t, idx) simde_vqtbx4_p8((a), (t), (idx)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vqtbx4q_p8(simde_poly8x16_t a, simde_poly8x16x4_t t, simde_uint8x16_t idx) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vqtbx4q_p8(a, t, idx); #else simde_uint8x16x4_t t_; simde_memcpy(&t_, &t, sizeof(t_)); return simde_vreinterpretq_p8_u8(simde_vqtbx4q_u8(simde_vreinterpretq_u8_p8(a), t_, idx)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vqtbx4q_p8 #define vqtbx4q_p8(a, t, idx) simde_vqtbx4q_p8((a), (t), (idx)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_QTBX_H) */ /* :: End simde/simde/arm/neon/qtbx.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/raddhn.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RADDHN_H) #define SIMDE_ARM_NEON_RADDHN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vraddhn_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); int16_t round_cast = 1 << 7; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] + b_.values[i] + round_cast; } return simde_vmovn_s16(simde_vshrq_n_s16(simde_int16x8_from_private(r_), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_s16 #define vraddhn_s16(a, b) simde_vraddhn_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vraddhn_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); int round_cast = 1 << 15; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] + b_.values[i] + round_cast; } return simde_vmovn_s32(simde_vshrq_n_s32(simde_int32x4_from_private(r_), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_s32 #define vraddhn_s32(a, b) simde_vraddhn_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vraddhn_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); int64_t round_cast = 1ll << 31; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] + b_.values[i] + round_cast) >> 32); } return simde_vmovn_s64(simde_int64x2_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_s64 #define vraddhn_s64(a, b) simde_vraddhn_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vraddhn_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); uint16_t round_cast = 1 << 7; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] + b_.values[i] + round_cast); } return simde_vmovn_u16(simde_vshrq_n_u16(simde_uint16x8_from_private(r_), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_u16 #define vraddhn_u16(a, b) simde_vraddhn_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vraddhn_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); uint32_t round_cast = 1 << 15; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i] + b_.values[i] + round_cast); } return simde_vmovn_u32(simde_vshrq_n_u32(simde_uint32x4_from_private(r_), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_u32 #define vraddhn_u32(a, b) simde_vraddhn_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vraddhn_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vraddhn_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); uint64_t round_cast = 1ull << 31; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] + b_.values[i] + round_cast) >> 32); } return simde_vmovn_u64(simde_uint64x2_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vraddhn_u64 #define vraddhn_u64(a, b) simde_vraddhn_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RADDHN_H) */ /* :: End simde/simde/arm/neon/raddhn.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/raddhn_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RADDHN_HIGH_H) #define SIMDE_ARM_NEON_RADDHN_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_s16(r, a, b) vraddhn_high_s16((r), (a), (b)) #else #define simde_vraddhn_high_s16(r, a, b) simde_vcombine_s8(r, simde_vraddhn_s16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_s16 #define vraddhn_high_s16(r, a, b) simde_vraddhn_high_s16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_s32(r, a, b) vraddhn_high_s32((r), (a), (b)) #else #define simde_vraddhn_high_s32(r, a, b) simde_vcombine_s16(r, simde_vraddhn_s32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_s32 #define vraddhn_high_s32(r, a, b) simde_vraddhn_high_s32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_s64(r, a, b) vraddhn_high_s64((r), (a), (b)) #else #define simde_vraddhn_high_s64(r, a, b) simde_vcombine_s32(r, simde_vraddhn_s64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_s64 #define vraddhn_high_s64(r, a, b) simde_vraddhn_high_s64((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_u16(r, a, b) vraddhn_high_u16((r), (a), (b)) #else #define simde_vraddhn_high_u16(r, a, b) simde_vcombine_u8(r, simde_vraddhn_u16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_u16 #define vraddhn_high_u16(r, a, b) simde_vraddhn_high_u16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_u32(r, a, b) vraddhn_high_u32((r), (a), (b)) #else #define simde_vraddhn_high_u32(r, a, b) simde_vcombine_u16(r, simde_vraddhn_u32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_u32 #define vraddhn_high_u32(r, a, b) simde_vraddhn_high_u32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vraddhn_high_u64(r, a, b) vraddhn_high_u64((r), (a), (b)) #else #define simde_vraddhn_high_u64(r, a, b) simde_vcombine_u32(r, simde_vraddhn_u64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vraddhn_high_u64 #define vraddhn_high_u64(r, a, b) simde_vraddhn_high_u64((r), (a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RADDHN_HIGH_H) */ /* :: End simde/simde/arm/neon/raddhn_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rax.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RAX_H) #define SIMDE_ARM_NEON_RAX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vrax1q_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA3) return vrax1q_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = (b_.values[i] >> 63) | (b_.values[i] << 1); r_.values[i] = a_.values[i] ^ b_.values[i]; } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrax1q_u64 #define vrax1q_u64(a, b) simde_vrax1q_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RAX_H) */ /* :: End simde/simde/arm/neon/rax.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rbit.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ /* The GFNI implementation is based on Wojciech Muła's work at * http://0x80.pl/articles/avx512-galois-field-for-bit-shuffling.html#bit-shuffling via * https://github.com/InstLatx64/InstLatX64_Demo/blob/49c27effdfd5a45f27e0ccb6e2f3be5f27c3845d/GFNI_Demo.h#L173 */ #if !defined(SIMDE_ARM_NEON_RBIT_H) #define SIMDE_ARM_NEON_RBIT_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrbit_u8(simde_uint8x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbit_u8(a); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); #if defined(SIMDE_X86_MMX_NATIVE) && defined(SIMDE_X86_GFNI_NATIVE) __m128i tmp = _mm_movpi64_epi64(a_.m64); tmp = _mm_gf2p8affine_epi64_epi8(tmp, _mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, UINT64_C(0x8040201008040201))), 0); r_.m64 = _mm_movepi64_pi64(tmp); #elif defined(SIMDE_X86_MMX_NATIVE) __m64 mask; mask = _mm_set1_pi8(0x55); a_.m64 = _mm_or_si64(_mm_andnot_si64(mask, _mm_slli_pi16(a_.m64, 1)), _mm_and_si64(mask, _mm_srli_pi16(a_.m64, 1))); mask = _mm_set1_pi8(0x33); a_.m64 = _mm_or_si64(_mm_andnot_si64(mask, _mm_slli_pi16(a_.m64, 2)), _mm_and_si64(mask, _mm_srli_pi16(a_.m64, 2))); mask = _mm_set1_pi8(0x0F); r_.m64 = _mm_or_si64(_mm_andnot_si64(mask, _mm_slli_pi16(a_.m64, 4)), _mm_and_si64(mask, _mm_srli_pi16(a_.m64, 4))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { #if HEDLEY_HAS_BUILTIN(__builtin_bitreverse8) && !defined(HEDLEY_IBM_VERSION) r_.values[i] = __builtin_bitreverse8(a_.values[i]); #else r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (((a_.values[i] * UINT64_C(0x80200802)) & UINT64_C(0x0884422110)) * UINT64_C(0x0101010101)) >> 32); #endif } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbit_u8 #define vrbit_u8(a) simde_vrbit_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrbit_s8(simde_int8x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbit_s8(a); #else return simde_vreinterpret_s8_u8(simde_vrbit_u8(simde_vreinterpret_u8_s8(a))); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbit_s8 #define vrbit_s8(a) simde_vrbit_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrbitq_u8(simde_uint8x16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbitq_u8(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) shift; shift = vec_splat_u8(1); a = vec_sel(vec_sl(a, shift), vec_sr(a, shift), vec_splats(HEDLEY_STATIC_CAST(unsigned char, 0x55))); shift = vec_splat_u8(2); a = vec_sel(vec_sl(a, shift), vec_sr(a, shift), vec_splats(HEDLEY_STATIC_CAST(unsigned char, 0x33))); shift = vec_splat_u8(4); return vec_or(vec_sl(a, shift), vec_sr(a, shift)); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); #if defined(SIMDE_X86_GFNI_NATIVE) r_.m128i = _mm_gf2p8affine_epi64_epi8(a_.m128i, _mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, UINT64_C(0x8040201008040201))), 0); #elif defined(SIMDE_X86_SSE2_NATIVE) __m128i mask; mask = _mm_set1_epi8(0x55); a_.m128i = _mm_or_si128(_mm_andnot_si128(mask, _mm_slli_epi16(a_.m128i, 1)), _mm_and_si128(mask, _mm_srli_epi16(a_.m128i, 1))); mask = _mm_set1_epi8(0x33); a_.m128i = _mm_or_si128(_mm_andnot_si128(mask, _mm_slli_epi16(a_.m128i, 2)), _mm_and_si128(mask, _mm_srli_epi16(a_.m128i, 2))); mask = _mm_set1_epi8(0x0F); r_.m128i = _mm_or_si128(_mm_andnot_si128(mask, _mm_slli_epi16(a_.m128i, 4)), _mm_and_si128(mask, _mm_srli_epi16(a_.m128i, 4))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) a_.v128 = wasm_v128_bitselect(wasm_u8x16_shr(a_.v128, 1), wasm_i8x16_shl(a_.v128, 1), wasm_i8x16_splat(0x55)); a_.v128 = wasm_v128_bitselect(wasm_u8x16_shr(a_.v128, 2), wasm_i8x16_shl(a_.v128, 2), wasm_i8x16_splat(0x33)); r_.v128 = wasm_v128_or(wasm_u8x16_shr(a_.v128, 4), wasm_i8x16_shl(a_.v128, 4)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { #if HEDLEY_HAS_BUILTIN(__builtin_bitreverse8) && !defined(HEDLEY_IBM_VERSION) r_.values[i] = __builtin_bitreverse8(a_.values[i]); #else r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (((a_.values[i] * UINT64_C(0x80200802)) & UINT64_C(0x0884422110)) * UINT64_C(0x0101010101)) >> 32); #endif } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbitq_u8 #define vrbitq_u8(a) simde_vrbitq_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrbitq_s8(simde_int8x16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbitq_s8(a); #else return simde_vreinterpretq_s8_u8(simde_vrbitq_u8(simde_vreinterpretq_u8_s8(a))); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbitq_s8 #define vrbitq_s8(a) simde_vrbitq_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vrbit_p8(simde_poly8x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbit_p8(a); #else return simde_vreinterpret_p8_u8(simde_vrbit_u8(simde_vreinterpret_u8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbit_p8 #define vrbit_p8(a) simde_vrbit_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vrbitq_p8(simde_poly8x16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrbitq_p8(a); #else return simde_vreinterpretq_p8_u8(simde_vrbitq_u8(simde_vreinterpretq_u8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrbitq_p8 #define vrbitq_p8(a) simde_vrbitq_p8(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RBIT_H) */ /* :: End simde/simde/arm/neon/rbit.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/recpe.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RECPE_H) #define SIMDE_ARM_NEON_RECPE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrecpeh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpeh_f16(a); #else simde_float32_t r_; simde_float32_t a_ = simde_float16_to_float32(a); r_ = 1.0f / a_; return simde_float16_from_float32(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrecpeh_f16 #define vrecpeh_f16(a) simde_vrecpeh_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrecpes_f32(simde_float32_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpes_f32(a); #else return SIMDE_FLOAT32_C(1.0) / a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpes_f32 #define vrecpes_f32(a) simde_vrecpes_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64_t simde_vrecped_f64(simde_float64_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecped_f64(a); #else return SIMDE_FLOAT64_C(1.0) / a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecped_f64 #define vrecped_f64(a) simde_vrecped_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrecpe_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpe_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecpeh_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrecpe_f16 #define vrecpe_f16(a) simde_vrecpe_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrecpe_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecpe_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); #if defined(SIMDE_IEEE754_STORAGE) /* https://stackoverflow.com/questions/12227126/division-as-multiply-and-lut-fast-float-division-reciprocal/12228234#12228234 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int32_t ix; simde_float32 fx = a_.values[i]; simde_memcpy(&ix, &fx, sizeof(ix)); int32_t x = INT32_C(0x7EF311C3) - ix; simde_float32 temp; simde_memcpy(&temp, &x, sizeof(temp)); r_.values[i] = temp * (SIMDE_FLOAT32_C(2.0) - temp * fx); } #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.f32 = 1.0f / a_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.values[i] = simde_vrecpes_f32(a_.values[i]); } #endif return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecpe_f32 #define vrecpe_f32(a) simde_vrecpe_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrecpe_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpe_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = 1.0 / a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecped_f64(a_.values[i]); } #endif return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpe_f64 #define vrecpe_f64(a) simde_vrecpe_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrecpeq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpeq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = 1.0 / a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecped_f64(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpeq_f64 #define vrecpeq_f64(a) simde_vrecpeq_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrecpeq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecpeq_f32(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_re(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_rcp_ps(a_.m128); #elif defined(SIMDE_IEEE754_STORAGE) /* https://stackoverflow.com/questions/12227126/division-as-multiply-and-lut-fast-float-division-reciprocal/12228234#12228234 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { int32_t ix; simde_float32 fx = a_.values[i]; simde_memcpy(&ix, &fx, sizeof(ix)); int32_t x = INT32_C(0x7EF311C3) - ix; simde_float32 temp; simde_memcpy(&temp, &x, sizeof(temp)); r_.values[i] = temp * (SIMDE_FLOAT32_C(2.0) - temp * fx); } #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.f32 = 1.0f / a_.f32; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.values[i] = simde_vrecpes_f32(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecpeq_f32 #define vrecpeq_f32(a) simde_vrecpeq_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrecpeq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpeq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecpeh_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrecpeq_f16 #define vrecpeq_f16(a) simde_vrecpeq_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrecpe_u32(simde_uint32x2_t a){ #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecpe_u32(a); #else simde_uint32x2_private a_ = simde_uint32x2_to_private(a), r_; SIMDE_VECTORIZE for(size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (a_.values[i] <= 0x7FFFFFFF){ r_.values[i] = UINT32_MAX; } else { uint32_t a_temp = (a_.values[i] >> 23) & 511; a_temp = a_temp * 2 + 1; uint32_t b = (1 << 19) / a_temp; r_.values[i] = (b+1) / 2; r_.values[i] = r_.values[i] << 23; } } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecpe_u32 #define vrecpe_u32(a) simde_vrecpe_u32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrecpeq_u32(simde_uint32x4_t a){ #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecpeq_u32(a); #else simde_uint32x4_private a_ = simde_uint32x4_to_private(a), r_; SIMDE_VECTORIZE for(size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (a_.values[i] <= 0x7FFFFFFF){ r_.values[i] = UINT32_MAX; } else { uint32_t a_temp = (a_.values[i] >> 23) & 511; a_temp = a_temp * 2 + 1; uint32_t b = (1 << 19) / a_temp; r_.values[i] = (b+1) / 2; r_.values[i] = r_.values[i] << 23; } } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecpeq_u32 #define vrecpeq_u32(a) simde_vrecpeq_u32((a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RECPE_H) */ /* :: End simde/simde/arm/neon/recpe.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/recps.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RECPS_H) #define SIMDE_ARM_NEON_RECPS_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrecpsh_f16(simde_float16_t a, simde_float16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpsh_f16(a, b); #else return simde_float16_from_float32(SIMDE_FLOAT32_C(2.0) - simde_float16_to_float32(a) * simde_float16_to_float32(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpsh_f16 #define vrecpsh_f16(a, b) simde_vrecpsh_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrecpss_f32(simde_float32_t a, simde_float32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpss_f32(a, b); #else return SIMDE_FLOAT32_C(2.0) - (a * b); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpss_f32 #define vrecpss_f32(a, b) simde_vrecpss_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64_t simde_vrecpsd_f64(simde_float64_t a, simde_float64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpsd_f64(a, b); #else return SIMDE_FLOAT64_C(2.0) - (a * b); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpsd_f64 #define vrecpsd_f64(a, b) simde_vrecpsd_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrecps_f64(simde_float64x1_t a, simde_float64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecps_f64(a, b); #else return simde_vmls_f64(simde_vdup_n_f64(SIMDE_FLOAT64_C(2.0)), a, b); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecps_f64 #define vrecps_f64(a, b) simde_vrecps_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrecps_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecps_f16(a, b); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a), b_ = simde_float16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecpsh_f16(a_.values[i], b_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrecps_f16 #define vrecps_f16(a, b) simde_vrecps_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrecps_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecps_f32(a, b); #else return simde_vmls_f32(simde_vdup_n_f32(SIMDE_FLOAT32_C(2.0)), a, b); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecps_f32 #define vrecps_f32(a, b) simde_vrecps_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrecpsq_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpsq_f64(a, b); #else return simde_vmlsq_f64(simde_vdupq_n_f64(SIMDE_FLOAT64_C(2.0)), a, b); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpsq_f64 #define vrecpsq_f64(a, b) simde_vrecpsq_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrecpsq_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrecpsq_f32(a, b); #else return simde_vmlsq_f32(simde_vdupq_n_f32(SIMDE_FLOAT32_C(2.0)), a, b); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrecpsq_f32 #define vrecpsq_f32(a, b) simde_vrecpsq_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrecpsq_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpsq_f16(a, b); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a), b_ = simde_float16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrecpsh_f16(a_.values[i], b_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrecpsq_f16 #define vrecpsq_f16(a, b) simde_vrecpsq_f16((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RECPS_H) */ /* :: End simde/simde/arm/neon/recps.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/recpx.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RECPX_H) #define SIMDE_ARM_NEON_RECPX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrecpxh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrecpxh_f16(a); #else if (simde_isnanhf(a)) { return SIMDE_NANHF; } uint16_t n; simde_memcpy(&n, &a, sizeof(a)); uint16_t sign = n & 0x8000; uint16_t exp = n & 0x7c00; uint16_t result; if (exp == 0) { uint16_t max_exp = 0x7b00; result = sign|max_exp; } else { exp = ~(exp) & 0x7c00; result = sign|exp; } simde_memcpy(&a, &result, sizeof(result)); return a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpxh_f16 #define vrecpxh_f16(a) simde_vrecpxh_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrecpxs_f32(simde_float32_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpxs_f32(a); #else if (simde_math_isnanf(a)) { return SIMDE_MATH_NANF; } uint32_t n; simde_memcpy(&n, &a, sizeof(a)); uint32_t sign = n & 0x80000000; uint32_t exp = n & 0x7f800000; uint32_t result; if (exp == 0) { uint32_t max_exp = 0x7f000000; result = sign|max_exp; } else { exp = ~(exp) & 0x7f800000; result = sign|exp; } simde_memcpy(&a, &result, sizeof(result)); return a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpxs_f32 #define vrecpxs_f32(a) simde_vrecpxs_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64_t simde_vrecpxd_f64(simde_float64_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrecpxd_f64(a); #else if (simde_math_isnan(a)) { return SIMDE_MATH_NAN; } uint64_t n; simde_memcpy(&n, &a, sizeof(a)); uint64_t sign = n & 0x8000000000000000ull; uint64_t exp = n & 0x7ff0000000000000ull; uint64_t result; if (exp == 0) { uint64_t max_exp = 0x7fe0000000000000ull; result = sign|max_exp; } else { exp = ~(exp) & 0x7ff0000000000000ull; result = sign|exp; } simde_memcpy(&a, &result, sizeof(result)); return a; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrecpxd_f64 #define vrecpxd_f64(a) simde_vrecpxd_f64((a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RECPX_H) */ /* :: End simde/simde/arm/neon/recpx.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rev16.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_REV16_H) #define SIMDE_ARM_NEON_REV16_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrev16_s8(simde_int8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16_s8(a); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi8(a_.m64, _mm_set_pi8(6, 7, 4, 5, 2, 3, 0, 1)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, a_.values, 1, 0, 3, 2, 5, 4, 7, 6); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16_s8 #define vrev16_s8(a) simde_vrev16_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrev16_u8(simde_uint8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16_u8(a); #else return simde_vreinterpret_u8_s8(simde_vrev16_s8(simde_vreinterpret_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16_u8 #define vrev16_u8(a) simde_vrev16_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrev16q_s8(simde_int8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16q_s8(a); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_revb(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), a))); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_reve(a)))); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) r_.m128i = _mm_shuffle_epi8(a_.m128i, _mm_set_epi8(14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, a_.values, 1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16q_s8 #define vrev16q_s8(a) simde_vrev16q_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrev16q_u8(simde_uint8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16q_u8(a); #else return simde_vreinterpretq_u8_s8(simde_vrev16q_s8(simde_vreinterpretq_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16q_u8 #define vrev16q_u8(a) simde_vrev16q_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vrev16_p8(simde_poly8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16_p8(a); #else return simde_vreinterpret_p8_s8(simde_vrev16_s8(simde_vreinterpret_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16_p8 #define vrev16_p8(a) simde_vrev16_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vrev16q_p8(simde_poly8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev16q_p8(a); #else return simde_vreinterpretq_p8_s8(simde_vrev16q_s8(simde_vreinterpretq_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev16q_p8 #define vrev16q_p8(a) simde_vrev16q_p8(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_REV16_H) */ /* :: End simde/simde/arm/neon/rev16.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rev32.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_REV32_H) #define SIMDE_ARM_NEON_REV32_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrev32_s8(simde_int8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_s8(a); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi8(a_.m64, _mm_set_pi8(4, 5, 6, 7, 0, 1, 2, 3)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, a_.values, 3, 2, 1, 0, 7, 6, 5, 4); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 3]; } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_s8 #define vrev32_s8(a) simde_vrev32_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrev32_s16(simde_int16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_s16(a); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi16(a_.m64, (2 << 6) | (3 << 4) | (0 << 2) | (1 << 0)); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, a_.values, 1, 0, 3, 2); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_s16 #define vrev32_s16(a) simde_vrev32_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrev32_u8(simde_uint8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_u8(a); #else return simde_vreinterpret_u8_s8(simde_vrev32_s8(simde_vreinterpret_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_u8 #define vrev32_u8(a) simde_vrev32_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrev32_u16(simde_uint16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_u16(a); #else return simde_vreinterpret_u16_s16(simde_vrev32_s16(simde_vreinterpret_s16_u16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_u16 #define vrev32_u16(a) simde_vrev32_u16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrev32q_s8(simde_int8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_s8(a); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_revb(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), a))); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_reve(a)))); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) r_.m128i = _mm_shuffle_epi8(a_.m128i, _mm_set_epi8(12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, a_.values, 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 3]; } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_s8 #define vrev32q_s8(a) simde_vrev32q_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vrev32q_s16(simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_s16(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_reve(a)))); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) r_.m128i = _mm_shuffle_epi8(a_.m128i, _mm_set_epi8(13, 12, 15, 14, 9, 8, 11, 10, 5, 4, 7, 6, 1, 0, 3, 2)); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_shufflehi_epi16(_mm_shufflelo_epi16(a_.m128i, (2 << 6) | (3 << 4) | (0 << 2) | (1 << 0)), (2 << 6) | (3 << 4) | (0 << 2) | (1 << 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, a_.values, 1, 0, 3, 2, 5, 4, 7, 6); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_s16 #define vrev32q_s16(a) simde_vrev32q_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrev32q_u8(simde_uint8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_u8(a); #else return simde_vreinterpretq_u8_s8(simde_vrev32q_s8(simde_vreinterpretq_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_u8 #define vrev32q_u8(a) simde_vrev32q_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vrev32q_u16(simde_uint16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_u16(a); #else return simde_vreinterpretq_u16_s16(simde_vrev32q_s16(simde_vreinterpretq_s16_u16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_u16 #define vrev32q_u16(a) simde_vrev32q_u16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vrev32_p8(simde_poly8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_p8(a); #else return simde_vreinterpret_p8_s8(simde_vrev32_s8(simde_vreinterpret_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_p8 #define vrev32_p8(a) simde_vrev32_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vrev32_p16(simde_poly16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32_p16(a); #else return simde_vreinterpret_p16_s16(simde_vrev32_s16(simde_vreinterpret_s16_p16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32_p16 #define vrev32_p16(a) simde_vrev32_p16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vrev32q_p8(simde_poly8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_p8(a); #else return simde_vreinterpretq_p8_s8(simde_vrev32q_s8(simde_vreinterpretq_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_p8 #define vrev32q_p8(a) simde_vrev32q_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vrev32q_p16(simde_poly16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev32q_p16(a); #else return simde_vreinterpretq_p16_s16(simde_vrev32q_s16(simde_vreinterpretq_s16_p16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev32q_p16 #define vrev32q_p16(a) simde_vrev32q_p16(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_REV32_H) */ /* :: End simde/simde/arm/neon/rev32.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rev64.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_REV64_H) #define SIMDE_ARM_NEON_REV64_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrev64_s8(simde_int8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_s8(a); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi8(a_.m64, _mm_set_pi8(0, 1, 2, 3, 4, 5, 6, 7)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, a_.values, 7, 6, 5, 4, 3, 2, 1, 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 7]; } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_s8 #define vrev64_s8(a) simde_vrev64_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrev64_s16(simde_int16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_s16(a); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi16(a_.m64, (0 << 6) | (1 << 4) | (2 << 2) | (3 << 0)); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, a_.values, 3, 2, 1, 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 3]; } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_s16 #define vrev64_s16(a) simde_vrev64_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vrev64_s32(simde_int32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_s32(a); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a); #if defined(SIMDE_X86_SSE_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi16(a_.m64, (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0)); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, a_.values, 1, 0); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_s32 #define vrev64_s32(a) simde_vrev64_s32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrev64_u8(simde_uint8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_u8(a); #else return simde_vreinterpret_u8_s8(simde_vrev64_s8(simde_vreinterpret_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_u8 #define vrev64_u8(a) simde_vrev64_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrev64_u16(simde_uint16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_u16(a); #else return simde_vreinterpret_u16_s16(simde_vrev64_s16(simde_vreinterpret_s16_u16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_u16 #define vrev64_u16(a) simde_vrev64_u16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrev64_u32(simde_uint32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_u32(a); #else return simde_vreinterpret_u32_s32(simde_vrev64_s32(simde_vreinterpret_s32_u32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_u32 #define vrev64_u32(a) simde_vrev64_u32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrev64_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrev64_f16(a); #else return simde_vreinterpret_f16_s16(simde_vrev64_s16(simde_vreinterpret_s16_f16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_f16 #define vrev64_f16(a) simde_vrev64_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrev64_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_f32(a); #else return simde_vreinterpret_f32_s32(simde_vrev64_s32(simde_vreinterpret_s32_f32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_f32 #define vrev64_f32(a) simde_vrev64_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrev64q_s8(simde_int8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_s8(a); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_revb(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), a))); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), vec_reve(a)))); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) r_.m128i = _mm_shuffle_epi8(a_.m128i, _mm_set_epi8(8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, a_.values, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 7]; } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_s8 #define vrev64q_s8(a) simde_vrev64q_s8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vrev64q_s16(simde_int16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_s16(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), vec_reve(a)))); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); #if defined(SIMDE_X86_SSSE3_NATIVE) r_.m128i = _mm_shuffle_epi8(a_.m128i, _mm_set_epi8(9, 8, 11, 10, 13, 12, 15, 14, 1, 0, 3, 2, 5, 4, 7, 6)); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_shufflehi_epi16(_mm_shufflelo_epi16(a_.m128i, (0 << 6) | (1 << 4) | (2 << 2) | (3 << 0)), (0 << 6) | (1 << 4) | (2 << 2) | (3 << 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 6, 7, 4, 5, 2, 3, 0, 1, 14, 15, 12, 13, 10, 11, 8, 9); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, a_.values, 3, 2, 1, 0, 7, 6, 5, 4); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 3]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_s16 #define vrev64q_s16(a) simde_vrev64q_s16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vrev64q_s32(simde_int32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_s32(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), vec_reve(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), vec_reve(a)))); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); #if defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_shuffle_epi32(a_.m128i, (2 << 6) | (3 << 4) | (0 << 2) | (1 << 0)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, a_.v128, 4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, a_.values, 1, 0, 3, 2); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i ^ 1]; } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_s32 #define vrev64q_s32(a) simde_vrev64q_s32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrev64q_u8(simde_uint8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_u8(a); #else return simde_vreinterpretq_u8_s8(simde_vrev64q_s8(simde_vreinterpretq_s8_u8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_u8 #define vrev64q_u8(a) simde_vrev64q_u8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vrev64q_u16(simde_uint16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_u16(a); #else return simde_vreinterpretq_u16_s16(simde_vrev64q_s16(simde_vreinterpretq_s16_u16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_u16 #define vrev64q_u16(a) simde_vrev64q_u16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrev64q_u32(simde_uint32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_u32(a); #else return simde_vreinterpretq_u32_s32(simde_vrev64q_s32(simde_vreinterpretq_s32_u32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_u32 #define vrev64q_u32(a) simde_vrev64q_u32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrev64q_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrev64q_f16(a); #else return simde_vreinterpretq_f16_s16(simde_vrev64q_s16(simde_vreinterpretq_s16_f16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_f16 #define vrev64q_f16(a) simde_vrev64q_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrev64q_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_f32(a); #else return simde_vreinterpretq_f32_s32(simde_vrev64q_s32(simde_vreinterpretq_s32_f32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_f32 #define vrev64q_f32(a) simde_vrev64q_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vrev64_p8(simde_poly8x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_p8(a); #else return simde_vreinterpret_p8_s8(simde_vrev64_s8(simde_vreinterpret_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_p8 #define vrev64_p8(a) simde_vrev64_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vrev64_p16(simde_poly16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64_p16(a); #else return simde_vreinterpret_p16_s16(simde_vrev64_s16(simde_vreinterpret_s16_p16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64_p16 #define vrev64_p16(a) simde_vrev64_p16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vrev64q_p8(simde_poly8x16_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_p8(a); #else return simde_vreinterpretq_p8_s8(simde_vrev64q_s8(simde_vreinterpretq_s8_p8(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_p8 #define vrev64q_p8(a) simde_vrev64q_p8(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vrev64q_p16(simde_poly16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrev64q_p16(a); #else return simde_vreinterpretq_p16_s16(simde_vrev64q_s16(simde_vreinterpretq_s16_p16(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrev64q_p16 #define vrev64q_p16(a) simde_vrev64q_p16(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_REV64_H) */ /* :: End simde/simde/arm/neon/rev64.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rhadd.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) */ /* Formula to average two unsigned integers without overflow is from Hacker's Delight (ISBN 978-0-321-84268-8). * https://web.archive.org/web/20180831033349/http://hackersdelight.org/basics2.pdf#G525596 * avg_u = (x | y) - ((x ^ y) >> 1); * * Formula to average two signed integers (without widening): * avg_s = (x >> 1) + (y >> 1) + ((x | y) & 1); // use arithmetic shifts * * If hardware has avg_u but not avg_s then rebase input to be unsigned. * For example: s8 (-128..127) can be converted to u8 (0..255) by adding +128. * Idea borrowed from Intel's ARM_NEON_2_x86_SSE project. * https://github.com/intel/ARM_NEON_2_x86_SSE/blob/3c9879bf2dbef3274e0ed20f93cb8da3a2115ba1/NEON_2_SSE.h#L3171 * avg_s8 = avg_u8(a ^ 0x80, b ^ 0x80) ^ 0x80; */ #if !defined(SIMDE_ARM_NEON_RHADD_H) #define SIMDE_ARM_NEON_RHADD_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrhadd_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int8_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int8_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int8_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int8_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int8_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int8_t, 1))); } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_s8 #define vrhadd_s8(a, b) simde_vrhadd_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrhadd_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_add_pi16(_m_pand(_m_por(a_.m64, b_.m64), _mm_set1_pi16(HEDLEY_STATIC_CAST(int16_t, 1))), _mm_add_pi16(_m_psrawi(a_.m64, 1), _m_psrawi(b_.m64, 1))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100760) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int16_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int16_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int16_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int16_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int16_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int16_t, 1))); } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_s16 #define vrhadd_s16(a, b) simde_vrhadd_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vrhadd_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_add_pi32(_m_pand(_m_por(a_.m64, b_.m64), _mm_set1_pi32(HEDLEY_STATIC_CAST(int32_t, 1))), _mm_add_pi32(_m_psradi(a_.m64, 1), _m_psradi(b_.m64, 1))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100760) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int32_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int32_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int32_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int32_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int32_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int32_t, 1))); } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_s32 #define vrhadd_s32(a, b) simde_vrhadd_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrhadd_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100762) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(uint8_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(uint8_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(uint8_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(uint8_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(uint8_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(uint8_t, 1))); } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_u8 #define vrhadd_u8(a, b) simde_vrhadd_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrhadd_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_add_pi16(_m_pand(_m_por(a_.m64, b_.m64), _mm_set1_pi16(HEDLEY_STATIC_CAST(int16_t, 1))), _mm_add_pi16(_mm_srli_pi16(a_.m64, 1), _mm_srli_pi16(b_.m64, 1))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100760) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(uint16_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(uint16_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(uint16_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(uint16_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(uint16_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(uint16_t, 1))); } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_u16 #define vrhadd_u16(a, b) simde_vrhadd_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrhadd_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhadd_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_add_pi32(_m_pand(_m_por(a_.m64, b_.m64), _mm_set1_pi32(HEDLEY_STATIC_CAST(int32_t, 1))), _mm_add_pi32(_mm_srli_pi32(a_.m64, 1), _mm_srli_pi32(b_.m64, 1))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_100760) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(uint32_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(uint32_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(uint32_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(uint32_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(uint32_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(uint32_t, 1))); } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhadd_u32 #define vrhadd_u32(a, b) simde_vrhadd_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrhaddq_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) const __m128i msb = _mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, -128)); /* 0x80 */ r_.m128i = _mm_xor_si128(_mm_avg_epu8(_mm_xor_si128(a_.m128i, msb), _mm_xor_si128(b_.m128i, msb)), msb); #elif defined(SIMDE_WASM_SIMD128_NATIVE) const v128_t msb = wasm_i8x16_splat(HEDLEY_STATIC_CAST(int8_t, -128)); /* 0x80 */ r_.v128 = wasm_v128_xor(wasm_u8x16_avgr(wasm_v128_xor(a_.v128, msb), wasm_v128_xor(b_.v128, msb)), msb); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int8_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int8_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int8_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int8_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int8_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int8_t, 1))); } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_s8 #define vrhaddq_s8(a, b) simde_vrhaddq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vrhaddq_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) const __m128i msb = _mm_set1_epi16(HEDLEY_STATIC_CAST(int16_t, -32768)); /* 0x8000 */ r_.m128i = _mm_xor_si128(_mm_avg_epu16(_mm_xor_si128(a_.m128i, msb), _mm_xor_si128(b_.m128i, msb)), msb); #elif defined(SIMDE_WASM_SIMD128_NATIVE) const v128_t msb = wasm_i16x8_splat(HEDLEY_STATIC_CAST(int16_t, -32768)); /* 0x8000 */ r_.v128 = wasm_v128_xor(wasm_u16x8_avgr(wasm_v128_xor(a_.v128, msb), wasm_v128_xor(b_.v128, msb)), msb); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int16_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int16_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int16_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int16_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int16_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int16_t, 1))); } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_s16 #define vrhaddq_s16(a, b) simde_vrhaddq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vrhaddq_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_add_epi32(_mm_and_si128(_mm_or_si128(a_.m128i, b_.m128i), _mm_set1_epi32(1)), _mm_add_epi32(_mm_srai_epi32(a_.m128i, 1), _mm_srai_epi32(b_.m128i, 1))); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_add(wasm_v128_and(wasm_v128_or(a_.v128, b_.v128), wasm_i32x4_splat(1)), wasm_i32x4_add(wasm_i32x4_shr(a_.v128, 1), wasm_i32x4_shr(b_.v128, 1))); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (((a_.values >> HEDLEY_STATIC_CAST(int32_t, 1)) + (b_.values >> HEDLEY_STATIC_CAST(int32_t, 1))) + ((a_.values | b_.values) & HEDLEY_STATIC_CAST(int32_t, 1))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (((a_.values[i] >> HEDLEY_STATIC_CAST(int32_t, 1)) + (b_.values[i] >> HEDLEY_STATIC_CAST(int32_t, 1))) + ((a_.values[i] | b_.values[i]) & HEDLEY_STATIC_CAST(int32_t, 1))); } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_s32 #define vrhaddq_s32(a, b) simde_vrhaddq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrhaddq_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_avg_epu8(a_.m128i, b_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_u8x16_avgr(a_.v128, b_.v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (a_.values | b_.values) - ((a_.values ^ b_.values) >> HEDLEY_STATIC_CAST(uint8_t, 1)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] | b_.values[i]) - ((a_.values[i] ^ b_.values[i]) >> HEDLEY_STATIC_CAST(uint8_t, 1)); } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_u8 #define vrhaddq_u8(a, b) simde_vrhaddq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vrhaddq_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_avg_epu16(a_.m128i, b_.m128i); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_u16x8_avgr(a_.v128, b_.v128); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (a_.values | b_.values) - ((a_.values ^ b_.values) >> HEDLEY_STATIC_CAST(uint16_t, 1)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] | b_.values[i]) - ((a_.values[i] ^ b_.values[i]) >> HEDLEY_STATIC_CAST(uint16_t, 1)); } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_u16 #define vrhaddq_u16(a, b) simde_vrhaddq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrhaddq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrhaddq_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); #if defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_sub_epi32(_mm_or_si128(a_.m128i, b_.m128i), _mm_srli_epi32(_mm_xor_si128(a_.m128i, b_.m128i), 1)); #elif defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_sub(wasm_v128_or(a_.v128, b_.v128), wasm_u32x4_shr(wasm_v128_xor(a_.v128, b_.v128), 1)); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) r_.values = (a_.values | b_.values) - ((a_.values ^ b_.values) >> HEDLEY_STATIC_CAST(uint32_t, 1)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (a_.values[i] | b_.values[i]) - ((a_.values[i] ^ b_.values[i]) >> HEDLEY_STATIC_CAST(uint32_t, 1)); } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrhaddq_u32 #define vrhaddq_u32(a, b) simde_vrhaddq_u32((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RHADD_H) */ /* :: End simde/simde/arm/neon/rhadd.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnd.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RND_H) #define SIMDE_ARM_NEON_RND_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndh_f16(a); #else return simde_float16_from_float32(simde_math_truncf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndh_f16 #define vrndh_f16(a) simde_vrndh_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrnd_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrnd_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndh_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrnd_f16 #define vrnd_f16(a) simde_vrnd_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnd_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrnd_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_truncf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrnd_f32 #define vrnd_f32(a) simde_vrnd_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnd_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrnd_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_trunc(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd_f64 #define vrnd_f64(a) simde_vrnd_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndh_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndq_f16 #define vrndq_f16(a) simde_vrndq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndq_f32(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_trunc(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128 = _mm_round_ps(a_.m128, _MM_FROUND_TO_ZERO); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_trunc_ps(a_.m128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_truncf(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndq_f32 #define vrndq_f32(a) simde_vrndq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndq_f64(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_trunc(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128d = _mm_round_pd(a_.m128d, _MM_FROUND_TO_ZERO); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128d = _mm_trunc_pd(a_.m128d); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_trunc(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndq_f64 #define vrndq_f64(a) simde_vrndq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RND_H) */ /* :: End simde/simde/arm/neon/rnd.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnd32x.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RND32X_H) #define SIMDE_ARM_NEON_RND32X_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ // src: https://gcc.gnu.org/legacy-ml/gcc-patches/2019-09/msg00053.html SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnd32x_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd32x_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } else { r_.values[i] = simde_math_rintf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } } } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32x_f32 #define vrnd32x_f32(a) simde_vrnd32x_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnd32x_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd32x_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } else { r_.values[i] = simde_math_rint(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } } } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32x_f64 #define vrnd32x_f64(a) simde_vrnd32x_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrnd32xq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd32xq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } else { r_.values[i] = simde_math_rintf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } } } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32xq_f32 #define vrnd32xq_f32(a) simde_vrnd32xq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrnd32xq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd32xq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } else { r_.values[i] = simde_math_rint(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } } } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32xq_f64 #define vrnd32xq_f64(a) simde_vrnd32xq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RND32X_H) */ /* :: End simde/simde/arm/neon/rnd32x.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnd32z.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RND32Z_H) #define SIMDE_ARM_NEON_RND32Z_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ // src: https://gcc.gnu.org/legacy-ml/gcc-patches/2019-09/msg00053.html SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnd32z_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd32z_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } else { r_.values[i] = simde_math_truncf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } } } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32z_f32 #define vrnd32z_f32(a) simde_vrnd32z_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnd32z_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd32z_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } else { r_.values[i] = simde_math_trunc(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } } } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32z_f64 #define vrnd32z_f64(a) simde_vrnd32z_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrnd32zq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd32zq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } else { r_.values[i] = simde_math_truncf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT32_MIN); } } } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32zq_f32 #define vrnd32zq_f32(a) simde_vrnd32zq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrnd32zq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd32zq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } else { r_.values[i] = simde_math_trunc(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT32_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT32_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT32_MIN); } } } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd32zq_f64 #define vrnd32zq_f64(a) simde_vrnd32zq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RND32Z_H) */ /* :: End simde/simde/arm/neon/rnd32z.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnd64x.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RND64X_H) #define SIMDE_ARM_NEON_RND64X_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ // src: https://gcc.gnu.org/legacy-ml/gcc-patches/2019-09/msg00053.html SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnd64x_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd64x_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } else { r_.values[i] = simde_math_rintf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } } } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64x_f32 #define vrnd64x_f32(a) simde_vrnd64x_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnd64x_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd64x_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } else { r_.values[i] = simde_math_rint(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } } } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64x_f64 #define vrnd64x_f64(a) simde_vrnd64x_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrnd64xq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd64xq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } else { r_.values[i] = simde_math_rintf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } } } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64xq_f32 #define vrnd64xq_f32(a) simde_vrnd64xq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrnd64xq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd64xq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } else { r_.values[i] = simde_math_rint(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } } } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64xq_f64 #define vrnd64xq_f64(a) simde_vrnd64xq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RND64X_H) */ /* :: End simde/simde/arm/neon/rnd64x.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnd64z.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RND64Z_H) #define SIMDE_ARM_NEON_RND64Z_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ // src: https://gcc.gnu.org/legacy-ml/gcc-patches/2019-09/msg00053.html SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnd64z_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd64z_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } else { r_.values[i] = simde_math_truncf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } } } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64z_f32 #define vrnd64z_f32(a) simde_vrnd64z_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnd64z_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd64z_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } else { r_.values[i] = simde_math_trunc(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } } } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64z_f64 #define vrnd64z_f64(a) simde_vrnd64z_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrnd64zq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) return vrnd64zq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnanf(a_.values[i]) || simde_math_isinff(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } else { r_.values[i] = simde_math_truncf(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(float, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(float, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(float, INT64_MIN); } } } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64zq_f32 #define vrnd64zq_f32(a) simde_vrnd64zq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrnd64zq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FRINT) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(18, 0, 0)) return vrnd64zq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { if (simde_math_isnan(a_.values[i]) || simde_math_isinf(a_.values[i])) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } else { r_.values[i] = simde_math_trunc(a_.values[i]); if (r_.values[i] > HEDLEY_STATIC_CAST(double, INT64_MAX) || r_.values[i] < HEDLEY_STATIC_CAST(double, INT64_MIN)) { r_.values[i] = HEDLEY_STATIC_CAST(double, INT64_MIN); } } } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnd64zq_f64 #define vrnd64zq_f64(a) simde_vrnd64zq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RND64Z_H) */ /* :: End simde/simde/arm/neon/rnd64z.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rnda.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDA_H) #define SIMDE_ARM_NEON_RNDA_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndah_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndah_f16(a); #else return simde_float16_from_float32(simde_math_roundf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndah_f16 #define vrndah_f16(a) simde_vrndah_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrnda_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrnda_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndah_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrnda_f16 #define vrnda_f16(a) simde_vrnda_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrnda_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrnda_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_roundf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrnda_f32 #define vrnda_f32(a) simde_vrnda_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrnda_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrnda_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_round(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrnda_f64 #define vrnda_f64(a) simde_vrnda_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndaq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndaq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndah_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndaq_f16 #define vrndaq_f16(a) simde_vrndaq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndaq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndaq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_roundf(a_.values[i]); } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndaq_f32 #define vrndaq_f32(a) simde_vrndaq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndaq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndaq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_round(a_.values[i]); } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndaq_f64 #define vrndaq_f64(a) simde_vrndaq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDA_H) */ /* :: End simde/simde/arm/neon/rnda.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rndm.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020-2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDM_H) #define SIMDE_ARM_NEON_RNDM_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndmh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndmh_f16(a); #else return simde_float16_from_float32(simde_math_floorf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndmh_f16 #define vrndmh_f16(a) simde_vrndmh_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrndm_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndm_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndmh_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndm_f16 #define vrndm_f16(a) simde_vrndm_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrndm_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndm_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_floorf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndm_f32 #define vrndm_f32(a) simde_vrndm_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrndm_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndm_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_floor(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndm_f64 #define vrndm_f64(a) simde_vrndm_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndmq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndmq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndmh_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndmq_f16 #define vrndmq_f16(a) simde_vrndmq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndmq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndmq_f32(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_floor(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128 = _mm_round_ps(a_.m128, _MM_FROUND_TO_NEG_INF); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_floor_ps(a_.m128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_floorf(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndmq_f32 #define vrndmq_f32(a) simde_vrndmq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndmq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndmq_f64(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_floor(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128d = _mm_round_pd(a_.m128d, _MM_FROUND_TO_NEG_INF); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128d = _mm_floor_pd(a_.m128d); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_floor(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndmq_f64 #define vrndmq_f64(a) simde_vrndmq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDM_H) */ /* :: End simde/simde/arm/neon/rndm.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rndi.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020-2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDI_H) #define SIMDE_ARM_NEON_RNDI_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndih_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16) return vrndih_f16(a); #else return simde_float16_from_float32(simde_math_nearbyintf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndih_f16 #define vrndih_f16(a) simde_vrndih_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrndi_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16) return vrndi_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndih_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndi_f16 #define vrndi_f16(a) simde_vrndi_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrndi_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) return vrndi_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_nearbyintf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndi_f32 #define vrndi_f32(a) simde_vrndi_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrndi_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) return vrndi_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_nearbyint(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndi_f64 #define vrndi_f64(a) simde_vrndi_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndiq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16) return vrndiq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndih_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndiq_f16 #define vrndiq_f16(a) simde_vrndiq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndiq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) return vrndiq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128 = _mm_round_ps(a_.m128, _MM_FROUND_CUR_DIRECTION); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_nearbyintf(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndiq_f32 #define vrndiq_f32(a) simde_vrndiq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndiq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_GCC_95399) return vrndiq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128d = _mm_round_pd(a_.m128d, _MM_FROUND_CUR_DIRECTION); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_nearbyint(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndiq_f64 #define vrndiq_f64(a) simde_vrndiq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDI_H) */ /* :: End simde/simde/arm/neon/rndi.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rndn.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020-2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDN_H) #define SIMDE_ARM_NEON_RNDN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndnh_f16(simde_float16_t a) { #if \ defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && \ (!defined(HEDLEY_GCC_VERSION) || (defined(SIMDE_ARM_NEON_A64V8_NATIVE) && HEDLEY_GCC_VERSION_CHECK(8,0,0))) && defined(SIMDE_ARM_NEON_FP16) return vrndnh_f16(a); #else simde_float32_t a_ = simde_float16_to_float32(a); return simde_float16_from_float32(simde_math_roundevenf(a_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndnh_f16 #define vrndnh_f16(a) simde_vrndnh_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrndns_f32(simde_float32_t a) { #if \ defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && \ (!defined(HEDLEY_GCC_VERSION) || (defined(SIMDE_ARM_NEON_A64V8_NATIVE) && HEDLEY_GCC_VERSION_CHECK(8,0,0))) return vrndns_f32(a); #else return simde_math_roundevenf(a); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndns_f32 #define vrndns_f32(a) simde_vrndns_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrndn_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndn_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndnh_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndn_f16 #define vrndn_f16(a) simde_vrndn_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrndn_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndn_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndns_f32(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndn_f32 #define vrndn_f32(a) simde_vrndn_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrndn_f64(simde_float64x1_t a) { #if \ defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndn_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_roundeven(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndn_f64 #define vrndn_f64(a) simde_vrndn_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndnq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndnq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndnh_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndnq_f16 #define vrndnq_f16(a) simde_vrndnq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndnq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndnq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128 = _mm_round_ps(a_.m128, _MM_FROUND_TO_NEAREST_INT); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndns_f32(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndnq_f32 #define vrndnq_f32(a) simde_vrndnq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndnq_f64(simde_float64x2_t a) { #if \ defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndnq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128d = _mm_round_pd(a_.m128d, _MM_FROUND_TO_NEAREST_INT); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_roundeven(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndnq_f64 #define vrndnq_f64(a) simde_vrndnq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDN_H) */ /* :: End simde/simde/arm/neon/rndn.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rndp.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020-2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDP_H) #define SIMDE_ARM_NEON_RNDP_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndph_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndph_f16(a); #else return simde_float16_from_float32(simde_math_ceilf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndph_f16 #define vrndph_f16(a) simde_vrndph_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrndp_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndp_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndph_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndp_f16 #define vrndp_f16(a) simde_vrndp_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrndp_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndp_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_ceilf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndp_f32 #define vrndp_f32(a) simde_vrndp_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrndp_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndp_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_ceil(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndp_f64 #define vrndp_f64(a) simde_vrndp_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndpq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndpq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndph_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndpq_f16 #define vrndpq_f16(a) simde_vrndpq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndpq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndpq_f32(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_ceil(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128 = _mm_round_ps(a_.m128, _MM_FROUND_TO_POS_INF); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_ceil_ps(a_.m128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_ceilf(a_.values[i]); } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrndpq_f32 #define vrndpq_f32(a) simde_vrndpq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndpq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndpq_f64(a); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_ceil(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_X86_SSE4_1_NATIVE) r_.m128d = _mm_round_pd(a_.m128d, _MM_FROUND_TO_POS_INF); #elif defined(SIMDE_X86_SVML_NATIVE) && defined(SIMDE_X86_SSE_NATIVE) r_.m128d = _mm_ceil_pd(a_.m128d); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_ceil(a_.values[i]); } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndpq_f64 #define vrndpq_f64(a) simde_vrndpq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDP_H) */ /* :: End simde/simde/arm/neon/rndp.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rndx.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RNDX_H) #define SIMDE_ARM_NEON_RNDX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrndxh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndxh_f16(a); #else return simde_float16_from_float32(simde_math_rintf(simde_float16_to_float32(a))); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndxh_f16 #define vrndxh_f16(a) simde_vrndxh_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrndx_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndx_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndxh_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndx_f16 #define vrndx_f16(a) simde_vrndx_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrndx_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndx_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_rintf(a_.values[i]); } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndx_f32 #define vrndx_f32(a) simde_vrndx_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrndx_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndx_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_rint(a_.values[i]); } return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndx_f64 #define vrndx_f64(a) simde_vrndx_f64(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrndxq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrndxq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrndxh_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndxq_f16 #define vrndxq_f16(a) simde_vrndxq_f16(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrndxq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) return vrndxq_f32(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_rintf(a_.values[i]); } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrndxq_f32 #define vrndxq_f32(a) simde_vrndxq_f32(a) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrndxq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrndxq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_rint(a_.values[i]); } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrndxq_f64 #define vrndxq_f64(a) simde_vrndxq_f64(a) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RNDX_H) */ /* :: End simde/simde/arm/neon/rndx.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rshl.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore */ #if !defined(SIMDE_ARM_NEON_RSHL_H) #define SIMDE_ARM_NEON_RSHL_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* Notes from the implementer (Christopher Moore aka rosbif) * * I have tried to exactly reproduce the documented behaviour of the * ARM NEON rshl and rshlq intrinsics. * This is complicated for the following reasons:- * * a) Negative shift counts shift right. * * b) Only the low byte of the shift count is used but the shift count * is not limited to 8-bit values (-128 to 127). * * c) Overflow must be avoided when rounding, together with sign change * warning/errors in the C versions. * * d) Intel SIMD is not nearly as complete as NEON and AltiVec. * There were no intrisics with a vector shift count before AVX2 which * only has 32 and 64-bit logical ones and only a 32-bit arithmetic * one. The others need AVX512. There are no 8-bit shift intrinsics at * all, even with a scalar shift count. It is surprising to use AVX2 * and even AVX512 to implement a 64-bit vector operation. * * e) Many shift implementations, and the C standard, do not treat a * shift count >= the object's size in bits as one would expect. * (Personally I feel that > is silly but == can be useful.) * * Note that even the C17/18 standard does not define the behaviour of * a right shift of a negative value. * However Evan and I agree that all compilers likely to be used * implement this as an arithmetic right shift with sign extension. * If this is not the case it could be replaced by a logical right shift * if negative values are complemented before and after the shift. * * Some of the SIMD translations may be slower than the portable code, * particularly those for vectors with only one or two elements. * But I had fun writing them ;-) * */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vrshld_s64(int64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrshld_s64(a, b); #else b = HEDLEY_STATIC_CAST(int8_t, b); return (simde_math_llabs(b) >= 64) ? 0 : (b >= 0) ? (a << b) : (a <= 0 ? ((a + (INT64_C(1) << (-b - 1))) >> -b) : HEDLEY_STATIC_CAST(int64_t, (HEDLEY_STATIC_CAST(uint64_t, (a + (INT64_C(1) << (-b - 1)))) >> -b))); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshld_s64 #define vrshld_s64(a, b) simde_vrshld_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vrshld_u64(uint64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrshld_u64(a, HEDLEY_STATIC_CAST(int64_t, b)); #else b = HEDLEY_STATIC_CAST(int8_t, b); return (b >= 64) ? 0 : (b >= 0) ? (a << b) : (b >= -64) ? (((b == -64) ? 0 : (a >> -b)) + ((a >> (-b - 1)) & 1)) : 0; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshld_u64 #define vrshld_u64(a, b) simde_vrshld_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrshl_s8 (const simde_int8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi16(zero, zero); __m128i a128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(b_.m64)); __m128i a128_shr = _mm_srav_epi16(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi16(a128, b128), _mm_srai_epi16(_mm_sub_epi16(a128_shr, ff), 1), _mm_cmpgt_epi16(zero, b128)); r_.m64 = _mm_movepi64_pi64(_mm_cvtepi16_epi8(r128)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi32(zero, zero); __m256i a256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(a_.m64)); __m256i b256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(b_.m64)); __m256i a256_shr = _mm256_srav_epi32(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srai_epi32(_mm256_sub_epi32(a256_shr, ff), 1), _mm256_cmpgt_epi32(zero, b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi32(0x0C080400)); r_.m64 = _mm_set_pi32(simde_mm256_extract_epi32(r256, 4), simde_mm256_extract_epi32(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (simde_math_abs(b_.values[i]) >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FUL))))); } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_s8 #define vrshl_s8(a, b) simde_vrshl_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrshl_s16 (const simde_int16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i a128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(b_.m64)); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i a128_shr = _mm_srav_epi32(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srai_epi32(_mm_sub_epi32(a128_shr, ff), 1), _mm_cmpgt_epi32(zero, b128)); r_.m64 = _mm_movepi64_pi64(_mm_shuffle_epi8(r128, _mm_set1_epi64x(0x0D0C090805040100))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (simde_math_abs(b_.values[i]) >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFUL))))); } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_s16 #define vrshl_s16(a, b) simde_vrshl_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vrshl_s32 (const simde_int32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i a128_shr = _mm_srav_epi32(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srai_epi32(_mm_sub_epi32(a128_shr, ff), 1), _mm_cmpgt_epi32(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int32_t, (simde_math_abs(b_.values[i]) >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFFFFFUL))))); } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_s32 #define vrshl_s32(a, b) simde_vrshl_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vrshl_s64 (const simde_int64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_s64(a, b); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a), b_ = simde_int64x1_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi64(zero, zero); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi64(_mm_slli_epi64(b128, 56), 56); __m128i a128_shr = _mm_srav_epi64(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128), _mm_srai_epi64(_mm_sub_epi64(a128_shr, ff), 1), _mm_cmpgt_epi64(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ones = _mm_set1_epi64x(1); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); __m128i maska = _mm_cmpgt_epi64(zero, a128); __m128i b128_abs = _mm_and_si128(_mm_abs_epi8(b128), _mm_set1_epi64x(0xFF)); __m128i a128_rnd = _mm_and_si128(_mm_srlv_epi64(a128, _mm_sub_epi64(b128_abs, ones)), ones); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128_abs), _mm_add_epi64(_mm_xor_si128(_mm_srlv_epi64(_mm_xor_si128(a128, maska), b128_abs), maska), a128_rnd), _mm_cmpgt_epi64(zero, _mm_slli_epi64(b128, 56))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrshld_s64(a_.values[i], b_.values[i]); } #endif return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_s64 #define vrshl_s64(a, b) simde_vrshl_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrshl_u8 (const simde_uint8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi16(zero, zero); __m128i a128 = _mm_cvtepu8_epi16(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(b_.m64)); __m128i a128_shr = _mm_srlv_epi16(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi16(a128, b128), _mm_srli_epi16(_mm_sub_epi16(a128_shr, ff), 1), _mm_cmpgt_epi16(zero, b128)); r_.m64 = _mm_movepi64_pi64(_mm_cvtepi16_epi8(r128)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi32(zero, zero); __m256i a256 = _mm256_cvtepu8_epi32(_mm_movpi64_epi64(a_.m64)); __m256i b256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(b_.m64)); __m256i a256_shr = _mm256_srlv_epi32(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srli_epi32(_mm256_sub_epi32(a256_shr, ff), 1), _mm256_cmpgt_epi32(zero, b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi32(0x0C080400)); r_.m64 = _mm_set_pi32(simde_mm256_extract_epi32(r256, 4), simde_mm256_extract_epi32(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (b_.values[i] >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -8) ? (((b_.values[i] == -8) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0); } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_u8 #define vrshl_u8(a, b) simde_vrshl_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrshl_u16 (const simde_uint16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i a128 = _mm_cvtepu16_epi32(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(b_.m64)); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i a128_shr = _mm_srlv_epi32(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srli_epi32(_mm_sub_epi32(a128_shr, ff), 1), _mm_cmpgt_epi32(zero, b128)); r_.m64 = _mm_movepi64_pi64(_mm_shuffle_epi8(r128, _mm_set1_epi64x(0x0D0C090805040100))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (b_.values[i] >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -16) ? (((b_.values[i] == -16) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0); } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_u16 #define vrshl_u16(a, b) simde_vrshl_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrshl_u32 (const simde_uint32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i a128_shr = _mm_srlv_epi32(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srli_epi32(_mm_sub_epi32(a128_shr, ff), 1), _mm_cmpgt_epi32(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (b_.values[i] >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -32) ? (((b_.values[i] == -32) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_u32 #define vrshl_u32(a, b) simde_vrshl_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vrshl_u64 (const simde_uint64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshl_u64(a, b); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); simde_int64x1_private b_ = simde_int64x1_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi64(zero, zero); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi64(_mm_slli_epi64(b128, 56), 56); __m128i a128_shr = _mm_srlv_epi64(a128, _mm_xor_si128(b128, ff)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128), _mm_srli_epi64(_mm_sub_epi64(a128_shr, ff), 1), _mm_cmpgt_epi64(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) const __m128i ones = _mm_set1_epi64x(1); const __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); __m128i b128_abs = _mm_and_si128(_mm_abs_epi8(b128), _mm_set1_epi64x(0xFF)); __m128i a128_shr = _mm_srlv_epi64(a128, _mm_sub_epi64(b128_abs, ones)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128_abs), _mm_srli_epi64(_mm_add_epi64(a128_shr, ones), 1), _mm_cmpgt_epi64(_mm_setzero_si128(), _mm_slli_epi64(b128, 56))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrshld_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshl_u64 #define vrshl_u64(a, b) simde_vrshl_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vrshlq_s8 (const simde_int8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_s8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed char) zero = vec_splats(HEDLEY_STATIC_CAST( signed char, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned char, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) max = vec_splats(HEDLEY_STATIC_CAST(unsigned char, 8)); SIMDE_POWER_ALTIVEC_VECTOR(signed char) a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) b_abs; b_abs = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_abs(b)); a_shr = vec_sra(a, vec_sub(b_abs, ones)); return vec_and(vec_sel(vec_sl(a, b_abs), vec_add(vec_sra(a_shr, ones), vec_and(a_shr, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), ones))), vec_cmplt(b, zero)), vec_cmplt(b_abs, max)); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi16(zero, zero); __m256i a256 = _mm256_cvtepi8_epi16(a_.m128i); __m256i b256 = _mm256_cvtepi8_epi16(b_.m128i); __m256i a256_shr = _mm256_srav_epi16(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi16(a256, b256), _mm256_srai_epi16(_mm256_sub_epi16(a256_shr, ff), 1), _mm256_cmpgt_epi16(zero, b256)); r_.m128i = _mm256_cvtepi16_epi8(r256); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (simde_math_abs(b_.values[i]) >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int8_t, ((HEDLEY_STATIC_CAST(uint8_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FUL))))); } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_s8 #define vrshlq_s8(a, b) simde_vrshlq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vrshlq_s16 (const simde_int16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_s16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed short) zero = vec_splats(HEDLEY_STATIC_CAST( signed short, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) max = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(signed short) a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) b_abs; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); a_shr = vec_sra(a, vec_sub(b_abs, ones)); return vec_and(vec_sel(vec_sl(a, b_abs), vec_add(vec_sra(a_shr, ones), vec_and(a_shr, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed short), ones))), vec_cmplt(vec_sl(b, shift), zero)), vec_cmplt(b_abs, max)); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi16(zero, zero); __m128i B = _mm_srai_epi16(_mm_slli_epi16(b_.m128i, 8), 8); __m128i a_shr = _mm_srav_epi16(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi16(a_.m128i, B), _mm_srai_epi16(_mm_sub_epi16(a_shr, ff), 1), _mm_cmpgt_epi16(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_ARCH_AMD64) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi32(zero, zero); __m256i a256 = _mm256_cvtepi16_epi32(a_.m128i); __m256i b256 = _mm256_cvtepi16_epi32(b_.m128i); b256 = _mm256_srai_epi32(_mm256_slli_epi32(b256, 24), 24); __m256i a256_shr = _mm256_srav_epi32(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srai_epi32(_mm256_sub_epi32(a256_shr, ff), 1), _mm256_cmpgt_epi32(zero, b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi64x(0x0D0C090805040100)); r_.m128i = _mm_set_epi64x(simde_mm256_extract_epi64(r256, 2), simde_mm256_extract_epi64(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (simde_math_abs(b_.values[i]) >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int16_t, ((HEDLEY_STATIC_CAST(uint16_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0x7FFFUL))))); } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_s16 #define vrshlq_s16(a, b) simde_vrshlq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vrshlq_s32 (const simde_int32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_s32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed int) zero = vec_splats(HEDLEY_STATIC_CAST( signed int, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) max = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(signed int) a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) b_abs; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); a_shr = vec_sra(a, vec_sub(b_abs, ones)); return vec_and(vec_sel(vec_sl(a, b_abs), vec_add(vec_sra(a_shr, ones), vec_and(a_shr, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed int), ones))), vec_cmplt(vec_sl(b, shift), zero)), vec_cmplt(b_abs, max)); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i B = _mm_srai_epi32(_mm_slli_epi32(b_.m128i, 24), 24); __m128i a_shr = _mm_srav_epi32(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi32(a_.m128i, B), _mm_srai_epi32(_mm_sub_epi32(a_shr, ff), 1), _mm_cmpgt_epi32(zero, B)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int32_t, (simde_math_abs(b_.values[i]) >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : ((a_.values[i] <= 0) ? ((a_.values[i] + (1 << (-b_.values[i] - 1))) >> -b_.values[i]) : HEDLEY_STATIC_CAST(int32_t, ((HEDLEY_STATIC_CAST(uint32_t, (a_.values[i] + (1 << (-b_.values[i] - 1)))) >> -b_.values[i]) & (0X7FFFFFFFUL))))); } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_s32 #define vrshlq_s32(a, b) simde_vrshlq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vrshlq_s64 (const simde_int64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_s64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed long long) zero = vec_splats(HEDLEY_STATIC_CAST( signed long long, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 64 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) max = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 64)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(signed long long) a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) b_abs; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); a_shr = vec_sra(a, vec_sub(b_abs, ones)); HEDLEY_DIAGNOSTIC_PUSH #if defined(SIMDE_BUG_CLANG_46770) SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ #endif return vec_and(vec_sel(vec_sl(a, b_abs), vec_add(vec_sra(a_shr, ones), vec_and(a_shr, HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed long long), ones))), vec_cmplt(vec_sl(b, shift), zero)), vec_cmplt(b_abs, max)); HEDLEY_DIAGNOSTIC_POP #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i B = _mm_srai_epi64(_mm_slli_epi64(b_.m128i, 56), 56); __m128i a_shr = _mm_srav_epi64(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, B), _mm_srai_epi64(_mm_sub_epi64(a_shr, ff), 1), _mm_cmpgt_epi64(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ones = _mm_set1_epi64x(1); __m128i maska = _mm_cmpgt_epi64(zero, a_.m128i); __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b_.m128i), _mm_set1_epi64x(0xFF)); __m128i a_rnd = _mm_and_si128(_mm_srlv_epi64(a_.m128i, _mm_sub_epi64(b_abs, ones)), ones); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, b_abs), _mm_add_epi64(_mm_xor_si128(_mm_srlv_epi64(_mm_xor_si128(a_.m128i, maska), b_abs), maska), a_rnd), _mm_cmpgt_epi64(zero, _mm_slli_epi64(b_.m128i, 56))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrshld_s64(a_.values[i], b_.values[i]); } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_s64 #define vrshlq_s64(a, b) simde_vrshlq_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vrshlq_u8 (const simde_uint8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_u8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed char) zero = vec_splats(HEDLEY_STATIC_CAST( signed char, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned char, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) max = vec_splats(HEDLEY_STATIC_CAST(unsigned char, 8)); SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) b_abs, b_abs_dec, a_shr; b_abs = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_abs(b)); b_abs_dec = vec_sub(b_abs, ones); a_shr = vec_and(vec_sr(a, b_abs_dec), vec_cmplt(b_abs_dec, max)); return vec_sel(vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, max)), vec_sr(vec_add(a_shr, ones), ones), vec_cmplt(b, zero)); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi32(zero, zero); __m256i a256 = _mm256_cvtepu8_epi16(a_.m128i); __m256i b256 = _mm256_cvtepi8_epi16(b_.m128i); __m256i a256_shr = _mm256_srlv_epi16(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi16(a256, b256), _mm256_srli_epi16(_mm256_sub_epi16(a256_shr, ff), 1), _mm256_cmpgt_epi16(zero, b256)); r_.m128i = _mm256_cvtepi16_epi8(r256); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (b_.values[i] >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -8) ? (((b_.values[i] == -8) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0); } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_u8 #define vrshlq_u8(a, b) simde_vrshlq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vrshlq_u16 (const simde_uint16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_u16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed short) zero = vec_splats(HEDLEY_STATIC_CAST( signed short, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) max = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned short, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) b_abs, b_abs_dec, a_shr; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); b_abs_dec = vec_sub(b_abs, ones); a_shr = vec_and(vec_sr(a, b_abs_dec), vec_cmplt(b_abs_dec, max)); return vec_sel(vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, max)), vec_sr(vec_add(a_shr, ones), ones), vec_cmplt(vec_sl(b, shift), zero)); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi16(zero, zero); __m128i B = _mm_srai_epi16(_mm_slli_epi16(b_.m128i, 8), 8); __m128i a_shr = _mm_srlv_epi16(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi16(a_.m128i, B), _mm_srli_epi16(_mm_sub_epi16(a_shr, ff), 1), _mm_cmpgt_epi16(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_ARCH_AMD64) const __m256i zero = _mm256_setzero_si256(); const __m256i ff = _mm256_cmpeq_epi32(zero, zero); __m256i a256 = _mm256_cvtepu16_epi32(a_.m128i); __m256i b256 = _mm256_cvtepi16_epi32(b_.m128i); b256 = _mm256_srai_epi32(_mm256_slli_epi32(b256, 24), 24); __m256i a256_shr = _mm256_srlv_epi32(a256, _mm256_xor_si256(b256, ff)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srli_epi32(_mm256_sub_epi32(a256_shr, ff), 1), _mm256_cmpgt_epi32(zero, b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi64x(0x0D0C090805040100)); r_.m128i = _mm_set_epi64x(simde_mm256_extract_epi64(r256, 2), simde_mm256_extract_epi64(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (b_.values[i] >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -16) ? (((b_.values[i] == -16) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0); } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_u16 #define vrshlq_u16(a, b) simde_vrshlq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrshlq_u32 (const simde_uint32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_u32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed int) zero = vec_splats(HEDLEY_STATIC_CAST( signed int, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) max = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) b_abs, b_abs_dec, a_shr; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); b_abs_dec = vec_sub(b_abs, ones); a_shr = vec_and(vec_sr(a, b_abs_dec), vec_cmplt(b_abs_dec, max)); return vec_sel(vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, max)), vec_sr(vec_add(a_shr, ones), ones), vec_cmplt(vec_sl(b, shift), zero)); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi32(zero, zero); __m128i B = _mm_srai_epi32(_mm_slli_epi32(b_.m128i, 24), 24); __m128i a_shr = _mm_srlv_epi32(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi32(a_.m128i, B), _mm_srli_epi32(_mm_sub_epi32(a_shr, ff), 1), _mm_cmpgt_epi32(zero, B)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (b_.values[i] >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (b_.values[i] >= -32) ? (((b_.values[i] == -32) ? 0 : (a_.values[i] >> -b_.values[i])) + ((a_.values[i] >> (-b_.values[i] - 1)) & 1)) : 0; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_u32 #define vrshlq_u32(a, b) simde_vrshlq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vrshlq_u64 (const simde_uint64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrshlq_u64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) const SIMDE_POWER_ALTIVEC_VECTOR( signed long long) zero = vec_splats(HEDLEY_STATIC_CAST( signed long long, 0)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) ones = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 1)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) shift = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 64 - 8)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) max = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 64)); const SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) ff = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 0xFF)); SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) b_abs, b_abs_dec, a_shr; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), ff); b_abs_dec = vec_sub(b_abs, ones); a_shr = vec_and(vec_sr(a, b_abs_dec), vec_cmplt(b_abs_dec, max)); HEDLEY_DIAGNOSTIC_PUSH #if defined(SIMDE_BUG_CLANG_46770) SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ #endif return vec_sel(vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, max)), vec_sr(vec_add(a_shr, ones), ones), vec_cmplt(vec_sl(b, shift), zero)); HEDLEY_DIAGNOSTIC_POP #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); simde_int64x2_private b_ = simde_int64x2_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) const __m128i zero = _mm_setzero_si128(); const __m128i ff = _mm_cmpeq_epi64(zero, zero); __m128i B = _mm_srai_epi64(_mm_slli_epi64(b_.m128i, 56), 56); __m128i a_shr = _mm_srlv_epi64(a_.m128i, _mm_xor_si128(B, ff)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, B), _mm_srli_epi64(_mm_sub_epi64(a_shr, ff), 1), _mm_cmpgt_epi64(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) const __m128i ones = _mm_set1_epi64x(1); __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b_.m128i), _mm_set1_epi64x(0xFF)); __m128i a_shr = _mm_srlv_epi64(a_.m128i, _mm_sub_epi64(b_abs, ones)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, b_abs), _mm_srli_epi64(_mm_add_epi64(a_shr, ones), 1), _mm_cmpgt_epi64(_mm_setzero_si128(), _mm_slli_epi64(b_.m128i, 56))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrshld_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshlq_u64 #define vrshlq_u64(a, b) simde_vrshlq_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSHL_H) */ /* :: End simde/simde/arm/neon/rshl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rshrn_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSHRN_HIGH_N_H) #define SIMDE_ARM_NEON_RSHRN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rshrn_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) */ #if !defined(SIMDE_ARM_NEON_RSHRN_N_H) #define SIMDE_ARM_NEON_RSHRN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_s16(a, n) vrshrn_n_s16((a), (n)) #else #define simde_vrshrn_n_s16(a, n) simde_vmovn_s16(simde_vrshrq_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_s16 #define vrshrn_n_s16(a, n) simde_vrshrn_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_s32(a, n) vrshrn_n_s32((a), (n)) #else #define simde_vrshrn_n_s32(a, n) simde_vmovn_s32(simde_vrshrq_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_s32 #define vrshrn_n_s32(a, n) simde_vrshrn_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_s64(a, n) vrshrn_n_s64((a), (n)) #else #define simde_vrshrn_n_s64(a, n) simde_vmovn_s64(simde_vrshrq_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_s64 #define vrshrn_n_s64(a, n) simde_vrshrn_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_u16(a, n) vrshrn_n_u16((a), (n)) #else #define simde_vrshrn_n_u16(a, n) simde_vmovn_u16(simde_vrshrq_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_u16 #define vrshrn_n_u16(a, n) simde_vrshrn_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_u32(a, n) vrshrn_n_u32((a), (n)) #else #define simde_vrshrn_n_u32(a, n) simde_vmovn_u32(simde_vrshrq_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_u32 #define vrshrn_n_u32(a, n) simde_vrshrn_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrshrn_n_u64(a, n) vrshrn_n_u64((a), (n)) #else #define simde_vrshrn_n_u64(a, n) simde_vmovn_u64(simde_vrshrq_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrshrn_n_u64 #define vrshrn_n_u64(a, n) simde_vrshrn_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSHRN_N_H) */ /* :: End simde/simde/arm/neon/rshrn_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_s16(r, a, n) vrshrn_high_n_s16((r), (a), (n)) #else #define simde_vrshrn_high_n_s16(r, a, n) simde_vcombine_s8(r, simde_vrshrn_n_s16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_s16 #define vrshrn_high_n_s16(r, a, n) simde_vrshrn_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_s32(r, a, n) vrshrn_high_n_s32((r), (a), (n)) #else #define simde_vrshrn_high_n_s32(r, a, n) simde_vcombine_s16(r, simde_vrshrn_n_s32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_s32 #define vrshrn_high_n_s32(r, a, n) simde_vrshrn_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_s64(r, a, n) vrshrn_high_n_s64((r), (a), (n)) #else #define simde_vrshrn_high_n_s64(r, a, n) simde_vcombine_s32(r, simde_vrshrn_n_s64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_s64 #define vrshrn_high_n_s64(r, a, n) simde_vrshrn_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_u16(r, a, n) vrshrn_high_n_u16((r), (a), (n)) #else #define simde_vrshrn_high_n_u16(r, a, n) simde_vcombine_u8(r, simde_vrshrn_n_u16(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_u16 #define vrshrn_high_n_u16(r, a, n) simde_vrshrn_high_n_u16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_u32(r, a, n) vrshrn_high_n_u32((r), (a), (n)) #else #define simde_vrshrn_high_n_u32(r, a, n) simde_vcombine_u16(r, simde_vrshrn_n_u32(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_u32 #define vrshrn_high_n_u32(r, a, n) simde_vrshrn_high_n_u32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrshrn_high_n_u64(r, a, n) vrshrn_high_n_u64((r), (a), (n)) #else #define simde_vrshrn_high_n_u64(r, a, n) simde_vcombine_u32(r, simde_vrshrn_n_u64(a, n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrshrn_high_n_u64 #define vrshrn_high_n_u64(r, a, n) simde_vrshrn_high_n_u64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSHRN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/rshrn_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rsqrte.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSQRTE_H) #define SIMDE_ARM_NEON_RSQRTE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrsqrteh_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrteh_f16(a); #else #if defined(simde_math_sqrtf) simde_float32_t r_; simde_float32_t a_ = simde_float16_to_float32(a); r_ = 1.0f / simde_math_sqrtf(a_); return simde_float16_from_float32(r_); #else HEDLEY_UNREACHABLE(); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrteh_f16 #define vrsqrteh_f16(a) simde_vrsqrteh_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrsqrtes_f32(simde_float32_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrtes_f32(a); #else #if defined(SIMDE_IEEE754_STORAGE) /* https://basesandframes.files.wordpress.com/2020/04/even_faster_math_functions_green_2020.pdf Pages 100 - 103 */ #if SIMDE_ACCURACY_PREFERENCE <= 0 return (INT32_C(0x5F37624F) - (a >> 1)); #else simde_float32 x = a; simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x; int32_t ix; simde_memcpy(&ix, &x, sizeof(ix)); #if SIMDE_ACCURACY_PREFERENCE == 1 ix = INT32_C(0x5F375A82) - (ix >> 1); #else ix = INT32_C(0x5F37599E) - (ix >> 1); #endif simde_memcpy(&x, &ix, sizeof(x)); #if SIMDE_ACCURACY_PREFERENCE >= 2 x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); #endif x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); return x; #endif #elif defined(simde_math_sqrtf) return 1.0f / simde_math_sqrtf(a); #else HEDLEY_UNREACHABLE(); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtes_f32 #define vrsqrtes_f32(a) simde_vrsqrtes_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64_t simde_vrsqrted_f64(simde_float64_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrted_f64(a); #else #if defined(SIMDE_IEEE754_STORAGE) //https://www.mdpi.com/1099-4300/23/1/86/htm simde_float64_t x = a; simde_float64_t xhalf = SIMDE_FLOAT64_C(0.5) * x; int64_t ix; simde_memcpy(&ix, &x, sizeof(ix)); ix = INT64_C(0x5FE6ED2102DCBFDA) - (ix >> 1); simde_memcpy(&x, &ix, sizeof(x)); x = x * (SIMDE_FLOAT64_C(1.50087895511633457) - xhalf * x * x); x = x * (SIMDE_FLOAT64_C(1.50000057967625766) - xhalf * x * x); return x; #elif defined(simde_math_sqrtf) return SIMDE_FLOAT64_C(1.0) / simde_math_sqrt(a_.values[i]); #else HEDLEY_UNREACHABLE(); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrted_f64 #define vrsqrted_f64(a) simde_vrsqrted_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrsqrte_u32(simde_uint32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrte_u32(a); #else simde_uint32x2_private a_ = simde_uint32x2_to_private(a), r_; for(size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[i])) ; i++) { if (a_.values[i] < 0x3FFFFFFF) { r_.values[i] = UINT32_MAX; } else { uint32_t a_temp = (a_.values[i] >> 23) & 511; if (a_temp < 256) { a_temp = a_temp * 2 + 1; } else { a_temp = (a_temp >> 1) << 1; a_temp = (a_temp + 1) * 2; } uint32_t b = 512; while((a_temp * (b + 1) * (b + 1)) < (1 << 28)) b = b + 1; r_.values[i] = (b + 1) / 2; r_.values[i] = r_.values[i] << 23; } } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrte_u32 #define vrsqrte_u32(a) simde_vrsqrte_u32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrsqrte_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrte_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); #if defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrsqrteh_f16(a_.values[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrsqrte_f16 #define vrsqrte_f16(a) simde_vrsqrte_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrsqrte_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrte_f32(a); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); #if defined(SIMDE_IEEE754_STORAGE) /* https://basesandframes.files.wordpress.com/2020/04/even_faster_math_functions_green_2020.pdf Pages 100 - 103 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { #if SIMDE_ACCURACY_PREFERENCE <= 0 r_.i32[i] = INT32_C(0x5F37624F) - (a_.i32[i] >> 1); #else simde_float32 x = a_.values[i]; simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x; int32_t ix; simde_memcpy(&ix, &x, sizeof(ix)); #if SIMDE_ACCURACY_PREFERENCE == 1 ix = INT32_C(0x5F375A82) - (ix >> 1); #else ix = INT32_C(0x5F37599E) - (ix >> 1); #endif simde_memcpy(&x, &ix, sizeof(x)); #if SIMDE_ACCURACY_PREFERENCE >= 2 x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); #endif x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); r_.values[i] = x; #endif } #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrte_f32 #define vrsqrte_f32(a) simde_vrsqrte_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrsqrte_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrte_f64(a); #else simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); #if defined(SIMDE_IEEE754_STORAGE) //https://www.mdpi.com/1099-4300/23/1/86/htm SIMDE_VECTORIZE for(size_t i = 0 ; i < (sizeof(r_.values)/sizeof(r_.values[0])) ; i++) { simde_float64_t x = a_.values[i]; simde_float64_t xhalf = SIMDE_FLOAT64_C(0.5) * x; int64_t ix; simde_memcpy(&ix, &x, sizeof(ix)); ix = INT64_C(0x5FE6ED2102DCBFDA) - (ix >> 1); simde_memcpy(&x, &ix, sizeof(x)); x = x * (SIMDE_FLOAT64_C(1.50087895511633457) - xhalf * x * x); x = x * (SIMDE_FLOAT64_C(1.50000057967625766) - xhalf * x * x); r_.values[i] = x; } #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = SIMDE_FLOAT64_C(1.0) / simde_math_sqrt(a_.values[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrte_f64 #define vrsqrte_f64(a) simde_vrsqrte_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vrsqrteq_u32(simde_uint32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrteq_u32(a); #else simde_uint32x4_private a_ = simde_uint32x4_to_private(a), r_; for(size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[i])) ; i++) { if (a_.values[i] < 0x3FFFFFFF) { r_.values[i] = UINT32_MAX; } else { uint32_t a_temp = (a_.values[i] >> 23) & 511; if (a_temp < 256) { a_temp = a_temp * 2 + 1; } else { a_temp = (a_temp >> 1) << 1; a_temp = (a_temp + 1) * 2; } uint32_t b = 512; while((a_temp * (b + 1) * (b + 1)) < (1 << 28)) b = b + 1; r_.values[i] = (b + 1) / 2; r_.values[i] = r_.values[i] << 23; } } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrteq_u32 #define vrsqrteq_u32(a) simde_vrsqrteq_u32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrsqrteq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrteq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); #if defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vrsqrteh_f16(a_.values[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrsqrteq_f16 #define vrsqrteq_f16(a) simde_vrsqrteq_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrsqrteq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrteq_f32(a); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_rsqrte(a); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); #if defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_rsqrt_ps(a_.m128); #elif defined(SIMDE_IEEE754_STORAGE) /* https://basesandframes.files.wordpress.com/2020/04/even_faster_math_functions_green_2020.pdf Pages 100 - 103 */ SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { #if SIMDE_ACCURACY_PREFERENCE <= 0 r_.i32[i] = INT32_C(0x5F37624F) - (a_.i32[i] >> 1); #else simde_float32 x = a_.values[i]; simde_float32 xhalf = SIMDE_FLOAT32_C(0.5) * x; int32_t ix; simde_memcpy(&ix, &x, sizeof(ix)); #if SIMDE_ACCURACY_PREFERENCE == 1 ix = INT32_C(0x5F375A82) - (ix >> 1); #else ix = INT32_C(0x5F37599E) - (ix >> 1); #endif simde_memcpy(&x, &ix, sizeof(x)); #if SIMDE_ACCURACY_PREFERENCE >= 2 x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); #endif x = x * (SIMDE_FLOAT32_C(1.5008909) - xhalf * x * x); r_.values[i] = x; #endif } #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) { r_.f32[i] = 1.0f / simde_math_sqrtf(a_.f32[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrteq_f32 #define vrsqrteq_f32(a) simde_vrsqrteq_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrsqrteq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrteq_f64(a); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); #if defined(SIMDE_IEEE754_STORAGE) //https://www.mdpi.com/1099-4300/23/1/86/htm SIMDE_VECTORIZE for(size_t i = 0 ; i < (sizeof(r_.values)/sizeof(r_.values[0])) ; i++) { simde_float64_t x = a_.values[i]; simde_float64_t xhalf = SIMDE_FLOAT64_C(0.5) * x; int64_t ix; simde_memcpy(&ix, &x, sizeof(ix)); ix = INT64_C(0x5FE6ED2102DCBFDA) - (ix >> 1); simde_memcpy(&x, &ix, sizeof(x)); x = x * (SIMDE_FLOAT64_C(1.50087895511633457) - xhalf * x * x); x = x * (SIMDE_FLOAT64_C(1.50000057967625766) - xhalf * x * x); r_.values[i] = x; } #elif defined(simde_math_sqrtf) SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = SIMDE_FLOAT64_C(1.0) / simde_math_sqrt(a_.values[i]); } #else HEDLEY_UNREACHABLE(); #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrteq_f64 #define vrsqrteq_f64(a) simde_vrsqrteq_f64((a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSQRTE_H) */ /* :: End simde/simde/arm/neon/rsqrte.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rsqrts.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSQRTS_H) #define SIMDE_ARM_NEON_RSQRTS_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16_t simde_vrsqrtsh_f16(simde_float16_t a, simde_float16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrtsh_f16(a, b); #else return simde_vmulh_f16( simde_vsubh_f16( SIMDE_FLOAT16_VALUE(3.0), simde_vmulh_f16(a, b)), SIMDE_FLOAT16_VALUE(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtsh_f16 #define vrsqrtsh_f16(a, b) simde_vrsqrtsh_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32_t simde_vrsqrtss_f32(simde_float32_t a, simde_float32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrtss_f32(a, b); #else return SIMDE_FLOAT32_C(0.5) * (SIMDE_FLOAT32_C(3.0) - (a * b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtss_f32 #define vrsqrtss_f32(a, b) simde_vrsqrtss_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64_t simde_vrsqrtsd_f64(simde_float64_t a, simde_float64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrtsd_f64(a, b); #else return SIMDE_FLOAT64_C(0.5) * (SIMDE_FLOAT64_C(3.0) - (a * b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtsd_f64 #define vrsqrtsd_f64(a, b) simde_vrsqrtsd_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vrsqrts_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrts_f16(a, b); #else return simde_vmul_n_f16( simde_vsub_f16( simde_vdup_n_f16(SIMDE_FLOAT16_VALUE(3.0)), simde_vmul_f16(a, b)), SIMDE_FLOAT16_VALUE(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrsqrts_f16 #define vrsqrts_f16(a, b) simde_vrsqrts_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vrsqrts_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrts_f32(a, b); #else return simde_vmul_n_f32( simde_vmls_f32( simde_vdup_n_f32(SIMDE_FLOAT32_C(3.0)), a, b), SIMDE_FLOAT32_C(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrts_f32 #define vrsqrts_f32(a, b) simde_vrsqrts_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vrsqrts_f64(simde_float64x1_t a, simde_float64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrts_f64(a, b); #else return simde_vmul_n_f64( simde_vmls_f64( simde_vdup_n_f64(SIMDE_FLOAT64_C(3.0)), a, b), SIMDE_FLOAT64_C(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrts_f64 #define vrsqrts_f64(a, b) simde_vrsqrts_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vrsqrtsq_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vrsqrtsq_f16(a, b); #else return simde_vmulq_n_f16( simde_vsubq_f16( simde_vdupq_n_f16(SIMDE_FLOAT16_VALUE(3.0)), simde_vmulq_f16(a, b)), SIMDE_FLOAT16_VALUE(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtsq_f16 #define vrsqrtsq_f16(a, b) simde_vrsqrtsq_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vrsqrtsq_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsqrtsq_f32(a, b); #else return simde_vmulq_n_f32( simde_vmlsq_f32( simde_vdupq_n_f32(SIMDE_FLOAT32_C(3.0)), a, b), SIMDE_FLOAT32_C(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsqrtsq_f32 #define vrsqrtsq_f32(a, b) simde_vrsqrtsq_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vrsqrtsq_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vrsqrtsq_f64(a, b); #else return simde_vmulq_n_f64( simde_vmlsq_f64( simde_vdupq_n_f64(SIMDE_FLOAT64_C(3.0)), a, b), SIMDE_FLOAT64_C(0.5) ); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsqrtsq_f64 #define vrsqrtsq_f64(a, b) simde_vrsqrtsq_f64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSQRTS_H) */ /* :: End simde/simde/arm/neon/rsqrts.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rsra_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore */ #if !defined(SIMDE_ARM_NEON_RSRA_N_H) #define SIMDE_ARM_NEON_RSRA_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ /* Remark: For these instructions * 1 <= n <= data element size in bits * so 0 <= n - 1 < data element size in bits */ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsrad_n_s64(a, b, n) vrsrad_n_s64(a, b, n) #else #define simde_vrsrad_n_s64(a, b, n) simde_vaddd_s64((a), simde_vrshrd_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsrad_n_s64 #define vrsrad_n_s64(a, b, n) simde_vrsrad_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsrad_n_u64(a, b, n) vrsrad_n_u64(a, b, n) #else #define simde_vrsrad_n_u64(a, b, n) simde_vaddd_u64((a), simde_vrshrd_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsrad_n_u64 #define vrsrad_n_u64(a, b, n) simde_vrsrad_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_s8(a, b, n) vrsraq_n_s8((a), (b), (n)) #else #define simde_vrsraq_n_s8(a, b, n) simde_vaddq_s8((a), simde_vrshrq_n_s8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_s8 #define vrsraq_n_s8(a, b, n) simde_vrsraq_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_s16(a, b, n) vrsraq_n_s16((a), (b), (n)) #else #define simde_vrsraq_n_s16(a, b, n) simde_vaddq_s16((a), simde_vrshrq_n_s16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_s16 #define vrsraq_n_s16(a, b, n) simde_vrsraq_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_s32(a, b, n) vrsraq_n_s32((a), (b), (n)) #else #define simde_vrsraq_n_s32(a, b, n) simde_vaddq_s32((a), simde_vrshrq_n_s32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_s32 #define vrsraq_n_s32(a, b, n) simde_vrsraq_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_s64(a, b, n) vrsraq_n_s64((a), (b), (n)) #else #define simde_vrsraq_n_s64(a, b, n) simde_vaddq_s64((a), simde_vrshrq_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_s64 #define vrsraq_n_s64(a, b, n) simde_vrsraq_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_u8(a, b, n) vrsraq_n_u8((a), (b), (n)) #else #define simde_vrsraq_n_u8(a, b, n) simde_vaddq_u8((a), simde_vrshrq_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_u8 #define vrsraq_n_u8(a, b, n) simde_vrsraq_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_u16(a, b, n) vrsraq_n_u16((a), (b), (n)) #else #define simde_vrsraq_n_u16(a, b, n) simde_vaddq_u16((a), simde_vrshrq_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_u16 #define vrsraq_n_u16(a, b, n) simde_vrsraq_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_u32(a, b, n) vrsraq_n_u32((a), (b), (n)) #else #define simde_vrsraq_n_u32(a, b, n) simde_vaddq_u32((a), simde_vrshrq_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_u32 #define vrsraq_n_u32(a, b, n) simde_vrsraq_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsraq_n_u64(a, b, n) vrsraq_n_u64((a), (b), (n)) #else #define simde_vrsraq_n_u64(a, b, n) simde_vaddq_u64((a), simde_vrshrq_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsraq_n_u64 #define vrsraq_n_u64(a, b, n) simde_vrsraq_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_s8(a, b, n) vrsra_n_s8((a), (b), (n)) #else #define simde_vrsra_n_s8(a, b, n) simde_vadd_s8((a), simde_vrshr_n_s8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_s8 #define vrsra_n_s8(a, b, n) simde_vrsra_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_s16(a, b, n) vrsra_n_s16((a), (b), (n)) #else #define simde_vrsra_n_s16(a, b, n) simde_vadd_s16((a), simde_vrshr_n_s16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_s16 #define vrsra_n_s16(a, b, n) simde_vrsra_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_s32(a, b, n) vrsra_n_s32((a), (b), (n)) #else #define simde_vrsra_n_s32(a, b, n) simde_vadd_s32((a), simde_vrshr_n_s32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_s32 #define vrsra_n_s32(a, b, n) simde_vrsra_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_s64(a, b, n) vrsra_n_s64((a), (b), (n)) #else #define simde_vrsra_n_s64(a, b, n) simde_vadd_s64((a), simde_vrshr_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_s64 #define vrsra_n_s64(a, b, n) simde_vrsra_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_u8(a, b, n) vrsra_n_u8((a), (b), (n)) #else #define simde_vrsra_n_u8(a, b, n) simde_vadd_u8((a), simde_vrshr_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_u8 #define vrsra_n_u8(a, b, n) simde_vrsra_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_u16(a, b, n) vrsra_n_u16((a), (b), (n)) #else #define simde_vrsra_n_u16(a, b, n) simde_vadd_u16((a), simde_vrshr_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_u16 #define vrsra_n_u16(a, b, n) simde_vrsra_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_u32(a, b, n) vrsra_n_u32((a), (b), (n)) #else #define simde_vrsra_n_u32(a, b, n) simde_vadd_u32((a), simde_vrshr_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_u32 #define vrsra_n_u32(a, b, n) simde_vrsra_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vrsra_n_u64(a, b, n) vrsra_n_u64((a), (b), (n)) #else #define simde_vrsra_n_u64(a, b, n) simde_vadd_u64((a), simde_vrshr_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsra_n_u64 #define vrsra_n_u64(a, b, n) simde_vrsra_n_u64((a), (b), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSRA_N_H) */ /* :: End simde/simde/arm/neon/rsra_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rsubhn.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSUBHN_H) #define SIMDE_ARM_NEON_RSUBHN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vrsubhn_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); int16_t round_cast = 1 << 7; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, a_.values[i] - b_.values[i] + round_cast); } return simde_vmovn_s16(simde_vshrq_n_s16(simde_int16x8_from_private(r_), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_s16 #define vrsubhn_s16(a, b) simde_vrsubhn_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vrsubhn_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); int round_cast = 1 << 15; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i] + round_cast; } return simde_vmovn_s32(simde_vshrq_n_s32(simde_int32x4_from_private(r_), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_s32 #define vrsubhn_s32(a, b) simde_vrsubhn_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vrsubhn_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); int64_t round_cast = 1ll << 31; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] - b_.values[i] + round_cast) >> 32); } return simde_vmovn_s64(simde_int64x2_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_s64 #define vrsubhn_s64(a, b) simde_vrsubhn_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vrsubhn_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); uint16_t round_cast = 1 << 7; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] - b_.values[i] + round_cast); } return simde_vmovn_u16(simde_vshrq_n_u16(simde_uint16x8_from_private(r_), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_u16 #define vrsubhn_u16(a, b) simde_vrsubhn_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vrsubhn_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); uint32_t round_cast = 1 << 15; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i] + round_cast; } return simde_vmovn_u32(simde_vshrq_n_u32(simde_uint32x4_from_private(r_), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_u32 #define vrsubhn_u32(a, b) simde_vrsubhn_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vrsubhn_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vrsubhn_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); uint64_t round_cast = 1ull << 31; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((a_.values[i] - b_.values[i] + round_cast) >> 32); } return simde_vmovn_u64(simde_uint64x2_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vrsubhn_u64 #define vrsubhn_u64(a, b) simde_vrsubhn_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSUBHN_H) */ /* :: End simde/simde/arm/neon/rsubhn.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/rsubhn_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_RSUBHN_HIGH_H) #define SIMDE_ARM_NEON_RSUBHN_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_s16(r, a, b) vrsubhn_high_s16((r), (a), (b)) #else #define simde_vrsubhn_high_s16(r, a, b) simde_vcombine_s8(r, simde_vrsubhn_s16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_s16 #define vrsubhn_high_s16(r, a, b) simde_vrsubhn_high_s16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_s32(r, a, b) vrsubhn_high_s32((r), (a), (b)) #else #define simde_vrsubhn_high_s32(r, a, b) simde_vcombine_s16(r, simde_vrsubhn_s32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_s32 #define vrsubhn_high_s32(r, a, b) simde_vrsubhn_high_s32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_s64(r, a, b) vrsubhn_high_s64((r), (a), (b)) #else #define simde_vrsubhn_high_s64(r, a, b) simde_vcombine_s32(r, simde_vrsubhn_s64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_s64 #define vrsubhn_high_s64(r, a, b) simde_vrsubhn_high_s64((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_u16(r, a, b) vrsubhn_high_u16((r), (a), (b)) #else #define simde_vrsubhn_high_u16(r, a, b) simde_vcombine_u8(r, simde_vrsubhn_u16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_u16 #define vrsubhn_high_u16(r, a, b) simde_vrsubhn_high_u16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_u32(r, a, b) vrsubhn_high_u32((r), (a), (b)) #else #define simde_vrsubhn_high_u32(r, a, b) simde_vcombine_u16(r, simde_vrsubhn_u32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_u32 #define vrsubhn_high_u32(r, a, b) simde_vrsubhn_high_u32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vrsubhn_high_u64(r, a, b) vrsubhn_high_u64((r), (a), (b)) #else #define simde_vrsubhn_high_u64(r, a, b) simde_vcombine_u32(r, simde_vrsubhn_u64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vrsubhn_high_u64 #define vrsubhn_high_u64(r, a, b) simde_vrsubhn_high_u64((r), (a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_RSUBHN_HIGH_H) */ /* :: End simde/simde/arm/neon/rsubhn_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/set_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SET_LANE_H) #define SIMDE_ARM_NEON_SET_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vset_lane_f16(simde_float16_t a, simde_float16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_float16x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_4_(vset_lane_f16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_float16x4_private v_ = simde_float16x4_to_private(v); v_.values[lane] = a; r = simde_float16x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_f16 #define vset_lane_f16(a, b, c) simde_vset_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vset_lane_f32(simde_float32_t a, simde_float32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_float32x2_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_(vset_lane_f32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_float32x2_private v_ = simde_float32x2_to_private(v); v_.values[lane] = a; r = simde_float32x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_f32 #define vset_lane_f32(a, b, c) simde_vset_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vset_lane_f64(simde_float64_t a, simde_float64x1_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { simde_float64x1_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; r = vset_lane_f64(a, v, 0); #else simde_float64x1_private v_ = simde_float64x1_to_private(v); v_.values[lane] = a; r = simde_float64x1_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vset_lane_f64 #define vset_lane_f64(a, b, c) simde_vset_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vset_lane_s8(int8_t a, simde_int8x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_int8x8_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_(vset_lane_s8, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int8x8_private v_ = simde_int8x8_to_private(v); v_.values[lane] = a; r = simde_int8x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_s8 #define vset_lane_s8(a, b, c) simde_vset_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vset_lane_s16(int16_t a, simde_int16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int16x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_(vset_lane_s16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int16x4_private v_ = simde_int16x4_to_private(v); v_.values[lane] = a; r = simde_int16x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_s16 #define vset_lane_s16(a, b, c) simde_vset_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vset_lane_s32(int32_t a, simde_int32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int32x2_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_(vset_lane_s32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int32x2_private v_ = simde_int32x2_to_private(v); v_.values[lane] = a; r = simde_int32x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_s32 #define vset_lane_s32(a, b, c) simde_vset_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vset_lane_s64(int64_t a, simde_int64x1_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { simde_int64x1_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) (void) lane; r = vset_lane_s64(a, v, 0); #else simde_int64x1_private v_ = simde_int64x1_to_private(v); v_.values[lane] = a; r = simde_int64x1_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_s64 #define vset_lane_s64(a, b, c) simde_vset_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vset_lane_u8(uint8_t a, simde_uint8x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_uint8x8_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_(vset_lane_u8, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint8x8_private v_ = simde_uint8x8_to_private(v); v_.values[lane] = a; r = simde_uint8x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_u8 #define vset_lane_u8(a, b, c) simde_vset_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vset_lane_u16(uint16_t a, simde_uint16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_uint16x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_(vset_lane_u16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint16x4_private v_ = simde_uint16x4_to_private(v); v_.values[lane] = a; r = simde_uint16x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_u16 #define vset_lane_u16(a, b, c) simde_vset_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vset_lane_u32(uint32_t a, simde_uint32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_uint32x2_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_(vset_lane_u32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint32x2_private v_ = simde_uint32x2_to_private(v); v_.values[lane] = a; r = simde_uint32x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_u32 #define vset_lane_u32(a, b, c) simde_vset_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vset_lane_u64(uint64_t a, simde_uint64x1_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { simde_uint64x1_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) (void) lane; r = vset_lane_u64(a, v, 0); #else simde_uint64x1_private v_ = simde_uint64x1_to_private(v); v_.values[lane] = a; r = simde_uint64x1_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_u64 #define vset_lane_u64(a, b, c) simde_vset_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vsetq_lane_f16(simde_float16_t a, simde_float16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_float16x8_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_8_(vsetq_lane_f16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_float16x8_private v_ = simde_float16x8_to_private(v); v_.values[lane] = a; r = simde_float16x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_f16 #define vsetq_lane_f16(a, b, c) simde_vsetq_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vsetq_lane_f32(simde_float32_t a, simde_float32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_float32x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_(vsetq_lane_f32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_float32x4_private v_ = simde_float32x4_to_private(v); v_.values[lane] = a; r = simde_float32x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_f32 #define vsetq_lane_f32(a, b, c) simde_vsetq_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vsetq_lane_f64(simde_float64_t a, simde_float64x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_float64x2_t r; #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_(vsetq_lane_f64, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_float64x2_private v_ = simde_float64x2_to_private(v); v_.values[lane] = a; r = simde_float64x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_f64 #define vsetq_lane_f64(a, b, c) simde_vsetq_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vsetq_lane_s8(int8_t a, simde_int8x16_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { simde_int8x16_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_16_(vsetq_lane_s8, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int8x16_private v_ = simde_int8x16_to_private(v); v_.values[lane] = a; r = simde_int8x16_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_s8 #define vsetq_lane_s8(a, b, c) simde_vsetq_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vsetq_lane_s16(int16_t a, simde_int16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_int16x8_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_(vsetq_lane_s16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int16x8_private v_ = simde_int16x8_to_private(v); v_.values[lane] = a; r = simde_int16x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_s16 #define vsetq_lane_s16(a, b, c) simde_vsetq_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsetq_lane_s32(int32_t a, simde_int32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int32x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_(vsetq_lane_s32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int32x4_private v_ = simde_int32x4_to_private(v); v_.values[lane] = a; r = simde_int32x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_s32 #define vsetq_lane_s32(a, b, c) simde_vsetq_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vsetq_lane_s64(int64_t a, simde_int64x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int64x2_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_(vsetq_lane_s64, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_int64x2_private v_ = simde_int64x2_to_private(v); v_.values[lane] = a; r = simde_int64x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_s64 #define vsetq_lane_s64(a, b, c) simde_vsetq_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vsetq_lane_u8(uint8_t a, simde_uint8x16_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { simde_uint8x16_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_16_(vsetq_lane_u8, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint8x16_private v_ = simde_uint8x16_to_private(v); v_.values[lane] = a; r = simde_uint8x16_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_u8 #define vsetq_lane_u8(a, b, c) simde_vsetq_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vsetq_lane_u16(uint16_t a, simde_uint16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_uint16x8_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_(vsetq_lane_u16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint16x8_private v_ = simde_uint16x8_to_private(v); v_.values[lane] = a; r = simde_uint16x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_u16 #define vsetq_lane_u16(a, b, c) simde_vsetq_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsetq_lane_u32(uint32_t a, simde_uint32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_uint32x4_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_(vsetq_lane_u32, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint32x4_private v_ = simde_uint32x4_to_private(v); v_.values[lane] = a; r = simde_uint32x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_u32 #define vsetq_lane_u32(a, b, c) simde_vsetq_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsetq_lane_u64(uint64_t a, simde_uint64x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_uint64x2_t r; #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_(vsetq_lane_u64, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_uint64x2_private v_ = simde_uint64x2_to_private(v); v_.values[lane] = a; r = simde_uint64x2_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_u64 #define vsetq_lane_u64(a, b, c) simde_vsetq_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vset_lane_p8(simde_poly8_t a, simde_poly8x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_poly8x8_t r; simde_poly8x8_private v_ = simde_poly8x8_to_private(v); v_.values[lane] = a; r = simde_poly8x8_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vset_lane_p8(a, b, c) vset_lane_p8((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_p8 #define vset_lane_p8(a, b, c) simde_vset_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vset_lane_p16(simde_poly16_t a, simde_poly16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_poly16x4_t r; simde_poly16x4_private v_ = simde_poly16x4_to_private(v); v_.values[lane] = a; r = simde_poly16x4_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vset_lane_p16(a, b, c) vset_lane_p16((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vset_lane_p16 #define vset_lane_p16(a, b, c) simde_vset_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x1_t simde_vset_lane_p64(simde_poly64_t a, simde_poly64x1_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { simde_poly64x1_t r; simde_poly64x1_private v_ = simde_poly64x1_to_private(v); v_.values[lane] = a; r = simde_poly64x1_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vset_lane_p64(a, b, c) vset_lane_p64((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vset_lane_p64 #define vset_lane_p64(a, b, c) simde_vset_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vsetq_lane_p8(simde_poly8_t a, simde_poly8x16_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { simde_poly8x16_t r; simde_poly8x16_private v_ = simde_poly8x16_to_private(v); v_.values[lane] = a; r = simde_poly8x16_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vsetq_lane_p8(a, b, c) vsetq_lane_p8((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_p8 #define vsetq_lane_p8(a, b, c) simde_vsetq_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vsetq_lane_p16(simde_poly16_t a, simde_poly16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_poly16x8_t r; simde_poly16x8_private v_ = simde_poly16x8_to_private(v); v_.values[lane] = a; r = simde_poly16x8_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vsetq_lane_p16(a, b, c) vsetq_lane_p16((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_p16 #define vsetq_lane_p16(a, b, c) simde_vsetq_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x2_t simde_vsetq_lane_p64(simde_poly64_t a, simde_poly64x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_poly64x2_t r; simde_poly64x2_private v_ = simde_poly64x2_to_private(v); v_.values[lane] = a; r = simde_poly64x2_from_private(v_); return r; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362) #define simde_vsetq_lane_p64(a, b, c) vsetq_lane_p64((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_p64 #define vsetq_lane_p64(a, b, c) simde_vsetq_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_bfloat16x4_t simde_vset_lane_bf16(simde_bfloat16_t a, simde_bfloat16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_bfloat16x4_t r; #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_4_(vset_lane_bf16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_bfloat16x4_private v_ = simde_bfloat16x4_to_private(v); v_.values[lane] = a; r = simde_bfloat16x4_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vset_lane_bf16 #define vset_lane_bf16(a, b, c) simde_vset_lane_bf16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_bfloat16x8_t simde_vsetq_lane_bf16(simde_bfloat16_t a, simde_bfloat16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { simde_bfloat16x8_t r; #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_8_(vsetq_lane_bf16, r, (HEDLEY_UNREACHABLE(), v), lane, a, v); #else simde_bfloat16x8_private v_ = simde_bfloat16x8_to_private(v); v_.values[lane] = a; r = simde_bfloat16x8_from_private(v_); #endif return r; } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsetq_lane_bf16 #define vsetq_lane_bf16(a, b, c) simde_vsetq_lane_bf16((a), (b), (c)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SET_LANE_H) */ /* :: End simde/simde/arm/neon/set_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sha1.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHA1_H) #define SIMDE_ARM_NEON_SHA1_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #define ROL(operand, N, shift) (((operand) >> (N-shift)) | ((operand) << (shift))) SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vsha1h_u32(uint32_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1h_u32(a); #else return ROL(a, 32, 30); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1h_u32 #define vsha1h_u32(a) simde_vsha1h_u32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha1cq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1cq_u32(hash_abcd, hash_e, wk); #else simde_uint32x4_private x_ = simde_uint32x4_to_private(hash_abcd), w_ = simde_uint32x4_to_private(wk); uint32_t y_ = hash_e; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) { uint32_t t = (((x_.values[2] ^ x_.values[3]) & x_.values[1]) ^ x_.values[3]); y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i]; x_.values[1] = ROL(x_.values[1], 32, 30); uint32_t tmp = y_; y_ = 0x0 | x_.values[3]; x_.values[3] = 0x0 | x_.values[2]; x_.values[2] = 0x0 | x_.values[1]; x_.values[1] = 0x0 | x_.values[0]; x_.values[0] = tmp | 0x0; } return simde_uint32x4_from_private(x_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1cq_u32 #define vsha1cq_u32(hash_abcd, hash_e, wk) simde_vsha1cq_u32((hash_abcd), (hash_e), (wk)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha1mq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1mq_u32(hash_abcd, hash_e, wk); #else simde_uint32x4_private x_ = simde_uint32x4_to_private(hash_abcd), w_ = simde_uint32x4_to_private(wk); uint32_t y_ = hash_e; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) { uint32_t t = ((x_.values[1] & x_.values[2]) | ((x_.values[1] | x_.values[2]) & x_.values[3])); y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i]; x_.values[1] = ROL(x_.values[1], 32, 30); uint32_t tmp = y_; y_ = 0x0 | x_.values[3]; x_.values[3] = 0x0 | x_.values[2]; x_.values[2] = 0x0 | x_.values[1]; x_.values[1] = 0x0 | x_.values[0]; x_.values[0] = tmp | 0x0; } return simde_uint32x4_from_private(x_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1mq_u32 #define vsha1mq_u32(hash_abcd, hash_e, wk) simde_vsha1mq_u32((hash_abcd), (hash_e), (wk)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha1pq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1pq_u32(hash_abcd, hash_e, wk); #else simde_uint32x4_private x_ = simde_uint32x4_to_private(hash_abcd), w_ = simde_uint32x4_to_private(wk); uint32_t y_ = hash_e; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) { uint32_t t = (x_.values[1] ^ x_.values[2] ^ x_.values[3]); y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i]; x_.values[1] = ROL(x_.values[1], 32, 30); uint32_t tmp = y_; y_ = 0x0 | x_.values[3]; x_.values[3] = 0x0 | x_.values[2]; x_.values[2] = 0x0 | x_.values[1]; x_.values[1] = 0x0 | x_.values[0]; x_.values[0] = tmp | 0x0; } return simde_uint32x4_from_private(x_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1pq_u32 #define vsha1pq_u32(hash_abcd, hash_e, wk) simde_vsha1pq_u32((hash_abcd), (hash_e), (wk)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha1su0q_u32(simde_uint32x4_t w0_3, simde_uint32x4_t w4_7, simde_uint32x4_t w8_11) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1su0q_u32(w0_3, w4_7, w8_11); #else simde_uint32x4_private r_, x_ = simde_uint32x4_to_private(w0_3), y_ = simde_uint32x4_to_private(w4_7), z_ = simde_uint32x4_to_private(w8_11); r_.values[3] = y_.values[1]; r_.values[2] = y_.values[0]; r_.values[1] = x_.values[3]; r_.values[0] = x_.values[2]; SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) { r_.values[i] = r_.values[i] ^ x_.values[i] ^ z_.values[i]; } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1su0q_u32 #define vsha1su0q_u32(w0_3, w4_7, w8_11) simde_vsha1su0q_u32((w0_3), (w4_7), (w8_11)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha1su1q_u32(simde_uint32x4_t tw0_3, simde_uint32x4_t tw12_15) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha1su1q_u32(tw0_3, tw12_15); #else simde_uint32x4_private r_, T_, x_ = simde_uint32x4_to_private(tw0_3), y_ = simde_uint32x4_to_private(tw12_15); T_.values[0] = x_.values[0] ^ y_.values[1]; T_.values[1] = x_.values[1] ^ y_.values[2]; T_.values[2] = x_.values[2] ^ y_.values[3]; T_.values[3] = x_.values[3] ^ 0x0; r_.values[0] = ROL(T_.values[0], 32, 1); r_.values[1] = ROL(T_.values[1], 32, 1); r_.values[2] = ROL(T_.values[2], 32, 1); r_.values[3] = ROL(T_.values[3], 32, 1) ^ ROL(T_.values[0], 32, 2); return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha1su1q_u32 #define vsha1su1q_u32(tw0_3, tw12_15) simde_vsha1su1q_u32((tw0_3), (tw12_15)) #endif #undef ROL SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHA1_H) */ /* :: End simde/simde/arm/neon/sha1.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sha256.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHA256_H) #define SIMDE_ARM_NEON_SHA256_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #define ROR32(operand, shift) (((operand) >> (shift)) | ((operand) << (32-shift))) #define ROL32(operand, shift) (((operand) >> (32-shift)) | ((operand) << (shift))) #define LSR(operand, shift) ((operand) >> (shift)) #define LSL(operand, shift) ((operand) << (shift)) static uint32_t simde_SHAchoose(uint32_t x, uint32_t y, uint32_t z) { return (((y ^ z) & x) ^ z); } static uint32_t simde_SHAmajority(uint32_t x, uint32_t y, uint32_t z) { return ((x & y) | ((x | y) & z)); } static uint32_t simde_SHAhashSIGMA0(uint32_t x) { return ROR32(x, 2) ^ ROR32(x, 13) ^ ROR32(x, 22); } static uint32_t simde_SHAhashSIGMA1(uint32_t x) { return ROR32(x, 6) ^ ROR32(x, 11) ^ ROR32(x, 25); } static simde_uint32x4_t x_simde_sha256hash(simde_uint32x4_t x, simde_uint32x4_t y, simde_uint32x4_t w, int part1) { uint32_t chs, maj, t; simde_uint32x4_private x_ = simde_uint32x4_to_private(x), y_ = simde_uint32x4_to_private(y), w_ = simde_uint32x4_to_private(w); for(int i = 0; i < 4; ++i) { chs = simde_SHAchoose(y_.values[0], y_.values[1], y_.values[2]); maj = simde_SHAmajority(x_.values[0], x_.values[1], x_.values[2]); t = y_.values[3] + simde_SHAhashSIGMA1(y_.values[0]) + chs + w_.values[i]; x_.values[3] = t + x_.values[3]; y_.values[3] = t + simde_SHAhashSIGMA0(x_.values[0]) + maj; uint32_t tmp = y_.values[3]; y_.values[3] = 0x0 | y_.values[2]; y_.values[2] = 0x0 | y_.values[1]; y_.values[1] = 0x0 | y_.values[0]; y_.values[0] = 0x0 | x_.values[3]; x_.values[3] = 0x0 | x_.values[2]; x_.values[2] = 0x0 | x_.values[1]; x_.values[1] = 0x0 | x_.values[0]; x_.values[0] = tmp | 0x0; } return (part1 == 1) ? simde_uint32x4_from_private(x_) : simde_uint32x4_from_private(y_); } SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha256hq_u32(simde_uint32x4_t hash_efgh, simde_uint32x4_t hash_abcd, simde_uint32x4_t wk) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha256hq_u32(hash_efgh, hash_abcd, wk); #else return x_simde_sha256hash(hash_efgh, hash_abcd, wk, 1); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha256hq_u32 #define vsha256hq_u32(hash_efgh, hash_abcd, wk) simde_vsha256hq_u32((hash_efgh), (hash_abcd), (wk)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha256h2q_u32(simde_uint32x4_t hash_efgh, simde_uint32x4_t hash_abcd, simde_uint32x4_t wk) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha256h2q_u32(hash_efgh, hash_abcd, wk); #else return x_simde_sha256hash(hash_abcd, hash_efgh, wk, 0); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha256h2q_u32 #define vsha256h2q_u32(hash_efgh, hash_abcd, wk) simde_vsha256h2q_u32((hash_efgh), (hash_abcd), (wk)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha256su0q_u32(simde_uint32x4_t w0_3, simde_uint32x4_t w4_7) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha256su0q_u32(w0_3, w4_7); #else simde_uint32x4_private r_, T_, x_ = simde_uint32x4_to_private(w0_3), y_ = simde_uint32x4_to_private(w4_7); T_.values[3] = y_.values[0]; T_.values[2] = x_.values[3]; T_.values[1] = x_.values[2]; T_.values[0] = x_.values[1]; uint32_t elt; for(int i = 0; i < 4; ++i) { elt = T_.values[i]; elt = ROR32(elt, 7) ^ ROR32(elt, 18) ^ LSR(elt, 3); r_.values[i] = elt + x_.values[i]; } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha256su0q_u32 #define vsha256su0q_u32(w0_3, w4_7) simde_vsha256su0q_u32((w0_3), (w4_7)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsha256su1q_u32(simde_uint32x4_t tw0_3, simde_uint32x4_t w8_11, simde_uint32x4_t w12_15) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2) return vsha256su1q_u32(tw0_3, w8_11, w12_15); #else simde_uint32x4_private r_, T0_, x_ = simde_uint32x4_to_private(tw0_3), y_ = simde_uint32x4_to_private(w8_11), z_ = simde_uint32x4_to_private(w12_15); simde_uint32x2_private T1_; T0_.values[3] = z_.values[0]; T0_.values[2] = y_.values[3]; T0_.values[1] = y_.values[2]; T0_.values[0] = y_.values[1]; uint32_t elt; T1_.values[1] = z_.values[3]; T1_.values[0] = z_.values[2]; for(int i = 0; i < 2; ++i) { elt = T1_.values[i]; elt = ROR32(elt, 17) ^ ROR32(elt, 19) ^ LSR(elt, 10); elt = elt + x_.values[i] + T0_.values[i]; r_.values[i] = elt; } T1_.values[1] = r_.values[1]; T1_.values[0] = r_.values[0]; for(int i = 2; i < 4; ++i) { elt = T1_.values[i-2]; elt = ROR32(elt, 17) ^ ROR32(elt, 19) ^ LSR(elt, 10); elt = elt + x_.values[i] + T0_.values[i]; r_.values[i] = elt; } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsha256su1q_u32 #define vsha256su1q_u32(tw0_3, w8_11, w12_15) simde_vsha256su1q_u32((tw0_3), (w8_11), (w12_15)) #endif #undef ROR32 #undef ROL32 #undef LSR #undef LSL SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHA256_H) */ /* :: End simde/simde/arm/neon/sha256.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sha512.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHA512_H) #define SIMDE_ARM_NEON_SHA512_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #define ROR64(operand, shift) (((operand) >> (shift)) | ((operand) << (64-shift))) #define ROL64(operand, shift) (((operand) >> (64-shift)) | ((operand) << (shift))) #define LSR(operand, shift) ((operand) >> (shift)) #define LSL(operand, shift) ((operand) << (shift)) SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsha512hq_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512) return vsha512hq_u64(w, x, y); #else simde_uint64x2_private r_, w_ = simde_uint64x2_to_private(w), x_ = simde_uint64x2_to_private(x), y_ = simde_uint64x2_to_private(y); uint64_t Msigma1; uint64_t tmp; Msigma1 = ROR64(y_.values[1], 14) ^ ROR64(y_.values[1], 18) ^ ROR64(y_.values[1], 41); r_.values[1] = (y_.values[1] & x_.values[0]) ^ (~(y_.values[1]) & x_.values[1]); r_.values[1] = (r_.values[1] + Msigma1 + w_.values[1]); tmp = r_.values[1] + y_.values[0]; Msigma1 = ROR64(tmp, 14) ^ ROR64(tmp, 18) ^ ROR64(tmp, 41); r_.values[0] = (tmp & y_.values[1]) ^ (~(tmp) & x_.values[0]); r_.values[0] = (r_.values[0] + Msigma1 + w_.values[0]); return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsha512hq_u64 #define vsha512hq_u64(w, x, y) simde_vsha512hq_u64((w), (x), (y)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsha512h2q_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512) return vsha512h2q_u64(w, x, y); #else simde_uint64x2_private r_, w_ = simde_uint64x2_to_private(w), x_ = simde_uint64x2_to_private(x), y_ = simde_uint64x2_to_private(y); uint64_t Msigma0; Msigma0 = ROR64(y_.values[0], 28) ^ ROR64(y_.values[0], 34) ^ ROR64(y_.values[0], 39); r_.values[1] = (y_.values[1] & x_.values[0]) ^ (y_.values[0] & x_.values[0]) ^ (y_.values[1] & y_.values[0]); r_.values[1] = (r_.values[1] + Msigma0 + w_.values[1]); Msigma0 = ROR64(r_.values[1], 28) ^ ROR64(r_.values[1], 34) ^ ROR64(r_.values[1], 39); r_.values[0] = (r_.values[1] & y_.values[0]) ^ (r_.values[1] & y_.values[1]) ^ (y_.values[1] & y_.values[0]); r_.values[0] = (r_.values[0] + Msigma0 + w_.values[0]); return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsha512h2q_u64 #define vsha512h2q_u64(w, x, y) simde_vsha512h2q_u64((w), (x), (y)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsha512su0q_u64(simde_uint64x2_t w, simde_uint64x2_t x) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512) return vsha512su0q_u64(w, x); #else simde_uint64x2_private r_, w_ = simde_uint64x2_to_private(w), x_ = simde_uint64x2_to_private(x); uint64_t sig0; sig0 = ROR64(w_.values[1], 1) ^ ROR64(w_.values[1], 8) ^ (w_.values[1] >> 7); r_.values[0] = w_.values[0] + sig0; sig0 = ROR64(x_.values[0], 1) ^ ROR64(x_.values[0], 8) ^ (x_.values[0] >> 7); r_.values[1] = w_.values[1] + sig0; return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsha512su0q_u64 #define vsha512su0q_u64(w, x) simde_vsha512su0q_u64((w), (x)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsha512su1q_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512) return vsha512su1q_u64(w, x, y); #else simde_uint64x2_private r_, w_ = simde_uint64x2_to_private(w), x_ = simde_uint64x2_to_private(x), y_ = simde_uint64x2_to_private(y); uint64_t sig1; sig1 = ROR64(x_.values[1], 19) ^ ROR64(x_.values[1], 61) ^ (x_.values[1] >> 6); r_.values[1] = w_.values[1] + sig1 + y_.values[1]; sig1 = ROR64(x_.values[0], 19) ^ ROR64(x_.values[0], 61) ^ (x_.values[0] >> 6); r_.values[0] = w_.values[0] + sig1 + y_.values[0]; return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsha512su1q_u64 #define vsha512su1q_u64(w, x, y) simde_vsha512su1q_u64((w), (x), (y)) #endif #undef ROR64 #undef ROL64 #undef LSR #undef LSL SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHA512_H) */ /* :: End simde/simde/arm/neon/sha512.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/shl.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore */ #if !defined(SIMDE_ARM_NEON_SHL_H) #define SIMDE_ARM_NEON_SHL_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* Notes from the implementer (Christopher Moore aka rosbif) * * I have tried to exactly reproduce the documented behaviour of the * ARM NEON shl and shlq intrinsics. * This is complicated for the following reasons:- * * a) Negative shift counts shift right. * * b) Only the low byte of the shift count is used but the shift count * is not limited to 8-bit values (-128 to 127). * * c) Intel SIMD is not nearly as complete as NEON and AltiVec. * There were no intrisics with a vector shift count before AVX2 which * only has 32 and 64-bit logical ones and only a 32-bit arithmetic * one. The others need AVX512. There are no 8-bit shift intrinsics at * all, even with a scalar shift count. It is surprising to use AVX2 * and even AVX512 to implement a 64-bit vector operation. * * d) Many shift implementations, and the C standard, do not treat a * shift count >= the object's size in bits as one would expect. * (Personally I feel that > is silly but == can be useful.) * * Maybe it would be useful for SIMDe to have a flag enabling a fast * implementation where the result is only guaranteed for shift counts * conforming to the C standard. * * Note that even the C17/18 standard does not define the behaviour of * a right shift of a negative value. * However Evan and I agree that all compilers likely to be used * implement this as an arithmetic right shift with sign extension. * If this is not the case it could be replaced by a logical right shift * if negative values are complemented before and after the shift. * * Some of the SIMD translations may be slower than the portable code, * particularly those for vectors with only one or two elements. * But I had fun writing them ;-) * */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vshld_s64 (const int64_t a, const int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vshld_s64(a, b); #else int8_t b_ = HEDLEY_STATIC_CAST(int8_t, b); return (b_ >= 0) ? (b_ >= 64) ? 0 : (a << b_) : (b_ <= -64) ? (a >> 63) : (a >> -b_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshld_s64 #define vshld_s64(a, b) simde_vshld_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vshld_u64 (const uint64_t a, const int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vshld_u64(a, HEDLEY_STATIC_CAST(int64_t, b)); #else int8_t b_ = HEDLEY_STATIC_CAST(int8_t, b); return (simde_math_llabs(b_) >= 64) ? 0 : (b_ >= 0) ? (a << b_) : (a >> -b_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshld_u64 #define vshld_u64(a, b) simde_vshld_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vshl_s8 (const simde_int8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(b_.m64)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi16(a128, b128), _mm_srav_epi16(a128, _mm_abs_epi16(b128)), _mm_cmpgt_epi16(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(_mm_cvtepi16_epi8(r128)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m256i a256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(a_.m64)); __m256i b256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(b_.m64)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srav_epi32(a256, _mm256_abs_epi32(b256)), _mm256_cmpgt_epi32(_mm256_setzero_si256(), b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi32(0x0C080400)); r_.m64 = _mm_set_pi32(simde_mm256_extract_epi32(r256, 4), simde_mm256_extract_epi32(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (b_.values[i] >= 0) ? (b_.values[i] >= 8) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -8) ? (a_.values[i] >> 7) : (a_.values[i] >> -b_.values[i])); } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_s8 #define vshl_s8(a, b) simde_vshl_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vshl_s16 (const simde_int16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(b_.m64)); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srav_epi32(a128, _mm_abs_epi32(b128)), _mm_cmpgt_epi32(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(_mm_shuffle_epi8(r128, _mm_set1_epi64x(0x0D0C090805040100))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (b_.values[i] >= 0) ? (b_.values[i] >= 16) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -16) ? (a_.values[i] >> 15) : (a_.values[i] >> -b_.values[i])); } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_s16 #define vshl_s16(a, b) simde_vshl_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vshl_s32 (const simde_int32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srav_epi32(a128, _mm_abs_epi32(b128)), _mm_cmpgt_epi32(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (b_.values[i] >= 0) ? (b_.values[i] >= 32) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -32) ? (a_.values[i] >> 31) : (a_.values[i] >> -b_.values[i]); } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_s32 #define vshl_s32(a, b) simde_vshl_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vshl_s64 (const simde_int64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_s64(a, b); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a), b_ = simde_int64x1_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi64(_mm_slli_epi64(b128, 56), 56); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128), _mm_srav_epi64(a128, _mm_sub_epi64(zero, b128)), _mm_cmpgt_epi64(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); __m128i maska = _mm_cmpgt_epi64(zero, a128); __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b128), _mm_set1_epi64x(0xFF)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b_abs), _mm_xor_si128(_mm_srlv_epi64(_mm_xor_si128(a128, maska), b_abs), maska), _mm_cmpgt_epi64(zero, _mm_slli_epi64(b128, 56))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vshld_s64(a_.values[i], b_.values[i]); } #endif return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_s64 #define vshl_s64(a, b) simde_vshl_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vshl_u8 (const simde_uint8x8_t a, const simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_cvtepu8_epi16(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi8_epi16(_mm_movpi64_epi64(b_.m64)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi16(a128, b128), _mm_srlv_epi16(a128, _mm_abs_epi16(b128)), _mm_cmpgt_epi16(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(_mm_cvtepi16_epi8(r128)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m256i a256 = _mm256_cvtepu8_epi32(_mm_movpi64_epi64(a_.m64)); __m256i b256 = _mm256_cvtepi8_epi32(_mm_movpi64_epi64(b_.m64)); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srlv_epi32(a256, _mm256_abs_epi32(b256)), _mm256_cmpgt_epi32(_mm256_setzero_si256(), b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi32(0x0C080400)); r_.m64 = _mm_set_pi32(simde_mm256_extract_epi32(r256, 4), simde_mm256_extract_epi32(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (simde_math_abs(b_.values[i]) >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i])); } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_u8 #define vshl_u8(a, b) simde_vshl_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vshl_u16 (const simde_uint16x4_t a, const simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_cvtepu16_epi32(_mm_movpi64_epi64(a_.m64)); __m128i b128 = _mm_cvtepi16_epi32(_mm_movpi64_epi64(b_.m64)); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srlv_epi32(a128, _mm_abs_epi32(b128)), _mm_cmpgt_epi32(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(_mm_shuffle_epi8(r128, _mm_set1_epi64x(0x0D0C090805040100))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (simde_math_abs(b_.values[i]) >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i])); } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_u16 #define vshl_u16(a, b) simde_vshl_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vshl_u32 (const simde_uint32x2_t a, const simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi32(_mm_slli_epi32(b128, 24), 24); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi32(a128, b128), _mm_srlv_epi32(a128, _mm_abs_epi32(b128)), _mm_cmpgt_epi32(_mm_setzero_si128(), b128)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (simde_math_abs(b_.values[i]) >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i]); } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_u32 #define vshl_u32(a, b) simde_vshl_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vshl_u64 (const simde_uint64x1_t a, const simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshl_u64(a, b); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); simde_int64x1_private b_ = simde_int64x1_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); b128 = _mm_srai_epi64(_mm_slli_epi64(b128, 56), 56); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b128), _mm_srlv_epi64(a128, _mm_sub_epi64(zero, b128)), _mm_cmpgt_epi64(zero, b128)); r_.m64 = _mm_movepi64_pi64(r128); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_movpi64_epi64(a_.m64); __m128i b128 = _mm_movpi64_epi64(b_.m64); __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b128), _mm_set1_epi64x(0xFF)); __m128i r128 = _mm_blendv_epi8(_mm_sllv_epi64(a128, b_abs), _mm_srlv_epi64(a128, b_abs), _mm_cmpgt_epi64(_mm_setzero_si128(), _mm_slli_epi64(b128, 56))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vshld_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshl_u64 #define vshl_u64(a, b) simde_vshl_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vshlq_s8 (const simde_int8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_s8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(signed char) a_shl, a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) b_abs, b_max; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL char) b_mask; b_abs = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_abs(b)); b_max = vec_splat_u8(7); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) a_shl = vec_and(vec_sl(a, b_abs), vec_cmple(b_abs, b_max)); #else a_shl = vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, vec_splat_u8(8))); #endif a_shr = vec_sra(a, vec_min(b_abs, b_max)); b_mask = vec_cmplt(b, vec_splat_s8(0)); return vec_sel(a_shl, a_shr, b_mask); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m256i a256 = _mm256_cvtepi8_epi16(a_.m128i); __m256i b256 = _mm256_cvtepi8_epi16(b_.m128i); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi16(a256, b256), _mm256_srav_epi16(a256, _mm256_abs_epi16(b256)), _mm256_cmpgt_epi16(_mm256_setzero_si256(), b256)); r_.m128i = _mm256_cvtepi16_epi8(r256); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (b_.values[i] >= 0) ? (b_.values[i] >= 8) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -8) ? (a_.values[i] >> 7) : (a_.values[i] >> -b_.values[i])); } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_s8 #define vshlq_s8(a, b) simde_vshlq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vshlq_s16 (const simde_int16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_s16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(signed short) a_shl, a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) b_abs, b_max; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL short) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned short, 0xFF))); b_max = vec_splat_u16(15); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) a_shl = vec_and(vec_sl(a, b_abs), vec_cmple(b_abs, b_max)); #else a_shl = vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16)))); #endif a_shr = vec_sra(a, vec_min(b_abs, b_max)); b_mask = vec_cmplt(vec_sl(b, vec_splat_u16(8)), vec_splat_s16(0)); return vec_sel(a_shl, a_shr, b_mask); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m128i B = _mm_srai_epi16(_mm_slli_epi16(b_.m128i, 8), 8); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi16(a_.m128i, B), _mm_srav_epi16(a_.m128i, _mm_abs_epi16(B)), _mm_cmpgt_epi16(_mm_setzero_si128(), B)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_ARCH_AMD64) __m256i a256 = _mm256_cvtepi16_epi32(a_.m128i); __m256i b256 = _mm256_cvtepi16_epi32(b_.m128i); b256 = _mm256_srai_epi32(_mm256_slli_epi32(b256, 24), 24); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srav_epi32(a256, _mm256_abs_epi32(b256)), _mm256_cmpgt_epi32(_mm256_setzero_si256(), b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi64x(0x0D0C090805040100)); r_.m128i = _mm_set_epi64x(simde_mm256_extract_epi64(r256, 2), simde_mm256_extract_epi64(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (b_.values[i] >= 0) ? (b_.values[i] >= 16) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -16) ? (a_.values[i] >> 15) : (a_.values[i] >> -b_.values[i])); } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_s16 #define vshlq_s16(a, b) simde_vshlq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vshlq_s32 (const simde_int32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_s32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(signed int) a_shl, a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) b_abs, b_max; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL int) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned int, 0xFF))); b_max = vec_splats(HEDLEY_STATIC_CAST(unsigned int, 31)); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) a_shl = vec_and(vec_sl(a, b_abs), vec_cmple(b_abs, b_max)); #else a_shl = vec_and(vec_sl(a, b_abs), vec_cmplt(b_abs, vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32)))); #endif a_shr = vec_sra(a, vec_min(b_abs, b_max)); b_mask = vec_cmplt(vec_sl(b, vec_splats(HEDLEY_STATIC_CAST(unsigned int, 24))), vec_splat_s32(0)); return vec_sel(a_shl, a_shr, b_mask); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) __m128i B = _mm_srai_epi32(_mm_slli_epi32(b_.m128i, 24), 24); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi32(a_.m128i, B), _mm_srav_epi32(a_.m128i, _mm_abs_epi32(B)), _mm_cmpgt_epi32(_mm_setzero_si128(), B)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (b_.values[i] >= 0) ? (b_.values[i] >= 32) ? 0 : (a_.values[i] << b_.values[i]) : (b_.values[i] <= -32) ? (a_.values[i] >> 31) : (a_.values[i] >> -b_.values[i]); } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_s32 #define vshlq_s32(a, b) simde_vshlq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vshlq_s64 (const simde_int64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_s64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(signed long long) a_shl, a_shr; SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) b_abs, b_max; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL long long) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 0xFF))); b_max = vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 63)); a_shl = vec_and(vec_sl(a, b_abs), vec_cmple(b_abs, b_max)); a_shr = vec_sra(a, vec_min(b_abs, b_max)); b_mask = vec_cmplt(vec_sl(b, vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 56))), vec_splats(HEDLEY_STATIC_CAST(signed long long, 0))); HEDLEY_DIAGNOSTIC_PUSH #if defined(SIMDE_BUG_CLANG_46770) SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ #endif return vec_sel(a_shl, a_shr, b_mask); HEDLEY_DIAGNOSTIC_POP #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i B = _mm_srai_epi64(_mm_slli_epi64(b_.m128i, 56), 56); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, B), _mm_srav_epi64(a_.m128i, _mm_sub_epi64(zero, B)), _mm_cmpgt_epi64(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i maska = _mm_cmpgt_epi64(zero, a_.m128i); __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b_.m128i), _mm_set1_epi64x(0xFF)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, b_abs), _mm_xor_si128(_mm_srlv_epi64(_mm_xor_si128(a_.m128i, maska), b_abs), maska), _mm_cmpgt_epi64(zero, _mm_slli_epi64(b_.m128i, 56))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vshld_s64(a_.values[i], b_.values[i]); } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_s64 #define vshlq_s64(a, b) simde_vshlq_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vshlq_u8 (const simde_uint8x16_t a, const simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_u8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) b_abs; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL char) b_mask; b_abs = HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_abs(b)); b_mask = vec_cmplt(b, vec_splat_s8(0)); return vec_and(vec_sel(vec_sl(a, b_abs), vec_sr(a, b_abs), b_mask), vec_cmplt(b_abs, vec_splat_u8(8))); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m256i a256 = _mm256_cvtepu8_epi16(a_.m128i); __m256i b256 = _mm256_cvtepi8_epi16(b_.m128i); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi16(a256, b256), _mm256_srlv_epi16(a256, _mm256_abs_epi16(b256)), _mm256_cmpgt_epi16(_mm256_setzero_si256(), b256)); r_.m128i = _mm256_cvtepi16_epi8(r256); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (simde_math_abs(b_.values[i]) >= 8) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i])); } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_u8 #define vshlq_u8(a, b) simde_vshlq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vshlq_u16 (const simde_uint16x8_t a, const simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_u16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) b_abs; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL short) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned short, 0xFF))); b_mask = vec_cmplt(vec_sl(b, vec_splat_u16(8)), vec_splat_s16(0)); #if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_and(vec_sel(vec_sl(a, b_abs), vec_sr(a, b_abs), b_mask), vec_cmple(b_abs, vec_splat_u16(15))); #else return vec_and(vec_sel(vec_sl(a, b_abs), vec_sr(a, b_abs), b_mask), vec_cmplt(b_abs, vec_splats(HEDLEY_STATIC_CAST(unsigned short, 16)))); #endif #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m128i B = _mm_srai_epi16(_mm_slli_epi16(b_.m128i, 8), 8); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi16(a_.m128i, B), _mm_srlv_epi16(a_.m128i, _mm_abs_epi16(B)), _mm_cmpgt_epi16(_mm_setzero_si128(), B)); #elif defined(SIMDE_X86_AVX2_NATIVE) && defined(SIMDE_ARCH_AMD64) __m256i a256 = _mm256_cvtepu16_epi32(a_.m128i); __m256i b256 = _mm256_cvtepi16_epi32(b_.m128i); b256 = _mm256_srai_epi32(_mm256_slli_epi32(b256, 24), 24); __m256i r256 = _mm256_blendv_epi8(_mm256_sllv_epi32(a256, b256), _mm256_srlv_epi32(a256, _mm256_abs_epi32(b256)), _mm256_cmpgt_epi32(_mm256_setzero_si256(), b256)); r256 = _mm256_shuffle_epi8(r256, _mm256_set1_epi64x(0x0D0C090805040100)); r_.m128i = _mm_set_epi64x(simde_mm256_extract_epi64(r256, 2), simde_mm256_extract_epi64(r256, 0)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (simde_math_abs(b_.values[i]) >= 16) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i])); } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_u16 #define vshlq_u16(a, b) simde_vshlq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vshlq_u32 (const simde_uint32x4_t a, const simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_u32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) b_abs; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL int) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned int, 0xFF))); b_mask = vec_cmplt(vec_sl(b, vec_splats(HEDLEY_STATIC_CAST(unsigned int, 24))), vec_splat_s32(0)); return vec_and(vec_sel(vec_sl(a, b_abs), vec_sr(a, b_abs), b_mask), vec_cmplt(b_abs, vec_splats(HEDLEY_STATIC_CAST(unsigned int, 32)))); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); #if defined(SIMDE_X86_AVX2_NATIVE) __m128i B = _mm_srai_epi32(_mm_slli_epi32(b_.m128i, 24), 24); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi32(a_.m128i, B), _mm_srlv_epi32(a_.m128i, _mm_abs_epi32(B)), _mm_cmpgt_epi32(_mm_setzero_si128(), B)); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { b_.values[i] = HEDLEY_STATIC_CAST(int8_t, b_.values[i]); r_.values[i] = (simde_math_abs(b_.values[i]) >= 32) ? 0 : (b_.values[i] >= 0) ? (a_.values[i] << b_.values[i]) : (a_.values[i] >> -b_.values[i]); } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_u32 #define vshlq_u32(a, b) simde_vshlq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vshlq_u64 (const simde_uint64x2_t a, const simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vshlq_u64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) b_abs; SIMDE_POWER_ALTIVEC_VECTOR(SIMDE_POWER_ALTIVEC_BOOL long long) b_mask; b_abs = vec_and(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_abs(HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(signed char), b))), vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 0xFF))); b_mask = vec_cmplt(vec_sl(b, vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 56))), vec_splats(HEDLEY_STATIC_CAST(signed long long, 0))); HEDLEY_DIAGNOSTIC_PUSH #if defined(SIMDE_BUG_CLANG_46770) SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_ #endif return vec_and(vec_sel(vec_sl(a, b_abs), vec_sr(a, b_abs), b_mask), vec_cmplt(b_abs, vec_splats(HEDLEY_STATIC_CAST(unsigned long long, 64)))); HEDLEY_DIAGNOSTIC_POP #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); simde_int64x2_private b_ = simde_int64x2_to_private(b); #if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE) __m128i zero = _mm_setzero_si128(); __m128i B = _mm_srai_epi64(_mm_slli_epi64(b_.m128i, 56), 56); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, B), _mm_srlv_epi64(a_.m128i, _mm_sub_epi64(zero, B)), _mm_cmpgt_epi64(zero, B)); #elif defined(SIMDE_X86_AVX2_NATIVE) __m128i b_abs = _mm_and_si128(_mm_abs_epi8(b_.m128i), _mm_set1_epi64x(0xFF)); r_.m128i = _mm_blendv_epi8(_mm_sllv_epi64(a_.m128i, b_abs), _mm_srlv_epi64(a_.m128i, b_abs), _mm_cmpgt_epi64(_mm_setzero_si128(), _mm_slli_epi64(b_.m128i, 56))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vshld_u64(a_.values[i], b_.values[i]); } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshlq_u64 #define vshlq_u64(a, b) simde_vshlq_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHL_H) */ /* :: End simde/simde/arm/neon/shl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/shll_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHLL_HIGH_N_H) #define SIMDE_ARM_NEON_SHLL_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* * The constant range requirements for the shift amount *n* looks strange. * The ARM Neon Intrinsics Reference states that for *_s8, 0 << n << 7. This * does not match the actual instruction decoding in the ARM Reference manual, * which states that the shift amount "must be equal to the source element width * in bits" (ARM DDI 0487F.b C7-1959). So for *_s8 instructions, *n* must be 8, * for *_s16, it must be 16, and *_s32 must be 32 (similarly for unsigned). */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vshll_high_n_s8 (const simde_int8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 7) { simde_int16x8_private r_; simde_int8x16_private a_ = simde_int8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, HEDLEY_STATIC_CAST(int16_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n); } return simde_int16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_s8(a, n) vshll_high_n_s8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_s8 #define vshll_high_n_s8(a, n) simde_vshll_high_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vshll_high_n_s16 (const simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 15) { simde_int32x4_private r_; simde_int16x8_private a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int32_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n; } return simde_int32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_s16(a, n) vshll_high_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_s16 #define vshll_high_n_s16(a, n) simde_vshll_high_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vshll_high_n_s32 (const simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 31) { simde_int64x2_private r_; simde_int32x4_private a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int64_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n; } return simde_int64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_s32(a, n) vshll_high_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_s32 #define vshll_high_n_s32(a, n) simde_vshll_high_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vshll_high_n_u8 (const simde_uint8x16_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 7) { simde_uint16x8_private r_; simde_uint8x16_private a_ = simde_uint8x16_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint16_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n); } return simde_uint16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_u8(a, n) vshll_high_n_u8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_u8 #define vshll_high_n_u8(a, n) simde_vshll_high_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vshll_high_n_u16 (const simde_uint16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 15) { simde_uint32x4_private r_; simde_uint16x8_private a_ = simde_uint16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n; } return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_u16(a, n) vshll_high_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_u16 #define vshll_high_n_u16(a, n) simde_vshll_high_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vshll_high_n_u32 (const simde_uint32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 31) { simde_uint64x2_private r_; simde_uint32x4_private a_ = simde_uint32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i+(sizeof(r_.values) / sizeof(r_.values[0]))]) << n; } return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshll_high_n_u32(a, n) vshll_high_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshll_high_n_u32 #define vshll_high_n_u32(a, n) simde_vshll_high_n_u32((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHLL_HIGH_N_H) */ /* :: End simde/simde/arm/neon/shll_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/shll_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore */ #if !defined(SIMDE_ARM_NEON_SHLL_N_H) #define SIMDE_ARM_NEON_SHLL_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* * The constant range requirements for the shift amount *n* looks strange. * The ARM Neon Intrinsics Reference states that for *_s8, 0 << n << 7. This * does not match the actual instruction decoding in the ARM Reference manual, * which states that the shift amount "must be equal to the source element width * in bits" (ARM DDI 0487F.b C7-1959). So for *_s8 instructions, *n* must be 8, * for *_s16, it must be 16, and *_s32 must be 32 (similarly for unsigned). */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vshll_n_s8 (const simde_int8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 8) { simde_int16x8_private r_; simde_int8x8_private a_ = simde_int8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, HEDLEY_STATIC_CAST(int16_t, a_.values[i]) << n); } return simde_int16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_s8(a, n) vshll_n_s8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_s8 #define vshll_n_s8(a, n) simde_vshll_n_s8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vshll_n_s16 (const simde_int16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 16) { simde_int32x4_private r_; simde_int16x4_private a_ = simde_int16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int32_t, a_.values[i]) << n; } return simde_int32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_s16(a, n) vshll_n_s16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_s16 #define vshll_n_s16(a, n) simde_vshll_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vshll_n_s32 (const simde_int32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 32) { simde_int64x2_private r_; simde_int32x2_private a_ = simde_int32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int64_t, a_.values[i]) << n; } return simde_int64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_s32(a, n) vshll_n_s32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_s32 #define vshll_n_s32(a, n) simde_vshll_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vshll_n_u8 (const simde_uint8x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 8) { simde_uint16x8_private r_; simde_uint8x8_private a_ = simde_uint8x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint16_t, a_.values[i]) << n); } return simde_uint16x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_u8(a, n) vshll_n_u8((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_u8 #define vshll_n_u8(a, n) simde_vshll_n_u8((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vshll_n_u16 (const simde_uint16x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 16) { simde_uint32x4_private r_; simde_uint16x4_private a_ = simde_uint16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i]) << n; } return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_u16(a, n) vshll_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_u16 #define vshll_n_u16(a, n) simde_vshll_n_u16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vshll_n_u32 (const simde_uint32x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 32) { simde_uint64x2_private r_; simde_uint32x2_private a_ = simde_uint32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i]) << n; } return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshll_n_u32(a, n) vshll_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshll_n_u32 #define vshll_n_u32(a, n) simde_vshll_n_u32((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHLL_N_H) */ /* :: End simde/simde/arm/neon/shll_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/shrn_high_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHRN_HIGH_N_H) #define SIMDE_ARM_NEON_SHRN_HIGH_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/shrn_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SHRN_N_H) #define SIMDE_ARM_NEON_SHRN_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vshrn_n_s16 (const simde_int16x8_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 8) { simde_int8x8_private r_; simde_int16x8_private a_ = simde_int16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (a_.values[i] >> n) & UINT8_MAX); } return simde_int8x8_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_s16(a, n) vshrn_n_s16((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vshrn_n_s16(a, n) simde_vmovn_s16(simde_vshrq_n_s16((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_s16 #define vshrn_n_s16(a, n) simde_vshrn_n_s16((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vshrn_n_s32 (const simde_int32x4_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) { simde_int16x4_private r_; simde_int32x4_private a_ = simde_int32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (a_.values[i] >> n) & UINT16_MAX); } return simde_int16x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_s32(a, n) vshrn_n_s32((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vshrn_n_s32(a, n) simde_vmovn_s32(simde_vshrq_n_s32((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_s32 #define vshrn_n_s32(a, n) simde_vshrn_n_s32((a), (n)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vshrn_n_s64 (const simde_int64x2_t a, const int n) SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) { simde_int32x2_private r_; simde_int64x2_private a_ = simde_int64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = HEDLEY_STATIC_CAST(int32_t, (a_.values[i] >> n) & UINT32_MAX); } return simde_int32x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_s64(a, n) vshrn_n_s64((a), (n)) #elif SIMDE_NATURAL_VECTOR_SIZE > 0 #define simde_vshrn_n_s64(a, n) simde_vmovn_s64(simde_vshrq_n_s64((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_s64 #define vshrn_n_s64(a, n) simde_vshrn_n_s64((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_u16(a, n) vshrn_n_u16((a), (n)) #else #define simde_vshrn_n_u16(a, n) \ simde_vreinterpret_u8_s8( \ simde_vshrn_n_s16(simde_vreinterpretq_s16_u16(a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_u16 #define vshrn_n_u16(a, n) simde_vshrn_n_u16((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_u32(a, n) vshrn_n_u32((a), (n)) #else #define simde_vshrn_n_u32(a, n) \ simde_vreinterpret_u16_s16( \ simde_vshrn_n_s32(simde_vreinterpretq_s32_u32(a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_u32 #define vshrn_n_u32(a, n) simde_vshrn_n_u32((a), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vshrn_n_u64(a, n) vshrn_n_u64((a), (n)) #else #define simde_vshrn_n_u64(a, n) \ simde_vreinterpret_u32_s32( \ simde_vshrn_n_s64(simde_vreinterpretq_s64_u64(a), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vshrn_n_u64 #define vshrn_n_u64(a, n) simde_vshrn_n_u64((a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHRN_N_H) */ /* :: End simde/simde/arm/neon/shrn_n.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_s16(r, a, n) vshrn_high_n_s16((r), (a), (n)) #else #define simde_vshrn_high_n_s16(r, a, n) \ simde_vcombine_s8((r), simde_vshrn_n_s16((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_s16 #define vshrn_high_n_s16(r, a, n) simde_vshrn_high_n_s16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_s32(r, a, n) vshrn_high_n_s32((r), (a), (n)) #else #define simde_vshrn_high_n_s32(r, a, n) \ simde_vcombine_s16((r), simde_vshrn_n_s32((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_s32 #define vshrn_high_n_s32(r, a, n) simde_vshrn_high_n_s32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_s64(r, a, n) vshrn_high_n_s64((r), (a), (n)) #else #define simde_vshrn_high_n_s64(r, a, n) \ simde_vcombine_s32((r), simde_vshrn_n_s64((a), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_s64 #define vshrn_high_n_s64(r, a, n) simde_vshrn_high_n_s64((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_u16(r, a, n) vshrn_high_n_u16((r), (a), (n)) #else #define simde_vshrn_high_n_u16(r, a, n) \ simde_vreinterpretq_u8_s8( \ simde_vcombine_s8(simde_vreinterpret_s8_u8(r), \ simde_vshrn_n_s16(simde_vreinterpretq_s16_u16(a), (n)))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_u16 #define vshrn_high_n_u16(r, a, n) simde_vshrn_high_n_u16((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_u32(r, a, n) vshrn_high_n_u32((r), (a), (n)) #else #define simde_vshrn_high_n_u32(r, a, n) \ simde_vreinterpretq_u16_s16( \ simde_vcombine_s16(simde_vreinterpret_s16_u16(r), \ simde_vshrn_n_s32(simde_vreinterpretq_s32_u32(a), (n)))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_u32 #define vshrn_high_n_u32(r, a, n) simde_vshrn_high_n_u32((r), (a), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vshrn_high_n_u64(r, a, n) vshrn_high_n_u64((r), (a), (n)) #else #define simde_vshrn_high_n_u64(r, a, n) \ simde_vreinterpretq_u32_s32( \ simde_vcombine_s32(simde_vreinterpret_s32_u32(r), \ simde_vshrn_n_s64(simde_vreinterpretq_s64_u64(a), (n)))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vshrn_high_n_u64 #define vshrn_high_n_u64(r, a, n) simde_vshrn_high_n_u64((r), (a), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SHRN_HIGH_N_H) */ /* :: End simde/simde/arm/neon/shrn_high_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sli_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SLI_N_H) #define SIMDE_ARM_NEON_SLI_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vslid_n_s64(a, b, n) vslid_n_s64(a, b, n) #else #define simde_vslid_n_s64(a, b, n) \ HEDLEY_STATIC_CAST(int64_t, \ simde_vslid_n_u64(HEDLEY_STATIC_CAST(uint64_t, a), HEDLEY_STATIC_CAST(uint64_t, b), n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vslid_n_s64 #define vslid_n_s64(a, b, n) simde_vslid_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vslid_n_u64(a, b, n) vslid_n_u64(a, b, n) #else #define simde_vslid_n_u64(a, b, n) \ (((a & (UINT64_C(0xffffffffffffffff) >> (64 - n))) | simde_vshld_n_u64((b), (n)))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vslid_n_u64 #define vslid_n_u64(a, b, n) simde_vslid_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_s8(a, b, n) vsli_n_s8((a), (b), (n)) #else #define simde_vsli_n_s8(a, b, n) \ simde_vreinterpret_s8_u8(simde_vsli_n_u8( \ simde_vreinterpret_u8_s8((a)), simde_vreinterpret_u8_s8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_s8 #define vsli_n_s8(a, b, n) simde_vsli_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_u8(a, b, n) vsli_n_u8((a), (b), (n)) #else #define simde_vsli_n_u8(a, b, n) \ simde_vorr_u8( \ simde_vand_u8((a), simde_vdup_n_u8((UINT8_C(0xff) >> (8 - n)))), \ simde_vshl_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_u8 #define vsli_n_u8(a, b, n) simde_vsli_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_s16(a, b, n) vsli_n_s16((a), (b), (n)) #else #define simde_vsli_n_s16(a, b, n) \ simde_vreinterpret_s16_u16(simde_vsli_n_u16( \ simde_vreinterpret_u16_s16((a)), simde_vreinterpret_u16_s16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_s16 #define vsli_n_s16(a, b, n) simde_vsli_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_u16(a, b, n) vsli_n_u16((a), (b), (n)) #else #define simde_vsli_n_u16(a, b, n) \ simde_vorr_u16( \ simde_vand_u16((a), simde_vdup_n_u16((UINT16_C(0xffff) >> (16 - n)))), \ simde_vshl_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_u16 #define vsli_n_u16(a, b, n) simde_vsli_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_s32(a, b, n) vsli_n_s32((a), (b), (n)) #else #define simde_vsli_n_s32(a, b, n) \ simde_vreinterpret_s32_u32(simde_vsli_n_u32( \ simde_vreinterpret_u32_s32((a)), simde_vreinterpret_u32_s32((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_s32 #define vsli_n_s32(a, b, n) simde_vsli_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_u32(a, b, n) vsli_n_u32((a), (b), (n)) #else #define simde_vsli_n_u32(a, b, n) \ simde_vorr_u32( \ simde_vand_u32((a), \ simde_vdup_n_u32((UINT32_C(0xffffffff) >> (32 - n)))), \ simde_vshl_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_u32 #define vsli_n_u32(a, b, n) simde_vsli_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_s64(a, b, n) vsli_n_s64((a), (b), (n)) #else #define simde_vsli_n_s64(a, b, n) \ simde_vreinterpret_s64_u64(simde_vsli_n_u64( \ simde_vreinterpret_u64_s64((a)), simde_vreinterpret_u64_s64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_s64 #define vsli_n_s64(a, b, n) simde_vsli_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_u64(a, b, n) vsli_n_u64((a), (b), (n)) #else #define simde_vsli_n_u64(a, b, n) \ simde_vorr_u64( \ simde_vand_u64((a), simde_vdup_n_u64( \ (UINT64_C(0xffffffffffffffff) >> (64 - n)))), \ simde_vshl_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_u64 #define vsli_n_u64(a, b, n) simde_vsli_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_s8(a, b, n) vsliq_n_s8((a), (b), (n)) #else #define simde_vsliq_n_s8(a, b, n) \ simde_vreinterpretq_s8_u8(simde_vsliq_n_u8( \ simde_vreinterpretq_u8_s8((a)), simde_vreinterpretq_u8_s8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_s8 #define vsliq_n_s8(a, b, n) simde_vsliq_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_u8(a, b, n) vsliq_n_u8((a), (b), (n)) #else #define simde_vsliq_n_u8(a, b, n) \ simde_vorrq_u8( \ simde_vandq_u8((a), simde_vdupq_n_u8((UINT8_C(0xff) >> (8 - n)))), \ simde_vshlq_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_u8 #define vsliq_n_u8(a, b, n) simde_vsliq_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_s16(a, b, n) vsliq_n_s16((a), (b), (n)) #else #define simde_vsliq_n_s16(a, b, n) \ simde_vreinterpretq_s16_u16(simde_vsliq_n_u16( \ simde_vreinterpretq_u16_s16((a)), simde_vreinterpretq_u16_s16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_s16 #define vsliq_n_s16(a, b, n) simde_vsliq_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_u16(a, b, n) vsliq_n_u16((a), (b), (n)) #else #define simde_vsliq_n_u16(a, b, n) \ simde_vorrq_u16( \ simde_vandq_u16((a), simde_vdupq_n_u16((UINT16_C(0xffff) >> (16 - n)))), \ simde_vshlq_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_u16 #define vsliq_n_u16(a, b, n) simde_vsliq_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_s32(a, b, n) vsliq_n_s32((a), (b), (n)) #else #define simde_vsliq_n_s32(a, b, n) \ simde_vreinterpretq_s32_u32(simde_vsliq_n_u32( \ simde_vreinterpretq_u32_s32((a)), simde_vreinterpretq_u32_s32((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_s32 #define vsliq_n_s32(a, b, n) simde_vsliq_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_u32(a, b, n) vsliq_n_u32((a), (b), (n)) #else #define simde_vsliq_n_u32(a, b, n) \ simde_vorrq_u32( \ simde_vandq_u32((a), \ simde_vdupq_n_u32((UINT32_C(0xffffffff) >> (32 - n)))), \ simde_vshlq_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_u32 #define vsliq_n_u32(a, b, n) simde_vsliq_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_s64(a, b, n) vsliq_n_s64((a), (b), (n)) #else #define simde_vsliq_n_s64(a, b, n) \ simde_vreinterpretq_s64_u64(simde_vsliq_n_u64( \ simde_vreinterpretq_u64_s64((a)), simde_vreinterpretq_u64_s64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_s64 #define vsliq_n_s64(a, b, n) simde_vsliq_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_u64(a, b, n) vsliq_n_u64((a), (b), (n)) #else #define simde_vsliq_n_u64(a, b, n) \ simde_vorrq_u64( \ simde_vandq_u64((a), simde_vdupq_n_u64( \ (UINT64_C(0xffffffffffffffff) >> (64 - n)))), \ simde_vshlq_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_u64 #define vsliq_n_u64(a, b, n) simde_vsliq_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_p8(a, b, n) vsli_n_p8((a), (b), (n)) #else #define simde_vsli_n_p8(a, b, n) \ simde_vreinterpret_p8_u8(simde_vsli_n_u8( \ simde_vreinterpret_u8_p8((a)), simde_vreinterpret_u8_p8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_p8 #define vsli_n_p8(a, b, n) simde_vsli_n_p8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsli_n_p16(a, b, n) vsli_n_p16((a), (b), (n)) #else #define simde_vsli_n_p16(a, b, n) \ simde_vreinterpret_p16_u16(simde_vsli_n_u16( \ simde_vreinterpret_u16_p16((a)), simde_vreinterpret_u16_p16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsli_n_p16 #define vsli_n_p16(a, b, n) simde_vsli_n_p16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #define simde_vsli_n_p64(a, b, n) vsli_n_p64((a), (b), (n)) #else #define simde_vsli_n_p64(a, b, n) \ simde_vreinterpret_p64_u64(simde_vsli_n_u64( \ simde_vreinterpret_u64_p64((a)), simde_vreinterpret_u64_p64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsli_n_p64 #define vsli_n_p64(a, b, n) simde_vsli_n_p64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_p8(a, b, n) vsliq_n_p8((a), (b), (n)) #else #define simde_vsliq_n_p8(a, b, n) \ simde_vreinterpretq_p8_u8(simde_vsliq_n_u8( \ simde_vreinterpretq_u8_p8((a)), simde_vreinterpretq_u8_p8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_p8 #define vsliq_n_p8(a, b, n) simde_vsliq_n_p8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsliq_n_p16(a, b, n) vsliq_n_p16((a), (b), (n)) #else #define simde_vsliq_n_p16(a, b, n) \ simde_vreinterpretq_p16_u16(simde_vsliq_n_u16( \ simde_vreinterpretq_u16_p16((a)), simde_vreinterpretq_u16_p16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsliq_n_p16 #define vsliq_n_p16(a, b, n) simde_vsliq_n_p16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #define simde_vsliq_n_p64(a, b, n) vsliq_n_p64((a), (b), (n)) #else #define simde_vsliq_n_p64(a, b, n) \ simde_vreinterpretq_p64_u64(simde_vsliq_n_u64( \ simde_vreinterpretq_u64_p64((a)), simde_vreinterpretq_u64_p64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsliq_n_p64 #define vsliq_n_p64(a, b, n) simde_vsliq_n_p64((a), (b), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SLI_N_H) */ /* :: End simde/simde/arm/neon/sli_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sm3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SM3_H) #define SIMDE_ARM_NEON_SM3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #define ROR32(operand, shift) (((operand) >> (shift)) | ((operand) << (32-shift))) #define ROL32(operand, shift) (((operand) >> (32-shift)) | ((operand) << (shift))) #define LSR(operand, shift) ((operand) >> (shift)) #define LSL(operand, shift) ((operand) << (shift)) SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3ss1q_u32(simde_uint32x4_t n, simde_uint32x4_t m, simde_uint32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) return vsm3ss1q_u32(n, m, a); #else simde_uint32x4_private r_, n_ = simde_uint32x4_to_private(n), m_ = simde_uint32x4_to_private(m), a_ = simde_uint32x4_to_private(a); r_.values[3] = ROL32((ROL32(n_.values[3], 12) + m_.values[3] + a_.values[3]), 7); r_.values[2] = 0; r_.values[1] = 0; r_.values[0] = 0; return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3ss1q_u32 #define vsm3ss1q_u32(n, m, a) simde_vsm3ss1q_u32((n), (m), (a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3tt1aq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c, const int imm2) SIMDE_REQUIRE_CONSTANT_RANGE(imm2, 0, 3) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); uint32_t WjPrime, TT1, SS2; WjPrime = c_.values[imm2]; SS2 = b_.values[3] ^ ROL32(a_.values[3], 12); TT1 = a_.values[1] ^ (a_.values[3] ^ a_.values[2]); TT1 = (TT1 + a_.values[0] + SS2 + WjPrime); r_.values[0] = a_.values[1]; r_.values[1] = ROL32(a_.values[2], 9); r_.values[2] = a_.values[3]; r_.values[3] = TT1; return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) #define simde_vsm3tt1aq_u32(a, b, c, imm2) vsm3tt1aq_u32((a), (b), (c), (imm2)); #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3tt1aq_u32 #define vsm3tt1aq_u32(a, b, c, imm2) simde_vsm3tt1aq_u32((a), (b), (c), (imm2)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3tt1bq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c, const int imm2) SIMDE_REQUIRE_CONSTANT_RANGE(imm2, 0, 3) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); uint32_t WjPrime, TT1, SS2; WjPrime = c_.values[imm2]; SS2 = b_.values[3] ^ ROL32(a_.values[3], 12); TT1 = (a_.values[3] & a_.values[1]) | (a_.values[3] & a_.values[2]) | (a_.values[1] & a_.values[2]); TT1 = (TT1 + a_.values[0] + SS2 + WjPrime); r_.values[0] = a_.values[1]; r_.values[1] = ROL32(a_.values[2], 9); r_.values[2] = a_.values[3]; r_.values[3] = TT1; return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) #define simde_vsm3tt1bq_u32(a, b, c, imm2) vsm3tt1bq_u32((a), (b), (c), (imm2)); #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3tt1bq_u32 #define vsm3tt1bq_u32(a, b, c, imm2) simde_vsm3tt1bq_u32((a), (b), (c), (imm2)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3tt2aq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c, const int imm2) SIMDE_REQUIRE_CONSTANT_RANGE(imm2, 0, 3) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); uint32_t Wj, TT2; Wj = c_.values[imm2]; TT2 = a_.values[1] ^ (a_.values[3] ^ a_.values[2]); TT2 = (TT2 + a_.values[0] + b_.values[3] + Wj); r_.values[0] = a_.values[1]; r_.values[1] = ROL32(a_.values[2], 19); r_.values[2] = a_.values[3]; r_.values[3] = TT2 ^ ROL32(TT2, 9) ^ ROL32(TT2, 17); return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) #define simde_vsm3tt2aq_u32(a, b, c, imm2) vsm3tt2aq_u32((a), (b), (c), (imm2)); #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3tt2aq_u32 #define vsm3tt2aq_u32(a, b, c, imm2) simde_vsm3tt2aq_u32((a), (b), (c), (imm2)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3tt2bq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c, const int imm2) SIMDE_REQUIRE_CONSTANT_RANGE(imm2, 0, 3) { simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); uint32_t Wj, TT2; Wj = c_.values[imm2]; TT2 = (a_.values[3] & a_.values[2]) | (~(a_.values[3]) & a_.values[1]); TT2 = (TT2 + a_.values[0] + b_.values[3] + Wj); r_.values[0] = a_.values[1]; r_.values[1] = ROL32(a_.values[2], 19); r_.values[2] = a_.values[3]; r_.values[3] = TT2 ^ ROL32(TT2, 9) ^ ROL32(TT2, 17); return simde_uint32x4_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) #define simde_vsm3tt2bq_u32(a, b, c, imm2) vsm3tt2bq_u32((a), (b), (c), (imm2)); #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3tt2bq_u32 #define vsm3tt2bq_u32(a, b, c, imm2) simde_vsm3tt2bq_u32((a), (b), (c), (imm2)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3partw1q_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) return vsm3partw1q_u32(a, b, c); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); r_.values[2] = (a_.values[2] ^ b_.values[2]) ^ (ROL32(c_.values[3], 15)); r_.values[1] = (a_.values[1] ^ b_.values[1]) ^ (ROL32(c_.values[2], 15)); r_.values[0] = (a_.values[0] ^ b_.values[0]) ^ (ROL32(c_.values[1], 15)); for(int i = 0; i < 4; ++i) { if (i == 3) { r_.values[3] = (a_.values[3] ^ b_.values[3]) ^ (ROL32(r_.values[0], 15)); } r_.values[i] = r_.values[i] ^ ROL32(r_.values[i], 15) ^ ROL32(r_.values[i], 23); } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3partw1q_u32 #define vsm3partw1q_u32(a, b, c) simde_vsm3partw1q_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm3partw2q_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM3) return vsm3partw2q_u32(a, b, c); #else simde_uint32x4_private r_, tmp_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b), c_ = simde_uint32x4_to_private(c); uint32_t tmp2; tmp_.values[3] = b_.values[3] ^ (ROL32(c_.values[3], 7)); tmp_.values[2] = b_.values[2] ^ (ROL32(c_.values[2], 7)); tmp_.values[1] = b_.values[1] ^ (ROL32(c_.values[1], 7)); tmp_.values[0] = b_.values[0] ^ (ROL32(c_.values[0], 7)); r_.values[3] = a_.values[3] ^ tmp_.values[3]; r_.values[2] = a_.values[2] ^ tmp_.values[2]; r_.values[1] = a_.values[1] ^ tmp_.values[1]; r_.values[0] = a_.values[0] ^ tmp_.values[0]; tmp2 = ROL32(tmp_.values[0], 15); tmp2 = tmp2 ^ ROL32(tmp2, 15) ^ ROL32(tmp2, 23); r_.values[3] = r_.values[3] ^ tmp2; return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm3partw2q_u32 #define vsm3partw2q_u32(a, b, c) simde_vsm3partw2q_u32((a), (b), (c)) #endif #undef ROR32 #undef ROL32 #undef LSR #undef LSL SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SM3_H) */ /* :: End simde/simde/arm/neon/sm3.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sm4.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SM4_H) #define SIMDE_ARM_NEON_SM4_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #define ROR32(operand, shift) (((operand) >> (shift)) | ((operand) << (32-shift))) #define ROL32(operand, shift) (((operand) >> (32-shift)) | ((operand) << (shift))) #define LSR(operand, shift) ((operand) >> (shift)) #define LSL(operand, shift) ((operand) << (shift)) static const uint8_t simde_sbox_sm4[256] = { 0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05, 0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99, 0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62, 0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6, 0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8, 0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35, 0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87, 0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e, 0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1, 0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3, 0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f, 0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51, 0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8, 0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0, 0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84, 0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48 }; static void simde_u32_to_u8x4(uint32_t src, uint8_t* dst) { for(int i = 0; i < 4; ++i) { *(dst + i) = HEDLEY_STATIC_CAST(uint8_t, ((src << (i * 8)) >> 24)); } } static void simde_u32_from_u8x4(uint8_t* src, uint32_t* dst) { *dst = 0; for(int i = 0; i < 4; ++i) { *dst = *dst | (HEDLEY_STATIC_CAST(uint32_t, src[i]) << (24 - i * 8)); } } SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm4eq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM4) return vsm4eq_u32(a, b); #else simde_uint32x4_private a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); uint32_t intval, roundkey; uint8_t _intval[4]; for(int index = 0; index < 4; ++index) { roundkey = b_.values[index]; intval = a_.values[3] ^ a_.values[2] ^ a_.values[1] ^ roundkey; simde_u32_to_u8x4(intval, _intval); for(int i = 0; i < 4; ++i) { _intval[i] = simde_sbox_sm4[_intval[i]]; } simde_u32_from_u8x4(_intval, &intval); intval = intval ^ ROL32(intval, 2) ^ ROL32(intval, 10) ^ ROL32(intval, 18) ^ ROL32(intval, 24); intval = intval ^ a_.values[0]; a_.values[0] = a_.values[1]; a_.values[1] = a_.values[2]; a_.values[2] = a_.values[3]; a_.values[3] = intval; } return simde_uint32x4_from_private(a_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm4eq_u32 #define vsm4eq_u32(a, b) simde_vsm4eq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsm4ekeyq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SM4) return vsm4ekeyq_u32(a, b); #else simde_uint32x4_private a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); uint32_t intval, constval; uint8_t _intval[4]; for(int index = 0; index < 4; ++index) { constval = b_.values[index]; intval = a_.values[3] ^ a_.values[2] ^ a_.values[1] ^ constval; simde_u32_to_u8x4(intval, _intval); for(int i = 0; i < 4; ++i) { _intval[i] = simde_sbox_sm4[_intval[i]]; } simde_u32_from_u8x4(_intval, &intval); intval = intval ^ ROL32(intval, 13) ^ ROL32(intval, 23); intval = intval ^ a_.values[0]; a_.values[0] = a_.values[1]; a_.values[1] = a_.values[2]; a_.values[2] = a_.values[3]; a_.values[3] = intval; } return simde_uint32x4_from_private(a_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsm4ekeyq_u32 #define vsm4ekeyq_u32(a, b) simde_vsm4ekeyq_u32((a), (b)) #endif #undef ROR32 #undef ROL32 #undef LSR #undef LSL SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SM4_H) */ /* :: End simde/simde/arm/neon/sm4.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sqadd.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Atharva Nimbalkar */ #if !defined(SIMDE_ARM_NEON_SQADD_H) #define SIMDE_ARM_NEON_SQADD_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #include // Workaround on ARM64 windows due to windows SDK bug // https://developercommunity.visualstudio.com/t/In-arm64_neonh-vsqaddb_u8-vsqaddh_u16/10271747?sort=newest #if (defined _MSC_VER) && (defined SIMDE_ARM_NEON_A64V8_NATIVE) && (_MSC_VER < 1938) #pragma message ("Due to msvc bug, current version of msvc is supported by workaround. Recommend to update msvc") #undef vsqaddb_u8 #define vsqaddb_u8(src1, src2) neon_usqadds8(__uint8ToN8_v(src1), __int8ToN8_v(src2)).n8_u8[0] #undef vsqaddh_u16 #define vsqaddh_u16(src1, src2) neon_usqadds16(__uint16ToN16_v(src1), __int16ToN16_v(src2)).n16_u16[0] #undef vsqadds_u32 #define vsqadds_u32(src1, src2) _CopyUInt32FromFloat(neon_usqadds32(_CopyFloatFromUInt32(src1), _CopyFloatFromInt32(src2))) #undef vsqaddd_u64 #define vsqaddd_u64(src1, src2) neon_usqadds64(__uint64ToN64_v(src1), __int64ToN64_v(src2)).n64_u64[0] #endif HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES uint8_t simde_vsqaddb_u8(uint8_t a, int8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_REV_365298) return vsqaddb_u8(a, HEDLEY_STATIC_CAST(uint8_t, b)); #else return vsqaddb_u8(a, b); #endif #else int16_t r_ = HEDLEY_STATIC_CAST(int16_t, a) + HEDLEY_STATIC_CAST(int16_t, b); return (r_ < 0) ? 0 : ((r_ > UINT8_MAX) ? UINT8_MAX : HEDLEY_STATIC_CAST(uint8_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddb_u8 #define vsqaddb_u8(a, b) simde_vsqaddb_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint16_t simde_vsqaddh_u16(uint16_t a, int16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_REV_365298) return vsqaddh_u16(a, HEDLEY_STATIC_CAST(uint16_t, b)); #else return vsqaddh_u16(a, b); #endif #else int32_t r_ = HEDLEY_STATIC_CAST(int32_t, a) + HEDLEY_STATIC_CAST(int32_t, b); return (r_ < 0) ? 0 : ((r_ > UINT16_MAX) ? UINT16_MAX : HEDLEY_STATIC_CAST(uint16_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddh_u16 #define vsqaddh_u16(a, b) simde_vsqaddh_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint32_t simde_vsqadds_u32(uint32_t a, int32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_REV_365298) return vsqadds_u32(a, HEDLEY_STATIC_CAST(uint32_t, b)); #else return vsqadds_u32(a, b); #endif #else int64_t r_ = HEDLEY_STATIC_CAST(int64_t, a) + HEDLEY_STATIC_CAST(int64_t, b); return (r_ < 0) ? 0 : ((r_ > UINT32_MAX) ? UINT32_MAX : HEDLEY_STATIC_CAST(uint32_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqadds_u32 #define vsqadds_u32(a, b) simde_vsqadds_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES uint64_t simde_vsqaddd_u64(uint64_t a, int64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_REV_365298) return vsqaddd_u64(a, HEDLEY_STATIC_CAST(uint64_t, b)); #else return vsqaddd_u64(a, b); #endif #else uint64_t r_; if (b > 0) { uint64_t ub = HEDLEY_STATIC_CAST(uint64_t, b); r_ = ((UINT64_MAX - a) < ub) ? UINT64_MAX : a + ub; } else { uint64_t nb = HEDLEY_STATIC_CAST(uint64_t, -b); r_ = (nb > a) ? 0 : a - nb; } return r_; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddd_u64 #define vsqaddd_u64(a, b) simde_vsqaddd_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vsqadd_u8(simde_uint8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqadd_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddb_u8(a_.values[i], b_.values[i]); } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqadd_u8 #define vsqadd_u8(a, b) simde_vsqadd_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vsqadd_u16(simde_uint16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqadd_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddh_u16(a_.values[i], b_.values[i]); } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqadd_u16 #define vsqadd_u16(a, b) simde_vsqadd_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vsqadd_u32(simde_uint32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqadd_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqadds_u32(a_.values[i], b_.values[i]); } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqadd_u32 #define vsqadd_u32(a, b) simde_vsqadd_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x1_t simde_vsqadd_u64(simde_uint64x1_t a, simde_int64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqadd_u64(a, b); #else simde_uint64x1_private r_, a_ = simde_uint64x1_to_private(a); simde_int64x1_private b_ = simde_int64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddd_u64(a_.values[i], b_.values[i]); } return simde_uint64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqadd_u64 #define vsqadd_u64(a, b) simde_vsqadd_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vsqaddq_u8(simde_uint8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqaddq_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddb_u8(a_.values[i], b_.values[i]); } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddq_u8 #define vsqaddq_u8(a, b) simde_vsqaddq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vsqaddq_u16(simde_uint16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqaddq_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddh_u16(a_.values[i], b_.values[i]); } return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddq_u16 #define vsqaddq_u16(a, b) simde_vsqaddq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsqaddq_u32(simde_uint32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqaddq_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqadds_u32(a_.values[i], b_.values[i]); } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddq_u32 #define vsqaddq_u32(a, b) simde_vsqaddq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsqaddq_u64(simde_uint64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqaddq_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a); simde_int64x2_private b_ = simde_int64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqaddd_u64(a_.values[i], b_.values[i]); } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqaddq_u64 #define vsqaddq_u64(a, b) simde_vsqaddq_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SQADD_H) */ /* :: End simde/simde/arm/neon/sqadd.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sqrt.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SQRT_H) #define SIMDE_ARM_NEON_SQRT_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16 simde_vsqrth_f16(simde_float16_t a) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vsqrth_f16(a); #elif defined(simde_math_sqrtf) simde_float32 af = simde_float16_to_float32(a); return simde_float16_from_float32(simde_math_sqrtf(af)); #else HEDLEY_UNREACHABLE(); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsqrth_f16 #define vsqrth_f16(a) simde_vsqrth_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vsqrt_f16(simde_float16x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vsqrt_f16(a); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqrth_f16(a_.values[i]); } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrt_f16 #define vsqrt_f16(a) simde_vsqrt_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vsqrt_f32(simde_float32x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqrt_f32(a); #elif defined(simde_math_sqrtf) simde_float32x2_private r_, a_ = simde_float32x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_sqrtf(a_.values[i]); } return simde_float32x2_from_private(r_); #else HEDLEY_UNREACHABLE(); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrt_f32 #define vsqrt_f32(a) simde_vsqrt_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x1_t simde_vsqrt_f64(simde_float64x1_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqrt_f64(a); #elif defined(simde_math_sqrt) simde_float64x1_private r_, a_ = simde_float64x1_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_sqrt(a_.values[i]); } return simde_float64x1_from_private(r_); #else HEDLEY_UNREACHABLE(); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrt_f64 #define vsqrt_f64(a) simde_vsqrt_f64((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vsqrtq_f16(simde_float16x8_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vsqrtq_f16(a); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vsqrth_f16(a_.values[i]); } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrtq_f16 #define vsqrtq_f16(a) simde_vsqrtq_f16((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vsqrtq_f32(simde_float32x4_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqrtq_f32(a); #elif defined(simde_math_sqrtf) simde_float32x4_private r_, a_ = simde_float32x4_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_sqrtf(a_.values[i]); } return simde_float32x4_from_private(r_); #else HEDLEY_UNREACHABLE(); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrtq_f32 #define vsqrtq_f32(a) simde_vsqrtq_f32((a)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vsqrtq_f64(simde_float64x2_t a) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsqrtq_f64(a); #elif defined(simde_math_sqrt) simde_float64x2_private r_, a_ = simde_float64x2_to_private(a); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_math_sqrt(a_.values[i]); } return simde_float64x2_from_private(r_); #else HEDLEY_UNREACHABLE(); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsqrtq_f64 #define vsqrtq_f64(a) simde_vsqrtq_f64((a)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SQRT_H) */ /* :: End simde/simde/arm/neon/sqrt.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sra_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore */ #if !defined(SIMDE_ARM_NEON_SRA_N_H) #define SIMDE_ARM_NEON_SRA_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsrad_n_s64(a, b, n) vsrad_n_s64((a), (b), (n)) #else #define simde_vsrad_n_s64(a, b, n) simde_vaddd_s64((a), simde_vshrd_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsrad_n_s64 #define vsrad_n_s64(a, b, n) simde_vsrad_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsrad_n_u64(a, b, n) vsrad_n_u64((a), (b), (n)) #else #define simde_vsrad_n_u64(a, b, n) simde_vaddd_u64((a), simde_vshrd_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsrad_n_u64 #define vsrad_n_u64(a, b, n) simde_vsrad_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_s8(a, b, n) vsra_n_s8((a), (b), (n)) #else #define simde_vsra_n_s8(a, b, n) simde_vadd_s8((a), simde_vshr_n_s8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_s8 #define vsra_n_s8(a, b, n) simde_vsra_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_s16(a, b, n) vsra_n_s16((a), (b), (n)) #else #define simde_vsra_n_s16(a, b, n) simde_vadd_s16((a), simde_vshr_n_s16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_s16 #define vsra_n_s16(a, b, n) simde_vsra_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_s32(a, b, n) vsra_n_s32((a), (b), (n)) #else #define simde_vsra_n_s32(a, b, n) simde_vadd_s32((a), simde_vshr_n_s32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_s32 #define vsra_n_s32(a, b, n) simde_vsra_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_s64(a, b, n) vsra_n_s64((a), (b), (n)) #else #define simde_vsra_n_s64(a, b, n) simde_vadd_s64((a), simde_vshr_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_s64 #define vsra_n_s64(a, b, n) simde_vsra_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_u8(a, b, n) vsra_n_u8((a), (b), (n)) #else #define simde_vsra_n_u8(a, b, n) simde_vadd_u8((a), simde_vshr_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_u8 #define vsra_n_u8(a, b, n) simde_vsra_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_u16(a, b, n) vsra_n_u16((a), (b), (n)) #else #define simde_vsra_n_u16(a, b, n) simde_vadd_u16((a), simde_vshr_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_u16 #define vsra_n_u16(a, b, n) simde_vsra_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_u32(a, b, n) vsra_n_u32((a), (b), (n)) #else #define simde_vsra_n_u32(a, b, n) simde_vadd_u32((a), simde_vshr_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_u32 #define vsra_n_u32(a, b, n) simde_vsra_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsra_n_u64(a, b, n) vsra_n_u64((a), (b), (n)) #else #define simde_vsra_n_u64(a, b, n) simde_vadd_u64((a), simde_vshr_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsra_n_u64 #define vsra_n_u64(a, b, n) simde_vsra_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_s8(a, b, n) vsraq_n_s8((a), (b), (n)) #else #define simde_vsraq_n_s8(a, b, n) simde_vaddq_s8((a), simde_vshrq_n_s8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_s8 #define vsraq_n_s8(a, b, n) simde_vsraq_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_s16(a, b, n) vsraq_n_s16((a), (b), (n)) #else #define simde_vsraq_n_s16(a, b, n) simde_vaddq_s16((a), simde_vshrq_n_s16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_s16 #define vsraq_n_s16(a, b, n) simde_vsraq_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_s32(a, b, n) vsraq_n_s32((a), (b), (n)) #else #define simde_vsraq_n_s32(a, b, n) simde_vaddq_s32((a), simde_vshrq_n_s32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_s32 #define vsraq_n_s32(a, b, n) simde_vsraq_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_s64(a, b, n) vsraq_n_s64((a), (b), (n)) #else #define simde_vsraq_n_s64(a, b, n) simde_vaddq_s64((a), simde_vshrq_n_s64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_s64 #define vsraq_n_s64(a, b, n) simde_vsraq_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_u8(a, b, n) vsraq_n_u8((a), (b), (n)) #else #define simde_vsraq_n_u8(a, b, n) simde_vaddq_u8((a), simde_vshrq_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_u8 #define vsraq_n_u8(a, b, n) simde_vsraq_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_u16(a, b, n) vsraq_n_u16((a), (b), (n)) #else #define simde_vsraq_n_u16(a, b, n) simde_vaddq_u16((a), simde_vshrq_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_u16 #define vsraq_n_u16(a, b, n) simde_vsraq_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_u32(a, b, n) vsraq_n_u32((a), (b), (n)) #else #define simde_vsraq_n_u32(a, b, n) simde_vaddq_u32((a), simde_vshrq_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_u32 #define vsraq_n_u32(a, b, n) simde_vsraq_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsraq_n_u64(a, b, n) vsraq_n_u64((a), (b), (n)) #else #define simde_vsraq_n_u64(a, b, n) simde_vaddq_u64((a), simde_vshrq_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsraq_n_u64 #define vsraq_n_u64(a, b, n) simde_vsraq_n_u64((a), (b), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SRA_N_H) */ /* :: End simde/simde/arm/neon/sra_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sri_n.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2021 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SRI_N_H) #define SIMDE_ARM_NEON_SRI_N_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsrid_n_s64(a, b, n) vsrid_n_s64(a, b, n) #else #define simde_vsrid_n_s64(a, b, n) \ HEDLEY_STATIC_CAST(int64_t, \ simde_vsrid_n_u64(HEDLEY_STATIC_CAST(uint64_t, a), HEDLEY_STATIC_CAST(uint64_t, b), n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsrid_n_s64 #define vsrid_n_s64(a, b, n) simde_vsrid_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsrid_n_u64(a, b, n) vsrid_n_u64(a, b, n) #else #define simde_vsrid_n_u64(a, b, n) \ (((a & (UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n))) | simde_vshrd_n_u64((b), (n)))) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsrid_n_u64 #define vsrid_n_u64(a, b, n) simde_vsrid_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_s8(a, b, n) vsri_n_s8((a), (b), (n)) #else #define simde_vsri_n_s8(a, b, n) \ simde_vreinterpret_s8_u8(simde_vsri_n_u8( \ simde_vreinterpret_u8_s8((a)), simde_vreinterpret_u8_s8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_s8 #define vsri_n_s8(a, b, n) simde_vsri_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_u8(a, b, n) vsri_n_u8((a), (b), (n)) #else #define simde_vsri_n_u8(a, b, n) \ simde_vorr_u8( \ simde_vand_u8((a), simde_vdup_n_u8((UINT8_C(0xff) >> (8 - n) << (8 - n)))), \ simde_vshr_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_u8 #define vsri_n_u8(a, b, n) simde_vsri_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_s16(a, b, n) vsri_n_s16((a), (b), (n)) #else #define simde_vsri_n_s16(a, b, n) \ simde_vreinterpret_s16_u16(simde_vsri_n_u16( \ simde_vreinterpret_u16_s16((a)), simde_vreinterpret_u16_s16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_s16 #define vsri_n_s16(a, b, n) simde_vsri_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_u16(a, b, n) vsri_n_u16((a), (b), (n)) #else #define simde_vsri_n_u16(a, b, n) \ simde_vorr_u16( \ simde_vand_u16((a), simde_vdup_n_u16((UINT16_C(0xffff) >> (16 - n) << (16 - n)))), \ simde_vshr_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_u16 #define vsri_n_u16(a, b, n) simde_vsri_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_s32(a, b, n) vsri_n_s32((a), (b), (n)) #else #define simde_vsri_n_s32(a, b, n) \ simde_vreinterpret_s32_u32(simde_vsri_n_u32( \ simde_vreinterpret_u32_s32((a)), simde_vreinterpret_u32_s32((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_s32 #define vsri_n_s32(a, b, n) simde_vsri_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_u32(a, b, n) vsri_n_u32((a), (b), (n)) #else #define simde_vsri_n_u32(a, b, n) \ simde_vorr_u32( \ simde_vand_u32((a), \ simde_vdup_n_u32((UINT32_C(0xffffffff) >> (32 - n) << (32 - n)))), \ simde_vshr_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_u32 #define vsri_n_u32(a, b, n) simde_vsri_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_s64(a, b, n) vsri_n_s64((a), (b), (n)) #else #define simde_vsri_n_s64(a, b, n) \ simde_vreinterpret_s64_u64(simde_vsri_n_u64( \ simde_vreinterpret_u64_s64((a)), simde_vreinterpret_u64_s64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_s64 #define vsri_n_s64(a, b, n) simde_vsri_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_u64(a, b, n) vsri_n_u64((a), (b), (n)) #else #define simde_vsri_n_u64(a, b, n) \ simde_vorr_u64( \ simde_vand_u64((a), simde_vdup_n_u64( \ (UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n)))), \ simde_vshr_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_u64 #define vsri_n_u64(a, b, n) simde_vsri_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_s8(a, b, n) vsriq_n_s8((a), (b), (n)) #else #define simde_vsriq_n_s8(a, b, n) \ simde_vreinterpretq_s8_u8(simde_vsriq_n_u8( \ simde_vreinterpretq_u8_s8((a)), simde_vreinterpretq_u8_s8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_s8 #define vsriq_n_s8(a, b, n) simde_vsriq_n_s8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_u8(a, b, n) vsriq_n_u8((a), (b), (n)) #else #define simde_vsriq_n_u8(a, b, n) \ simde_vorrq_u8( \ simde_vandq_u8((a), simde_vdupq_n_u8((UINT8_C(0xff) >> (8 - n) << (8 - n)))), \ simde_vshrq_n_u8((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_u8 #define vsriq_n_u8(a, b, n) simde_vsriq_n_u8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_s16(a, b, n) vsriq_n_s16((a), (b), (n)) #else #define simde_vsriq_n_s16(a, b, n) \ simde_vreinterpretq_s16_u16(simde_vsriq_n_u16( \ simde_vreinterpretq_u16_s16((a)), simde_vreinterpretq_u16_s16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_s16 #define vsriq_n_s16(a, b, n) simde_vsriq_n_s16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_u16(a, b, n) vsriq_n_u16((a), (b), (n)) #else #define simde_vsriq_n_u16(a, b, n) \ simde_vorrq_u16( \ simde_vandq_u16((a), simde_vdupq_n_u16((UINT16_C(0xffff) >> (16 - n) << (16 - n)))), \ simde_vshrq_n_u16((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_u16 #define vsriq_n_u16(a, b, n) simde_vsriq_n_u16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_s32(a, b, n) vsriq_n_s32((a), (b), (n)) #else #define simde_vsriq_n_s32(a, b, n) \ simde_vreinterpretq_s32_u32(simde_vsriq_n_u32( \ simde_vreinterpretq_u32_s32((a)), simde_vreinterpretq_u32_s32((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_s32 #define vsriq_n_s32(a, b, n) simde_vsriq_n_s32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_u32(a, b, n) vsriq_n_u32((a), (b), (n)) #else #define simde_vsriq_n_u32(a, b, n) \ simde_vorrq_u32( \ simde_vandq_u32((a), \ simde_vdupq_n_u32((UINT32_C(0xffffffff) >> (32 - n) << (32 - n)))), \ simde_vshrq_n_u32((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_u32 #define vsriq_n_u32(a, b, n) simde_vsriq_n_u32((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_s64(a, b, n) vsriq_n_s64((a), (b), (n)) #else #define simde_vsriq_n_s64(a, b, n) \ simde_vreinterpretq_s64_u64(simde_vsriq_n_u64( \ simde_vreinterpretq_u64_s64((a)), simde_vreinterpretq_u64_s64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_s64 #define vsriq_n_s64(a, b, n) simde_vsriq_n_s64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_u64(a, b, n) vsriq_n_u64((a), (b), (n)) #else #define simde_vsriq_n_u64(a, b, n) \ simde_vorrq_u64( \ simde_vandq_u64((a), simde_vdupq_n_u64( \ (UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n)))), \ simde_vshrq_n_u64((b), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_u64 #define vsriq_n_u64(a, b, n) simde_vsriq_n_u64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_p8(a, b, n) vsri_n_p8((a), (b), (n)) #else #define simde_vsri_n_p8(a, b, n) \ simde_vreinterpret_p8_u8(simde_vsri_n_u8( \ simde_vreinterpret_u8_p8((a)), simde_vreinterpret_u8_p8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_p8 #define vsri_n_p8(a, b, n) simde_vsri_n_p8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsri_n_p16(a, b, n) vsri_n_p16((a), (b), (n)) #else #define simde_vsri_n_p16(a, b, n) \ simde_vreinterpret_p16_u16(simde_vsri_n_u16( \ simde_vreinterpret_u16_p16((a)), simde_vreinterpret_u16_p16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsri_n_p16 #define vsri_n_p16(a, b, n) simde_vsri_n_p16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #define simde_vsri_n_p64(a, b, n) vsri_n_p64((a), (b), (n)) #else #define simde_vsri_n_p64(a, b, n) \ simde_vreinterpret_p64_u64(simde_vsri_n_u64( \ simde_vreinterpret_u64_p64((a)), simde_vreinterpret_u64_p64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsri_n_p64 #define vsri_n_p64(a, b, n) simde_vsri_n_p64((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_p8(a, b, n) vsriq_n_p8((a), (b), (n)) #else #define simde_vsriq_n_p8(a, b, n) \ simde_vreinterpretq_p8_u8(simde_vsriq_n_u8( \ simde_vreinterpretq_u8_p8((a)), simde_vreinterpretq_u8_p8((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_p8 #define vsriq_n_p8(a, b, n) simde_vsriq_n_p8((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #define simde_vsriq_n_p16(a, b, n) vsriq_n_p16((a), (b), (n)) #else #define simde_vsriq_n_p16(a, b, n) \ simde_vreinterpretq_p16_u16(simde_vsriq_n_u16( \ simde_vreinterpretq_u16_p16((a)), simde_vreinterpretq_u16_p16((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsriq_n_p16 #define vsriq_n_p16(a, b, n) simde_vsriq_n_p16((a), (b), (n)) #endif #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #define simde_vsriq_n_p64(a, b, n) vsriq_n_p64((a), (b), (n)) #else #define simde_vsriq_n_p64(a, b, n) \ simde_vreinterpretq_p64_u64(simde_vsriq_n_u64( \ simde_vreinterpretq_u64_p64((a)), simde_vreinterpretq_u64_p64((b)), (n))) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsriq_n_p64 #define vsriq_n_p64(a, b, n) simde_vsriq_n_p64((a), (b), (n)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SRI_N_H) */ /* :: End simde/simde/arm/neon/sri_n.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1_H) #define SIMDE_ARM_NEON_ST1_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1_f16(ptr, val); #else simde_float16x4_private val_ = simde_float16x4_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH) __riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f16 #define vst1_f16(a, b) simde_vst1_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float32x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f32(ptr, val); #else simde_float32x2_private val_ = simde_float32x2_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_f32m1(ptr , val_.sv64 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32 #define vst1_f32(a, b) simde_vst1_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(1)], simde_float64x1_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64(ptr, val); #else simde_float64x1_private val_ = simde_float64x1_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_f64m1(ptr , val_.sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64 #define vst1_f64(a, b) simde_vst1_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int8x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_s8(ptr, val); #else simde_int8x8_private val_ = simde_int8x8_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_i8m1(ptr , val_.sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8 #define vst1_s8(a, b) simde_vst1_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_s16(ptr, val); #else simde_int16x4_private val_ = simde_int16x4_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_i16m1(ptr , val_.sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16 #define vst1_s16(a, b) simde_vst1_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int32x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_s32(ptr, val); #else simde_int32x2_private val_ = simde_int32x2_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_i32m1(ptr , val_.sv64 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32 #define vst1_s32(a, b) simde_vst1_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(1)], simde_int64x1_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_s64(ptr, val); #else simde_int64x1_private val_ = simde_int64x1_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_i64m1(ptr , val_.sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64 #define vst1_s64(a, b) simde_vst1_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint8x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_u8(ptr, val); #else simde_uint8x8_private val_ = simde_uint8x8_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_.sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8 #define vst1_u8(a, b) simde_vst1_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_u16(ptr, val); #else simde_uint16x4_private val_ = simde_uint16x4_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_.sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16 #define vst1_u16(a, b) simde_vst1_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint32x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_u32(ptr, val); #else simde_uint32x2_private val_ = simde_uint32x2_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_u32m1(ptr , val_.sv64 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32 #define vst1_u32(a, b) simde_vst1_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(1)], simde_uint64x1_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_u64(ptr, val); #else simde_uint64x1_private val_ = simde_uint64x1_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_.sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64 #define vst1_u64(a, b) simde_vst1_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_float16x8_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1q_f16(ptr, val); #else simde_float16x8_private val_ = simde_float16x8_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH) __riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f16 #define vst1q_f16(a, b) simde_vst1q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_f32(ptr, val); #else simde_float32x4_private val_ = simde_float32x4_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_f32m1(ptr , val_.sv128 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32 #define vst1q_f32(a, b) simde_vst1q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64(ptr, val); #else simde_float64x2_private val_ = simde_float64x2_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_f64m1(ptr , val_.sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64 #define vst1q_f64(a, b) simde_vst1q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int8x16_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s8(ptr, val); #else simde_int8x16_private val_ = simde_int8x16_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_i8m1(ptr , val_.sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8 #define vst1q_s8(a, b) simde_vst1q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int16x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s16(ptr, val); #else simde_int16x8_private val_ = simde_int16x8_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_i16m1(ptr , val_.sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16 #define vst1q_s16(a, b) simde_vst1q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s32(ptr, val); #else simde_int32x4_private val_ = simde_int32x4_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_i32m1(ptr , val_.sv128 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32 #define vst1q_s32(a, b) simde_vst1q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_s64(ptr, val); #else simde_int64x2_private val_ = simde_int64x2_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_i64m1(ptr , val_.sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64 #define vst1q_s64(a, b) simde_vst1q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint8x16_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_u8(ptr, val); #else simde_uint8x16_private val_ = simde_uint8x16_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_.sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8 #define vst1q_u8(a, b) simde_vst1q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint16x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_u16(ptr, val); #else simde_uint16x8_private val_ = simde_uint16x8_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_.sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16 #define vst1q_u16(a, b) simde_vst1q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_u32(ptr, val); #else simde_uint32x4_private val_ = simde_uint32x4_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse32_v_u32m1(ptr , val_.sv128 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32 #define vst1q_u32(a, b) simde_vst1q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_u64(ptr, val); #else simde_uint64x2_private val_ = simde_uint64x2_to_private(val); #if defined(SIMDE_WASM_SIMD128_NATIVE) wasm_v128_store(ptr, val_.v128); #elif defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_.sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64 #define vst1q_u64(a, b) simde_vst1q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_poly8x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_p8(ptr, val); #else simde_poly8x8_private val_ = simde_poly8x8_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_.sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p8 #define vst1_p8(a, b) simde_vst1_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1_p16(ptr, val); #else simde_poly16x4_private val_ = simde_poly16x4_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_.sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p16 #define vst1_p16(a, b) simde_vst1_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(1)], simde_poly64x1_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst1_p64(ptr, val); #else simde_poly64x1_private val_ = simde_poly64x1_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_.sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_p64 #define vst1_p64(a, b) simde_vst1_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly8x16_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_p8(ptr, val); #else simde_poly8x16_private val_ = simde_poly8x16_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_.sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p8 #define vst1q_p8(a, b) simde_vst1q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_poly16x8_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst1q_p16(ptr, val); #else simde_poly16x8_private val_ = simde_poly16x8_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_.sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p16 #define vst1q_p16(a, b) simde_vst1q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly64x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst1q_p64(ptr, val); #else simde_poly64x2_private val_ = simde_poly64x2_to_private(val); #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_.sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_p64 #define vst1q_p64(a, b) simde_vst1q_p64((a), (b)) #endif #if !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE) SIMDE_FUNCTION_ATTRIBUTES void simde_vstrq_p128(simde_poly128_t ptr[HEDLEY_ARRAY_PARAM(1)], simde_poly128_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO) vstrq_p128(ptr, val); #else simde_memcpy(ptr, &val, sizeof(val)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vstrq_p128 #define vstrq_p128(a, b) simde_vstrq_p128((a), (b)) #endif #endif /* !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE) */ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_bfloat16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1_bf16(ptr, val); #else simde_bfloat16x4_private val_ = simde_bfloat16x4_to_private(val); simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_bf16 #define vst1_bf16(a, b) simde_vst1_bf16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_bfloat16x8_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1q_bf16(ptr, val); #else simde_bfloat16x8_private val_ = simde_bfloat16x8_to_private(val); simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_bf16 #define vst1q_bf16(a, b) simde_vst1q_bf16((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1_H) */ /* :: End simde/simde/arm/neon/st1.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1_LANE_H) #define SIMDE_ARM_NEON_ST1_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_f16(simde_float16_t *ptr, simde_float16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_4_NO_RESULT_(vst1_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x4_private val_ = simde_float16x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_f16 #define vst1_lane_f16(a, b, c) simde_vst1_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_f32(simde_float32_t *ptr, simde_float32x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x2_private val_ = simde_float32x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_f32 #define vst1_lane_f32(a, b, c) simde_vst1_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_f64(simde_float64_t *ptr, simde_float64x1_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst1_lane_f64(ptr, val, 0); #else simde_float64x1_private val_ = simde_float64x1_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_lane_f64 #define vst1_lane_f64(a, b, c) simde_vst1_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_s8(int8_t *ptr, simde_int8x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x8_private val_ = simde_int8x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_s8 #define vst1_lane_s8(a, b, c) simde_vst1_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_s16(int16_t *ptr, simde_int16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x4_private val_ = simde_int16x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_s16 #define vst1_lane_s16(a, b, c) simde_vst1_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_s32(int32_t *ptr, simde_int32x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x2_private val_ = simde_int32x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_s32 #define vst1_lane_s32(a, b, c) simde_vst1_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_s64(int64_t *ptr, simde_int64x1_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) (void) lane; vst1_lane_s64(ptr, val, 0); #else simde_int64x1_private val_ = simde_int64x1_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_s64 #define vst1_lane_s64(a, b, c) simde_vst1_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_u8(uint8_t *ptr, simde_uint8x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x8_private val_ = simde_uint8x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_u8 #define vst1_lane_u8(a, b, c) simde_vst1_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_u16(uint16_t *ptr, simde_uint16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x4_private val_ = simde_uint16x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_u16 #define vst1_lane_u16(a, b, c) simde_vst1_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_u32(uint32_t *ptr, simde_uint32x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x2_private val_ = simde_uint32x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_u32 #define vst1_lane_u32(a, b, c) simde_vst1_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_u64(uint64_t *ptr, simde_uint64x1_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) (void) lane; vst1_lane_u64(ptr, val, 0); #else simde_uint64x1_private val_ = simde_uint64x1_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_u64 #define vst1_lane_u64(a, b, c) simde_vst1_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_f16(simde_float16_t *ptr, simde_float16x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_8_NO_RESULT_(vst1q_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x8_private val_ = simde_float16x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_f16 #define vst1q_lane_f16(a, b, c) simde_vst1q_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_f32(simde_float32_t *ptr, simde_float32x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1q_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x4_private val_ = simde_float32x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_f32 #define vst1q_lane_f32(a, b, c) simde_vst1q_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_f64(simde_float64_t *ptr, simde_float64x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1q_lane_f64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float64x2_private val_ = simde_float64x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_f64 #define vst1q_lane_f64(a, b, c) simde_vst1q_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_s8(int8_t *ptr, simde_int8x16_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst1q_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x16_private val_ = simde_int8x16_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_s8 #define vst1q_lane_s8(a, b, c) simde_vst1q_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_s16(int16_t *ptr, simde_int16x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1q_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x8_private val_ = simde_int16x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_s16 #define vst1q_lane_s16(a, b, c) simde_vst1q_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_s32(int32_t *ptr, simde_int32x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1q_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x4_private val_ = simde_int32x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_s32 #define vst1q_lane_s32(a, b, c) simde_vst1q_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_s64(int64_t *ptr, simde_int64x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1q_lane_s64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int64x2_private val_ = simde_int64x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_s64 #define vst1q_lane_s64(a, b, c) simde_vst1q_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_u8(uint8_t *ptr, simde_uint8x16_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst1q_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x16_private val_ = simde_uint8x16_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_u8 #define vst1q_lane_u8(a, b, c) simde_vst1q_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_u16(uint16_t *ptr, simde_uint16x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1q_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x8_private val_ = simde_uint16x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_u16 #define vst1q_lane_u16(a, b, c) simde_vst1q_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_u32(uint32_t *ptr, simde_uint32x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1q_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x4_private val_ = simde_uint32x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_u32 #define vst1q_lane_u32(a, b, c) simde_vst1q_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_u64(uint64_t *ptr, simde_uint64x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1q_lane_u64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint64x2_private val_ = simde_uint64x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_u64 #define vst1q_lane_u64(a, b, c) simde_vst1q_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_p8(simde_poly8_t *ptr, simde_poly8x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x8_private val_ = simde_poly8x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_p8 #define vst1_lane_p8(a, b, c) simde_vst1_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_p16(simde_poly16_t *ptr, simde_poly16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst1_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x4_private val_ = simde_poly16x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_lane_p16 #define vst1_lane_p16(a, b, c) simde_vst1_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_p64(simde_poly64_t *ptr, simde_poly64x1_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) (void) lane; vst1_lane_p64(ptr, val, 0); #else simde_poly64x1_private val_ = simde_poly64x1_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_lane_p64 #define vst1_lane_p64(a, b, c) simde_vst1_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_p8(simde_poly8_t *ptr, simde_poly8x16_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst1q_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x16_private val_ = simde_poly8x16_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_p8 #define vst1q_lane_p8(a, b, c) simde_vst1q_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_p16(simde_poly16_t *ptr, simde_poly16x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst1q_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x8_private val_ = simde_poly16x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_p16 #define vst1q_lane_p16(a, b, c) simde_vst1q_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_p64(simde_poly64_t *ptr, simde_poly64x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst1q_lane_p64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly64x2_private val_ = simde_poly64x2_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_p64 #define vst1q_lane_p64(a, b, c) simde_vst1q_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_lane_bf16(simde_bfloat16_t *ptr, simde_bfloat16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_4_NO_RESULT_(vst1_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x4_private val_ = simde_bfloat16x4_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_lane_bf16 #define vst1_lane_bf16(a, b, c) simde_vst1_lane_bf16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_lane_bf16(simde_bfloat16_t *ptr, simde_bfloat16x8_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_8_NO_RESULT_(vst1q_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x8_private val_ = simde_bfloat16x8_to_private(val); *ptr = val_.values[lane]; #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_lane_bf16 #define vst1q_lane_bf16(a, b, c) simde_vst1q_lane_bf16((a), (b), (c)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1_LANE_H) */ /* :: End simde/simde/arm/neon/st1_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1_x2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1_X2_H) #define SIMDE_ARM_NEON_ST1_X2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f16_x2(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_float16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f16_x2(ptr, val); #else simde_float16x4_private a_[2] = {simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a_[1].sv64 , 4); #else simde_float16_t buf[8]; for (size_t i = 0; i < 8; i++) { buf[i] = a_[i / 4].values[i % 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f16_x2 #define vst1_f16_x2(ptr, val) simde_vst1_f16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x2(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); simde_vst1_f32(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x2 #define vst1_f32_x2(ptr, val) simde_vst1_f32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x2(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); simde_vst1_f64(ptr+1, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x2 #define vst1_f64_x2(ptr, val) simde_vst1_f64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x2(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); simde_vst1_s8(ptr+8, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x2 #define vst1_s8_x2(ptr, val) simde_vst1_s8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x2(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); simde_vst1_s16(ptr+4, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x2 #define vst1_s16_x2(ptr, val) simde_vst1_s16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x2(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); simde_vst1_s32(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x2 #define vst1_s32_x2(ptr, val) simde_vst1_s32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x2(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); simde_vst1_s64(ptr+1, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x2 #define vst1_s64_x2(ptr, val) simde_vst1_s64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x2(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); simde_vst1_u8(ptr+8, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x2 #define vst1_u8_x2(ptr, val) simde_vst1_u8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x2(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); simde_vst1_u16(ptr+4, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x2 #define vst1_u16_x2(ptr, val) simde_vst1_u16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x2(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); simde_vst1_u32(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x2 #define vst1_u32_x2(ptr, val) simde_vst1_u32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x2(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); simde_vst1_u64(ptr+1, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x2 #define vst1_u64_x2(ptr, val) simde_vst1_u64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p8_x2(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p8_x2(ptr, val); #else simde_poly8x8_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly8x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8); __riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p8_x2 #define vst1_p8_x2(a, b) simde_vst1_p8_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p16_x2(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_poly16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p16_x2(ptr, val); #else simde_poly16x4_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly16x4_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4); __riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p16_x2 #define vst1_p16_x2(a, b) simde_vst1_p16_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p64_x2(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p64_x2(ptr, val); #else simde_poly64x1_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly64x1_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1); __riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_p64_x2 #define vst1_p64_x2(a, b) simde_vst1_p64_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_bf16_x2(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_bfloat16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1_bf16_x2(ptr, val); #else simde_bfloat16x4_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_bfloat16x4_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_bf16_x2 #define vst1_bf16_x2(a, b) simde_vst1_bf16_x2((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1_X2_H) */ /* :: End simde/simde/arm/neon/st1_x2.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1_x3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1_X3_H) #define SIMDE_ARM_NEON_ST1_X3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f16_x3(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_float16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1_f16_x3(ptr, val); #else simde_float16x4_private a[3] = { simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1]), simde_float16x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a[0].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a[1].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a[2].sv64 , 4); #else simde_float16_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a[i / 4].values[i % 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f16_x3 #define vst1_f16_x3(a, b) simde_vst1_f16_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x3(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); simde_vst1_f32(ptr+2, val.val[1]); simde_vst1_f32(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x3 #define vst1_f32_x3(ptr, val) simde_vst1_f32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x3(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); simde_vst1_f64(ptr+1, val.val[1]); simde_vst1_f64(ptr+2, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x3 #define vst1_f64_x3(ptr, val) simde_vst1_f64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x3(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); simde_vst1_s8(ptr+8, val.val[1]); simde_vst1_s8(ptr+16, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x3 #define vst1_s8_x3(ptr, val) simde_vst1_s8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x3(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); simde_vst1_s16(ptr+4, val.val[1]); simde_vst1_s16(ptr+8, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x3 #define vst1_s16_x3(ptr, val) simde_vst1_s16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x3(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); simde_vst1_s32(ptr+2, val.val[1]); simde_vst1_s32(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x3 #define vst1_s32_x3(ptr, val) simde_vst1_s32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x3(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); simde_vst1_s64(ptr+1, val.val[1]); simde_vst1_s64(ptr+2, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x3 #define vst1_s64_x3(ptr, val) simde_vst1_s64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x3(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); simde_vst1_u8(ptr+8, val.val[1]); simde_vst1_u8(ptr+16, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x3 #define vst1_u8_x3(ptr, val) simde_vst1_u8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x3(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); simde_vst1_u16(ptr+4, val.val[1]); simde_vst1_u16(ptr+8, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x3 #define vst1_u16_x3(ptr, val) simde_vst1_u16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x3(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); simde_vst1_u32(ptr+2, val.val[1]); simde_vst1_u32(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x3 #define vst1_u32_x3(ptr, val) simde_vst1_u32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x3(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); simde_vst1_u64(ptr+1, val.val[1]); simde_vst1_u64(ptr+2, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x3 #define vst1_u64_x3(ptr, val) simde_vst1_u64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p8_x3(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_poly8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p8_x3(ptr, val); #else simde_poly8x8_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly8x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8); __riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8); __riscv_vse8_v_u8m1(ptr+16 , val_[2].sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p8_x3 #define vst1_p8_x3(a, b) simde_vst1_p8_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p16_x3(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_poly16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p16_x3(ptr, val); #else simde_poly16x4_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly16x4_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4); __riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4); __riscv_vse16_v_u16m1(ptr+8 , val_[2].sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p16_x3 #define vst1_p16_x3(a, b) simde_vst1_p16_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p64_x3(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p64_x3(ptr, val); #else simde_poly64x1_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly64x1_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1); __riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1); __riscv_vse64_v_u64m1(ptr+2 , val_[2].sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_p64_x3 #define vst1_p64_x3(a, b) simde_vst1_p64_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_bf16_x3(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_bfloat16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1_bf16_x3(ptr, val); #else simde_bfloat16x4_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_bfloat16x4_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_bf16_x3 #define vst1_bf16_x3(a, b) simde_vst1_bf16_x3((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1_X3_H) */ /* :: End simde/simde/arm/neon/st1_x3.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1_x4.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1_X4_H) #define SIMDE_ARM_NEON_ST1_X4_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f16_x4(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_float16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1_f16_x4(ptr, val); #else simde_float16x4_private a_[4] = { simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1]), simde_float16x4_to_private(val.val[2]), simde_float16x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a_[1].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a_[2].sv64 , 4); __riscv_vse16_v_f16m1((_Float16 *)ptr+12 , a_[3].sv64 , 4); #else simde_float16_t buf[16]; for (size_t i = 0; i < 16 ; i++) { buf[i] = a_[i / 4].values[i % 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f16_x4 #define vst1_f16_x4(a, b) simde_vst1_f16_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x4(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); simde_vst1_f32(ptr+2, val.val[1]); simde_vst1_f32(ptr+4, val.val[2]); simde_vst1_f32(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x4 #define vst1_f32_x4(ptr, val) simde_vst1_f32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x4(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); simde_vst1_f64(ptr+1, val.val[1]); simde_vst1_f64(ptr+2, val.val[2]); simde_vst1_f64(ptr+3, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x4 #define vst1_f64_x4(ptr, val) simde_vst1_f64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x4(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); simde_vst1_s8(ptr+8, val.val[1]); simde_vst1_s8(ptr+16, val.val[2]); simde_vst1_s8(ptr+24, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x4 #define vst1_s8_x4(ptr, val) simde_vst1_s8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x4(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); simde_vst1_s16(ptr+4, val.val[1]); simde_vst1_s16(ptr+8, val.val[2]); simde_vst1_s16(ptr+12, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x4 #define vst1_s16_x4(ptr, val) simde_vst1_s16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x4(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); simde_vst1_s32(ptr+2, val.val[1]); simde_vst1_s32(ptr+4, val.val[2]); simde_vst1_s32(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x4 #define vst1_s32_x4(ptr, val) simde_vst1_s32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x4(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); simde_vst1_s64(ptr+1, val.val[1]); simde_vst1_s64(ptr+2, val.val[2]); simde_vst1_s64(ptr+3, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x4 #define vst1_s64_x4(ptr, val) simde_vst1_s64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x4(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); simde_vst1_u8(ptr+8, val.val[1]); simde_vst1_u8(ptr+16, val.val[2]); simde_vst1_u8(ptr+24, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x4 #define vst1_u8_x4(ptr, val) simde_vst1_u8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x4(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); simde_vst1_u16(ptr+4, val.val[1]); simde_vst1_u16(ptr+8, val.val[2]); simde_vst1_u16(ptr+12, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x4 #define vst1_u16_x4(ptr, val) simde_vst1_u16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x4(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); simde_vst1_u32(ptr+2, val.val[1]); simde_vst1_u32(ptr+4, val.val[2]); simde_vst1_u32(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x4 #define vst1_u32_x4(ptr, val) simde_vst1_u32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x4(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); simde_vst1_u64(ptr+1, val.val[1]); simde_vst1_u64(ptr+2, val.val[2]); simde_vst1_u64(ptr+3, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x4 #define vst1_u64_x4(ptr, val) simde_vst1_u64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p8_x4(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_poly8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p8_x4(ptr, val); #else simde_poly8x8_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly8x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8); __riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8); __riscv_vse8_v_u8m1(ptr+16 , val_[2].sv64 , 8); __riscv_vse8_v_u8m1(ptr+24 , val_[3].sv64 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p8_x4 #define vst1_p8_x4(a, b) simde_vst1_p8_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p16_x4(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p16_x4(ptr, val); #else simde_poly16x4_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly16x4_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4); __riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4); __riscv_vse16_v_u16m1(ptr+8 , val_[2].sv64 , 4); __riscv_vse16_v_u16m1(ptr+12 , val_[3].sv64 , 4); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_p16_x4 #define vst1_p16_x4(a, b) simde_vst1_p16_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_p64_x4(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1_p64_x4(ptr, val); #else simde_poly64x1_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly64x1_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1); __riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1); __riscv_vse64_v_u64m1(ptr+2 , val_[2].sv64 , 1); __riscv_vse64_v_u64m1(ptr+3 , val_[3].sv64 , 1); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_p64_x4 #define vst1_p64_x4(a, b) simde_vst1_p64_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_bf16_x4(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_bfloat16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1_bf16_x4(ptr, val); #else simde_bfloat16x4_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_bfloat16x4_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1_bf16_x4 #define vst1_bf16_x4(a, b) simde_vst1_bf16_x4((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1_X4_H) */ /* :: End simde/simde/arm/neon/st1_x4.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1q_x2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X2_H) #define SIMDE_ARM_NEON_ST1Q_X2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f16_x2(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_float16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1q_f16_x2(ptr, val); #else simde_float16x8_private a_[2] = {simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a_[1].sv128 , 8); #else simde_float16_t buf[16]; for (size_t i = 0; i < 16; i++) { buf[i] = a_[i / 8].values[i % 8]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f16_x2 #define vst1q_f16_x2(a, b) simde_vst1q_f16_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x2(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); simde_vst1q_f32(ptr+4, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x2 #define vst1q_f32_x2(ptr, val) simde_vst1q_f32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x2(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); simde_vst1q_f64(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x2 #define vst1q_f64_x2(ptr, val) simde_vst1q_f64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x2(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); simde_vst1q_s8(ptr+16, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x2 #define vst1q_s8_x2(ptr, val) simde_vst1q_s8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x2(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); simde_vst1q_s16(ptr+8, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x2 #define vst1q_s16_x2(ptr, val) simde_vst1q_s16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x2(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); simde_vst1q_s32(ptr+4, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x2 #define vst1q_s32_x2(ptr, val) simde_vst1q_s32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x2(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); simde_vst1q_s64(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x2 #define vst1q_s64_x2(ptr, val) simde_vst1q_s64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x2(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); simde_vst1q_u8(ptr+16, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x2 #define vst1q_u8_x2(ptr, val) simde_vst1q_u8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x2(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); simde_vst1q_u16(ptr+8, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x2 #define vst1q_u16_x2(ptr, val) simde_vst1q_u16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x2(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); simde_vst1q_u32(ptr+4, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x2 #define vst1q_u32_x2(ptr, val) simde_vst1q_u32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x2(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); simde_vst1q_u64(ptr+2, val.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x2 #define vst1q_u64_x2(ptr, val) simde_vst1q_u64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p8_x2(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_poly8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p8_x2(ptr, val); #else simde_poly8x16_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly8x16_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv128 , 16); __riscv_vse8_v_u8m1(ptr+16 , val_[1].sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p8_x2 #define vst1q_p8_x2(a, b) simde_vst1q_p8_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p16_x2(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p16_x2(ptr, val); #else simde_poly16x8_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly16x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv128 , 8); __riscv_vse16_v_u16m1(ptr+8 , val_[1].sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p16_x2 #define vst1q_p16_x2(a, b) simde_vst1q_p16_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p64_x2(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p64_x2(ptr, val); #else simde_poly64x2_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_poly64x2_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv128 , 2); __riscv_vse64_v_u64m1(ptr+2 , val_[1].sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_p64_x2 #define vst1q_p64_x2(a, b) simde_vst1q_p64_x2((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_bf16_x2(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_bfloat16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1q_bf16_x2(ptr, val); #else simde_bfloat16x8_private val_[2]; for (size_t i = 0; i < 2; i++) { val_[i] = simde_bfloat16x8_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_bf16_x2 #define vst1q_bf16_x2(a, b) simde_vst1q_bf16_x2((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1Q_X2_H) */ /* :: End simde/simde/arm/neon/st1q_x2.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1q_x3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X3_H) #define SIMDE_ARM_NEON_ST1Q_X3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f16_x3(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_float16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1q_f16_x3(ptr, val); #else simde_float16x8_private a[3] = { simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1]), simde_float16x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a[0].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a[1].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+16 , a[2].sv128 , 8); #else simde_float16_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a[i / 8].values[i % 8]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f16_x3 #define vst1q_f16_x3(a, b) simde_vst1q_f16_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(12)], simde_float32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x3(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); simde_vst1q_f32(ptr+4, val.val[1]); simde_vst1q_f32(ptr+8, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x3 #define vst1q_f32_x3(ptr, val) simde_vst1q_f32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x3(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); simde_vst1q_f64(ptr+2, val.val[1]); simde_vst1q_f64(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x3 #define vst1q_f64_x3(ptr, val) simde_vst1q_f64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_int8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x3(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); simde_vst1q_s8(ptr+16, val.val[1]); simde_vst1q_s8(ptr+32, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x3 #define vst1q_s8_x3(ptr, val) simde_vst1q_s8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x3(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); simde_vst1q_s16(ptr+8, val.val[1]); simde_vst1q_s16(ptr+16, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x3 #define vst1q_s16_x3(ptr, val) simde_vst1q_s16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x3(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); simde_vst1q_s32(ptr+4, val.val[1]); simde_vst1q_s32(ptr+8, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x3 #define vst1q_s32_x3(ptr, val) simde_vst1q_s32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x3(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); simde_vst1q_s64(ptr+2, val.val[1]); simde_vst1q_s64(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x3 #define vst1q_s64_x3(ptr, val) simde_vst1q_s64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_uint8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x3(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); simde_vst1q_u8(ptr+16, val.val[1]); simde_vst1q_u8(ptr+32, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x3 #define vst1q_u8_x3(ptr, val) simde_vst1q_u8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x3(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); simde_vst1q_u16(ptr+8, val.val[1]); simde_vst1q_u16(ptr+16, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x3 #define vst1q_u16_x3(ptr, val) simde_vst1q_u16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x3(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); simde_vst1q_u32(ptr+4, val.val[1]); simde_vst1q_u32(ptr+8, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x3 #define vst1q_u32_x3(ptr, val) simde_vst1q_u32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x3(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); simde_vst1q_u64(ptr+2, val.val[1]); simde_vst1q_u64(ptr+4, val.val[2]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x3 #define vst1q_u64_x3(ptr, val) simde_vst1q_u64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p8_x3(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_poly8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p8_x3(ptr, val); #else simde_poly8x16_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly8x16_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv128 , 16); __riscv_vse8_v_u8m1(ptr+16 , val_[1].sv128 , 16); __riscv_vse8_v_u8m1(ptr+32 , val_[2].sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p8_x3 #define vst1q_p8_x3(a, b) simde_vst1q_p8_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p16_x3(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_poly16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p16_x3(ptr, val); #else simde_poly16x8_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly16x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv128 , 8); __riscv_vse16_v_u16m1(ptr+8 , val_[1].sv128 , 8); __riscv_vse16_v_u16m1(ptr+16 , val_[2].sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p16_x3 #define vst1q_p16_x3(a, b) simde_vst1q_p16_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p64_x3(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_poly64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p64_x3(ptr, val); #else simde_poly64x2_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_poly64x2_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv128 , 2); __riscv_vse64_v_u64m1(ptr+2 , val_[1].sv128 , 2); __riscv_vse64_v_u64m1(ptr+4 , val_[2].sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_p64_x3 #define vst1q_p64_x3(a, b) simde_vst1q_p64_x3((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_bf16_x3(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_bfloat16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1q_bf16_x3(ptr, val); #else simde_bfloat16x8_private val_[3]; for (size_t i = 0; i < 3; i++) { val_[i] = simde_bfloat16x8_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_bf16_x3 #define vst1q_bf16_x3(a, b) simde_vst1q_bf16_x3((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1Q_X3_H) */ /* :: End simde/simde/arm/neon/st1q_x3.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st1q_x4.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X4_H) #define SIMDE_ARM_NEON_ST1Q_X4_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f16_x4(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_float16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst1q_f16_x4(ptr, val); #else simde_float16x8_private a_[4] = { simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1]), simde_float16x8_to_private(val.val[2]), simde_float16x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH __riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a_[1].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+16 , a_[2].sv128 , 8); __riscv_vse16_v_f16m1((_Float16 *)ptr+24 , a_[3].sv128 , 8); #else simde_float16_t buf[32]; for (size_t i = 0; i < 32 ; i++) { buf[i] = a_[i / 8].values[i % 8]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f16_x4 #define vst1q_f16_x4(a, b) simde_vst1q_f16_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(16)], simde_float32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x4(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); simde_vst1q_f32(ptr+4, val.val[1]); simde_vst1q_f32(ptr+8, val.val[2]); simde_vst1q_f32(ptr+12, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x4 #define vst1q_f32_x4(ptr, val) simde_vst1q_f32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x4(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); simde_vst1q_f64(ptr+2, val.val[1]); simde_vst1q_f64(ptr+4, val.val[2]); simde_vst1q_f64(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x4 #define vst1q_f64_x4(ptr, val) simde_vst1q_f64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_int8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x4(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); simde_vst1q_s8(ptr+16, val.val[1]); simde_vst1q_s8(ptr+32, val.val[2]); simde_vst1q_s8(ptr+48, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x4 #define vst1q_s8_x4(ptr, val) simde_vst1q_s8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x4(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); simde_vst1q_s16(ptr+8, val.val[1]); simde_vst1q_s16(ptr+16, val.val[2]); simde_vst1q_s16(ptr+24, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x4 #define vst1q_s16_x4(ptr, val) simde_vst1q_s16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x4(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); simde_vst1q_s32(ptr+4, val.val[1]); simde_vst1q_s32(ptr+8, val.val[2]); simde_vst1q_s32(ptr+12, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x4 #define vst1q_s32_x4(ptr, val) simde_vst1q_s32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x4(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); simde_vst1q_s64(ptr+2, val.val[1]); simde_vst1q_s64(ptr+4, val.val[2]); simde_vst1q_s64(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x4 #define vst1q_s64_x4(ptr, val) simde_vst1q_s64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_uint8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x4(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); simde_vst1q_u8(ptr+16, val.val[1]); simde_vst1q_u8(ptr+32, val.val[2]); simde_vst1q_u8(ptr+48, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x4 #define vst1q_u8_x4(ptr, val) simde_vst1q_u8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x4(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); simde_vst1q_u16(ptr+8, val.val[1]); simde_vst1q_u16(ptr+16, val.val[2]); simde_vst1q_u16(ptr+24, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x4 #define vst1q_u16_x4(ptr, val) simde_vst1q_u16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x4(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); simde_vst1q_u32(ptr+4, val.val[1]); simde_vst1q_u32(ptr+8, val.val[2]); simde_vst1q_u32(ptr+12, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x4 #define vst1q_u32_x4(ptr, val) simde_vst1q_u32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x4(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); simde_vst1q_u64(ptr+2, val.val[1]); simde_vst1q_u64(ptr+4, val.val[2]); simde_vst1q_u64(ptr+6, val.val[3]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x4 #define vst1q_u64_x4(ptr, val) simde_vst1q_u64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p8_x4(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_poly8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p8_x4(ptr, val); #else simde_poly8x16_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly8x16_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse8_v_u8m1(ptr , val_[0].sv128 , 16); __riscv_vse8_v_u8m1(ptr+16 , val_[1].sv128 , 16); __riscv_vse8_v_u8m1(ptr+32 , val_[2].sv128 , 16); __riscv_vse8_v_u8m1(ptr+48 , val_[3].sv128 , 16); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p8_x4 #define vst1q_p8_x4(a, b) simde_vst1q_p8_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p16_x4(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_poly16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p16_x4(ptr, val); #else simde_poly16x8_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly16x8_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse16_v_u16m1(ptr , val_[0].sv128 , 8); __riscv_vse16_v_u16m1(ptr+8 , val_[1].sv128 , 8); __riscv_vse16_v_u16m1(ptr+16 , val_[2].sv128 , 8); __riscv_vse16_v_u16m1(ptr+24 , val_[3].sv128 , 8); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_p16_x4 #define vst1q_p16_x4(a, b) simde_vst1q_p16_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_p64_x4(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_poly64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \ (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) vst1q_p64_x4(ptr, val); #else simde_poly64x2_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_poly64x2_to_private(val.val[i]); } #if defined(SIMDE_RISCV_V_NATIVE) __riscv_vse64_v_u64m1(ptr , val_[0].sv128 , 2); __riscv_vse64_v_u64m1(ptr+2 , val_[1].sv128 , 2); __riscv_vse64_v_u64m1(ptr+4 , val_[2].sv128 , 2); __riscv_vse64_v_u64m1(ptr+6 , val_[3].sv128 , 2); #else simde_memcpy(ptr, &val_, sizeof(val_)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_p64_x4 #define vst1q_p64_x4(a, b) simde_vst1q_p64_x4((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_bf16_x4(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_bfloat16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst1q_bf16_x4(ptr, val); #else simde_bfloat16x8_private val_[4]; for (size_t i = 0; i < 4; i++) { val_[i] = simde_bfloat16x8_to_private(val.val[i]); } simde_memcpy(ptr, &val_, sizeof(val_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst1q_bf16_x4 #define vst1q_bf16_x4(a, b) simde_vst1q_bf16_x4((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST1Q_X4_H) */ /* :: End simde/simde/arm/neon/st1q_x4.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST2_H) #define SIMDE_ARM_NEON_ST2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/zip.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ZIP_H) && !defined(SIMDE_BUG_INTEL_857088) #define SIMDE_ARM_NEON_ZIP_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/zip1.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ZIP1_H) #define SIMDE_ARM_NEON_ZIP1_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vzip1_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzip1_f16(a, b); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a), b_ = simde_float16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_f16 #define vzip1_f16(a, b) simde_vzip1_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vzip1_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_f32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x2x2_t tmp = vzip_f32(a, b); return tmp.val[0]; #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a), b_ = simde_float32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_f32 #define vzip1_f32(a, b) simde_vzip1_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vzip1_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_s8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x8x2_t tmp = vzip_s8(a, b); return tmp.val[0]; #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi8(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 0, 8, 1, 9, 2, 10, 3, 11); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_s8 #define vzip1_s8(a, b) simde_vzip1_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vzip1_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_s16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t tmp = vzip_s16(a, b); return tmp.val[0]; #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi16(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 0, 4, 1, 5); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_s16 #define vzip1_s16(a, b) simde_vzip1_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vzip1_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_s32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2x2_t tmp = vzip_s32(a, b); return tmp.val[0]; #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_s32 #define vzip1_s32(a, b) simde_vzip1_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vzip1_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_u8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t tmp = vzip_u8(a, b); return tmp.val[0]; #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi8(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 0, 8, 1, 9, 2, 10, 3, 11); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_u8 #define vzip1_u8(a, b) simde_vzip1_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vzip1_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_u16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x4x2_t tmp = vzip_u16(a, b); return tmp.val[0]; #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi16(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 0, 4, 1, 5); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_u16 #define vzip1_u16(a, b) simde_vzip1_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vzip1_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_u32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x2x2_t tmp = vzip_u32(a, b); return tmp.val[0]; #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpacklo_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_u32 #define vzip1_u32(a, b) simde_vzip1_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vzip1q_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzip1q_f16(a, b); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a), b_ = simde_float16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_f16 #define vzip1q_f16(a, b) simde_vzip1q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vzip1q_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_f32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) float32x2x2_t tmp = vzip_f32(vget_low_f32(a), vget_low_f32(b)); return vcombine_f32(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a), b_ = simde_float32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 0, 4, 1, 5); #elif defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_unpacklo_ps(a_.m128, b_.m128); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 0, 4, 1, 5); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_f32 #define vzip1q_f32(a, b) simde_vzip1q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vzip1q_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_f64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergeh(a, b); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a), b_ = simde_float64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 0, 2); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128d = _mm_unpacklo_pd(a_.m128d, b_.m128d); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_f64 #define vzip1q_f64(a, b) simde_vzip1q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vzip1q_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_s8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int8x8x2_t tmp = vzip_s8(vget_low_s8(a), vget_low_s8(b)); return vcombine_s8(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi8(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_s8 #define vzip1q_s8(a, b) simde_vzip1q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vzip1q_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_s16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int16x4x2_t tmp = vzip_s16(vget_low_s16(a), vget_low_s16(b)); return vcombine_s16(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 0, 8, 1, 9, 2, 10, 3, 11); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi16(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 0, 8, 1, 9, 2, 10, 3, 11); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_s16 #define vzip1q_s16(a, b) simde_vzip1q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vzip1q_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_s32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) int32x2x2_t tmp = vzip_s32(vget_low_s32(a), vget_low_s32(b)); return vcombine_s32(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 0, 4, 1, 5); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi32(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 0, 4, 1, 5); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_s32 #define vzip1q_s32(a, b) simde_vzip1q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vzip1q_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_s64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergeh(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 0, 2); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi64(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_s64 #define vzip1q_s64(a, b) simde_vzip1q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vzip1q_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_u8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint8x8x2_t tmp = vzip_u8(vget_low_u8(a), vget_low_u8(b)); return vcombine_u8(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi8(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_u8 #define vzip1q_u8(a, b) simde_vzip1q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vzip1q_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_u16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint16x4x2_t tmp = vzip_u16(vget_low_u16(a), vget_low_u16(b)); return vcombine_u16(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 0, 8, 1, 9, 2, 10, 3, 11); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi16(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 0, 8, 1, 9, 2, 10, 3, 11); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_u16 #define vzip1q_u16(a, b) simde_vzip1q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vzip1q_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_u32(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) uint32x2x2_t tmp = vzip_u32(vget_low_u32(a), vget_low_u32(b)); return vcombine_u32(tmp.val[0], tmp.val[1]); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergeh(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 0, 4, 1, 5); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi32(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 0, 4, 1, 5); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_u32 #define vzip1q_u32(a, b) simde_vzip1q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vzip1q_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_u64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergeh(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 0, 2); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpacklo_epi64(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 0, 2); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_u64 #define vzip1q_u64(a, b) simde_vzip1q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vzip1_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_p8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde_poly8x8x2_t tmp = vzip_p8(a, b); return tmp.val[0]; #else simde_poly8x8_private r_, a_ = simde_poly8x8_to_private(a), b_ = simde_poly8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_poly8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_p8 #define vzip1_p8(a, b) simde_vzip1_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vzip1_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1_p16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde_poly16x4x2_t tmp = vzip_p16(a, b); return tmp.val[0]; #else simde_poly16x4_private r_, a_ = simde_poly16x4_to_private(a), b_ = simde_poly16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_poly16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1_p16 #define vzip1_p16(a, b) simde_vzip1_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vzip1q_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_p8(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde_poly8x8x2_t tmp = vzip_p8(vget_low_p8(a), vget_low_p8(b)); return vcombine_p8(tmp.val[0], tmp.val[1]); #else simde_poly8x16_private r_, a_ = simde_poly8x16_to_private(a), b_ = simde_poly8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_poly8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_p8 #define vzip1q_p8(a, b) simde_vzip1q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vzip1q_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_p16(a, b); #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) simde_poly16x4x2_t tmp = vzip_p16(vget_low_p16(a), vget_low_p16(b)); return vcombine_p16(tmp.val[0], tmp.val[1]); #else simde_poly16x8_private r_, a_ = simde_poly16x8_to_private(a), b_ = simde_poly16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_poly16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_p16 #define vzip1q_p16(a, b) simde_vzip1q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x2_t simde_vzip1q_p64(simde_poly64x2_t a, simde_poly64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip1q_p64(a, b); #else simde_poly64x2_private r_, a_ = simde_poly64x2_to_private(a), b_ = simde_poly64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[2 * i ] = a_.values[i]; r_.values[2 * i + 1] = b_.values[i]; } return simde_poly64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip1q_p64 #define vzip1q_p64(a, b) simde_vzip1q_p64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ZIP1_H) */ /* :: End simde/simde/arm/neon/zip1.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/zip2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ZIP2_H) #define SIMDE_ARM_NEON_ZIP2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vzip2_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzip2_f16(a, b); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a), b_ = simde_float16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_f16 #define vzip2_f16(a, b) simde_vzip2_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vzip2_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_f32(a, b); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a), b_ = simde_float32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_f32 #define vzip2_f32(a, b) simde_vzip2_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vzip2_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi8(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 4, 12, 5, 13, 6, 14, 7, 15); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_s8 #define vzip2_s8(a, b) simde_vzip2_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vzip2_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi16(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 2, 6, 3, 7); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_s16 #define vzip2_s16(a, b) simde_vzip2_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vzip2_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_s32 #define vzip2_s32(a, b) simde_vzip2_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vzip2_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi8(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 4, 12, 5, 13, 6, 14, 7, 15); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_u8 #define vzip2_u8(a, b) simde_vzip2_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vzip2_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi16(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 2, 6, 3, 7); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_u16 #define vzip2_u16(a, b) simde_vzip2_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vzip2_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); #if defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_unpackhi_pi32(a_.m64, b_.m64); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_u32 #define vzip2_u32(a, b) simde_vzip2_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vzip2q_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzip2q_f16(a, b); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a), b_ = simde_float16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_f16 #define vzip2q_f16(a, b) simde_vzip2q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vzip2q_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_f32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a), b_ = simde_float32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 2, 6, 3, 7); #elif defined(SIMDE_X86_SSE_NATIVE) r_.m128 = _mm_unpackhi_ps(a_.m128, b_.m128); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 2, 6, 3, 7); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_f32 #define vzip2q_f32(a, b) simde_vzip2q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vzip2q_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_f64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergel(a, b); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a), b_ = simde_float64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128d = _mm_unpackhi_pd(a_.m128d, b_.m128d); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_f64 #define vzip2q_f64(a, b) simde_vzip2q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vzip2q_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_s8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi8(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_s8 #define vzip2q_s8(a, b) simde_vzip2q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vzip2q_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_s16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 4, 12, 5, 13, 6, 14, 7, 15); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi16(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 4, 12, 5, 13, 6, 14, 7, 15); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_s16 #define vzip2q_s16(a, b) simde_vzip2q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vzip2q_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_s32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 2, 6, 3, 7); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi32(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 2, 6, 3, 7); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_s32 #define vzip2q_s32(a, b) simde_vzip2q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vzip2q_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_s64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergel(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi64(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_s64 #define vzip2q_s64(a, b) simde_vzip2q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vzip2q_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_u8(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi8(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_u8 #define vzip2q_u8(a, b) simde_vzip2q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vzip2q_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_u16(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 4, 12, 5, 13, 6, 14, 7, 15); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi16(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 4, 12, 5, 13, 6, 14, 7, 15); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_u16 #define vzip2q_u16(a, b) simde_vzip2q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vzip2q_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_u32(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) return vec_mergel(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 2, 6, 3, 7); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi32(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 2, 6, 3, 7); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_u32 #define vzip2q_u32(a, b) simde_vzip2q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vzip2q_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_u64(a, b); #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) return vec_mergel(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); #if defined(SIMDE_WASM_SIMD128_NATIVE) r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3); #elif defined(SIMDE_X86_SSE2_NATIVE) r_.m128i = _mm_unpackhi_epi64(a_.m128i, b_.m128i); #elif defined(SIMDE_SHUFFLE_VECTOR_) r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3); #else const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_u64 #define vzip2q_u64(a, b) simde_vzip2q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vzip2_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_p8(a, b); #else simde_poly8x8_private r_, a_ = simde_poly8x8_to_private(a), b_ = simde_poly8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_poly8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_p8 #define vzip2_p8(a, b) simde_vzip2_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vzip2_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2_p16(a, b); #else simde_poly16x4_private r_, a_ = simde_poly16x4_to_private(a), b_ = simde_poly16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_poly16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2_p16 #define vzip2_p16(a, b) simde_vzip2_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vzip2q_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_p8(a, b); #else simde_poly8x16_private r_, a_ = simde_poly8x16_to_private(a), b_ = simde_poly8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_poly8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_p8 #define vzip2q_p8(a, b) simde_vzip2q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vzip2q_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_p16(a, b); #else simde_poly16x8_private r_, a_ = simde_poly16x8_to_private(a), b_ = simde_poly16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_poly16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_p16 #define vzip2q_p16(a, b) simde_vzip2q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x2_t simde_vzip2q_p64(simde_poly64x2_t a, simde_poly64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vzip2q_p64(a, b); #else simde_poly64x2_private r_, a_ = simde_poly64x2_to_private(a), b_ = simde_poly64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { r_.values[(2 * i) ] = a_.values[halfway_point + i]; r_.values[(2 * i) + 1] = b_.values[halfway_point + i]; } return simde_poly64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vzip2q_p64 #define vzip2q_p64(a, b) simde_vzip2q_p64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ZIP2_H) */ /* :: End simde/simde/arm/neon/zip2.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4x2_t simde_vzip_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzip_f16(a, b); #else simde_float16x4x2_t r = { { simde_vzip1_f16(a, b), simde_vzip2_f16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_f16 #define vzip_f16(a, b) simde_vzip_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2x2_t simde_vzip_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_f32(a, b); #else simde_float32x2x2_t r = { { simde_vzip1_f32(a, b), simde_vzip2_f32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_f32 #define vzip_f32(a, b) simde_vzip_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8x2_t simde_vzip_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_s8(a, b); #else simde_int8x8x2_t r = { { simde_vzip1_s8(a, b), simde_vzip2_s8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_s8 #define vzip_s8(a, b) simde_vzip_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4x2_t simde_vzip_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_s16(a, b); #else simde_int16x4x2_t r = { { simde_vzip1_s16(a, b), simde_vzip2_s16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_s16 #define vzip_s16(a, b) simde_vzip_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2x2_t simde_vzip_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_s32(a, b); #else simde_int32x2x2_t r = { { simde_vzip1_s32(a, b), simde_vzip2_s32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_s32 #define vzip_s32(a, b) simde_vzip_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8x2_t simde_vzip_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_u8(a, b); #else simde_uint8x8x2_t r = { { simde_vzip1_u8(a, b), simde_vzip2_u8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_u8 #define vzip_u8(a, b) simde_vzip_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4x2_t simde_vzip_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_u16(a, b); #else simde_uint16x4x2_t r = { { simde_vzip1_u16(a, b), simde_vzip2_u16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_u16 #define vzip_u16(a, b) simde_vzip_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2x2_t simde_vzip_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_u32(a, b); #else simde_uint32x2x2_t r = { { simde_vzip1_u32(a, b), simde_vzip2_u32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_u32 #define vzip_u32(a, b) simde_vzip_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8x2_t simde_vzipq_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vzipq_f16(a, b); #else simde_float16x8x2_t r = { { simde_vzip1q_f16(a, b), simde_vzip2q_f16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_f16 #define vzipq_f16(a, b) simde_vzipq_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4x2_t simde_vzipq_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_f32(a, b); #else simde_float32x4x2_t r = { { simde_vzip1q_f32(a, b), simde_vzip2q_f32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_f32 #define vzipq_f32(a, b) simde_vzipq_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16x2_t simde_vzipq_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_s8(a, b); #else simde_int8x16x2_t r = { { simde_vzip1q_s8(a, b), simde_vzip2q_s8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_s8 #define vzipq_s8(a, b) simde_vzipq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8x2_t simde_vzipq_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_s16(a, b); #else simde_int16x8x2_t r = { { simde_vzip1q_s16(a, b), simde_vzip2q_s16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_s16 #define vzipq_s16(a, b) simde_vzipq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4x2_t simde_vzipq_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_s32(a, b); #else simde_int32x4x2_t r = { { simde_vzip1q_s32(a, b), simde_vzip2q_s32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_s32 #define vzipq_s32(a, b) simde_vzipq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16x2_t simde_vzipq_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_u8(a, b); #else simde_uint8x16x2_t r = { { simde_vzip1q_u8(a, b), simde_vzip2q_u8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_u8 #define vzipq_u8(a, b) simde_vzipq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8x2_t simde_vzipq_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_u16(a, b); #else simde_uint16x8x2_t r = { { simde_vzip1q_u16(a, b), simde_vzip2q_u16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_u16 #define vzipq_u16(a, b) simde_vzipq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4x2_t simde_vzipq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_u32(a, b); #else simde_uint32x4x2_t r = { { simde_vzip1q_u32(a, b), simde_vzip2q_u32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_u32 #define vzipq_u32(a, b) simde_vzipq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8x2_t simde_vzip_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_p8(a, b); #else simde_poly8x8x2_t r = { { simde_vzip1_p8(a, b), simde_vzip2_p8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_p8 #define vzip_p8(a, b) simde_vzip_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4x2_t simde_vzip_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzip_p16(a, b); #else simde_poly16x4x2_t r = { { simde_vzip1_p16(a, b), simde_vzip2_p16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzip_p16 #define vzip_p16(a, b) simde_vzip_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16x2_t simde_vzipq_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_p8(a, b); #else simde_poly8x16x2_t r = { { simde_vzip1q_p8(a, b), simde_vzip2q_p8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_p8 #define vzipq_p8(a, b) simde_vzipq_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8x2_t simde_vzipq_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vzipq_p16(a, b); #else simde_poly16x8x2_t r = { { simde_vzip1q_p16(a, b), simde_vzip2q_p16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vzipq_p16 #define vzipq_p16(a, b) simde_vzipq_p16((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ZIP_H) */ /* :: End simde/simde/arm/neon/zip.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_f16(simde_float16_t *ptr, simde_float16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst2_f16(ptr, val); #else simde_float16x4_private a_[2] = {simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) vfloat16m1x2_t dest = __riscv_vlseg2e16_v_f16m1x2((_Float16 *)ptr, 4); dest = __riscv_vset_v_f16m1_f16m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f16m1_f16m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e16_v_f16m1x2 ((_Float16 *)ptr, dest, 4); #else simde_float16_t buf[8]; for (size_t i = 0; i < 8 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_f16 #define vst2_f16(a, b) simde_vst2_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_f32(simde_float32_t *ptr, simde_float32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_f32(ptr, val); #else simde_float32x2_private a_[2] = {simde_float32x2_to_private(val.val[0]), simde_float32x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vfloat32m1x2_t dest = __riscv_vlseg2e32_v_f32m1x2(ptr, 2); dest = __riscv_vset_v_f32m1_f32m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f32m1_f32m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e32_v_f32m1x2 (ptr, dest, 2); #else simde_float32_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_f32 #define vst2_f32(a, b) simde_vst2_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_f64(simde_float64_t *ptr, simde_float64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst2_f64(ptr, val); #else simde_float64x1_private a_[2] = {simde_float64x1_to_private(val.val[0]), simde_float64x1_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x2_t dest = __riscv_vlseg2e64_v_f64m1x2(ptr, 1); dest = __riscv_vset_v_f64m1_f64m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f64m1_f64m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e64_v_f64m1x2 (ptr, dest, 1); #else simde_float64_t buf[2]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2_f64 #define vst2_f64(a, b) simde_vst2_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_s8(int8_t *ptr, simde_int8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_s8(ptr, val); #else simde_int8x8_private a_[2] = {simde_int8x8_to_private(val.val[0]), simde_int8x8_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vint8m1x2_t dest = __riscv_vlseg2e8_v_i8m1x2(ptr, 8); dest = __riscv_vset_v_i8m1_i8m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i8m1_i8m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e8_v_i8m1x2 (ptr, dest, 8); #else int8_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_s8 #define vst2_s8(a, b) simde_vst2_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_s16(int16_t *ptr, simde_int16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_s16(ptr, val); #else simde_int16x4_private a_[2] = {simde_int16x4_to_private(val.val[0]), simde_int16x4_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vint16m1x2_t dest = __riscv_vlseg2e16_v_i16m1x2(ptr, 4); dest = __riscv_vset_v_i16m1_i16m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i16m1_i16m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e16_v_i16m1x2 (ptr, dest, 4); #else int16_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_s16 #define vst2_s16(a, b) simde_vst2_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_s32(int32_t *ptr, simde_int32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_s32(ptr, val); #else simde_int32x2_private a_[2] = {simde_int32x2_to_private(val.val[0]), simde_int32x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vint32m1x2_t dest = __riscv_vlseg2e32_v_i32m1x2(ptr, 2); dest = __riscv_vset_v_i32m1_i32m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i32m1_i32m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e32_v_i32m1x2 (ptr, dest, 2); #else int32_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_s32 #define vst2_s32(a, b) simde_vst2_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_s64(int64_t *ptr, simde_int64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_s64(ptr, val); #else simde_int64x1_private a_[2] = {simde_int64x1_to_private(val.val[0]), simde_int64x1_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vint64m1x2_t dest = __riscv_vlseg2e64_v_i64m1x2(ptr, 1); dest = __riscv_vset_v_i64m1_i64m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i64m1_i64m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e64_v_i64m1x2 (ptr, dest, 1); #else int64_t buf[2]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_s64 #define vst2_s64(a, b) simde_vst2_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_u8(uint8_t *ptr, simde_uint8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_u8(ptr, val); #else simde_uint8x8_private a_[2] = {simde_uint8x8_to_private(val.val[0]), simde_uint8x8_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x2_t dest = __riscv_vlseg2e8_v_u8m1x2(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e8_v_u8m1x2 (ptr, dest, 8); #else uint8_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_u8 #define vst2_u8(a, b) simde_vst2_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_u16(uint16_t *ptr, simde_uint16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_u16(ptr, val); #else simde_uint16x4_private a_[2] = {simde_uint16x4_to_private(val.val[0]), simde_uint16x4_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x2_t dest = __riscv_vlseg2e16_v_u16m1x2(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e16_v_u16m1x2 (ptr, dest, 4); #else uint16_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_u16 #define vst2_u16(a, b) simde_vst2_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_u32(uint32_t *ptr, simde_uint32x2x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_u32(ptr, val); #else simde_uint32x2_private a_[2] = {simde_uint32x2_to_private(val.val[0]), simde_uint32x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint32m1x2_t dest = __riscv_vlseg2e32_v_u32m1x2(ptr, 2); dest = __riscv_vset_v_u32m1_u32m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u32m1_u32m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e32_v_u32m1x2 (ptr, dest, 2); #else uint32_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_u32 #define vst2_u32(a, b) simde_vst2_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_u64(uint64_t *ptr, simde_uint64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_u64(ptr, val); #else simde_uint64x1_private a_[2] = {simde_uint64x1_to_private(val.val[0]), simde_uint64x1_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x2_t dest = __riscv_vlseg2e64_v_u64m1x2(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e64_v_u64m1x2 (ptr, dest, 1); #else uint64_t buf[2]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_u64 #define vst2_u64(a, b) simde_vst2_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_f16(simde_float16_t *ptr, simde_float16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst2q_f16(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) simde_float16x8_private a_[2] = {simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1])}; vfloat16m1x2_t dest = __riscv_vlseg2e16_v_f16m1x2((_Float16 *)ptr, 8); dest = __riscv_vset_v_f16m1_f16m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f16m1_f16m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e16_v_f16m1x2 ((_Float16 *)ptr, dest, 8); #else simde_float16x8x2_t r = simde_vzipq_f16(val.val[0], val.val[1]); simde_vst1q_f16(ptr, r.val[0]); simde_vst1q_f16(ptr+8, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_f16 #define vst2q_f16(a, b) simde_vst2q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_f32(simde_float32_t *ptr, simde_float32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_f32(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_float32x4_private a_[2] = {simde_float32x4_to_private(val.val[0]), simde_float32x4_to_private(val.val[1])}; vfloat32m1x2_t dest = __riscv_vlseg2e32_v_f32m1x2(ptr, 4); dest = __riscv_vset_v_f32m1_f32m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f32m1_f32m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e32_v_f32m1x2 (ptr, dest, 4); #else simde_float32x4x2_t r = simde_vzipq_f32(val.val[0], val.val[1]); simde_vst1q_f32(ptr, r.val[0]); simde_vst1q_f32(ptr+4, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_f32 #define vst2q_f32(a, b) simde_vst2q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_f64(simde_float64_t *ptr, simde_float64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst2q_f64(ptr, val); #else simde_float64x2_private a_[2] = {simde_float64x2_to_private(val.val[0]), simde_float64x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x2_t dest = __riscv_vlseg2e64_v_f64m1x2(ptr, 2); dest = __riscv_vset_v_f64m1_f64m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f64m1_f64m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e64_v_f64m1x2 (ptr, dest, 2); #else simde_float64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_f64 #define vst2q_f64(a, b) simde_vst2q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_s8(int8_t *ptr, simde_int8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_s8(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_int8x16_private a_[2] = {simde_int8x16_to_private(val.val[0]), simde_int8x16_to_private(val.val[1])}; vint8m1x2_t dest = __riscv_vlseg2e8_v_i8m1x2(ptr, 16); dest = __riscv_vset_v_i8m1_i8m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i8m1_i8m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e8_v_i8m1x2 (ptr, dest, 16); #else simde_int8x16x2_t r = simde_vzipq_s8(val.val[0], val.val[1]); simde_vst1q_s8(ptr, r.val[0]); simde_vst1q_s8(ptr+16, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_s8 #define vst2q_s8(a, b) simde_vst2q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_s16(int16_t *ptr, simde_int16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_s16(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_int16x8_private a_[2] = {simde_int16x8_to_private(val.val[0]), simde_int16x8_to_private(val.val[1])}; vint16m1x2_t dest = __riscv_vlseg2e16_v_i16m1x2(ptr, 8); dest = __riscv_vset_v_i16m1_i16m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i16m1_i16m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e16_v_i16m1x2 (ptr, dest, 8); #else simde_int16x8x2_t r = simde_vzipq_s16(val.val[0], val.val[1]); simde_vst1q_s16(ptr, r.val[0]); simde_vst1q_s16(ptr+8, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_s16 #define vst2q_s16(a, b) simde_vst2q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_s32(int32_t *ptr, simde_int32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_s32(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_int32x4_private a_[2] = {simde_int32x4_to_private(val.val[0]), simde_int32x4_to_private(val.val[1])}; vint32m1x2_t dest = __riscv_vlseg2e32_v_i32m1x2(ptr, 4); dest = __riscv_vset_v_i32m1_i32m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i32m1_i32m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e32_v_i32m1x2 (ptr, dest, 4); #else simde_int32x4x2_t r = simde_vzipq_s32(val.val[0], val.val[1]); simde_vst1q_s32(ptr, r.val[0]); simde_vst1q_s32(ptr+4, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_s32 #define vst2q_s32(a, b) simde_vst2q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_s64(int64_t *ptr, simde_int64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst2q_s64(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_int64x2_private a_[2] = {simde_int64x2_to_private(val.val[0]), simde_int64x2_to_private(val.val[1])}; vint64m1x2_t dest = __riscv_vlseg2e64_v_i64m1x2(ptr, 2); dest = __riscv_vset_v_i64m1_i64m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i64m1_i64m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e64_v_i64m1x2 (ptr, dest, 2); #else int64_t buf[4]; simde_int64x2_private a_[2] = {simde_int64x2_to_private(val.val[0]), simde_int64x2_to_private(val.val[1])}; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_s64 #define vst2q_s64(a, b) simde_vst2q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_u8(uint8_t *ptr, simde_uint8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_u8(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_uint8x16_private a_[2] = {simde_uint8x16_to_private(val.val[0]), simde_uint8x16_to_private(val.val[1])}; vuint8m1x2_t dest = __riscv_vlseg2e8_v_u8m1x2(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e8_v_u8m1x2 (ptr, dest, 16); #else simde_uint8x16x2_t r = simde_vzipq_u8(val.val[0], val.val[1]); simde_vst1q_u8(ptr, r.val[0]); simde_vst1q_u8(ptr+16, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_u8 #define vst2q_u8(a, b) simde_vst2q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_u16(uint16_t *ptr, simde_uint16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_u16(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_uint16x8_private a_[2] = {simde_uint16x8_to_private(val.val[0]), simde_uint16x8_to_private(val.val[1])}; vuint16m1x2_t dest = __riscv_vlseg2e16_v_u16m1x2(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e16_v_u16m1x2 (ptr, dest, 8); #else simde_uint16x8x2_t r = simde_vzipq_u16(val.val[0], val.val[1]); simde_vst1q_u16(ptr, r.val[0]); simde_vst1q_u16(ptr+8, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_u16 #define vst2q_u16(a, b) simde_vst2q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_u32(uint32_t *ptr, simde_uint32x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_u32(ptr, val); #elif defined(SIMDE_RISCV_V_NATIVE) simde_uint32x4_private a_[2] = {simde_uint32x4_to_private(val.val[0]), simde_uint32x4_to_private(val.val[1])}; vuint32m1x2_t dest = __riscv_vlseg2e32_v_u32m1x2(ptr, 4); dest = __riscv_vset_v_u32m1_u32m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u32m1_u32m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e32_v_u32m1x2 (ptr, dest, 4); #else simde_uint32x4x2_t r = simde_vzipq_u32(val.val[0], val.val[1]); simde_vst1q_u32(ptr, r.val[0]); simde_vst1q_u32(ptr+4, r.val[1]); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_u32 #define vst2q_u32(a, b) simde_vst2q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_u64(uint64_t *ptr, simde_uint64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst2q_u64(ptr, val); #else simde_uint64x2_private a_[2] = {simde_uint64x2_to_private(val.val[0]), simde_uint64x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x2_t dest = __riscv_vlseg2e64_v_u64m1x2(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e64_v_u64m1x2 (ptr, dest, 2); #else uint64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_u64 #define vst2q_u64(a, b) simde_vst2q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_p8(simde_poly8_t *ptr, simde_poly8x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_p8(ptr, val); #else simde_poly8x8_private a_[2] = {simde_poly8x8_to_private(val.val[0]), simde_poly8x8_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x2_t dest = __riscv_vlseg2e8_v_u8m1x2(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e8_v_u8m1x2 (ptr, dest, 8); #else simde_poly8_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_p8 #define vst2_p8(a, b) simde_vst2_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_p16(simde_poly16_t *ptr, simde_poly16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2_p16(ptr, val); #else simde_poly16x4_private a_[2] = {simde_poly16x4_to_private(val.val[0]), simde_poly16x4_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x2_t dest = __riscv_vlseg2e16_v_u16m1x2(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e16_v_u16m1x2 (ptr, dest, 4); #else simde_poly16_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_p16 #define vst2_p16(a, b) simde_vst2_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_p64(simde_poly64_t *ptr, simde_poly64x1x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst2_p64(ptr, val); #else simde_poly64x1_private a_[2] = {simde_poly64x1_to_private(val.val[0]), simde_poly64x1_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x2_t dest = __riscv_vlseg2e64_v_u64m1x2(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 1, a_[1].sv64); __riscv_vsseg2e64_v_u64m1x2 (ptr, dest, 1); #else simde_poly64_t buf[2]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst2_p64 #define vst2_p64(a, b) simde_vst2_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_p8(simde_poly8_t *ptr, simde_poly8x16x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_p8(ptr, val); #else simde_poly8x16_private a_[2] = {simde_poly8x16_to_private(val.val[0]), simde_poly8x16_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x2_t dest = __riscv_vlseg2e8_v_u8m1x2(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e8_v_u8m1x2 (ptr, dest, 16); #else simde_poly8_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_p8 #define vst2q_p8(a, b) simde_vst2q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_p16(simde_poly16_t *ptr, simde_poly16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst2q_p16(ptr, val); #else simde_poly16x8_private a_[2] = {simde_poly16x8_to_private(val.val[0]), simde_poly16x8_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x2_t dest = __riscv_vlseg2e16_v_u16m1x2(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e16_v_u16m1x2 (ptr, dest, 8); #else simde_poly16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_p16 #define vst2q_p16(a, b) simde_vst2q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_p64(simde_poly64_t *ptr, simde_poly64x2x2_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst2q_p64(ptr, val); #else simde_poly64x2_private a_[2] = {simde_poly64x2_to_private(val.val[0]), simde_poly64x2_to_private(val.val[1])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x2_t dest = __riscv_vlseg2e64_v_u64m1x2(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x2 (dest, 1, a_[1].sv128); __riscv_vsseg2e64_v_u64m1x2 (ptr, dest, 2); #else simde_poly64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_p64 #define vst2q_p64(a, b) simde_vst2q_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_bf16(simde_bfloat16_t *ptr, simde_bfloat16x4x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst2_bf16(ptr, val); #else simde_bfloat16x4_private a_[2] = {simde_bfloat16x4_to_private(val.val[0]), simde_bfloat16x4_to_private(val.val[1])}; simde_bfloat16_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst2_bf16 #define vst2_bf16(a, b) simde_vst2_bf16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_bf16(simde_bfloat16_t *ptr, simde_bfloat16x8x2_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst2q_bf16(ptr, val); #else simde_bfloat16x8_private a_[2] = {simde_bfloat16x8_to_private(val.val[0]), simde_bfloat16x8_to_private(val.val[1])}; simde_bfloat16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 2 ; i++) { buf[i] = a_[i % 2].values[i / 2]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst2q_bf16 #define vst2q_bf16(a, b) simde_vst2q_bf16((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST2_H) */ /* :: End simde/simde/arm/neon/st2.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st2_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST2_LANE_H) #define SIMDE_ARM_NEON_ST2_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int8x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_s8 #define vst2_lane_s8(a, b, c) simde_vst2_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int16x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_s16 #define vst2_lane_s16(a, b, c) simde_vst2_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int32x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x2_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_s32 #define vst2_lane_s32(a, b, c) simde_vst2_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst2_lane_s64(ptr, val, 0); #else simde_int64x1_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2_lane_s64 #define vst2_lane_s64(a, b, c) simde_vst2_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint8x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_u8 #define vst2_lane_u8(a, b, c) simde_vst2_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint16x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_u16 #define vst2_lane_u16(a, b, c) simde_vst2_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint32x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x2_private r; for (size_t i = 0 ; i < 2 ; i ++) { r = simde_uint32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_u32 #define vst2_lane_u32(a, b, c) simde_vst2_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst2_lane_u64(ptr, val, 0); #else simde_uint64x1_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2_lane_u64 #define vst2_lane_u64(a, b, c) simde_vst2_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float16x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_4_NO_RESULT_(vst2_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x4_private r; for (size_t i = 0 ; i < 2 ; i ++) { r = simde_float16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_f16 #define vst2_lane_f16(a, b, c) simde_vst2_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float32x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x2_private r; for (size_t i = 0 ; i < 2 ; i ++) { r = simde_float32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_f32 #define vst2_lane_f32(a, b, c) simde_vst2_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x1x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst2_lane_f64(ptr, val, 0); #else simde_float64x1_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_float64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2_lane_f64 #define vst2_lane_f64(a, b, c) simde_vst2_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int8x16x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 16) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst2q_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x16_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_s8 #define vst2q_lane_s8(a, b, c) simde_vst2q_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int16x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2q_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_s16 #define vst2q_lane_s16(a, b, c) simde_vst2q_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int32x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2q_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_s32 #define vst2q_lane_s32(a, b, c) simde_vst2q_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2q_lane_s64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int64x2_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_int64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_s64 #define vst2q_lane_s64(a, b, c) simde_vst2q_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint8x16x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 16) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst2q_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x16_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_u8 #define vst2q_lane_u8(a, b, c) simde_vst2q_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint16x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2q_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_u16 #define vst2q_lane_u16(a, b, c) simde_vst2q_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint32x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2q_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_u32 #define vst2q_lane_u32(a, b, c) simde_vst2q_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2q_lane_u64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint64x2_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_uint64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_u64 #define vst2q_lane_u64(a, b, c) simde_vst2q_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float16x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_8_NO_RESULT_(vst2q_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_float16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_f16 #define vst2q_lane_f16(a, b, c) simde_vst2q_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float32x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2q_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_float32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_f32 #define vst2q_lane_f32(a, b, c) simde_vst2q_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2q_lane_f64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float64x2_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_float64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_f64 #define vst2q_lane_f64(a, b, c) simde_vst2q_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly8x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_p8 #define vst2_lane_p8(a, b, c) simde_vst2_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly16x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst2_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x4_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2_lane_p16 #define vst2_lane_p16(a, b, c) simde_vst2_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly64x1x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst2_lane_p64(ptr, val, 0); #else simde_poly64x1_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2_lane_p64 #define vst2_lane_p64(a, b, c) simde_vst2_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly8x16x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 16) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst2q_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x16_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_p8 #define vst2q_lane_p8(a, b, c) simde_vst2q_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly16x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst2q_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_p16 #define vst2q_lane_p16(a, b, c) simde_vst2q_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_poly64x2x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst2q_lane_p64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly64x2_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_poly64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_p64 #define vst2q_lane_p64(a, b, c) simde_vst2q_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_bfloat16x4x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_4_NO_RESULT_(vst2_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x4_private r; for (size_t i = 0 ; i < 2 ; i ++) { r = simde_bfloat16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst2_lane_bf16 #define vst2_lane_bf16(a, b, c) simde_vst2_lane_bf16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst2q_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_bfloat16x8x2_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_8_NO_RESULT_(vst2q_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x8_private r; for (size_t i = 0 ; i < 2 ; i++) { r = simde_bfloat16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst2q_lane_bf16 #define vst2q_lane_bf16(a, b, c) simde_vst2q_lane_bf16((a), (b), (c)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST2_LANE_H) */ /* :: End simde/simde/arm/neon/st2_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st3.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST3_H) #define SIMDE_ARM_NEON_ST3_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_float16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst3_f16(ptr, val); #else simde_float16x4_private a[3] = { simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1]), simde_float16x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) vfloat16m1x3_t dest = __riscv_vlseg3e16_v_f16m1x3((_Float16 *)ptr, 4); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 0, a[0].sv64); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 1, a[1].sv64); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 2, a[2].sv64); __riscv_vsseg3e16_v_f16m1x3 ((_Float16 *)ptr, dest, 4); #else simde_float16_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_f16 #define vst3_f16(a, b) simde_vst3_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_float32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_f32(ptr, val); #else simde_float32x2_private a[3] = { simde_float32x2_to_private(val.val[0]), simde_float32x2_to_private(val.val[1]), simde_float32x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat32m1x3_t dest = __riscv_vlseg3e32_v_f32m1x3(ptr, 2); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 0, a[0].sv64); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 1, a[1].sv64); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 2, a[2].sv64); __riscv_vsseg3e32_v_f32m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else simde_float32_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_f32 #define vst3_f32(a, b) simde_vst3_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst3_f64(ptr, val); #else simde_float64x1_private a_[3] = { simde_float64x1_to_private(val.val[0]), simde_float64x1_to_private(val.val[1]), simde_float64x1_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x3_t dest = __riscv_vlseg3e64_v_f64m1x3(ptr, 1); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e64_v_f64m1x3(ptr, dest, 1); #else simde_memcpy(ptr, &a_[0].values, sizeof(a_[0].values)); simde_memcpy(&ptr[1], &a_[1].values, sizeof(a_[1].values)); simde_memcpy(&ptr[2], &a_[2].values, sizeof(a_[2].values)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3_f64 #define vst3_f64(a, b) simde_vst3_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_s8(ptr, val); #else simde_int8x8_private a_[3] = { simde_int8x8_to_private(val.val[0]), simde_int8x8_to_private(val.val[1]), simde_int8x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint8m1x3_t dest = __riscv_vlseg3e8_v_i8m1x3(ptr, 8); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e8_v_i8m1x3(ptr, dest, 8); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[0].values, a_[1].values, 0, 8, 3, 1, 9, 4, 2, 10); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(8, 8, r0, a_[2].values, 0, 1, 8, 3, 4, 9, 6, 7); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[2].values, a_[1].values, 2, 5, 11, 3, 6, 12, 4, 7); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(8, 8, r1, a_[0].values, 0, 11, 2, 3, 12, 5, 6, 13); simde_memcpy(&ptr[8], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[0].values, a_[2].values, 13, 6, 0, 14, 7, 0, 15, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(8, 8, r2, a_[1].values, 13, 0, 1, 14, 3, 4, 15, 6); simde_memcpy(&ptr[16], &m2, sizeof(m2)); #else int8_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_s8 #define vst3_s8(a, b) simde_vst3_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_s16(ptr, val); #else simde_int16x4_private a_[3] = { simde_int16x4_to_private(val.val[0]), simde_int16x4_to_private(val.val[1]), simde_int16x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint16m1x3_t dest = __riscv_vlseg3e16_v_i16m1x3(ptr, 4); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e16_v_i16m1x3 (ptr, dest, 4); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[0].values, a_[1].values, 0, 4, 1, 0); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(16, 8, r0, a_[2].values, 0, 1, 4, 2); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[1].values, a_[2].values, 1, 5, 2, 0); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(16, 8, r1, a_[0].values, 0, 1, 6, 2); simde_memcpy(&ptr[4], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[2].values, a_[0].values, 2, 7, 3, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(16, 8, r2, a_[1].values, 0, 1, 7, 2); simde_memcpy(&ptr[8], &m2, sizeof(m2)); #else int16_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_s16 #define vst3_s16(a, b) simde_vst3_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_s32(ptr, val); #else simde_int32x2_private a[3] = { simde_int32x2_to_private(val.val[0]), simde_int32x2_to_private(val.val[1]), simde_int32x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint32m1x3_t dest = __riscv_vlseg3e32_v_i32m1x3(ptr, 2); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 0, a[0].sv64); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 1, a[1].sv64); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 2, a[2].sv64); __riscv_vsseg3e32_v_i32m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else int32_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_s32 #define vst3_s32(a, b) simde_vst3_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_s64(ptr, val); #else simde_int64x1_private a_[3] = { simde_int64x1_to_private(val.val[0]), simde_int64x1_to_private(val.val[1]), simde_int64x1_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint64m1x3_t dest = __riscv_vlseg3e64_v_i64m1x3(ptr, 1); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e64_v_i64m1x3 (ptr, dest, 1); #else simde_memcpy(ptr, &a_[0].values, sizeof(a_[0].values)); simde_memcpy(&ptr[1], &a_[1].values, sizeof(a_[1].values)); simde_memcpy(&ptr[2], &a_[2].values, sizeof(a_[2].values)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_s64 #define vst3_s64(a, b) simde_vst3_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_u8(ptr, val); #else simde_uint8x8_private a_[3] = { simde_uint8x8_to_private(val.val[0]), simde_uint8x8_to_private(val.val[1]), simde_uint8x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x3_t dest = __riscv_vlseg3e8_v_u8m1x3(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e8_v_u8m1x3 (ptr, dest, 8); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[0].values, a_[1].values, 0, 8, 3, 1, 9, 4, 2, 10); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(8, 8, r0, a_[2].values, 0, 1, 8, 3, 4, 9, 6, 7); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[2].values, a_[1].values, 2, 5, 11, 3, 6, 12, 4, 7); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(8, 8, r1, a_[0].values, 0, 11, 2, 3, 12, 5, 6, 13); simde_memcpy(&ptr[8], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(8, 8, a_[0].values, a_[2].values, 13, 6, 0, 14, 7, 0, 15, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(8, 8, r2, a_[1].values, 13, 0, 1, 14, 3, 4, 15, 6); simde_memcpy(&ptr[16], &m2, sizeof(m2)); #else uint8_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_u8 #define vst3_u8(a, b) simde_vst3_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_u16(ptr, val); #else simde_uint16x4_private a_[3] = { simde_uint16x4_to_private(val.val[0]), simde_uint16x4_to_private(val.val[1]), simde_uint16x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x3_t dest = __riscv_vlseg3e16_v_u16m1x3(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e16_v_u16m1x3 (ptr, dest, 4); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[0].values, a_[1].values, 0, 4, 1, 0); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(16, 8, r0, a_[2].values, 0, 1, 4, 2); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[1].values, a_[2].values, 1, 5, 2, 0); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(16, 8, r1, a_[0].values, 0, 1, 6, 2); simde_memcpy(&ptr[4], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(16, 8, a_[2].values, a_[0].values, 2, 7, 3, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(16, 8, r2, a_[1].values, 0, 1, 7, 2); simde_memcpy(&ptr[8], &m2, sizeof(m2)); #else uint16_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_u16 #define vst3_u16(a, b) simde_vst3_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint32x2x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_u32(ptr, val); #else simde_uint32x2_private a[3] = { simde_uint32x2_to_private(val.val[0]), simde_uint32x2_to_private(val.val[1]), simde_uint32x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint32m1x3_t dest = __riscv_vlseg3e32_v_u32m1x3(ptr, 2); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 0, a[0].sv64); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 1, a[1].sv64); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 2, a[2].sv64); __riscv_vsseg3e32_v_u32m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) && !defined(SIMDE_BUG_GCC_100762) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(32, 8, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else uint32_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_u32 #define vst3_u32(a, b) simde_vst3_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_u64(ptr, val); #else simde_uint64x1_private a_[3] = { simde_uint64x1_to_private(val.val[0]), simde_uint64x1_to_private(val.val[1]), simde_uint64x1_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x3_t dest = __riscv_vlseg3e64_v_u64m1x3(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e64_v_u64m1x3 (ptr, dest, 1); #else simde_memcpy(ptr, &a_[0].values, sizeof(a_[0].values)); simde_memcpy(&ptr[1], &a_[1].values, sizeof(a_[1].values)); simde_memcpy(&ptr[2], &a_[2].values, sizeof(a_[2].values)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_u64 #define vst3_u64(a, b) simde_vst3_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_float16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst3q_f16(ptr, val); #else simde_float16x8_private a_[3] = { simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1]), simde_float16x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) vfloat16m1x3_t dest = __riscv_vlseg3e16_v_f16m1x3((_Float16 *)ptr, 8); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_f16m1_f16m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e16_v_f16m1x3 ((_Float16 *)ptr, dest, 8); #else simde_float16_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_f16 #define vst3q_f16(a, b) simde_vst3q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_float32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_f32(ptr, val); #else simde_float32x4_private a_[3] = { simde_float32x4_to_private(val.val[0]), simde_float32x4_to_private(val.val[1]), simde_float32x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat32m1x3_t dest = __riscv_vlseg3e32_v_f32m1x3(ptr, 4); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_f32m1_f32m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e32_v_f32m1x3 (ptr, dest, 4); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[0].values, a_[1].values, 0, 4, 1, 0); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(32, 16, r0, a_[2].values, 0, 1, 4, 2); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[1].values, a_[2].values, 1, 5, 2, 0); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(32, 16, r1, a_[0].values, 0, 1, 6, 2); simde_memcpy(&ptr[4], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[2].values, a_[0].values, 2, 7, 3, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(32, 16, r2, a_[1].values, 0, 1, 7, 2); simde_memcpy(&ptr[8], &m2, sizeof(m2)); #else simde_float32_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_f32 #define vst3q_f32(a, b) simde_vst3q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_float64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst3q_f64(ptr, val); #else simde_float64x2_private a[3] = { simde_float64x2_to_private(val.val[0]), simde_float64x2_to_private(val.val[1]), simde_float64x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x3_t dest = __riscv_vlseg3e64_v_f64m1x3(ptr, 2); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 0, a[0].sv128); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 1, a[1].sv128); dest = __riscv_vset_v_f64m1_f64m1x3 (dest, 2, a[2].sv128); __riscv_vsseg3e64_v_f64m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else simde_float64_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_f64 #define vst3q_f64(a, b) simde_vst3q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_int8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_s8(ptr, val); #else simde_int8x16_private a_[3] = { simde_int8x16_to_private(val.val[0]), simde_int8x16_to_private(val.val[1]), simde_int8x16_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint8m1x3_t dest = __riscv_vlseg3e8_v_i8m1x3(ptr, 16); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i8m1_i8m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e8_v_i8m1x3 (ptr, dest, 16); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[0].values, a_[1].values, 0, 16, 6, 1, 17, 7, 2, 18, 8, 3, 19, 9, 4, 20, 10, 5); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(8, 16, r0, a_[2].values, 0, 1, 16, 3, 4, 17, 6, 7, 18, 9, 10, 19, 12, 13, 20, 15); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[1].values, a_[2].values, 5, 21, 11, 6, 22, 12, 7, 23, 13, 8, 24, 14, 9, 25, 15, 10); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(8, 16, r1, r0, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); simde_memcpy(&ptr[16], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[2].values, a_[0].values, 10, 27, 0, 11, 28, 0, 12, 29, 0, 13, 30, 0, 14, 31, 0, 15); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(8, 16, r2, r1, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); simde_memcpy(&ptr[32], &m2, sizeof(m2)); #else int8_t buf[48]; for (size_t i = 0; i < 48 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_s8 #define vst3q_s8(a, b) simde_vst3q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_s16(ptr, val); #else simde_int16x8_private a_[3] = { simde_int16x8_to_private(val.val[0]), simde_int16x8_to_private(val.val[1]), simde_int16x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint16m1x3_t dest = __riscv_vlseg3e16_v_i16m1x3(ptr, 8); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i16m1_i16m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e16_v_i16m1x3 (ptr, dest, 8); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[0].values, a_[1].values, 0, 8, 3, 1, 9, 4, 2, 10); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(16, 16, r0, a_[2].values, 0, 1, 8, 3, 4, 9, 6, 7); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[2].values, a_[1].values, 2, 5, 11, 3, 6, 12, 4, 7); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(16, 16, r1, a_[0].values, 0, 11, 2, 3, 12, 5, 6, 13); simde_memcpy(&ptr[8], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[0].values, a_[2].values, 13, 6, 0, 14, 7, 0, 15, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(16, 16, r2, a_[1].values, 13, 0, 1, 14, 3, 4, 15, 6); simde_memcpy(&ptr[16], &m2, sizeof(m2)); #else int16_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_s16 #define vst3q_s16(a, b) simde_vst3q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_s32(ptr, val); #else simde_int32x4_private a_[3] = { simde_int32x4_to_private(val.val[0]), simde_int32x4_to_private(val.val[1]), simde_int32x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint32m1x3_t dest = __riscv_vlseg3e32_v_i32m1x3(ptr, 4); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i32m1_i32m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e32_v_i32m1x3 (ptr, dest, 4); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[0].values, a_[1].values, 0, 4, 1, 0); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(32, 16, r0, a_[2].values, 0, 1, 4, 2); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[1].values, a_[2].values, 1, 5, 2, 0); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(32, 16, r1, a_[0].values, 0, 1, 6, 2); simde_memcpy(&ptr[4], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[2].values, a_[0].values, 2, 7, 3, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(32, 16, r2, a_[1].values, 0, 1, 7, 2); simde_memcpy(&ptr[8], &m2, sizeof(m2)); #else int32_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_s32 #define vst3q_s32(a, b) simde_vst3q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst3q_s64(ptr, val); #else simde_int64x2_private a[3] = { simde_int64x2_to_private(val.val[0]), simde_int64x2_to_private(val.val[1]), simde_int64x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint64m1x3_t dest = __riscv_vlseg3e64_v_i64m1x3(ptr, 2); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 0, a[0].sv128); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 1, a[1].sv128); dest = __riscv_vset_v_i64m1_i64m1x3 (dest, 2, a[2].sv128); __riscv_vsseg3e64_v_i64m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else int64_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_s64 #define vst3q_s64(a, b) simde_vst3q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_uint8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_u8(ptr, val); #else simde_uint8x16_private a_[3] = {simde_uint8x16_to_private(val.val[0]), simde_uint8x16_to_private(val.val[1]), simde_uint8x16_to_private(val.val[2])}; #if defined(SIMDE_WASM_SIMD128_NATIVE) v128_t a = a_[0].v128; v128_t b = a_[1].v128; v128_t c = a_[2].v128; // r0 = [a0, b0, a6, a1, b1, a7, a2, b2, a8, a3, b3, a9, a4, b4, a10, a5] v128_t r0 = wasm_i8x16_shuffle(a, b, 0, 16, 6, 1, 17, 7, 2, 18, 8, 3, 19, 9, 4, 20, 10, 5); // m0 = [a0, b0, c0, a1, b1, c1, a2, b2, c2, a3, b3, c3, a4, b4, c4, a5] v128_t m0 = wasm_i8x16_shuffle(r0, c, 0, 1, 16, 3, 4, 17, 6, 7, 18, 9, 10, 19, 12, 13, 20, 15); wasm_v128_store(ptr, m0); // r1 = [b5, c5, b11, b6, c6, b12, b7, c7, b13, b8, c8, b14, b9, c9, b15, // b10] v128_t r1 = wasm_i8x16_shuffle(b, c, 5, 21, 11, 6, 22, 12, 7, 23, 13, 8, 24, 14, 9, 25, 15, 10); // m1 = [b5, c5, a6, b6, c6, a7, b7, c7, a8, b8, c8, a9, b9, c9, a10, b10] v128_t m1 = wasm_i8x16_shuffle(r1, r0, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); wasm_v128_store(ptr + 16, m1); // r2 = [c10, a11, X, c11, a12, X, c12, a13, X, c13, a14, X, c14, a15, X, // c15] v128_t r2 = wasm_i8x16_shuffle(c, a, 10, 27, 0, 11, 28, 0, 12, 29, 0, 13, 30, 0, 14, 31, 0, 15); // m2 = [c10, a11, b11, c11, a12, b12, c12, a13, b13, c13, a14, b14, c14, // a15, b15, c15] v128_t m2 = wasm_i8x16_shuffle(r2, r1, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); wasm_v128_store(ptr + 32, m2); #elif defined(SIMDE_RISCV_V_NATIVE) vuint8m1x3_t dest = __riscv_vlseg3e8_v_u8m1x3(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e8_v_u8m1x3 (ptr, dest, 16); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[0].values, a_[1].values, 0, 16, 6, 1, 17, 7, 2, 18, 8, 3, 19, 9, 4, 20, 10, 5); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(8, 16, r0, a_[2].values, 0, 1, 16, 3, 4, 17, 6, 7, 18, 9, 10, 19, 12, 13, 20, 15); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[1].values, a_[2].values, 5, 21, 11, 6, 22, 12, 7, 23, 13, 8, 24, 14, 9, 25, 15, 10); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(8, 16, r1, r0, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); simde_memcpy(&ptr[16], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(8, 16, a_[2].values, a_[0].values, 10, 27, 0, 11, 28, 0, 12, 29, 0, 13, 30, 0, 14, 31, 0, 15); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(8, 16, r2, r1, 0, 1, 18, 3, 4, 21, 6, 7, 24, 9, 10, 27, 12, 13, 30, 15); simde_memcpy(&ptr[32], &m2, sizeof(m2)); #else uint8_t buf[48]; for (size_t i = 0; i < 48 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_u8 #define vst3q_u8(a, b) simde_vst3q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_u16(ptr, val); #else simde_uint16x8_private a_[3] = { simde_uint16x8_to_private(val.val[0]), simde_uint16x8_to_private(val.val[1]), simde_uint16x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x3_t dest = __riscv_vlseg3e16_v_u16m1x3(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e16_v_u16m1x3 (ptr, dest, 8); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[0].values, a_[1].values, 0, 8, 3, 1, 9, 4, 2, 10); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(16, 16, r0, a_[2].values, 0, 1, 8, 3, 4, 9, 6, 7); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[2].values, a_[1].values, 2, 5, 11, 3, 6, 12, 4, 7); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(16, 16, r1, a_[0].values, 0, 11, 2, 3, 12, 5, 6, 13); simde_memcpy(&ptr[8], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(16, 16, a_[0].values, a_[2].values, 13, 6, 0, 14, 7, 0, 15, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(16, 16, r2, a_[1].values, 13, 0, 1, 14, 3, 4, 15, 6); simde_memcpy(&ptr[16], &m2, sizeof(m2)); #else uint16_t buf[24]; for (size_t i = 0; i < 24 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_u16 #define vst3q_u16(a, b) simde_vst3q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint32x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_u32(ptr, val); #else simde_uint32x4_private a_[3] = { simde_uint32x4_to_private(val.val[0]), simde_uint32x4_to_private(val.val[1]), simde_uint32x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint32m1x3_t dest = __riscv_vlseg3e32_v_u32m1x3(ptr, 4); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u32m1_u32m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e32_v_u32m1x3 (ptr, dest, 4); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a_[0].values) r0 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[0].values, a_[1].values, 0, 4, 1, 0); __typeof__(a_[0].values) m0 = SIMDE_SHUFFLE_VECTOR_(32, 16, r0, a_[2].values, 0, 1, 4, 2); simde_memcpy(ptr, &m0, sizeof(m0)); __typeof__(a_[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[1].values, a_[2].values, 1, 5, 2, 0); __typeof__(a_[0].values) m1 = SIMDE_SHUFFLE_VECTOR_(32, 16, r1, a_[0].values, 0, 1, 6, 2); simde_memcpy(&ptr[4], &m1, sizeof(m1)); __typeof__(a_[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(32, 16, a_[2].values, a_[0].values, 2, 7, 3, 0); __typeof__(a_[0].values) m2 = SIMDE_SHUFFLE_VECTOR_(32, 16, r2, a_[1].values, 0, 1, 7, 2); simde_memcpy(&ptr[8], &m2, sizeof(m2)); #else uint32_t buf[12]; for (size_t i = 0; i < 12 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_u32 #define vst3q_u32(a, b) simde_vst3q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst3q_u64(ptr, val); #else simde_uint64x2_private a[3] = { simde_uint64x2_to_private(val.val[0]), simde_uint64x2_to_private(val.val[1]), simde_uint64x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x3_t dest = __riscv_vlseg3e64_v_u64m1x3(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 0, a[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 1, a[1].sv128); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 2, a[2].sv128); __riscv_vsseg3e64_v_u64m1x3 (ptr, dest, 2); #elif defined(SIMDE_SHUFFLE_VECTOR_) __typeof__(a[0].values) r1 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[0].values, a[1].values, 0, 2); __typeof__(a[0].values) r2 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[2].values, a[0].values, 0, 3); __typeof__(a[0].values) r3 = SIMDE_SHUFFLE_VECTOR_(64, 16, a[1].values, a[2].values, 1, 3); simde_memcpy(ptr, &r1, sizeof(r1)); simde_memcpy(&ptr[2], &r2, sizeof(r2)); simde_memcpy(&ptr[4], &r3, sizeof(r3)); #else uint64_t buf[6]; for (size_t i = 0; i < 6 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_u64 #define vst3q_u64(a, b) simde_vst3q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_poly8x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_p8(ptr, val); #else simde_poly8x8_private a_[3] = { simde_poly8x8_to_private(val.val[0]), simde_poly8x8_to_private(val.val[1]), simde_poly8x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x3_t dest = __riscv_vlseg3e8_v_u8m1x3(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e8_v_u8m1x3 (ptr, dest, 8); #else simde_poly8_t buf[24]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_p8 #define vst3_p8(a, b) simde_vst3_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_poly16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3_p16(ptr, val); #else simde_poly16x4_private a_[3] = { simde_poly16x4_to_private(val.val[0]), simde_poly16x4_to_private(val.val[1]), simde_poly16x4_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x3_t dest = __riscv_vlseg3e16_v_u16m1x3(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e16_v_u16m1x3 (ptr, dest, 4); #else simde_poly16_t buf[12]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_p16 #define vst3_p16(a, b) simde_vst3_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly64x1x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst3_p64(ptr, val); #else simde_poly64x1_private a_[3] = { simde_poly64x1_to_private(val.val[0]), simde_poly64x1_to_private(val.val[1]), simde_poly64x1_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x3_t dest = __riscv_vlseg3e64_v_u64m1x3(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 2, a_[2].sv64); __riscv_vsseg3e64_v_u64m1x3 (ptr, dest, 1); #else simde_memcpy(ptr, &a_[0].values, sizeof(a_[0].values)); simde_memcpy(&ptr[1], &a_[1].values, sizeof(a_[1].values)); simde_memcpy(&ptr[2], &a_[2].values, sizeof(a_[2].values)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst3_p64 #define vst3_p64(a, b) simde_vst3_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_poly8x16x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst3q_p8(ptr, val); #else simde_poly8x16_private a_[3] = {simde_poly8x16_to_private(val.val[0]), simde_poly8x16_to_private(val.val[1]), simde_poly8x16_to_private(val.val[2])}; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x3_t dest = __riscv_vlseg3e8_v_u8m1x3(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u8m1_u8m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e8_v_u8m1x3 (ptr, dest, 16); #else simde_poly8_t buf[48]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_p8 #define vst3q_p8(a, b) simde_vst3q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_poly16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst3q_p16(ptr, val); #else simde_poly16x8_private a_[3] = { simde_poly16x8_to_private(val.val[0]), simde_poly16x8_to_private(val.val[1]), simde_poly16x8_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x3_t dest = __riscv_vlseg3e16_v_u16m1x3(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u16m1_u16m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e16_v_u16m1x3 (ptr, dest, 8); #else simde_poly16_t buf[24]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_p16 #define vst3q_p16(a, b) simde_vst3q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_poly64x2x3_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst3q_p64(ptr, val); #else simde_poly64x2_private a_[3] = { simde_poly64x2_to_private(val.val[0]), simde_poly64x2_to_private(val.val[1]), simde_poly64x2_to_private(val.val[2]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x3_t dest = __riscv_vlseg3e64_v_u64m1x3(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u64m1_u64m1x3 (dest, 2, a_[2].sv128); __riscv_vsseg3e64_v_u64m1x3 (ptr, dest, 2); #else simde_poly64_t buf[6]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_p64 #define vst3q_p64(a, b) simde_vst3q_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_bfloat16x4x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst3_bf16(ptr, val); #else simde_bfloat16x4_private a[3] = { simde_bfloat16x4_to_private(val.val[0]), simde_bfloat16x4_to_private(val.val[1]), simde_bfloat16x4_to_private(val.val[2]) }; simde_bfloat16_t buf[12]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst3_bf16 #define vst3_bf16(a, b) simde_vst3_bf16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_bfloat16x8x3_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst3q_bf16(ptr, val); #else simde_bfloat16x8_private a_[3] = { simde_bfloat16x8_to_private(val.val[0]), simde_bfloat16x8_to_private(val.val[1]), simde_bfloat16x8_to_private(val.val[2]) }; simde_bfloat16_t buf[24]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 3 ; i++) { buf[i] = a_[i % 3].values[i / 3]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst3q_bf16 #define vst3q_bf16(a, b) simde_vst3q_bf16((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST3_H) */ /* :: End simde/simde/arm/neon/st3.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st3_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST3_LANE_H) #define SIMDE_ARM_NEON_ST3_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int8x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_s8 #define vst3_lane_s8(a, b, c) simde_vst3_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int16x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_s16 #define vst3_lane_s16(a, b, c) simde_vst3_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int32x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_s32 #define vst3_lane_s32(a, b, c) simde_vst3_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst3_lane_s64(ptr, val, 0); #else simde_int64x1_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3_lane_s64 #define vst3_lane_s64(a, b, c) simde_vst3_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint8x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_u8 #define vst3_lane_u8(a, b, c) simde_vst3_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint16x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_u16 #define vst3_lane_u16(a, b, c) simde_vst3_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint32x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_u32 #define vst3_lane_u32(a, b, c) simde_vst3_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst3_lane_u64(ptr, val, 0); #else simde_uint64x1_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3_lane_u64 #define vst3_lane_u64(a, b, c) simde_vst3_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float16x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_4_NO_RESULT_(vst3_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_f16 #define vst3_lane_f16(a, b, c) simde_vst3_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float32x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_f32 #define vst3_lane_f32(a, b, c) simde_vst3_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst3_lane_f64(ptr, val, 0); #else simde_float64x1_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3_lane_f64 #define vst3_lane_f64(a, b, c) simde_vst3_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int8x16x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst3q_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x16_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_s8 #define vst3q_lane_s8(a, b, c) simde_vst3q_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int16x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3q_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_s16 #define vst3q_lane_s16(a, b, c) simde_vst3q_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int32x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3q_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_s32 #define vst3q_lane_s32(a, b, c) simde_vst3q_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3q_lane_s64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int64x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_int64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_s64 #define vst3q_lane_s64(a, b, c) simde_vst3q_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint8x16x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst3q_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x16_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_u8 #define vst3q_lane_u8(a, b, c) simde_vst3q_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint16x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3q_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_u16 #define vst3q_lane_u16(a, b, c) simde_vst3q_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint32x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3q_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_u32 #define vst3q_lane_u32(a, b, c) simde_vst3q_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3q_lane_u64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint64x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_uint64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_u64 #define vst3q_lane_u64(a, b, c) simde_vst3q_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float16x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_8_NO_RESULT_(vst3q_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_f16 #define vst3q_lane_f16(a, b, c) simde_vst3q_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float32x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3q_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_f32 #define vst3q_lane_f32(a, b, c) simde_vst3q_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x2x3_t val, const int lane){ //SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3q_lane_f64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float64x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_float64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_f64 #define vst3q_lane_f64(a, b, c) simde_vst3q_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly8x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_p8 #define vst3_lane_p8(a, b, c) simde_vst3_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly16x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst3_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3_lane_p16 #define vst3_lane_p16(a, b, c) simde_vst3_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly64x1x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) HEDLEY_STATIC_CAST(void, lane); vst3_lane_p64(ptr, val, 0); #else simde_poly64x1_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3_lane_p64 #define vst3_lane_p64(a, b, c) simde_vst3_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly8x16x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst3q_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x16_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_p8 #define vst3q_lane_p8(a, b, c) simde_vst3q_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly16x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst3q_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_p16 #define vst3q_lane_p16(a, b, c) simde_vst3q_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_poly64x2x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst3q_lane_p64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly64x2_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_poly64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_p64 #define vst3q_lane_p64(a, b, c) simde_vst3q_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_bfloat16x4x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_4_NO_RESULT_(vst3_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x4_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_bfloat16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst3_lane_bf16 #define vst3_lane_bf16(a, b, c) simde_vst3_lane_bf16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst3q_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_bfloat16x8x3_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_8_NO_RESULT_(vst3q_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x8_private r; for (size_t i = 0 ; i < 3 ; i++) { r = simde_bfloat16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst3q_lane_bf16 #define vst3q_lane_bf16(a, b, c) simde_vst3q_lane_bf16((a), (b), (c)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST3_LANE_H) */ /* :: End simde/simde/arm/neon/st3_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st4.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) * 2023 Chi-Wei Chu (Copyright owned by NTHU pllab) */ #if !defined(SIMDE_ARM_NEON_ST4_H) #define SIMDE_ARM_NEON_ST4_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_f16(simde_float16_t *ptr, simde_float16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst4_f16(ptr, val); #else simde_float16x4_private a_[4] = { simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1]), simde_float16x4_to_private(val.val[2]), simde_float16x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) vfloat16m1x4_t dest = __riscv_vlseg4e16_v_f16m1x4((_Float16 *)ptr, 4); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e16_v_f16m1x4 ((_Float16 *)ptr, dest, 4); #else simde_float16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_f16 #define vst4_f16(a, b) simde_vst4_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_f32(simde_float32_t *ptr, simde_float32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_f32(ptr, val); #else simde_float32x2_private a_[4] = { simde_float32x2_to_private(val.val[0]), simde_float32x2_to_private(val.val[1]), simde_float32x2_to_private(val.val[2]), simde_float32x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat32m1x4_t dest = __riscv_vlseg4e32_v_f32m1x4(ptr, 2); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e32_v_f32m1x4 (ptr, dest, 2); #else simde_float32_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_f32 #define vst4_f32(a, b) simde_vst4_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_f64(simde_float64_t *ptr, simde_float64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst4_f64(ptr, val); #else simde_float64x1_private a_[4] = { simde_float64x1_to_private(val.val[0]), simde_float64x1_to_private(val.val[1]), simde_float64x1_to_private(val.val[2]), simde_float64x1_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x4_t dest = __riscv_vlseg4e64_v_f64m1x4(ptr, 1); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e64_v_f64m1x4(ptr, dest, 1); #else simde_float64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4_f64 #define vst4_f64(a, b) simde_vst4_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_s8(int8_t *ptr, simde_int8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_s8(ptr, val); #else simde_int8x8_private a_[4] = { simde_int8x8_to_private(val.val[0]), simde_int8x8_to_private(val.val[1]), simde_int8x8_to_private(val.val[2]), simde_int8x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint8m1x4_t dest = __riscv_vlseg4e8_v_i8m1x4(ptr, 8); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e8_v_i8m1x4(ptr, dest, 8); #else int8_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_s8 #define vst4_s8(a, b) simde_vst4_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_s16(int16_t *ptr, simde_int16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_s16(ptr, val); #else simde_int16x4_private a_[4] = { simde_int16x4_to_private(val.val[0]), simde_int16x4_to_private(val.val[1]), simde_int16x4_to_private(val.val[2]), simde_int16x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint16m1x4_t dest = __riscv_vlseg4e16_v_i16m1x4(ptr, 4); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e16_v_i16m1x4 (ptr, dest, 4); #else int16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_s16 #define vst4_s16(a, b) simde_vst4_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_s32(int32_t *ptr, simde_int32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_s32(ptr, val); #else simde_int32x2_private a_[4] = { simde_int32x2_to_private(val.val[0]), simde_int32x2_to_private(val.val[1]), simde_int32x2_to_private(val.val[2]), simde_int32x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint32m1x4_t dest = __riscv_vlseg4e32_v_i32m1x4(ptr, 2); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e32_v_i32m1x4 (ptr, dest, 2); #else int32_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_s32 #define vst4_s32(a, b) simde_vst4_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_s64(int64_t *ptr, simde_int64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_s64(ptr, val); #else simde_int64x1_private a_[4] = { simde_int64x1_to_private(val.val[0]), simde_int64x1_to_private(val.val[1]), simde_int64x1_to_private(val.val[2]), simde_int64x1_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint64m1x4_t dest = __riscv_vlseg4e64_v_i64m1x4(ptr, 1); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e64_v_i64m1x4 (ptr, dest, 1); #else int64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_s64 #define vst4_s64(a, b) simde_vst4_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_u8(uint8_t *ptr, simde_uint8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_u8(ptr, val); #else simde_uint8x8_private a_[4] = { simde_uint8x8_to_private(val.val[0]), simde_uint8x8_to_private(val.val[1]), simde_uint8x8_to_private(val.val[2]), simde_uint8x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x4_t dest = __riscv_vlseg4e8_v_u8m1x4(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e8_v_u8m1x4 (ptr, dest, 8); #else uint8_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_u8 #define vst4_u8(a, b) simde_vst4_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_u16(uint16_t *ptr, simde_uint16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_u16(ptr, val); #else simde_uint16x4_private a_[4] = { simde_uint16x4_to_private(val.val[0]), simde_uint16x4_to_private(val.val[1]), simde_uint16x4_to_private(val.val[2]), simde_uint16x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x4_t dest = __riscv_vlseg4e16_v_u16m1x4(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e16_v_u16m1x4 (ptr, dest, 4); #else uint16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_u16 #define vst4_u16(a, b) simde_vst4_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_u32(uint32_t *ptr, simde_uint32x2x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_u32(ptr, val); #else simde_uint32x2_private a_[4] = { simde_uint32x2_to_private(val.val[0]), simde_uint32x2_to_private(val.val[1]), simde_uint32x2_to_private(val.val[2]), simde_uint32x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint32m1x4_t dest = __riscv_vlseg4e32_v_u32m1x4(ptr, 2); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e32_v_u32m1x4 (ptr, dest, 2); #else uint32_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_u32 #define vst4_u32(a, b) simde_vst4_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_u64(uint64_t *ptr, simde_uint64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_u64(ptr, val); #else simde_uint64x1_private a_[4] = { simde_uint64x1_to_private(val.val[0]), simde_uint64x1_to_private(val.val[1]), simde_uint64x1_to_private(val.val[2]), simde_uint64x1_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x4_t dest = __riscv_vlseg4e64_v_u64m1x4(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e64_v_u64m1x4 (ptr, dest, 1); #else uint64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_u64 #define vst4_u64(a, b) simde_vst4_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_f16(simde_float16_t *ptr, simde_float16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) vst4q_f16(ptr, val); #else simde_float16x8_private a_[4] = { simde_float16x8_to_private(val.val[0]), simde_float16x8_to_private(val.val[1]), simde_float16x8_to_private(val.val[2]), simde_float16x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH && (SIMDE_NATURAL_VECTOR_SIZE >= 128) vfloat16m1x4_t dest = __riscv_vlseg4e16_v_f16m1x4((_Float16 *)ptr, 8); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_f16m1_f16m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e16_v_f16m1x4 ((_Float16 *)ptr, dest, 8); #else simde_float16_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_f16 #define vst4q_f16(a, b) simde_vst4q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_f32(simde_float32_t *ptr, simde_float32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_f32(ptr, val); #else simde_float32x4_private a_[4] = { simde_float32x4_to_private(val.val[0]), simde_float32x4_to_private(val.val[1]), simde_float32x4_to_private(val.val[2]), simde_float32x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat32m1x4_t dest = __riscv_vlseg4e32_v_f32m1x4(ptr, 4); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_f32m1_f32m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e32_v_f32m1x4 (ptr, dest, 4); #else simde_float32_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_f32 #define vst4q_f32(a, b) simde_vst4q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_f64(simde_float64_t *ptr, simde_float64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst4q_f64(ptr, val); #else simde_float64x2_private a_[4] = { simde_float64x2_to_private(val.val[0]), simde_float64x2_to_private(val.val[1]), simde_float64x2_to_private(val.val[2]), simde_float64x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vfloat64m1x4_t dest = __riscv_vlseg4e64_v_f64m1x4(ptr, 2); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_f64m1_f64m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e64_v_f64m1x4 (ptr, dest, 2); #else simde_float64_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_f64 #define vst4q_f64(a, b) simde_vst4q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_s8(int8_t *ptr, simde_int8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_s8(ptr, val); #else simde_int8x16_private a_[4] = { simde_int8x16_to_private(val.val[0]), simde_int8x16_to_private(val.val[1]), simde_int8x16_to_private(val.val[2]), simde_int8x16_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint8m1x4_t dest = __riscv_vlseg4e8_v_i8m1x4(ptr, 16); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_i8m1_i8m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e8_v_i8m1x4 (ptr, dest, 16); #else int8_t buf[64]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_s8 #define vst4q_s8(a, b) simde_vst4q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_s16(int16_t *ptr, simde_int16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_s16(ptr, val); #else simde_int16x8_private a_[4] = { simde_int16x8_to_private(val.val[0]), simde_int16x8_to_private(val.val[1]), simde_int16x8_to_private(val.val[2]), simde_int16x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint16m1x4_t dest = __riscv_vlseg4e16_v_i16m1x4(ptr, 8); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_i16m1_i16m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e16_v_i16m1x4 (ptr, dest, 8); #else int16_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_s16 #define vst4q_s16(a, b) simde_vst4q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_s32(int32_t *ptr, simde_int32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_s32(ptr, val); #else simde_int32x4_private a_[4] = { simde_int32x4_to_private(val.val[0]), simde_int32x4_to_private(val.val[1]), simde_int32x4_to_private(val.val[2]), simde_int32x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint32m1x4_t dest = __riscv_vlseg4e32_v_i32m1x4(ptr, 4); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_i32m1_i32m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e32_v_i32m1x4 (ptr, dest, 4); #else int32_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_s32 #define vst4q_s32(a, b) simde_vst4q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_s64(int64_t *ptr, simde_int64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst4q_s64(ptr, val); #else simde_int64x2_private a_[4] = { simde_int64x2_to_private(val.val[0]), simde_int64x2_to_private(val.val[1]), simde_int64x2_to_private(val.val[2]), simde_int64x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vint64m1x4_t dest = __riscv_vlseg4e64_v_i64m1x4(ptr, 2); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_i64m1_i64m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e64_v_i64m1x4 (ptr, dest, 2); #else int64_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_s64 #define vst4q_s64(a, b) simde_vst4q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_u8(uint8_t *ptr, simde_uint8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_u8(ptr, val); #else simde_uint8x16_private a_[4] = { simde_uint8x16_to_private(val.val[0]), simde_uint8x16_to_private(val.val[1]), simde_uint8x16_to_private(val.val[2]), simde_uint8x16_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x4_t dest = __riscv_vlseg4e8_v_u8m1x4(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e8_v_u8m1x4 (ptr, dest, 16); #else uint8_t buf[64]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_u8 #define vst4q_u8(a, b) simde_vst4q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_u16(uint16_t *ptr, simde_uint16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_u16(ptr, val); #else simde_uint16x8_private a_[4] = { simde_uint16x8_to_private(val.val[0]), simde_uint16x8_to_private(val.val[1]), simde_uint16x8_to_private(val.val[2]), simde_uint16x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x4_t dest = __riscv_vlseg4e16_v_u16m1x4(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e16_v_u16m1x4 (ptr, dest, 8); #else uint16_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_u16 #define vst4q_u16(a, b) simde_vst4q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_u32(uint32_t *ptr, simde_uint32x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_u32(ptr, val); #else simde_uint32x4_private a_[4] = { simde_uint32x4_to_private(val.val[0]), simde_uint32x4_to_private(val.val[1]), simde_uint32x4_to_private(val.val[2]), simde_uint32x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint32m1x4_t dest = __riscv_vlseg4e32_v_u32m1x4(ptr, 4); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u32m1_u32m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e32_v_u32m1x4 (ptr, dest, 4); #else uint32_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_u32 #define vst4q_u32(a, b) simde_vst4q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_u64(uint64_t *ptr, simde_uint64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst4q_u64(ptr, val); #else simde_uint64x2_private a_[4] = { simde_uint64x2_to_private(val.val[0]), simde_uint64x2_to_private(val.val[1]), simde_uint64x2_to_private(val.val[2]), simde_uint64x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x4_t dest = __riscv_vlseg4e64_v_u64m1x4(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e64_v_u64m1x4 (ptr, dest, 2); #else uint64_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_u64 #define vst4q_u64(a, b) simde_vst4q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_p8(simde_poly8_t *ptr, simde_poly8x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_p8(ptr, val); #else simde_poly8x8_private a_[4] = { simde_poly8x8_to_private(val.val[0]), simde_poly8x8_to_private(val.val[1]), simde_poly8x8_to_private(val.val[2]), simde_poly8x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x4_t dest = __riscv_vlseg4e8_v_u8m1x4(ptr, 8); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e8_v_u8m1x4 (ptr, dest, 8); #else simde_poly8_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_p8 #define vst4_p8(a, b) simde_vst4_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_p16(simde_poly16_t *ptr, simde_poly16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4_p16(ptr, val); #else simde_poly16x4_private a_[4] = { simde_poly16x4_to_private(val.val[0]), simde_poly16x4_to_private(val.val[1]), simde_poly16x4_to_private(val.val[2]), simde_poly16x4_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x4_t dest = __riscv_vlseg4e16_v_u16m1x4(ptr, 4); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e16_v_u16m1x4 (ptr, dest, 4); #else simde_poly16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_p16 #define vst4_p16(a, b) simde_vst4_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_p64(simde_poly64_t *ptr, simde_poly64x1x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) vst4_p64(ptr, val); #else simde_poly64x1_private a_[4] = { simde_poly64x1_to_private(val.val[0]), simde_poly64x1_to_private(val.val[1]), simde_poly64x1_to_private(val.val[2]), simde_poly64x1_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x4_t dest = __riscv_vlseg4e64_v_u64m1x4(ptr, 1); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 0, a_[0].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 1, a_[1].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 2, a_[2].sv64); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 3, a_[3].sv64); __riscv_vsseg4e64_v_u64m1x4 (ptr, dest, 1); #else simde_poly64_t buf[4]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst4_p64 #define vst4_p64(a, b) simde_vst4_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_p8(simde_poly8_t *ptr, simde_poly8x16x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_p8(ptr, val); #else simde_poly8x16_private a_[4] = { simde_poly8x16_to_private(val.val[0]), simde_poly8x16_to_private(val.val[1]), simde_poly8x16_to_private(val.val[2]), simde_poly8x16_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint8m1x4_t dest = __riscv_vlseg4e8_v_u8m1x4(ptr, 16); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u8m1_u8m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e8_v_u8m1x4 (ptr, dest, 16); #else simde_poly8_t buf[64]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_p8 #define vst4q_p8(a, b) simde_vst4q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_p16(simde_poly16_t *ptr, simde_poly16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) vst4q_p16(ptr, val); #else simde_poly16x8_private a_[4] = { simde_poly16x8_to_private(val.val[0]), simde_poly16x8_to_private(val.val[1]), simde_poly16x8_to_private(val.val[2]), simde_poly16x8_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint16m1x4_t dest = __riscv_vlseg4e16_v_u16m1x4(ptr, 8); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u16m1_u16m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e16_v_u16m1x4 (ptr, dest, 8); #else simde_poly16_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_p16 #define vst4q_p16(a, b) simde_vst4q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_p64(simde_poly64_t *ptr, simde_poly64x2x4_t val) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst4q_p64(ptr, val); #else simde_poly64x2_private a_[4] = { simde_poly64x2_to_private(val.val[0]), simde_poly64x2_to_private(val.val[1]), simde_poly64x2_to_private(val.val[2]), simde_poly64x2_to_private(val.val[3]) }; #if defined(SIMDE_RISCV_V_NATIVE) vuint64m1x4_t dest = __riscv_vlseg4e64_v_u64m1x4(ptr, 2); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 0, a_[0].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 1, a_[1].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 2, a_[2].sv128); dest = __riscv_vset_v_u64m1_u64m1x4 (dest, 3, a_[3].sv128); __riscv_vsseg4e64_v_u64m1x4 (ptr, dest, 2); #else simde_poly64_t buf[8]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_p64 #define vst4q_p64(a, b) simde_vst4q_p64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_bf16(simde_bfloat16_t *ptr, simde_bfloat16x4x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst4_bf16(ptr, val); #else simde_bfloat16x4_private a_[4] = { simde_bfloat16x4_to_private(val.val[0]), simde_bfloat16x4_to_private(val.val[1]), simde_bfloat16x4_to_private(val.val[2]), simde_bfloat16x4_to_private(val.val[3]) }; simde_bfloat16_t buf[16]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst4_bf16 #define vst4_bf16(a, b) simde_vst4_bf16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_bf16(simde_bfloat16_t *ptr, simde_bfloat16x8x4_t val) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) vst4q_bf16(ptr, val); #else simde_bfloat16x8_private a_[4] = { simde_bfloat16x8_to_private(val.val[0]), simde_bfloat16x8_to_private(val.val[1]), simde_bfloat16x8_to_private(val.val[2]), simde_bfloat16x8_to_private(val.val[3]) }; simde_bfloat16_t buf[32]; for (size_t i = 0; i < (sizeof(val.val[0]) / sizeof(*ptr)) * 4 ; i++) { buf[i] = a_[i % 4].values[i / 4]; } simde_memcpy(ptr, buf, sizeof(buf)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst4q_bf16 #define vst4q_bf16(a, b) simde_vst4q_bf16((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST4_H) */ /* :: End simde/simde/arm/neon/st4.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/st4_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Evan Nemerson * 2021 Zhi An Ng (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST4_LANE_H) #define SIMDE_ARM_NEON_ST4_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int8x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_s8 #define vst4_lane_s8(a, b, c) simde_vst4_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int16x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_s16 #define vst4_lane_s16(a, b, c) simde_vst4_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_s32 #define vst4_lane_s32(a, b, c) simde_vst4_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst4_lane_s64(ptr, val, 0); #else simde_int64x1_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4_lane_s64 #define vst4_lane_s64(a, b, c) simde_vst4_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint8x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_u8 #define vst4_lane_u8(a, b, c) simde_vst4_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint16x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_u16 #define vst4_lane_u16(a, b, c) simde_vst4_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_u32 #define vst4_lane_u32(a, b, c) simde_vst4_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst4_lane_u64(ptr, val, 0); #else simde_uint64x1_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4_lane_u64 #define vst4_lane_u64(a, b, c) simde_vst4_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_float16x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } } #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) #define simde_vst4_lane_f16(a, b, c) vst4_lane_f16((a), (b), (c)) #endif #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_f16 #define vst4_lane_f16(a, b, c) simde_vst4_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float32x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_f32 #define vst4_lane_f32(a, b, c) simde_vst4_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst4_lane_f64(ptr, val, 0); #else simde_float64x1_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4_lane_f64 #define vst4_lane_f64(a, b, c) simde_vst4_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_s8(int8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int8x16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst4q_lane_s8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int8x16_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_s8 #define vst4q_lane_s8(a, b, c) simde_vst4q_lane_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_s16(int16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int16x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4q_lane_s16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int16x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_s16 #define vst4q_lane_s16(a, b, c) simde_vst4q_lane_s16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_s32(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4q_lane_s32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int32x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_s32 #define vst4q_lane_s32(a, b, c) simde_vst4q_lane_s32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_s64(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4q_lane_s64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_int64x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_int64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_s64 #define vst4q_lane_s64(a, b, c) simde_vst4q_lane_s64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_u8(uint8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint8x16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst4q_lane_u8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint8x16_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_u8 #define vst4q_lane_u8(a, b, c) simde_vst4q_lane_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_u16(uint16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint16x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4q_lane_u16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint16x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_u16 #define vst4q_lane_u16(a, b, c) simde_vst4q_lane_u16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_u32(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4q_lane_u32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint32x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_u32 #define vst4q_lane_u32(a, b, c) simde_vst4q_lane_u32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_u64(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4q_lane_u64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_uint64x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_uint64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_u64 #define vst4q_lane_u64(a, b, c) simde_vst4q_lane_u64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) SIMDE_CONSTIFY_8_NO_RESULT_(vst4q_lane_f16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float16x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_f16 #define vst4q_lane_f16(a, b, c) simde_vst4q_lane_f16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_f32(simde_float32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4q_lane_f32, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_float32x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float32x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_f32 #define vst4q_lane_f32(a, b, c) simde_vst4q_lane_f32((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_f64(simde_float64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst4q_lane_f64(ptr, val, 0); #else simde_float64x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_float64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_f64 #define vst4q_lane_f64(a, b, c) simde_vst4q_lane_f64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly8x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly8x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_p8 #define vst4_lane_p8(a, b, c) simde_vst4_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly16x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_4_NO_RESULT_(vst4_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4_lane_p16 #define vst4_lane_p16(a, b, c) simde_vst4_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly64x1x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) (void) lane; vst4_lane_p64(ptr, val, 0); #else simde_poly64x1_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly64x1_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4_lane_p64 #define vst4_lane_p64(a, b, c) simde_vst4_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_p8(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly8x16x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_16_NO_RESULT_(vst4q_lane_p8, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly8x16_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly8x16_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_p8 #define vst4q_lane_p8(a, b, c) simde_vst4q_lane_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_p16(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly16x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) SIMDE_CONSTIFY_8_NO_RESULT_(vst4q_lane_p16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly16x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_p16 #define vst4q_lane_p16(a, b, c) simde_vst4q_lane_p16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_p64(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly64x2x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) SIMDE_CONSTIFY_2_NO_RESULT_(vst4q_lane_p64, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_poly64x2_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_poly64x2_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_p64 #define vst4q_lane_p64(a, b, c) simde_vst4q_lane_p64((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_bfloat16x4x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_4_NO_RESULT_(vst4_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x4_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_bfloat16x4_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst4_lane_bf16 #define vst4_lane_bf16(a, b, c) simde_vst4_lane_bf16((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst4q_lane_bf16(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_bfloat16x8x4_t val, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16) SIMDE_CONSTIFY_8_NO_RESULT_(vst4q_lane_bf16, HEDLEY_UNREACHABLE(), lane, ptr, val); #else simde_bfloat16x8_private r; for (size_t i = 0 ; i < 4 ; i++) { r = simde_bfloat16x8_to_private(val.val[i]); ptr[i] = r.values[lane]; } #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vst4q_lane_bf16 #define vst4q_lane_bf16(a, b, c) simde_vst4q_lane_bf16((a), (b), (c)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_ST4_LANE_H) */ /* :: End simde/simde/arm/neon/st4_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/subhn.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Evan Nemerson */ #if !defined(SIMDE_ARM_NEON_SUBHN_H) #define SIMDE_ARM_NEON_SUBHN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vsubhn_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_s16(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_int8x8_private r_; simde_int8x16_private tmp_ = simde_int8x16_to_private( simde_vreinterpretq_s8_s16( simde_vsubq_s16(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3, 5, 7, 9, 11, 13, 15); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2, 4, 6, 8, 10, 12, 14); #endif return simde_int8x8_from_private(r_); #else return simde_vmovn_s16(simde_vshrq_n_s16(simde_vsubq_s16(a, b), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_s16 #define vsubhn_s16(a, b) simde_vsubhn_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vsubhn_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_s32(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_int16x4_private r_; simde_int16x8_private tmp_ = simde_int16x8_to_private( simde_vreinterpretq_s16_s32( simde_vsubq_s32(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3, 5, 7); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2, 4, 6); #endif return simde_int16x4_from_private(r_); #else return simde_vmovn_s32(simde_vshrq_n_s32(simde_vsubq_s32(a, b), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_s32 #define vsubhn_s32(a, b) simde_vsubhn_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vsubhn_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_s64(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_int32x2_private r_; simde_int32x4_private tmp_ = simde_int32x4_to_private( simde_vreinterpretq_s32_s64( simde_vsubq_s64(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2); #endif return simde_int32x2_from_private(r_); #else return simde_vmovn_s64(simde_vshrq_n_s64(simde_vsubq_s64(a, b), 32)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_s64 #define vsubhn_s64(a, b) simde_vsubhn_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vsubhn_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_u16(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_uint8x8_private r_; simde_uint8x16_private tmp_ = simde_uint8x16_to_private( simde_vreinterpretq_u8_u16( simde_vsubq_u16(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3, 5, 7, 9, 11, 13, 15); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2, 4, 6, 8, 10, 12, 14); #endif return simde_uint8x8_from_private(r_); #else return simde_vmovn_u16(simde_vshrq_n_u16(simde_vsubq_u16(a, b), 8)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_u16 #define vsubhn_u16(a, b) simde_vsubhn_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vsubhn_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_u32(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_uint16x4_private r_; simde_uint16x8_private tmp_ = simde_uint16x8_to_private( simde_vreinterpretq_u16_u32( simde_vsubq_u32(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3, 5, 7); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2, 4, 6); #endif return simde_uint16x4_from_private(r_); #else return simde_vmovn_u32(simde_vshrq_n_u32(simde_vsubq_u32(a, b), 16)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_u32 #define vsubhn_u32(a, b) simde_vsubhn_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vsubhn_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubhn_u64(a, b); #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && HEDLEY_HAS_BUILTIN(__builtin_shufflevector) simde_uint32x2_private r_; simde_uint32x4_private tmp_ = simde_uint32x4_to_private( simde_vreinterpretq_u32_u64( simde_vsubq_u64(a, b) ) ); #if SIMDE_ENDIAN_ORDER == SIMDE_ENDIAN_LITTLE r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 1, 3); #else r_.values = __builtin_shufflevector(tmp_.values, tmp_.values, 0, 2); #endif return simde_uint32x2_from_private(r_); #else return simde_vmovn_u64(simde_vshrq_n_u64(simde_vsubq_u64(a, b), 32)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubhn_u64 #define vsubhn_u64(a, b) simde_vsubhn_u64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUBHN_H) */ /* :: End simde/simde/arm/neon/subhn.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/subhn_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SUBHN_HIGH_H) #define SIMDE_ARM_NEON_SUBHN_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_s16(r, a, b) vsubhn_high_s16((r), (a), (b)) #else #define simde_vsubhn_high_s16(r, a, b) simde_vcombine_s8(r, simde_vsubhn_s16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_s16 #define vsubhn_high_s16(r, a, b) simde_vsubhn_high_s16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_s32(r, a, b) vsubhn_high_s32((r), (a), (b)) #else #define simde_vsubhn_high_s32(r, a, b) simde_vcombine_s16(r, simde_vsubhn_s32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_s32 #define vsubhn_high_s32(r, a, b) simde_vsubhn_high_s32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_s64(r, a, b) vsubhn_high_s64((r), (a), (b)) #else #define simde_vsubhn_high_s64(r, a, b) simde_vcombine_s32(r, simde_vsubhn_s64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_s64 #define vsubhn_high_s64(r, a, b) simde_vsubhn_high_s64((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_u16(r, a, b) vsubhn_high_u16((r), (a), (b)) #else #define simde_vsubhn_high_u16(r, a, b) simde_vcombine_u8(r, simde_vsubhn_u16(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_u16 #define vsubhn_high_u16(r, a, b) simde_vsubhn_high_u16((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_u32(r, a, b) vsubhn_high_u32((r), (a), (b)) #else #define simde_vsubhn_high_u32(r, a, b) simde_vcombine_u16(r, simde_vsubhn_u32(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_u32 #define vsubhn_high_u32(r, a, b) simde_vsubhn_high_u32((r), (a), (b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #define simde_vsubhn_high_u64(r, a, b) vsubhn_high_u64((r), (a), (b)) #else #define simde_vsubhn_high_u64(r, a, b) simde_vcombine_u32(r, simde_vsubhn_u64(a, b)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubhn_high_u64 #define vsubhn_high_u64(r, a, b) simde_vsubhn_high_u64((r), (a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUBHN_HIGH_H) */ /* :: End simde/simde/arm/neon/subhn_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/subl_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Décio Luiz Gazzoni Filho */ #if !defined(SIMDE_ARM_NEON_SUBL_HIGH_H) #define SIMDE_ARM_NEON_SUBL_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vsubl_high_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_s8(a, b); #else return simde_vsubq_s16(simde_vmovl_high_s8(a), simde_vmovl_high_s8(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_s8 #define vsubl_high_s8(a, b) simde_vsubl_high_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsubl_high_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_s16(a, b); #else return simde_vsubq_s32(simde_vmovl_high_s16(a), simde_vmovl_high_s16(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_s16 #define vsubl_high_s16(a, b) simde_vsubl_high_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vsubl_high_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_s32(a, b); #else return simde_vsubq_s64(simde_vmovl_high_s32(a), simde_vmovl_high_s32(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_s32 #define vsubl_high_s32(a, b) simde_vsubl_high_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vsubl_high_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_u8(a, b); #else return simde_vsubq_u16(simde_vmovl_high_u8(a), simde_vmovl_high_u8(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_u8 #define vsubl_high_u8(a, b) simde_vsubl_high_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsubl_high_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_u16(a, b); #else return simde_vsubq_u32(simde_vmovl_high_u16(a), simde_vmovl_high_u16(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_u16 #define vsubl_high_u16(a, b) simde_vsubl_high_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsubl_high_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubl_high_u32(a, b); #else return simde_vsubq_u64(simde_vmovl_high_u32(a), simde_vmovl_high_u32(b)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubl_high_u32 #define vsubl_high_u32(a, b) simde_vsubl_high_u32((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUBL_HIGH_H) */ /* :: End simde/simde/arm/neon/subl_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/subw.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson */ #if !defined(SIMDE_ARM_NEON_SUBW_H) #define SIMDE_ARM_NEON_SUBW_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vsubw_s8(simde_int16x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_s8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s16(a, simde_vmovl_s8(b)); #else simde_int16x8_private r_; simde_int16x8_private a_ = simde_int16x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_s8 #define vsubw_s8(a, b) simde_vsubw_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsubw_s16(simde_int32x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_s16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s32(a, simde_vmovl_s16(b)); #else simde_int32x4_private r_; simde_int32x4_private a_ = simde_int32x4_to_private(a); simde_int16x4_private b_ = simde_int16x4_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_s16 #define vsubw_s16(a, b) simde_vsubw_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vsubw_s32(simde_int64x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_s32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s64(a, simde_vmovl_s32(b)); #else simde_int64x2_private r_; simde_int64x2_private a_ = simde_int64x2_to_private(a); simde_int32x2_private b_ = simde_int32x2_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_s32 #define vsubw_s32(a, b) simde_vsubw_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vsubw_u8(simde_uint16x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_u8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u16(a, simde_vmovl_u8(b)); #else simde_uint16x8_private r_; simde_uint16x8_private a_ = simde_uint16x8_to_private(a); simde_uint8x8_private b_ = simde_uint8x8_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_u8 #define vsubw_u8(a, b) simde_vsubw_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsubw_u16(simde_uint32x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_u16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u32(a, simde_vmovl_u16(b)); #else simde_uint32x4_private r_; simde_uint32x4_private a_ = simde_uint32x4_to_private(a); simde_uint16x4_private b_ = simde_uint16x4_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_u16 #define vsubw_u16(a, b) simde_vsubw_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsubw_u32(simde_uint64x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vsubw_u32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u64(a, simde_vmovl_u32(b)); #else simde_uint64x2_private r_; simde_uint64x2_private a_ = simde_uint64x2_to_private(a); simde_uint32x2_private b_ = simde_uint32x2_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i]; } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vsubw_u32 #define vsubw_u32(a, b) simde_vsubw_u32((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUBW_H) */ /* :: End simde/simde/arm/neon/subw.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/subw_high.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson */ #if !defined(SIMDE_ARM_NEON_SUBW_HIGH_H) #define SIMDE_ARM_NEON_SUBW_HIGH_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vsubw_high_s8(simde_int16x8_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_s8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s16(a, simde_vmovl_high_s8(b)); #else simde_int16x8_private r_; simde_int16x8_private a_ = simde_int16x8_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_s8 #define vsubw_high_s8(a, b) simde_vsubw_high_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsubw_high_s16(simde_int32x4_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_s16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s32(a, simde_vmovl_high_s16(b)); #else simde_int32x4_private r_; simde_int32x4_private a_ = simde_int32x4_to_private(a); simde_int16x8_private b_ = simde_int16x8_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_s16 #define vsubw_high_s16(a, b) simde_vsubw_high_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vsubw_high_s32(simde_int64x2_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_s32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_s64(a, simde_vmovl_high_s32(b)); #else simde_int64x2_private r_; simde_int64x2_private a_ = simde_int64x2_to_private(a); simde_int32x4_private b_ = simde_int32x4_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_s32 #define vsubw_high_s32(a, b) simde_vsubw_high_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vsubw_high_u8(simde_uint16x8_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_u8(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u16(a, simde_vmovl_high_u8(b)); #else simde_uint16x8_private r_; simde_uint16x8_private a_ = simde_uint16x8_to_private(a); simde_uint8x16_private b_ = simde_uint8x16_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_u8 #define vsubw_high_u8(a, b) simde_vsubw_high_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vsubw_high_u16(simde_uint32x4_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_u16(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u32(a, simde_vmovl_high_u16(b)); #else simde_uint32x4_private r_; simde_uint32x4_private a_ = simde_uint32x4_to_private(a); simde_uint16x8_private b_ = simde_uint16x8_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_u16 #define vsubw_high_u16(a, b) simde_vsubw_high_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vsubw_high_u32(simde_uint64x2_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vsubw_high_u32(a, b); #elif SIMDE_NATURAL_VECTOR_SIZE_GE(128) return simde_vsubq_u64(a, simde_vmovl_high_u32(b)); #else simde_uint64x2_private r_; simde_uint64x2_private a_ = simde_uint64x2_to_private(a); simde_uint32x4_private b_ = simde_uint32x4_to_private(b); #if (SIMDE_NATURAL_VECTOR_SIZE > 0) && defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && defined(SIMDE_CONVERT_VECTOR_) SIMDE_CONVERT_VECTOR_(r_.values, b_.values); r_.values -= a_.values; #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = a_.values[i] - b_.values[i + ((sizeof(b_.values) / sizeof(b_.values[0])) / 2)]; } #endif return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsubw_high_u32 #define vsubw_high_u32(a, b) simde_vsubw_high_u32((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUBW_HIGH_H) */ /* :: End simde/simde/arm/neon/subw_high.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/sudot_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_SUDOT_LANE_H) #define SIMDE_ARM_NEON_SUDOT_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vsudot_lane_s32(simde_int32x2_t r, simde_int8x8_t a, simde_uint8x8_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int32x2_t result; simde_int32x2_private r_ = simde_int32x2_to_private(r); simde_int8x8_private a_ = simde_int8x8_to_private(a); simde_uint8x8_private b_ = simde_uint8x8_to_private(b); for (int i = 0 ; i < 2 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x2_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) #define simde_vsudot_lane_s32(r, a, b, lane) vsudot_lane_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsudot_lane_s32 #define vsudot_lane_s32(r, a, b, lane) simde_vsudot_lane_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vsudot_laneq_s32(simde_int32x2_t r, simde_int8x8_t a, simde_uint8x16_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int32x2_t result; simde_int32x2_private r_ = simde_int32x2_to_private(r); simde_int8x8_private a_ = simde_int8x8_to_private(a); simde_uint8x16_private b_ = simde_uint8x16_to_private(b); for (int i = 0 ; i < 2 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x2_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) #define simde_vsudot_laneq_s32(r, a, b, lane) vsudot_laneq_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsudot_laneq_s32 #define vsudot_laneq_s32(r, a, b, lane) simde_vsudot_laneq_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsudotq_laneq_s32(simde_int32x4_t r, simde_int8x16_t a, simde_uint8x16_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int32x4_t result; simde_int32x4_private r_ = simde_int32x4_to_private(r); simde_int8x16_private a_ = simde_int8x16_to_private(a); simde_uint8x16_private b_ = simde_uint8x16_to_private(b); for(int i = 0 ; i < 4 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for(int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x4_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) #define simde_vsudotq_laneq_s32(r, a, b, lane) vsudotq_laneq_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vsudotq_laneq_s32 #define vsudotq_laneq_s32(r, a, b, lane) simde_vsudotq_laneq_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vsudotq_lane_s32(simde_int32x4_t r, simde_int8x16_t a, simde_uint8x8_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int32x4_t result; simde_int32x4_private r_ = simde_int32x4_to_private(r); simde_int8x16_private a_ = simde_int8x16_to_private(a); simde_uint8x8_private b_ = simde_uint8x8_to_private(b); for(int i = 0 ; i < 4 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for(int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x4_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) #define simde_vsudotq_lane_s32(r, a, b, lane) vsudotq_lane_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vsudotq_lane_s32 #define vsudotq_lane_s32(r, a, b, lane) simde_vsudotq_lane_s32((r), (a), (b), (lane)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_SUDOT_LANE_H) */ /* :: End simde/simde/arm/neon/sudot_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/tbl.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TBL_H) #define SIMDE_ARM_NEON_TBL_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbl1_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl1_u8(a, b); #elif defined(SIMDE_WASM_SIMD128_NATIVE) simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(simde_vcombine_u8(a, a)), b_ = simde_uint8x16_to_private(simde_vcombine_u8(b, b)); r_.v128 = wasm_i8x16_swizzle(a_.v128, b_.v128); r_.v128 = wasm_v128_and(r_.v128, wasm_u8x16_lt(b_.v128, wasm_i8x16_splat(8))); return simde_vget_low_u8(simde_uint8x16_from_private(r_)); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) r_.m64 = _mm_shuffle_pi8(a_.m64, _mm_or_si64(b_.m64, _mm_cmpgt_pi8(b_.m64, _mm_set1_pi8(7)))); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (b_.values[i] < 8) ? a_.values[b_.values[i]] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl1_u8 #define vtbl1_u8(a, b) simde_vtbl1_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbl1_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl1_s8(a, b); #else return simde_vreinterpret_s8_u8(simde_vtbl1_u8(simde_vreinterpret_u8_s8(a), simde_vreinterpret_u8_s8(b))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl1_s8 #define vtbl1_s8(a, b) simde_vtbl1_s8((a), (b)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbl2_u8(simde_uint8x8x2_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl2_u8(a, b); #else simde_uint8x8_private r_, a_[2] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]) }, b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_set_epi64(a_[1].m64, a_[0].m64); __m128i b128 = _mm_set1_epi64(b_.m64); __m128i r128 = _mm_shuffle_epi8(a128, _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(15)))); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (b_.values[i] < 16) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl2_u8 #define vtbl2_u8(a, b) simde_vtbl2_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbl2_s8(simde_int8x8x2_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl2_s8(a, b); #else simde_uint8x8x2_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_s8_u8(simde_vtbl2_u8(a_, simde_vreinterpret_u8_s8(b))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl2_s8 #define vtbl2_s8(a, b) simde_vtbl2_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbl3_u8(simde_uint8x8x3_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl3_u8(a, b); #else simde_uint8x8_private r_, a_[3] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]), simde_uint8x8_to_private(a.val[2]) }, b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i b128 = _mm_set1_epi64(b_.m64); b128 = _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(23))); __m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(a_[1].m64, a_[0].m64), b128); __m128i r128_2 = _mm_shuffle_epi8(_mm_set1_epi64(a_[2].m64), b128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_2, _mm_slli_epi32(b128, 3)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (b_.values[i] < 24) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl3_u8 #define vtbl3_u8(a, b) simde_vtbl3_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbl3_s8(simde_int8x8x3_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl3_s8(a, b); #else simde_uint8x8x3_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_s8_u8(simde_vtbl3_u8(a_, simde_vreinterpret_u8_s8(b))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl3_s8 #define vtbl3_s8(a, b) simde_vtbl3_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbl4_u8(simde_uint8x8x4_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl4_u8(a, b); #else simde_uint8x8_private r_, a_[4] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]), simde_uint8x8_to_private(a.val[2]), simde_uint8x8_to_private(a.val[3]) }, b_ = simde_uint8x8_to_private(b); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i b128 = _mm_set1_epi64(b_.m64); b128 = _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(31))); __m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(a_[1].m64, a_[0].m64), b128); __m128i r128_23 = _mm_shuffle_epi8(_mm_set_epi64(a_[3].m64, a_[2].m64), b128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_23, _mm_slli_epi32(b128, 3)); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (b_.values[i] < 32) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl4_u8 #define vtbl4_u8(a, b) simde_vtbl4_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbl4_s8(simde_int8x8x4_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl4_s8(a, b); #else simde_uint8x8x4_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_s8_u8(simde_vtbl4_u8(a_, simde_vreinterpret_u8_s8(b))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl4_s8 #define vtbl4_s8(a, b) simde_vtbl4_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbl1_p8(simde_poly8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl1_p8(a, b); #else return simde_vreinterpret_p8_u8(simde_vtbl1_u8(simde_vreinterpret_u8_p8(a), b)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl1_p8 #define vtbl1_p8(a, b) simde_vtbl1_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbl2_p8(simde_poly8x8x2_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl2_p8(a, b); #else simde_uint8x8x2_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_p8_u8(simde_vtbl2_u8(a_, b)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl2_p8 #define vtbl2_p8(a, b) simde_vtbl2_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbl3_p8(simde_poly8x8x3_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl3_p8(a, b); #else simde_uint8x8x3_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_p8_u8(simde_vtbl3_u8(a_, b)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl3_p8 #define vtbl3_p8(a, b) simde_vtbl3_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbl4_p8(simde_poly8x8x4_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbl4_p8(a, b); #else simde_uint8x8x4_t a_; simde_memcpy(&a_, &a, sizeof(a_)); return simde_vreinterpret_p8_u8(simde_vtbl4_u8(a_, b)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbl4_p8 #define vtbl4_p8(a, b) simde_vtbl4_p8((a), (b)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TBL_H) */ /* :: End simde/simde/arm/neon/tbl.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/tbx.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Christopher Moore * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TBX_H) #define SIMDE_ARM_NEON_TBX_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbx1_u8(simde_uint8x8_t a, simde_uint8x8_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx1_u8(a, b, c); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b), c_ = simde_uint8x8_to_private(c); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_set1_epi64(a_.m64); __m128i b128 = _mm_set1_epi64(b_.m64); __m128i c128 = _mm_set1_epi64(c_.m64); c128 = _mm_or_si128(c128, _mm_cmpgt_epi8(c128, _mm_set1_epi8(7))); __m128i r128 = _mm_shuffle_epi8(b128, c128); r128 = _mm_blendv_epi8(r128, a128, c128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (c_.values[i] < 8) ? b_.values[c_.values[i]] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx1_u8 #define vtbx1_u8(a, b, c) simde_vtbx1_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbx1_s8(simde_int8x8_t a, simde_int8x8_t b, simde_int8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx1_s8(a, b, c); #else return simde_vreinterpret_s8_u8(simde_vtbx1_u8(simde_vreinterpret_u8_s8(a), simde_vreinterpret_u8_s8(b), simde_vreinterpret_u8_s8(c))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx1_s8 #define vtbx1_s8(a, b, c) simde_vtbx1_s8((a), (b), (c)) #endif #if !defined(SIMDE_BUG_INTEL_857088) SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbx2_u8(simde_uint8x8_t a, simde_uint8x8x2_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx2_u8(a, b, c); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_[2] = { simde_uint8x8_to_private(b.val[0]), simde_uint8x8_to_private(b.val[1]) }, c_ = simde_uint8x8_to_private(c); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_set1_epi64(a_.m64); __m128i b128 = _mm_set_epi64(b_[1].m64, b_[0].m64); __m128i c128 = _mm_set1_epi64(c_.m64); c128 = _mm_or_si128(c128, _mm_cmpgt_epi8(c128, _mm_set1_epi8(15))); __m128i r128 = _mm_shuffle_epi8(b128, c128); r128 = _mm_blendv_epi8(r128, a128, c128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (c_.values[i] < 16) ? b_[c_.values[i] / 8].values[c_.values[i] & 7] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx2_u8 #define vtbx2_u8(a, b, c) simde_vtbx2_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbx2_s8(simde_int8x8_t a, simde_int8x8x2_t b, simde_int8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx2_s8(a, b, c); #else simde_uint8x8x2_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_s8_u8(simde_vtbx2_u8(simde_vreinterpret_u8_s8(a), b_, simde_vreinterpret_u8_s8(c))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx2_s8 #define vtbx2_s8(a, b, c) simde_vtbx2_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbx3_u8(simde_uint8x8_t a, simde_uint8x8x3_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx3_u8(a, b, c); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_[3] = { simde_uint8x8_to_private(b.val[0]), simde_uint8x8_to_private(b.val[1]), simde_uint8x8_to_private(b.val[2]) }, c_ = simde_uint8x8_to_private(c); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_set1_epi64(a_.m64); __m128i c128 = _mm_set1_epi64(c_.m64); c128 = _mm_or_si128(c128, _mm_cmpgt_epi8(c128, _mm_set1_epi8(23))); __m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(b_[1].m64, b_[0].m64), c128); __m128i r128_2 = _mm_shuffle_epi8(_mm_set1_epi64(b_[2].m64), c128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_2, _mm_slli_epi32(c128, 3)); r128 = _mm_blendv_epi8(r128, a128, c128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (c_.values[i] < 24) ? b_[c_.values[i] / 8].values[c_.values[i] & 7] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx3_u8 #define vtbx3_u8(a, b, c) simde_vtbx3_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbx3_s8(simde_int8x8_t a, simde_int8x8x3_t b, simde_int8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx3_s8(a, b, c); #else simde_uint8x8x3_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_s8_u8(simde_vtbx3_u8(simde_vreinterpret_u8_s8(a), b_, simde_vreinterpret_u8_s8(c))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx3_s8 #define vtbx3_s8(a, b, c) simde_vtbx3_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtbx4_u8(simde_uint8x8_t a, simde_uint8x8x4_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx4_u8(a, b, c); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_[4] = { simde_uint8x8_to_private(b.val[0]), simde_uint8x8_to_private(b.val[1]), simde_uint8x8_to_private(b.val[2]), simde_uint8x8_to_private(b.val[3]) }, c_ = simde_uint8x8_to_private(c); #if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE) __m128i a128 = _mm_set1_epi64(a_.m64); __m128i c128 = _mm_set1_epi64(c_.m64); c128 = _mm_or_si128(c128, _mm_cmpgt_epi8(c128, _mm_set1_epi8(31))); __m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(b_[1].m64, b_[0].m64), c128); __m128i r128_23 = _mm_shuffle_epi8(_mm_set_epi64(b_[3].m64, b_[2].m64), c128); __m128i r128 = _mm_blendv_epi8(r128_01, r128_23, _mm_slli_epi32(c128, 3)); r128 = _mm_blendv_epi8(r128, a128, c128); r_.m64 = _mm_movepi64_pi64(r128); #else SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = (c_.values[i] < 32) ? b_[c_.values[i] / 8].values[c_.values[i] & 7] : a_.values[i]; } #endif return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx4_u8 #define vtbx4_u8(a, b, c) simde_vtbx4_u8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtbx4_s8(simde_int8x8_t a, simde_int8x8x4_t b, simde_int8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx4_s8(a, b, c); #else simde_uint8x8x4_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_s8_u8(simde_vtbx4_u8(simde_vreinterpret_u8_s8(a), b_, simde_vreinterpret_u8_s8(c))); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx4_s8 #define vtbx4_s8(a, b, c) simde_vtbx4_s8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbx1_p8(simde_poly8x8_t a, simde_poly8x8_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx1_p8(a, b, c); #else return simde_vreinterpret_p8_u8(simde_vtbx1_u8(simde_vreinterpret_u8_p8(a), simde_vreinterpret_u8_p8(b), c)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx1_p8 #define vtbx1_p8(a, b, c) simde_vtbx1_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbx2_p8(simde_poly8x8_t a, simde_poly8x8x2_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx2_p8(a, b, c); #else simde_uint8x8x2_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_p8_u8(simde_vtbx2_u8(simde_vreinterpret_u8_p8(a), b_, c)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx2_p8 #define vtbx2_p8(a, b, c) simde_vtbx2_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbx3_p8(simde_poly8x8_t a, simde_poly8x8x3_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx3_p8(a, b, c); #else simde_uint8x8x3_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_p8_u8(simde_vtbx3_u8(simde_vreinterpret_u8_p8(a), b_, c)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx3_p8 #define vtbx3_p8(a, b, c) simde_vtbx3_p8((a), (b), (c)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtbx4_p8(simde_poly8x8_t a, simde_poly8x8x4_t b, simde_uint8x8_t c) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtbx4_p8(a, b, c); #else simde_uint8x8x4_t b_; simde_memcpy(&b_, &b, sizeof(b_)); return simde_vreinterpret_p8_u8(simde_vtbx4_u8(simde_vreinterpret_u8_p8(a), b_, c)); #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtbx4_p8 #define vtbx4_p8(a, b, c) simde_vtbx4_p8((a), (b), (c)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TBX_H) */ /* :: End simde/simde/arm/neon/tbx.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/trn.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TRN_H) && !defined(SIMDE_BUG_INTEL_857088) #define SIMDE_ARM_NEON_TRN_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/trn1.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TRN1_H) #define SIMDE_ARM_NEON_TRN1_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vtrn1_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrn1_f16(a, b); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a), b_ = simde_float16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_f16 #define vtrn1_f16(a, b) simde_vtrn1_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vtrn1_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_f32(a, b); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a), b_ = simde_float32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_f32 #define vtrn1_f32(a, b) simde_vtrn1_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtrn1_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_s8 #define vtrn1_s8(a, b) simde_vtrn1_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vtrn1_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_s16 #define vtrn1_s16(a, b) simde_vtrn1_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vtrn1_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_s32 #define vtrn1_s32(a, b) simde_vtrn1_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtrn1_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_u8 #define vtrn1_u8(a, b) simde_vtrn1_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vtrn1_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_u16 #define vtrn1_u16(a, b) simde_vtrn1_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vtrn1_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_u32 #define vtrn1_u32(a, b) simde_vtrn1_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vtrn1q_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrn1q_f16(a, b); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a), b_ = simde_float16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_f16 #define vtrn1q_f16(a, b) simde_vtrn1q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vtrn1q_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_f32(a, b); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a), b_ = simde_float32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_f32 #define vtrn1q_f32(a, b) simde_vtrn1q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vtrn1q_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_f64(a, b); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a), b_ = simde_float64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_f64 #define vtrn1q_f64(a, b) simde_vtrn1q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vtrn1q_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_s8 #define vtrn1q_s8(a, b) simde_vtrn1q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vtrn1q_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_s16 #define vtrn1q_s16(a, b) simde_vtrn1q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vtrn1q_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_s32 #define vtrn1q_s32(a, b) simde_vtrn1q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vtrn1q_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_s64 #define vtrn1q_s64(a, b) simde_vtrn1q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vtrn1q_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_u8 #define vtrn1q_u8(a, b) simde_vtrn1q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vtrn1q_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_u16 #define vtrn1q_u16(a, b) simde_vtrn1q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vtrn1q_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_u32 #define vtrn1q_u32(a, b) simde_vtrn1q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vtrn1q_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_u64 #define vtrn1q_u64(a, b) simde_vtrn1q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtrn1_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_p8(a, b); #else simde_poly8x8_private r_, a_ = simde_poly8x8_to_private(a), b_ = simde_poly8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_poly8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_p8 #define vtrn1_p8(a, b) simde_vtrn1_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vtrn1_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1_p16(a, b); #else simde_poly16x4_private r_, a_ = simde_poly16x4_to_private(a), b_ = simde_poly16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_poly16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1_p16 #define vtrn1_p16(a, b) simde_vtrn1_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vtrn1q_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_p8(a, b); #else simde_poly8x16_private r_, a_ = simde_poly8x16_to_private(a), b_ = simde_poly8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_poly8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_p8 #define vtrn1q_p8(a, b) simde_vtrn1q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vtrn1q_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_p16(a, b); #else simde_poly16x8_private r_, a_ = simde_poly16x8_to_private(a), b_ = simde_poly16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_poly16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_p16 #define vtrn1q_p16(a, b) simde_vtrn1q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x2_t simde_vtrn1q_p64(simde_poly64x2_t a, simde_poly64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn1q_p64(a, b); #else simde_poly64x2_private r_, a_ = simde_poly64x2_to_private(a), b_ = simde_poly64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx]; r_.values[idx | 1] = b_.values[idx]; } return simde_poly64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn1q_p64 #define vtrn1q_p64(a, b) simde_vtrn1q_p64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TRN1_H) */ /* :: End simde/simde/arm/neon/trn1.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/trn2.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson * 2020 Sean Maher (Copyright owned by Google, LLC) * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_TRN2_H) #define SIMDE_ARM_NEON_TRN2_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4_t simde_vtrn2_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrn2_f16(a, b); #else simde_float16x4_private r_, a_ = simde_float16x4_to_private(a), b_ = simde_float16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_float16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_f16 #define vtrn2_f16(a, b) simde_vtrn2_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2_t simde_vtrn2_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_f32(a, b); #else simde_float32x2_private r_, a_ = simde_float32x2_to_private(a), b_ = simde_float32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_float32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_f32 #define vtrn2_f32(a, b) simde_vtrn2_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vtrn2_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a), b_ = simde_int8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_s8 #define vtrn2_s8(a, b) simde_vtrn2_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vtrn2_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a), b_ = simde_int16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_s16 #define vtrn2_s16(a, b) simde_vtrn2_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vtrn2_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a), b_ = simde_int32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_s32 #define vtrn2_s32(a, b) simde_vtrn2_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8_t simde_vtrn2_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_u8(a, b); #else simde_uint8x8_private r_, a_ = simde_uint8x8_to_private(a), b_ = simde_uint8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_u8 #define vtrn2_u8(a, b) simde_vtrn2_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4_t simde_vtrn2_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_u16(a, b); #else simde_uint16x4_private r_, a_ = simde_uint16x4_to_private(a), b_ = simde_uint16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_u16 #define vtrn2_u16(a, b) simde_vtrn2_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2_t simde_vtrn2_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_u32(a, b); #else simde_uint32x2_private r_, a_ = simde_uint32x2_to_private(a), b_ = simde_uint32x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_u32 #define vtrn2_u32(a, b) simde_vtrn2_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8_t simde_vtrn2q_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrn2q_f16(a, b); #else simde_float16x8_private r_, a_ = simde_float16x8_to_private(a), b_ = simde_float16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_float16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_f16 #define vtrn2q_f16(a, b) simde_vtrn2q_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4_t simde_vtrn2q_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_f32(a, b); #else simde_float32x4_private r_, a_ = simde_float32x4_to_private(a), b_ = simde_float32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_float32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_f32 #define vtrn2q_f32(a, b) simde_vtrn2q_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float64x2_t simde_vtrn2q_f64(simde_float64x2_t a, simde_float64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_f64(a, b); #else simde_float64x2_private r_, a_ = simde_float64x2_to_private(a), b_ = simde_float64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_float64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_f64 #define vtrn2q_f64(a, b) simde_vtrn2q_f64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vtrn2q_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a), b_ = simde_int8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_s8 #define vtrn2q_s8(a, b) simde_vtrn2q_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vtrn2q_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a), b_ = simde_int16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_s16 #define vtrn2q_s16(a, b) simde_vtrn2q_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vtrn2q_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a), b_ = simde_int32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_s32 #define vtrn2q_s32(a, b) simde_vtrn2q_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vtrn2q_s64(simde_int64x2_t a, simde_int64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a), b_ = simde_int64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_s64 #define vtrn2q_s64(a, b) simde_vtrn2q_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16_t simde_vtrn2q_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_u8(a, b); #else simde_uint8x16_private r_, a_ = simde_uint8x16_to_private(a), b_ = simde_uint8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_u8 #define vtrn2q_u8(a, b) simde_vtrn2q_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8_t simde_vtrn2q_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_u16(a, b); #else simde_uint16x8_private r_, a_ = simde_uint16x8_to_private(a), b_ = simde_uint16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_u16 #define vtrn2q_u16(a, b) simde_vtrn2q_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4_t simde_vtrn2q_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_u32(a, b); #else simde_uint32x4_private r_, a_ = simde_uint32x4_to_private(a), b_ = simde_uint32x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_u32 #define vtrn2q_u32(a, b) simde_vtrn2q_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vtrn2q_u64(simde_uint64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_u64(a, b); #else simde_uint64x2_private r_, a_ = simde_uint64x2_to_private(a), b_ = simde_uint64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_uint64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_u64 #define vtrn2q_u64(a, b) simde_vtrn2q_u64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8_t simde_vtrn2_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_p8(a, b); #else simde_poly8x8_private r_, a_ = simde_poly8x8_to_private(a), b_ = simde_poly8x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_poly8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_p8 #define vtrn2_p8(a, b) simde_vtrn2_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4_t simde_vtrn2_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2_p16(a, b); #else simde_poly16x4_private r_, a_ = simde_poly16x4_to_private(a), b_ = simde_poly16x4_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_poly16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2_p16 #define vtrn2_p16(a, b) simde_vtrn2_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16_t simde_vtrn2q_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_p8(a, b); #else simde_poly8x16_private r_, a_ = simde_poly8x16_to_private(a), b_ = simde_poly8x16_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_poly8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_p8 #define vtrn2q_p8(a, b) simde_vtrn2q_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8_t simde_vtrn2q_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_p16(a, b); #else simde_poly16x8_private r_, a_ = simde_poly16x8_to_private(a), b_ = simde_poly16x8_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_poly16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_p16 #define vtrn2q_p16(a, b) simde_vtrn2q_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly64x2_t simde_vtrn2q_p64(simde_poly64x2_t a, simde_poly64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vtrn2q_p64(a, b); #else simde_poly64x2_private r_, a_ = simde_poly64x2_to_private(a), b_ = simde_poly64x2_to_private(b); const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2; SIMDE_VECTORIZE for (size_t i = 0 ; i < halfway_point ; i++) { const size_t idx = i << 1; r_.values[idx] = a_.values[idx | 1]; r_.values[idx | 1] = b_.values[idx | 1]; } return simde_poly64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vtrn2q_p64 #define vtrn2q_p64(a, b) simde_vtrn2q_p64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TRN2_H) */ /* :: End simde/simde/arm/neon/trn2.h :: */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_float16x4x2_t simde_vtrn_f16(simde_float16x4_t a, simde_float16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrn_f16(a, b); #else simde_float16x4x2_t r = { { simde_vtrn1_f16(a, b), simde_vtrn2_f16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_f16 #define vtrn_f16(a, b) simde_vtrn_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x2x2_t simde_vtrn_f32(simde_float32x2_t a, simde_float32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_f32(a, b); #else simde_float32x2x2_t r = { { simde_vtrn1_f32(a, b), simde_vtrn2_f32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_f32 #define vtrn_f32(a, b) simde_vtrn_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8x2_t simde_vtrn_s8(simde_int8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_s8(a, b); #else simde_int8x8x2_t r = { { simde_vtrn1_s8(a, b), simde_vtrn2_s8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_s8 #define vtrn_s8(a, b) simde_vtrn_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4x2_t simde_vtrn_s16(simde_int16x4_t a, simde_int16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_s16(a, b); #else simde_int16x4x2_t r = { { simde_vtrn1_s16(a, b), simde_vtrn2_s16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_s16 #define vtrn_s16(a, b) simde_vtrn_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2x2_t simde_vtrn_s32(simde_int32x2_t a, simde_int32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_s32(a, b); #else simde_int32x2x2_t r = { { simde_vtrn1_s32(a, b), simde_vtrn2_s32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_s32 #define vtrn_s32(a, b) simde_vtrn_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x8x2_t simde_vtrn_u8(simde_uint8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_u8(a, b); #else simde_uint8x8x2_t r = { { simde_vtrn1_u8(a, b), simde_vtrn2_u8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_u8 #define vtrn_u8(a, b) simde_vtrn_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x4x2_t simde_vtrn_u16(simde_uint16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_u16(a, b); #else simde_uint16x4x2_t r = { { simde_vtrn1_u16(a, b), simde_vtrn2_u16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_u16 #define vtrn_u16(a, b) simde_vtrn_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x2x2_t simde_vtrn_u32(simde_uint32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_u32(a, b); #else simde_uint32x2x2_t r = { { simde_vtrn1_u32(a, b), simde_vtrn2_u32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_u32 #define vtrn_u32(a, b) simde_vtrn_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float16x8x2_t simde_vtrnq_f16(simde_float16x8_t a, simde_float16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) return vtrnq_f16(a, b); #else simde_float16x8x2_t r = { { simde_vtrn1q_f16(a, b), simde_vtrn2q_f16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_f16 #define vtrnq_f16(a, b) simde_vtrnq_f16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_float32x4x2_t simde_vtrnq_f32(simde_float32x4_t a, simde_float32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_f32(a, b); #else simde_float32x4x2_t r = { { simde_vtrn1q_f32(a, b), simde_vtrn2q_f32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_f32 #define vtrnq_f32(a, b) simde_vtrnq_f32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16x2_t simde_vtrnq_s8(simde_int8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_s8(a, b); #else simde_int8x16x2_t r = { { simde_vtrn1q_s8(a, b), simde_vtrn2q_s8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_s8 #define vtrnq_s8(a, b) simde_vtrnq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8x2_t simde_vtrnq_s16(simde_int16x8_t a, simde_int16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_s16(a, b); #else simde_int16x8x2_t r = { { simde_vtrn1q_s16(a, b), simde_vtrn2q_s16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_s16 #define vtrnq_s16(a, b) simde_vtrnq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4x2_t simde_vtrnq_s32(simde_int32x4_t a, simde_int32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_s32(a, b); #else simde_int32x4x2_t r = { { simde_vtrn1q_s32(a, b), simde_vtrn2q_s32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_s32 #define vtrnq_s32(a, b) simde_vtrnq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint8x16x2_t simde_vtrnq_u8(simde_uint8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_u8(a, b); #else simde_uint8x16x2_t r = { { simde_vtrn1q_u8(a, b), simde_vtrn2q_u8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_u8 #define vtrnq_u8(a, b) simde_vtrnq_u8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint16x8x2_t simde_vtrnq_u16(simde_uint16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_u16(a, b); #else simde_uint16x8x2_t r = { { simde_vtrn1q_u16(a, b), simde_vtrn2q_u16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_u16 #define vtrnq_u16(a, b) simde_vtrnq_u16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_uint32x4x2_t simde_vtrnq_u32(simde_uint32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_u32(a, b); #else simde_uint32x4x2_t r = { { simde_vtrn1q_u32(a, b), simde_vtrn2q_u32(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_u32 #define vtrnq_u32(a, b) simde_vtrnq_u32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x8x2_t simde_vtrn_p8(simde_poly8x8_t a, simde_poly8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_p8(a, b); #else simde_poly8x8x2_t r = { { simde_vtrn1_p8(a, b), simde_vtrn2_p8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_p8 #define vtrn_p8(a, b) simde_vtrn_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x4x2_t simde_vtrn_p16(simde_poly16x4_t a, simde_poly16x4_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrn_p16(a, b); #else simde_poly16x4x2_t r = { { simde_vtrn1_p16(a, b), simde_vtrn2_p16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrn_p16 #define vtrn_p16(a, b) simde_vtrn_p16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly8x16x2_t simde_vtrnq_p8(simde_poly8x16_t a, simde_poly8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_p8(a, b); #else simde_poly8x16x2_t r = { { simde_vtrn1q_p8(a, b), simde_vtrn2q_p8(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_p8 #define vtrnq_p8(a, b) simde_vtrnq_p8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_poly16x8x2_t simde_vtrnq_p16(simde_poly16x8_t a, simde_poly16x8_t b) { #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) return vtrnq_p16(a, b); #else simde_poly16x8x2_t r = { { simde_vtrn1q_p16(a, b), simde_vtrn2q_p16(a, b) } }; return r; #endif } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vtrnq_p16 #define vtrnq_p16(a, b) simde_vtrnq_p16((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_TRN_H) */ /* :: End simde/simde/arm/neon/trn.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/uqadd.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson */ #if !defined(SIMDE_ARM_NEON_UQADD_H) #define SIMDE_ARM_NEON_UQADD_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ // Workaround on ARM64 windows due to windows SDK bug // https://developercommunity.visualstudio.com/t/In-arm64_neonh-vsqaddb_u8-vsqaddh_u16/10271747?sort=newest #if (defined _MSC_VER) && (defined SIMDE_ARM_NEON_A64V8_NATIVE) && (_MSC_VER < 1938) #pragma message ("Due to msvc bug, current version of msvc is supported by workaround. Recommend to update msvc") #undef vuqaddh_s16 #define vuqaddh_s16(src1, src2) neon_suqadds16(__int16ToN16_v(src1), __uint16ToN16_v(src2)).n16_i16[0] #undef vuqadds_s32 #define vuqadds_s32(src1, src2) _CopyInt32FromFloat(neon_suqadds32(_CopyFloatFromInt32(src1), _CopyFloatFromUInt32(src2))) #undef vuqaddd_s64 #define vuqaddd_s64(src1, src2) neon_suqadds64(__int64ToN64_v(src1), __uint64ToN64_v(src2)).n64_i64[0] #endif SIMDE_FUNCTION_ATTRIBUTES int8_t simde_vuqaddb_s8(int8_t a, uint8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_GIT_4EC445B8) return vuqaddb_s8(a, HEDLEY_STATIC_CAST(int8_t, b)); #else return vuqaddb_s8(a, b); #endif #else int16_t r_ = HEDLEY_STATIC_CAST(int16_t, a) + HEDLEY_STATIC_CAST(int16_t, b); return (r_ < INT8_MIN) ? INT8_MIN : ((r_ > INT8_MAX) ? INT8_MAX : HEDLEY_STATIC_CAST(int8_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddb_s8 #define vuqaddb_s8(a, b) simde_vuqaddb_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int16_t simde_vuqaddh_s16(int16_t a, uint16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_GIT_4EC445B8) return vuqaddh_s16(a, HEDLEY_STATIC_CAST(int16_t, b)); #else return vuqaddh_s16(a, b); #endif #else int32_t r_ = HEDLEY_STATIC_CAST(int32_t, a) + HEDLEY_STATIC_CAST(int32_t, b); return (r_ < INT16_MIN) ? INT16_MIN : ((r_ > INT16_MAX) ? INT16_MAX : HEDLEY_STATIC_CAST(int16_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddh_s16 #define vuqaddh_s16(a, b) simde_vuqaddh_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int32_t simde_vuqadds_s32(int32_t a, uint32_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_GIT_4EC445B8) return vuqadds_s32(a, HEDLEY_STATIC_CAST(int32_t, b)); #else return vuqadds_s32(a, b); #endif #else int64_t r_ = HEDLEY_STATIC_CAST(int64_t, a) + HEDLEY_STATIC_CAST(int64_t, b); return (r_ < INT32_MIN) ? INT32_MIN : ((r_ > INT32_MAX) ? INT32_MAX : HEDLEY_STATIC_CAST(int32_t, r_)); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqadds_s32 #define vuqadds_s32(a, b) simde_vuqadds_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES int64_t simde_vuqaddd_s64(int64_t a, uint64_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) #if defined(SIMDE_BUG_CLANG_GIT_4EC445B8) return vuqaddd_s64(a, HEDLEY_STATIC_CAST(int64_t, b)); #else return vuqaddd_s64(a, b); #endif #else /* TODO: I suspect there is room for improvement here. This is * just the first thing that worked, and I don't feel like messing * with it now. */ int64_t r; if (a < 0) { uint64_t na = HEDLEY_STATIC_CAST(uint64_t, -a); if (na > b) { uint64_t t = na - b; r = (t > (HEDLEY_STATIC_CAST(uint64_t, INT64_MAX) + 1)) ? INT64_MIN : -HEDLEY_STATIC_CAST(int64_t, t); } else { uint64_t t = b - na; r = (t > (HEDLEY_STATIC_CAST(uint64_t, INT64_MAX) )) ? INT64_MAX : HEDLEY_STATIC_CAST(int64_t, t); } } else { uint64_t ua = HEDLEY_STATIC_CAST(uint64_t, a); r = ((INT64_MAX - ua) < b) ? INT64_MAX : HEDLEY_STATIC_CAST(int64_t, ua + b); } return r; #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddd_s64 #define vuqaddd_s64(a, b) simde_vuqaddd_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x8_t simde_vuqadd_s8(simde_int8x8_t a, simde_uint8x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqadd_s8(a, b); #else simde_int8x8_private r_, a_ = simde_int8x8_to_private(a); simde_uint8x8_private b_ = simde_uint8x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddb_s8(a_.values[i], b_.values[i]); } return simde_int8x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqadd_s8 #define vuqadd_s8(a, b) simde_vuqadd_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x4_t simde_vuqadd_s16(simde_int16x4_t a, simde_uint16x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqadd_s16(a, b); #else simde_int16x4_private r_, a_ = simde_int16x4_to_private(a); simde_uint16x4_private b_ = simde_uint16x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddh_s16(a_.values[i], b_.values[i]); } return simde_int16x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqadd_s16 #define vuqadd_s16(a, b) simde_vuqadd_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vuqadd_s32(simde_int32x2_t a, simde_uint32x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqadd_s32(a, b); #else simde_int32x2_private r_, a_ = simde_int32x2_to_private(a); simde_uint32x2_private b_ = simde_uint32x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqadds_s32(a_.values[i], b_.values[i]); } return simde_int32x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqadd_s32 #define vuqadd_s32(a, b) simde_vuqadd_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x1_t simde_vuqadd_s64(simde_int64x1_t a, simde_uint64x1_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqadd_s64(a, b); #else simde_int64x1_private r_, a_ = simde_int64x1_to_private(a); simde_uint64x1_private b_ = simde_uint64x1_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddd_s64(a_.values[i], b_.values[i]); } return simde_int64x1_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqadd_s64 #define vuqadd_s64(a, b) simde_vuqadd_s64((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int8x16_t simde_vuqaddq_s8(simde_int8x16_t a, simde_uint8x16_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqaddq_s8(a, b); #else simde_int8x16_private r_, a_ = simde_int8x16_to_private(a); simde_uint8x16_private b_ = simde_uint8x16_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddb_s8(a_.values[i], b_.values[i]); } return simde_int8x16_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddq_s8 #define vuqaddq_s8(a, b) simde_vuqaddq_s8((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int16x8_t simde_vuqaddq_s16(simde_int16x8_t a, simde_uint16x8_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqaddq_s16(a, b); #else simde_int16x8_private r_, a_ = simde_int16x8_to_private(a); simde_uint16x8_private b_ = simde_uint16x8_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddh_s16(a_.values[i], b_.values[i]); } return simde_int16x8_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddq_s16 #define vuqaddq_s16(a, b) simde_vuqaddq_s16((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vuqaddq_s32(simde_int32x4_t a, simde_uint32x4_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqaddq_s32(a, b); #else simde_int32x4_private r_, a_ = simde_int32x4_to_private(a); simde_uint32x4_private b_ = simde_uint32x4_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqadds_s32(a_.values[i], b_.values[i]); } return simde_int32x4_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddq_s32 #define vuqaddq_s32(a, b) simde_vuqaddq_s32((a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int64x2_t simde_vuqaddq_s64(simde_int64x2_t a, simde_uint64x2_t b) { #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) return vuqaddq_s64(a, b); #else simde_int64x2_private r_, a_ = simde_int64x2_to_private(a); simde_uint64x2_private b_ = simde_uint64x2_to_private(b); SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = simde_vuqaddd_s64(a_.values[i], b_.values[i]); } return simde_int64x2_from_private(r_); #endif } #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vuqaddq_s64 #define vuqaddq_s64(a, b) simde_vuqaddq_s64((a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_UQADD_H) */ /* :: End simde/simde/arm/neon/uqadd.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/usdot.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_USDOT_H) #define SIMDE_ARM_NEON_USDOT_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vusdot_s32(simde_int32x2_t r, simde_uint8x8_t a, simde_int8x8_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) return vusdot_s32(r, a, b); #else simde_int32x2_private r_; simde_uint8x8_private a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); for (int i = 0 ; i < 2 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx]); } r_.values[i] = acc; } return simde_vadd_s32(r, simde_int32x2_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vusdot_s32 #define vusdot_s32(r, a, b) simde_vusdot_s32((r), (a), (b)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vusdotq_s32(simde_int32x4_t r, simde_uint8x16_t a, simde_int8x16_t b) { #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_MATMUL_INT8) return vusdotq_s32(r, a, b); #else simde_int32x4_private r_; simde_uint8x16_private a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); for (int i = 0 ; i < 4 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx]); } r_.values[i] = acc; } return simde_vaddq_s32(r, simde_int32x4_from_private(r_)); #endif } #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vusdotq_s32 #define vusdotq_s32(r, a, b) simde_vusdotq_s32((r), (a), (b)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_USDOT_H) */ /* :: End simde/simde/arm/neon/usdot.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/usdot_lane.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_USDOT_LANE_H) #define SIMDE_ARM_NEON_USDOT_LANE_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vusdot_lane_s32(simde_int32x2_t r, simde_uint8x8_t a, simde_int8x8_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int32x2_t result; simde_int32x2_private r_ = simde_int32x2_to_private(r); simde_uint8x8_private a_ = simde_uint8x8_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); for (int i = 0 ; i < 2 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x2_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(__ARM_FEATURE_MATMUL_INT8) #define simde_vusdot_lane_s32(r, a, b, lane) vusdot_lane_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vusdot_lane_s32 #define vusdot_lane_s32(r, a, b, lane) simde_vusdot_lane_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x2_t simde_vusdot_laneq_s32(simde_int32x2_t r, simde_uint8x8_t a, simde_int8x16_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int32x2_t result; simde_int32x2_private r_ = simde_int32x2_to_private(r); simde_uint8x8_private a_ = simde_uint8x8_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); for (int i = 0 ; i < 2 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for (int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x2_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_MATMUL_INT8) #define simde_vusdot_laneq_s32(r, a, b, lane) vusdot_laneq_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vusdot_laneq_s32 #define vusdot_laneq_s32(r, a, b, lane) simde_vusdot_laneq_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vusdotq_laneq_s32(simde_int32x4_t r, simde_uint8x16_t a, simde_int8x16_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) { simde_int32x4_t result; simde_int32x4_private r_ = simde_int32x4_to_private(r); simde_uint8x16_private a_ = simde_uint8x16_to_private(a); simde_int8x16_private b_ = simde_int8x16_to_private(b); for(int i = 0 ; i < 4 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for(int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x4_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_MATMUL_INT8) #define simde_vusdotq_laneq_s32(r, a, b, lane) vusdotq_laneq_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vusdotq_laneq_s32 #define vusdotq_laneq_s32(r, a, b, lane) simde_vusdotq_laneq_s32((r), (a), (b), (lane)) #endif SIMDE_FUNCTION_ATTRIBUTES simde_int32x4_t simde_vusdotq_lane_s32(simde_int32x4_t r, simde_uint8x16_t a, simde_int8x8_t b, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) { simde_int32x4_t result; simde_int32x4_private r_ = simde_int32x4_to_private(r); simde_uint8x16_private a_ = simde_uint8x16_to_private(a); simde_int8x8_private b_ = simde_int8x8_to_private(b); for(int i = 0 ; i < 4 ; i++) { int32_t acc = 0; SIMDE_VECTORIZE_REDUCTION(+:acc) for(int j = 0 ; j < 4 ; j++) { const int idx_b = j + (lane << 2); const int idx_a = j + (i << 2); acc += HEDLEY_STATIC_CAST(int32_t, a_.values[idx_a]) * HEDLEY_STATIC_CAST(int32_t, b_.values[idx_b]); } r_.values[i] += acc; } result = simde_int32x4_from_private(r_); return result; } #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(__ARM_FEATURE_MATMUL_INT8) #define simde_vusdotq_lane_s32(r, a, b, lane) vusdotq_lane_s32((r), (a), (b), (lane)) #endif #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #undef vusdotq_lane_s32 #define vusdotq_lane_s32(r, a, b, lane) simde_vusdotq_lane_s32((r), (a), (b), (lane)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_USDOT_LANE_H) */ /* :: End simde/simde/arm/neon/usdot_lane.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* :: Begin simde/simde/arm/neon/xar.h :: */ /* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2021 Atharva Nimbalkar */ #if !defined(SIMDE_ARM_NEON_XAR_H) #define SIMDE_ARM_NEON_XAR_H /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ HEDLEY_DIAGNOSTIC_PUSH SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES simde_uint64x2_t simde_vxarq_u64(simde_uint64x2_t a, simde_uint64x2_t b, const int d) SIMDE_REQUIRE_CONSTANT_RANGE(d, 0, 63) { simde_uint64x2_private r_, t = simde_uint64x2_to_private(simde_veorq_u64(a,b)); SIMDE_VECTORIZE for (size_t i=0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { r_.values[i] = ((t.values[i] >> d) | (t.values[i] << (64 - d))); } return simde_uint64x2_from_private(r_); } #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA3) #define simde_vxarq_u64(a, b, d) vxarq_u64((a), (b), (d)) #endif #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_ARM_SHA3)) #undef vxarq_u64 #define vxarq_u64(a, b, d) simde_vxarq_u64((a), (b), (d)) #endif SIMDE_END_DECLS_ HEDLEY_DIAGNOSTIC_POP #endif /* !defined(SIMDE_ARM_NEON_XAR_H) */ /* :: End simde/simde/arm/neon/xar.h :: */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ /* AUTOMATICALLY GENERATED FILE, DO NOT MODIFY */ /* 71fd833d9666141edcd1d3c109a80e228303d8d7 */ #endif /* SIMDE_ARM_NEON_H */ /* :: End simde/simde/arm/neon.h :: */ #undef SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES #undef SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES #undef SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES PK!Cpp4emscripten/cache/sysroot/include/compat/avx2intrin.h/* * Copyright 2024 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_immintrin_h__ #error "Never use directly; include instead." #endif #ifndef __emscripten_avx2intrin_h__ #define __emscripten_avx2intrin_h__ #ifndef __AVX2__ #error "AVX2 instruction set not enabled" #endif #define _mm256_mpsadbw_epu8(__A, __B, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ __m256i_internal __b = __m256i_to_internal(__B); \ _mm256_set_m128i(_mm_mpsadbw_epu8(__a.v1, __b.v1, (__imm) >> 3), \ _mm_mpsadbw_epu8(__a.v0, __b.v0, (__imm))); \ }) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_abs_epi8(__m256i __a) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_abs_epi8(a.v0); ret.v1 = _mm_abs_epi8(a.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_abs_epi16(__m256i __a) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_abs_epi16(a.v0); ret.v1 = _mm_abs_epi16(a.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_abs_epi32(__m256i __a) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_abs_epi32(a.v0); ret.v1 = _mm_abs_epi32(a.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_packs_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_packs_epi16(a.v0, b.v0); ret.v1 = _mm_packs_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_packs_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_packs_epi32(a.v0, b.v0); ret.v1 = _mm_packs_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_packus_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_packus_epi16(a.v0, b.v0); ret.v1 = _mm_packus_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_packus_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_packus_epi32(a.v0, b.v0); ret.v1 = _mm_packus_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_add_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_add_epi8(a.v0, b.v0); ret.v1 = _mm_add_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_add_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_add_epi16(a.v0, b.v0); ret.v1 = _mm_add_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_add_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_add_epi32(a.v0, b.v0); ret.v1 = _mm_add_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_add_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_add_epi64(a.v0, b.v0); ret.v1 = _mm_add_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_adds_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_adds_epi8(a.v0, b.v0); ret.v1 = _mm_adds_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_adds_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_adds_epi16(a.v0, b.v0); ret.v1 = _mm_adds_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_adds_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_adds_epu8(a.v0, b.v0); ret.v1 = _mm_adds_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_adds_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_adds_epu16(a.v0, b.v0); ret.v1 = _mm_adds_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } #define _mm256_alignr_epi8(__A, __B, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ __m256i_internal __b = __m256i_to_internal(__B); \ _mm256_set_m128i(_mm_alignr_epi8(__a.v1, __b.v1, (__imm)), \ _mm_alignr_epi8(__a.v0, __b.v0, (__imm))); \ }) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_and_si256(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_and_si128(a.v0, b.v0); ret.v1 = _mm_and_si128(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_andnot_si256(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_andnot_si128(a.v0, b.v0); ret.v1 = _mm_andnot_si128(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_avg_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_avg_epu8(a.v0, b.v0); ret.v1 = _mm_avg_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_avg_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_avg_epu16(a.v0, b.v0); ret.v1 = _mm_avg_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_blendv_epi8(__m256i __a, __m256i __b, __m256i __mask) { __m256i_internal ret, a, b, mask; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); mask = __m256i_to_internal(__mask); ret.v0 = _mm_blendv_epi8(a.v0, b.v0, mask.v0); ret.v1 = _mm_blendv_epi8(a.v1, b.v1, mask.v1); return __m256i_from_internal(ret); } #define _mm256_blend_epi16(__A, __B, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ __m256i_internal __b = __m256i_to_internal(__B); \ _mm256_set_m128i(_mm_blend_epi16(__a.v1, __b.v1, (__imm)), \ _mm_blend_epi16(__a.v0, __b.v0, (__imm))); \ }) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpeq_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpeq_epi8(a.v0, b.v0); ret.v1 = _mm_cmpeq_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpeq_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpeq_epi16(a.v0, b.v0); ret.v1 = _mm_cmpeq_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpeq_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpeq_epi32(a.v0, b.v0); ret.v1 = _mm_cmpeq_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpeq_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpeq_epi64(a.v0, b.v0); ret.v1 = _mm_cmpeq_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpgt_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpgt_epi8(a.v0, b.v0); ret.v1 = _mm_cmpgt_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpgt_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpgt_epi16(a.v0, b.v0); ret.v1 = _mm_cmpgt_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpgt_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpgt_epi32(a.v0, b.v0); ret.v1 = _mm_cmpgt_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cmpgt_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_cmpgt_epi64(a.v0, b.v0); ret.v1 = _mm_cmpgt_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hadd_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hadd_epi16(a.v0, b.v0); ret.v1 = _mm_hadd_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hadd_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hadd_epi32(a.v0, b.v0); ret.v1 = _mm_hadd_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hadds_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hadds_epi16(a.v0, b.v0); ret.v1 = _mm_hadds_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hsub_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hsub_epi16(a.v0, b.v0); ret.v1 = _mm_hsub_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hsub_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hsub_epi32(a.v0, b.v0); ret.v1 = _mm_hsub_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_hsubs_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_hsubs_epi16(a.v0, b.v0); ret.v1 = _mm_hsubs_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_maddubs_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_maddubs_epi16(a.v0, b.v0); ret.v1 = _mm_maddubs_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_madd_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_madd_epi16(a.v0, b.v0); ret.v1 = _mm_madd_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epi8(a.v0, b.v0); ret.v1 = _mm_max_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epi16(a.v0, b.v0); ret.v1 = _mm_max_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epi32(a.v0, b.v0); ret.v1 = _mm_max_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epu8(a.v0, b.v0); ret.v1 = _mm_max_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epu16(a.v0, b.v0); ret.v1 = _mm_max_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_max_epu32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_max_epu32(a.v0, b.v0); ret.v1 = _mm_max_epu32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epi8(a.v0, b.v0); ret.v1 = _mm_min_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epi16(a.v0, b.v0); ret.v1 = _mm_min_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epi32(a.v0, b.v0); ret.v1 = _mm_min_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epu8(a.v0, b.v0); ret.v1 = _mm_min_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epu16(a.v0, b.v0); ret.v1 = _mm_min_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_min_epu32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_min_epu32(a.v0, b.v0); ret.v1 = _mm_min_epu32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_movemask_epi8(__m256i __a) { __m256i_internal a = __m256i_to_internal(__a); return (_mm_movemask_epi8(a.v1) << 16) | _mm_movemask_epi8(a.v0); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi8_epi16(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi8_epi16(__a); ret.v1 = _mm_cvtepi8_epi16(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi8_epi32(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi8_epi32(__a); ret.v1 = _mm_cvtepi8_epi32(_mm_shuffle_epi32(__a, 0xE1)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi8_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi8_epi64(__a); ret.v1 = _mm_cvtepi8_epi64(_mm_srli_epi32(__a, 16)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi16_epi32(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi16_epi32(__a); ret.v1 = _mm_cvtepi16_epi32(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi16_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi16_epi64(__a); ret.v1 = _mm_cvtepi16_epi64(_mm_shuffle_epi32(__a, 0xE1)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi32_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepi32_epi64(__a); ret.v1 = _mm_cvtepi32_epi64(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu8_epi16(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu8_epi16(__a); ret.v1 = _mm_cvtepu8_epi16(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu8_epi32(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu8_epi32(__a); ret.v1 = _mm_cvtepu8_epi32(_mm_shuffle_epi32(__a, 0xE1)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu8_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu8_epi64(__a); ret.v1 = _mm_cvtepu8_epi64(_mm_srli_epi32(__a, 16)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu16_epi32(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu16_epi32(__a); ret.v1 = _mm_cvtepu16_epi32(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu16_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu16_epi64(__a); ret.v1 = _mm_cvtepu16_epi64(_mm_shuffle_epi32(__a, 0xE1)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepu32_epi64(__m128i __a) { __m256i_internal ret; ret.v0 = _mm_cvtepu32_epi64(__a); ret.v1 = _mm_cvtepu32_epi64(_mm_shuffle_epi32(__a, 0x4E)); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mul_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mul_epi32(a.v0, b.v0); ret.v1 = _mm_mul_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mulhrs_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mulhrs_epi16(a.v0, b.v0); ret.v1 = _mm_mulhrs_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mulhi_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mulhi_epu16(a.v0, b.v0); ret.v1 = _mm_mulhi_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mulhi_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mulhi_epi16(a.v0, b.v0); ret.v1 = _mm_mulhi_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mullo_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mullo_epi16(a.v0, b.v0); ret.v1 = _mm_mullo_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mullo_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mullo_epi32(a.v0, b.v0); ret.v1 = _mm_mullo_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_mul_epu32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_mul_epu32(a.v0, b.v0); ret.v1 = _mm_mul_epu32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_or_si256(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_or_si128(a.v0, b.v0); ret.v1 = _mm_or_si128(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sad_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sad_epu8(a.v0, b.v0); ret.v1 = _mm_sad_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_shuffle_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_shuffle_epi8(a.v0, b.v0); ret.v1 = _mm_shuffle_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } #define _mm256_shuffle_epi32(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i(_mm_shuffle_epi32(__a.v1, (__imm)), \ _mm_shuffle_epi32(__a.v0, (__imm))); \ }) #define _mm256_shufflehi_epi16(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i(_mm_shufflehi_epi16(__a.v1, (__imm)), \ _mm_shufflehi_epi16(__a.v0, (__imm))); \ }) #define _mm256_shufflelo_epi16(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i(_mm_shufflelo_epi16(__a.v1, (__imm)), \ _mm_shufflelo_epi16(__a.v0, (__imm))); \ }) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sign_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sign_epi8(a.v0, b.v0); ret.v1 = _mm_sign_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sign_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sign_epi16(a.v0, b.v0); ret.v1 = _mm_sign_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sign_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sign_epi32(a.v0, b.v0); ret.v1 = _mm_sign_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } #define _mm256_slli_si256(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i(_mm_slli_si128(__a.v1, (__imm)), \ _mm_slli_si128(__a.v0, (__imm))); \ }) #define _mm256_bslli_epi128(__A, __imm) _mm256_slli_si256(__A, __imm) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_slli_epi16(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_slli_epi16(a.v0, __count); ret.v1 = _mm_slli_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sll_epi16(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_sll_epi16(a.v0, __count); ret.v1 = _mm_sll_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_slli_epi32(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_slli_epi32(a.v0, __count); ret.v1 = _mm_slli_epi32(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sll_epi32(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_sll_epi32(a.v0, __count); ret.v1 = _mm_sll_epi32(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_slli_epi64(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_slli_epi64(a.v0, __count); ret.v1 = _mm_slli_epi64(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sll_epi64(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_sll_epi64(a.v0, __count); ret.v1 = _mm_sll_epi64(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srai_epi16(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srai_epi16(a.v0, __count); ret.v1 = _mm_srai_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sra_epi16(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_sra_epi16(a.v0, __count); ret.v1 = _mm_sra_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srai_epi32(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srai_epi32(a.v0, __count); ret.v1 = _mm_srai_epi32(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sra_epi32(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_sra_epi32(a.v0, __count); ret.v1 = _mm_sra_epi32(a.v1, __count); return __m256i_from_internal(ret); } #define _mm256_srli_si256(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i(_mm_srli_si128(__a.v1, (__imm)), \ _mm_srli_si128(__a.v0, (__imm))); \ }) #define _mm256_bsrli_epi128(a, imm) _mm256_srli_si256(a, imm) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srli_epi16(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srli_epi16(a.v0, __count); ret.v1 = _mm_srli_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srl_epi16(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srl_epi16(a.v0, __count); ret.v1 = _mm_srl_epi16(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srli_epi32(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srli_epi32(a.v0, __count); ret.v1 = _mm_srli_epi32(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srl_epi32(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srl_epi32(a.v0, __count); ret.v1 = _mm_srl_epi32(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srli_epi64(__m256i __a, int __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srli_epi64(a.v0, __count); ret.v1 = _mm_srli_epi64(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_srl_epi64(__m256i __a, __m128i __count) { __m256i_internal ret, a; a = __m256i_to_internal(__a); ret.v0 = _mm_srl_epi64(a.v0, __count); ret.v1 = _mm_srl_epi64(a.v1, __count); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sub_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sub_epi8(a.v0, b.v0); ret.v1 = _mm_sub_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sub_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sub_epi16(a.v0, b.v0); ret.v1 = _mm_sub_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sub_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sub_epi32(a.v0, b.v0); ret.v1 = _mm_sub_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_sub_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_sub_epi64(a.v0, b.v0); ret.v1 = _mm_sub_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_subs_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_subs_epi8(a.v0, b.v0); ret.v1 = _mm_subs_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_subs_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_subs_epi16(a.v0, b.v0); ret.v1 = _mm_subs_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_subs_epu8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_subs_epu8(a.v0, b.v0); ret.v1 = _mm_subs_epu8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_subs_epu16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_subs_epu16(a.v0, b.v0); ret.v1 = _mm_subs_epu16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpackhi_epi8(a.v0, b.v0); ret.v1 = _mm_unpackhi_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpackhi_epi16(a.v0, b.v0); ret.v1 = _mm_unpackhi_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpackhi_epi32(a.v0, b.v0); ret.v1 = _mm_unpackhi_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpackhi_epi64(a.v0, b.v0); ret.v1 = _mm_unpackhi_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_epi8(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpacklo_epi8(a.v0, b.v0); ret.v1 = _mm_unpacklo_epi8(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_epi16(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpacklo_epi16(a.v0, b.v0); ret.v1 = _mm_unpacklo_epi16(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpacklo_epi32(a.v0, b.v0); ret.v1 = _mm_unpacklo_epi32(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_epi64(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_unpacklo_epi64(a.v0, b.v0); ret.v1 = _mm_unpacklo_epi64(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_xor_si256(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); ret.v0 = _mm_xor_si128(a.v0, b.v0); ret.v1 = _mm_xor_si128(a.v1, b.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_stream_load_si256(const void* __V) { __m256i_internal ret; ret.v0 = _mm_stream_load_si128((const __m128i*)__V); ret.v1 = _mm_stream_load_si128((const __m128i*)(((const uint8_t*)__V) + 16)); return __m256i_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_broadcastss_ps(__m128 __a) { return (__m128)wasm_i32x4_shuffle(__a, __a, 0, 0, 0, 0); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_broadcastsd_pd(__m128d __a) { return (__m128d)wasm_i64x2_shuffle(__a, __a, 0, 0); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastss_ps(__m128 __a) { __m256_internal ret; ret.v1 = ret.v0 = _mm_broadcastss_ps(__a); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastsd_pd(__m128d __a) { __m256d_internal ret; ret.v1 = ret.v0 = _mm_broadcastsd_pd(__a); return __m256d_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastsi128_si256(__m128i __a) { __m256i_internal ret; ret.v1 = ret.v0 = __a; return __m256i_from_internal(ret); } #define _mm_broadcastsi128_si256(X) _mm256_broadcastsi128_si256(X) #define _mm_blend_epi32(__a, __b, __imm8) \ __extension__({ \ (__m128i) __builtin_shufflevector((__i32x4)(__m128i)(__a), \ (__i32x4)(__m128i)(__b), \ (((__imm8) & 0x01) ? 4 : 0), \ (((__imm8) & 0x02) ? 5 : 1), \ (((__imm8) & 0x04) ? 6 : 2), \ (((__imm8) & 0x08) ? 7 : 3)); \ }) #define _mm256_blend_epi32(__A, __B, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ __m256i_internal __b = __m256i_to_internal(__B); \ _mm256_set_m128i(_mm_blend_epi32(__a.v1, __b.v1, (__imm) >> 4), \ _mm_blend_epi32(__a.v0, __b.v0, (__imm))); \ }) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_broadcastb_epi8(__m128i __a) { return (__m128i)wasm_i8x16_shuffle( __a, __a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_broadcastw_epi16(__m128i __a) { return (__m128i)wasm_i16x8_shuffle(__a, __a, 0, 0, 0, 0, 0, 0, 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_broadcastd_epi32(__m128i __a) { return (__m128i)wasm_i32x4_shuffle(__a, __a, 0, 0, 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_broadcastq_epi64(__m128i __a) { return (__m128i)wasm_i64x2_shuffle(__a, __a, 0, 0); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastb_epi8(__m128i __a) { __m256i_internal ret; ret.v1 = ret.v0 = _mm_broadcastb_epi8(__a); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastw_epi16(__m128i __a) { __m256i_internal ret; ret.v1 = ret.v0 = _mm_broadcastw_epi16(__a); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastd_epi32(__m128i __a) { __m256i_internal ret; ret.v1 = ret.v0 = _mm_broadcastd_epi32(__a); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_broadcastq_epi64(__m128i __a) { __m256i_internal ret; ret.v1 = ret.v0 = _mm_broadcastq_epi64(__a); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) { __m256i_internal ret, a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); int index[8]; int lane[8]; for (int i = 0; i < 4; i++) { index[i] = ((__i32x4)b.v0)[i] & 7; index[i + 4] = ((__i32x4)b.v1)[i] & 7; } for (int j = 0; j < 8; j++) { lane[j] = index[j] < 4 ? ((__i32x4)(a.v0))[index[j]] : ((__i32x4)(a.v1))[index[j] - 4]; } ret.v0 = (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); ret.v1 = (__m128i)wasm_i32x4_make(lane[4], lane[5], lane[6], lane[7]); return __m256i_from_internal(ret); } #define _mm256_permute4x64_pd(__A, __imm) \ __extension__({ \ __m256d_internal __a = __m256d_to_internal(__A); \ _mm256_set_m128d( \ (__m128d)wasm_i64x2_shuffle( \ __a.v0, __a.v1, (((__imm) >> 4) & 3), (((__imm) >> 6) & 3)), \ (__m128d)wasm_i64x2_shuffle( \ __a.v0, __a.v1, ((__imm) & 3), (((__imm) >> 2) & 3))); \ }) static __inline__ __m256 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_permutevar8x32_ps(__m256 __a, __m256i __b) { __m256_internal ret; __m256_internal a = __m256_to_internal(__a); __m256i_internal b = __m256i_to_internal(__b); int index[8]; float lane[8]; for (int i = 0; i < 4; i++) { index[i] = ((__i32x4)b.v0)[i] & 7; index[i + 4] = ((__i32x4)b.v1)[i] & 7; } for (int j = 0; j < 8; j++) { lane[j] = index[j] < 4 ? ((__f32x4)(a.v0))[index[j]] : ((__f32x4)(a.v1))[index[j] - 4]; } ret.v0 = (__m128)wasm_f32x4_make(lane[0], lane[1], lane[2], lane[3]); ret.v1 = (__m128)wasm_f32x4_make(lane[4], lane[5], lane[6], lane[7]); return __m256_from_internal(ret); } #define _mm256_permute4x64_epi64(__A, __imm) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ _mm256_set_m128i( \ wasm_i64x2_shuffle( \ __a.v0, __a.v1, (((__imm) >> 4) & 3), (((__imm) >> 6) & 3)), \ wasm_i64x2_shuffle( \ __a.v0, __a.v1, ((__imm) & 3), (((__imm) >> 2) & 3))); \ }) static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_permute2x128_si256(__m256i __a, __m256i __b, const int imm8) { __m256i_internal ret; ret.v0 = __avx_select4i(__a, __b, imm8); ret.v1 = __avx_select4i(__a, __b, imm8 >> 4); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm256_extracti128_si256(__m256i __a, const int imm8) { __m256i_internal a = __m256i_to_internal(__a); if (imm8 & 0x1) { return a.v1; } else { return a.v0; } } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_inserti128_si256(__m256i __a, __m128i __b, const int imm8) { __m256i_internal ret = __m256i_to_internal(__a); if (imm8 & 0x1) { ret.v1 = __b; } else { ret.v0 = __b; } return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_maskload_epi32(int32_t const* __p, __m128i __m) { int32_t lane[4]; for (size_t i = 0; i < 4; i++) { uint32_t mask = ((__i32x4)__m)[i]; lane[i] = ((mask >> 31) & 0x1) ? __p[i] : 0; } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_maskload_epi64(int64_t const* __p, __m128i __m) { int64_t lane[2]; for (size_t i = 0; i < 2; i++) { uint64_t mask = ((__i64x2)__m)[i]; lane[i] = ((mask >> 63) & 0x1) ? __p[i] : 0; } return (__m128i)wasm_i64x2_make(lane[0], lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_maskload_epi32(int const* __p, __m256i __m) { __m256i_internal ret, m; m = __m256i_to_internal(__m); ret.v0 = _mm_maskload_epi32(__p, m.v0); ret.v1 = _mm_maskload_epi32(((int32_t*)__p) + 4, m.v1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_maskload_epi64(long long const* __p, __m256i __m) { __m256i_internal ret, m; m = __m256i_to_internal(__m); ret.v0 = _mm_maskload_epi64(__p, m.v0); ret.v1 = _mm_maskload_epi64(((int64_t*)__p) + 2, m.v1); return __m256i_from_internal(ret); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_maskstore_epi32(int* __p, __m128i __m, __m128i __a) { if ((wasm_i32x4_extract_lane(__m, 0) & 0x80000000ull) != 0) __p[0] = wasm_i32x4_extract_lane((v128_t)__a, 0); if ((wasm_i32x4_extract_lane(__m, 1) & 0x80000000ull) != 0) __p[1] = wasm_i32x4_extract_lane((v128_t)__a, 1); if ((wasm_i32x4_extract_lane(__m, 2) & 0x80000000ull) != 0) __p[2] = wasm_i32x4_extract_lane((v128_t)__a, 2); if ((wasm_i32x4_extract_lane(__m, 3) & 0x80000000ull) != 0) __p[3] = wasm_i32x4_extract_lane((v128_t)__a, 3); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_maskstore_epi64(long long* __p, __m128i __m, __m128i __a) { if ((wasm_i64x2_extract_lane(__m, 0) & 0x8000000000000000ull) != 0) __p[0] = wasm_i64x2_extract_lane((v128_t)__a, 0); if ((wasm_i64x2_extract_lane(__m, 1) & 0x8000000000000000ull) != 0) __p[1] = wasm_i64x2_extract_lane((v128_t)__a, 1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_maskstore_epi32(int* __p, __m256i __m, __m256i __a) { __m256i_internal m, a; m = __m256i_to_internal(__m); a = __m256i_to_internal(__a); _mm_maskstore_epi32(__p, m.v0, a.v0); _mm_maskstore_epi32(((int32_t*)__p) + 4, m.v1, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_maskstore_epi64(long long* __p, __m256i __m, __m256i __a) { __m256i_internal m, a; m = __m256i_to_internal(__m); a = __m256i_to_internal(__a); _mm_maskstore_epi64(__p, m.v0, a.v0); _mm_maskstore_epi64(((int64_t*)__p) + 2, m.v1, a.v1); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_sllv_epi32(__m128i __a, __m128i __count) { int32_t lane[4]; for (size_t i = 0; i < 4; i++) { uint32_t shift = ((__u32x4)__count)[i]; lane[i] = shift < 32 ? ((__u32x4)__a)[i] << shift : 0; } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_sllv_epi32(__m256i __a, __m256i __count) { __m256i_internal ret, a, count; a = __m256i_to_internal(__a); count = __m256i_to_internal(__count); ret.v0 = _mm_sllv_epi32(a.v0, count.v0); ret.v1 = _mm_sllv_epi32(a.v1, count.v1); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_sllv_epi64(__m128i __a, __m128i __count) { int64_t lane[2]; for (size_t i = 0; i < 2; i++) { uint64_t shift = (uint64_t)((__u64x2)__count)[i]; lane[i] = shift < 64 ? ((__u64x2)__a)[i] << shift : 0; } return (__m128i)wasm_i64x2_make(lane[0], lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_sllv_epi64(__m256i __a, __m256i __count) { __m256i_internal ret, a, count; a = __m256i_to_internal(__a); count = __m256i_to_internal(__count); ret.v0 = _mm_sllv_epi64(a.v0, count.v0); ret.v1 = _mm_sllv_epi64(a.v1, count.v1); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_srav_epi32(__m128i __a, __m128i __count) { int32_t lane[4]; for (size_t i = 0; i < 4; i++) { uint32_t shift = ((__u32x4)__count)[i]; shift = shift < 31 ? shift : 31; lane[i] = ((__i32x4)__a)[i] >> shift; } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_srav_epi32(__m256i __a, __m256i __count) { __m256i_internal ret, a, count; a = __m256i_to_internal(__a); count = __m256i_to_internal(__count); ret.v0 = _mm_srav_epi32(a.v0, count.v0); ret.v1 = _mm_srav_epi32(a.v1, count.v1); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_srlv_epi32(__m128i __a, __m128i __count) { int32_t lane[4]; for (size_t i = 0; i < 4; i++) { uint32_t shift = ((__u32x4)__count)[i]; lane[i] = shift < 32 ? ((__u32x4)__a)[i] >> shift : 0; } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_srlv_epi32(__m256i __a, __m256i __count) { __m256i_internal ret, a, count; a = __m256i_to_internal(__a); count = __m256i_to_internal(__count); ret.v0 = _mm_srlv_epi32(a.v0, count.v0); ret.v1 = _mm_srlv_epi32(a.v1, count.v1); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_srlv_epi64(__m128i __a, __m128i __count) { int64_t lane[2]; for (size_t i = 0; i < 2; i++) { uint64_t shift = ((__u64x2)__count)[i]; lane[i] = shift < 64 ? ((__u64x2)__a)[i] >> shift : 0; } return (__m128i)wasm_i64x2_make(lane[0], lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_srlv_epi64(__m256i __a, __m256i __count) { __m256i_internal ret, a, count; a = __m256i_to_internal(__a); count = __m256i_to_internal(__count); ret.v0 = _mm_srlv_epi64(a.v0, count.v0); ret.v1 = _mm_srlv_epi64(a.v1, count.v1); return __m256i_from_internal(ret); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i32gather_pd(__m128d src, const double* base_addr, __m128i vindex, __m128d mask, const int scale) { double lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i64x2)mask)[i] >> 63) & 0x1) { double* addr = (double*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__f64x2)src)[i]; } } return (__m128d)wasm_f64x2_make(lane[0], lane[1]); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i32gather_pd(__m256d __src, const double* base_addr, __m128i vindex, __m256d __mask, const int scale) { __m256d_internal ret, src, mask; src = __m256d_to_internal(__src); mask = __m256d_to_internal(__mask); ret.v0 = _mm_mask_i32gather_pd(src.v0, base_addr, vindex, mask.v0, scale); __m128i vindex1 = (__m128i)wasm_i32x4_shuffle(vindex, vindex, 2, 3, 0, 1); ret.v1 = _mm_mask_i32gather_pd(src.v1, base_addr, vindex1, mask.v1, scale); return __m256d_from_internal(ret); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i64gather_pd(__m128d src, const double* base_addr, __m128i vindex, __m128d mask, const int scale) { double lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i64x2)mask)[i] >> 63) & 0x1) { double* addr = (double*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__f64x2)src)[i]; } } return (__m128d)wasm_f64x2_make(lane[0], lane[1]); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i64gather_pd(__m256d __src, const double* base_addr, __m256i __vindex, __m256d __mask, const int scale) { __m256d_internal ret, src, mask; __m256i_internal vindex = __m256i_to_internal(__vindex); src = __m256d_to_internal(__src); mask = __m256d_to_internal(__mask); ret.v0 = _mm_mask_i64gather_pd(src.v0, base_addr, vindex.v0, mask.v0, scale); ret.v1 = _mm_mask_i64gather_pd(src.v1, base_addr, vindex.v1, mask.v1, scale); return __m256d_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i32gather_ps(__m128 src, const float* base_addr, __m128i vindex, __m128 mask, const int scale) { float lane[4]; for (size_t i = 0; i < 4; i++) { if ((((__i32x4)mask)[i] >> 31) & 0x1) { float* addr = (float*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__f32x4)src)[i]; } } return (__m128)wasm_f32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i32gather_ps(__m256 __src, const float* base_addr, __m256i __vindex, __m256 __mask, const int scale) { __m256_internal ret, src, mask; __m256i_internal vindex = __m256i_to_internal(__vindex); src = __m256_to_internal(__src); mask = __m256_to_internal(__mask); ret.v0 = _mm_mask_i32gather_ps(src.v0, base_addr, vindex.v0, mask.v0, scale); ret.v1 = _mm_mask_i32gather_ps(src.v1, base_addr, vindex.v1, mask.v1, scale); return __m256_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i64gather_ps(__m128 src, const float* base_addr, __m128i vindex, __m128 mask, const int scale) { float lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i32x4)mask)[i] >> 31) & 0x1) { float* addr = (float*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__f32x4)src)[i]; } } return (__m128)wasm_f32x4_make(lane[0], lane[1], 0, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i64gather_ps(__m128 src, const float* base_addr, __m256i __vindex, __m128 mask, const int scale) { __m256i_internal vindex = __m256i_to_internal(__vindex); float lane[4]; __m128i current_vindex; for (size_t i = 0; i < 4; i++) { current_vindex = i < 2 ? vindex.v0 : vindex.v1; if ((((__i32x4)mask)[i] >> 31) & 0x1) { float* addr = (float*)((uint8_t*)base_addr + ((__i64x2)current_vindex)[i & 1] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__f32x4)src)[i]; } } return (__m128)wasm_f32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i32gather_epi32(__m128i src, const int* base_addr, __m128i vindex, __m128i mask, const int scale) { int32_t lane[4]; for (size_t i = 0; i < 4; i++) { if ((((__i32x4)mask)[i] >> 31) & 0x1) { int32_t* addr = (int32_t*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__i32x4)src)[i]; } } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i32gather_epi32(__m256i __src, const int* base_addr, __m256i __vindex, __m256i __mask, const int scale) { __m256i_internal ret, src, vindex, mask; src = __m256i_to_internal(__src); vindex = __m256i_to_internal(__vindex); mask = __m256i_to_internal(__mask); ret.v0 = _mm_mask_i32gather_epi32(src.v0, base_addr, vindex.v0, mask.v0, scale); ret.v1 = _mm_mask_i32gather_epi32(src.v1, base_addr, vindex.v1, mask.v1, scale); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i64gather_epi32(__m128i src, const int* base_addr, __m128i vindex, __m128i mask, const int scale) { int32_t lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i32x4)mask)[i] >> 31) & 0x1) { int32_t* addr = (int32_t*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__i32x4)src)[i]; } } return (__m128i)wasm_i32x4_make(lane[0], lane[1], 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i64gather_epi32(__m128i src, const int* base_addr, __m256i __vindex, __m128i mask, const int scale) { __m256i_internal vindex = __m256i_to_internal(__vindex); int32_t lane[4]; __m128i current_vindex; for (size_t i = 0; i < 4; i++) { current_vindex = i < 2 ? vindex.v0 : vindex.v1; if ((((__i32x4)mask)[i] >> 31) & 0x1) { int32_t* addr = (int32_t*)((uint8_t*)base_addr + ((__i64x2)current_vindex)[i & 1] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__i32x4)src)[i]; } } return (__m128i)wasm_i32x4_make(lane[0], lane[1], lane[2], lane[3]); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i32gather_epi64(__m128i src, const long long* base_addr, __m128i vindex, __m128i mask, const int scale) { int64_t lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i64x2)mask)[i] >> 63) & 0x1) { int64_t* addr = (int64_t*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__i64x2)src)[i]; } } return (__m128i)wasm_i64x2_make(lane[0], lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i32gather_epi64(__m256i __src, const long long* base_addr, __m128i vindex, __m256i __mask, const int scale) { __m256i_internal ret, src, mask; src = __m256i_to_internal(__src); mask = __m256i_to_internal(__mask); ret.v0 = _mm_mask_i32gather_epi64(src.v0, base_addr, vindex, mask.v0, scale); __m128i vindex1 = (__m128i)wasm_i32x4_shuffle(vindex, vindex, 2, 3, 0, 1); ret.v1 = _mm_mask_i32gather_epi64(src.v1, base_addr, vindex1, mask.v1, scale); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_mask_i64gather_epi64(__m128i src, const long long* base_addr, __m128i vindex, __m128i mask, const int scale) { int64_t lane[2]; for (size_t i = 0; i < 2; i++) { if ((((__i64x2)mask)[i] >> 63) & 0x1) { int64_t* addr = (int64_t*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); lane[i] = *addr; } else { lane[i] = ((__i64x2)src)[i]; } } return (__m128i)wasm_i64x2_make(lane[0], lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_mask_i64gather_epi64(__m256i __src, const long long* base_addr, __m256i __vindex, __m256i __mask, const int scale) { __m256i_internal ret, src, vindex, mask; src = __m256i_to_internal(__src); vindex = __m256i_to_internal(__vindex); mask = __m256i_to_internal(__mask); ret.v0 = _mm_mask_i64gather_epi64(src.v0, base_addr, vindex.v0, mask.v0, scale); ret.v1 = _mm_mask_i64gather_epi64(src.v1, base_addr, vindex.v1, mask.v1, scale); return __m256i_from_internal(ret); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i32gather_pd(const double* base_addr, __m128i vindex, const int scale) { double* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (double*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } return (__m128d)wasm_f64x2_make(*lane[0], *lane[1]); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i32gather_pd(const double* base_addr, __m128i vindex, const int scale) { __m256d_internal ret; double* lane[4]; for (size_t i = 0; i < 4; i++) { lane[i] = (double*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } ret.v0 = (__m128d)wasm_f64x2_make(*lane[0], *lane[1]); ret.v1 = (__m128d)wasm_f64x2_make(*lane[2], *lane[3]); return __m256d_from_internal(ret); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i64gather_pd(const double* base_addr, __m128i vindex, const int scale) { double* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (double*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); } return (__m128d)wasm_f64x2_make(*lane[0], *lane[1]); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i64gather_pd(const double* base_addr, __m256i __vindex, const int scale) { __m256d_internal ret; __m256i_internal vindex = __m256i_to_internal(__vindex); ret.v0 = _mm_i64gather_pd(base_addr, vindex.v0, scale); ret.v1 = _mm_i64gather_pd(base_addr, vindex.v1, scale); return __m256d_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i32gather_ps(const float* base_addr, __m128i vindex, const int scale) { float* lane[4]; for (size_t i = 0; i < 4; i++) { lane[i] = (float*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } return (__m128)wasm_f32x4_make(*lane[0], *lane[1], *lane[2], *lane[3]); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i32gather_ps(const float* base_addr, __m256i __vindex, const int scale) { __m256_internal ret; __m256i_internal vindex = __m256i_to_internal(__vindex); ret.v0 = _mm_i32gather_ps(base_addr, vindex.v0, scale); ret.v1 = _mm_i32gather_ps(base_addr, vindex.v1, scale); return __m256_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i64gather_ps(const float* base_addr, __m128i vindex, const int scale) { float* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (float*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); } return (__m128)wasm_f32x4_make(*lane[0], *lane[1], 0, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i64gather_ps(const float* base_addr, __m256i __vindex, const int scale) { __m256i_internal vindex = __m256i_to_internal(__vindex); float* lane[4]; __m128i current_vindex; for (size_t i = 0; i < 4; i++) { current_vindex = i < 2 ? vindex.v0 : vindex.v1; lane[i] = (float*)((uint8_t*)base_addr + ((__i64x2)current_vindex)[i & 1] * (uint64_t)((uint32_t)scale)); } return (__m128)wasm_f32x4_make(*lane[0], *lane[1], *lane[2], *lane[3]); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i32gather_epi32(const int* base_addr, __m128i vindex, const int scale) { int32_t* lane[4]; for (size_t i = 0; i < 4; i++) { lane[i] = (int32_t*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } return (__m128i)wasm_i32x4_make(*lane[0], *lane[1], *lane[2], *lane[3]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i32gather_epi32(const int* base_addr, __m256i __vindex, const int scale) { __m256i_internal ret; __m256i_internal vindex = __m256i_to_internal(__vindex); ret.v0 = _mm_i32gather_epi32(base_addr, vindex.v0, scale); ret.v1 = _mm_i32gather_epi32(base_addr, vindex.v1, scale); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i64gather_epi32(const int* base_addr, __m128i vindex, const int scale) { int32_t* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (int32_t*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); } return (__m128i)wasm_i32x4_make(*lane[0], *lane[1], 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i64gather_epi32(const int* base_addr, __m256i __vindex, const int scale) { __m256i_internal vindex = __m256i_to_internal(__vindex); int32_t* lane[4]; __m128i current_vindex; for (size_t i = 0; i < 4; i++) { current_vindex = i < 2 ? vindex.v0 : vindex.v1; lane[i] = (int32_t*)((uint8_t*)base_addr + ((__i64x2)current_vindex)[i & 1] * (uint64_t)((uint32_t)scale)); } return (__m128i)wasm_i32x4_make(*lane[0], *lane[1], *lane[2], *lane[3]); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i32gather_epi64(const long long* base_addr, __m128i vindex, const int scale) { int64_t* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (int64_t*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } return (__m128i)wasm_i64x2_make(*lane[0], *lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i32gather_epi64(const long long* base_addr, __m128i vindex, const int scale) { __m256i_internal ret; int64_t* lane[4]; for (size_t i = 0; i < 4; i++) { lane[i] = (int64_t*)((uint8_t*)base_addr + (int64_t)(((__i32x4)vindex)[i]) * (uint64_t)((uint32_t)scale)); } ret.v0 = (__m128i)wasm_i64x2_make(*lane[0], *lane[1]); ret.v1 = (__m128i)wasm_i64x2_make(*lane[2], *lane[3]); return __m256i_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_i64gather_epi64(const long long* base_addr, __m128i vindex, const int scale) { int64_t* lane[2]; for (size_t i = 0; i < 2; i++) { lane[i] = (int64_t*)((uint8_t*)base_addr + ((__i64x2)vindex)[i] * (uint64_t)((uint32_t)scale)); } return (__m128i)wasm_i64x2_make(*lane[0], *lane[1]); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm256_i64gather_epi64(const long long* base_addr, __m256i __vindex, const int scale) { __m256i_internal ret, vindex; vindex = __m256i_to_internal(__vindex); ret.v0 = _mm_i64gather_epi64(base_addr, vindex.v0, scale); ret.v1 = _mm_i64gather_epi64(base_addr, vindex.v1, scale); return __m256i_from_internal(ret); } #endif /* __emscripten_avx2intrin_h__ */ PK!TE&XX3emscripten/cache/sysroot/include/compat/avxintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_immintrin_h__ #error "Never use directly; include instead." #endif #ifndef __emscripten_avxintrin_h__ #define __emscripten_avxintrin_h__ #ifndef __AVX__ #error "AVX instruction set not enabled" #endif typedef float __m256 __attribute__((__vector_size__(32), __aligned__(32))); typedef double __m256d __attribute__((__vector_size__(32), __aligned__(32))); typedef int32_t __m256i __attribute__((__vector_size__(32), __aligned__(32))); typedef int32_t __m128i_u __attribute__((__vector_size__(16), __aligned__(1))); typedef int32_t __m256i_u __attribute__((__vector_size__(32), __aligned__(1))); typedef struct { __m128d v0; __m128d v1; } __m256d_internal; typedef struct { __m128 v0; __m128 v1; } __m256_internal; typedef struct { __m128i v0; __m128i v1; } __m256i_internal; static __inline__ __m256_internal __m256_to_internal(__m256 a) { union { __m256 in; __m256_internal out; } ret; ret.in = a; return ret.out; } static __inline__ __m256 __m256_from_internal(__m256_internal a) { union { __m256_internal in; __m256 out; } ret; ret.in = a; return ret.out; } static __inline__ __m256d_internal __m256d_to_internal(__m256d a) { union { __m256d in; __m256d_internal out; } ret; ret.in = a; return ret.out; } static __inline__ __m256d __m256d_from_internal(__m256d_internal a) { union { __m256d_internal in; __m256d out; } ret; ret.in = a; return ret.out; } static __inline__ __m256i_internal __m256i_to_internal(__m256i a) { union { __m256i in; __m256i_internal out; } ret; ret.in = a; return ret.out; } static __inline__ __m256i __m256i_from_internal(__m256i_internal a) { union { __m256i_internal in; __m256i out; } ret; ret.in = a; return ret.out; } union __m256_data { __m256i int_view; __m256d double_view; __m256 float_view; __m128i_u int_u_view; }; static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_add_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_add_pd(a.v0, b.v0); ret.v1 = _mm_add_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_add_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_add_ps(a.v0, b.v0); ret.v1 = _mm_add_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_sub_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_sub_pd(a.v0, b.v0); ret.v1 = _mm_sub_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_sub_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_sub_ps(a.v0, b.v0); ret.v1 = _mm_sub_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_addsub_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_addsub_pd(a.v0, b.v0); ret.v1 = _mm_addsub_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_addsub_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_addsub_ps(a.v0, b.v0); ret.v1 = _mm_addsub_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_div_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_div_pd(a.v0, b.v0); ret.v1 = _mm_div_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_div_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_div_ps(a.v0, b.v0); ret.v1 = _mm_div_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_max_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_max_pd(a.v0, b.v0); ret.v1 = _mm_max_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_max_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_max_ps(a.v0, b.v0); ret.v1 = _mm_max_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_min_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_min_pd(a.v0, b.v0); ret.v1 = _mm_min_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_min_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_min_ps(a.v0, b.v0); ret.v1 = _mm_min_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_mul_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_mul_pd(a.v0, b.v0); ret.v1 = _mm_mul_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_mul_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_mul_ps(a.v0, b.v0); ret.v1 = _mm_mul_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_sqrt_pd(__m256d __a) { __m256d_internal ret, a; a = __m256d_to_internal(__a); ret.v0 = _mm_sqrt_pd(a.v0); ret.v1 = _mm_sqrt_pd(a.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_sqrt_ps(__m256 __a) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_sqrt_ps(a.v0); ret.v1 = _mm_sqrt_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_rsqrt_ps(__m256 __a) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_rsqrt_ps(a.v0); ret.v1 = _mm_rsqrt_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_rcp_ps(__m256 __a) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_rcp_ps(a.v0); ret.v1 = _mm_rcp_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_round_pd(__m256d __a, int __rounding) { __m256d_internal ret, a; a = __m256d_to_internal(__a); ret.v0 = _mm_round_pd(a.v0, __rounding); ret.v1 = _mm_round_pd(a.v1, __rounding); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_round_ps(__m256 __a, int __rounding) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_round_ps(a.v0, __rounding); ret.v1 = _mm_round_ps(a.v1, __rounding); return __m256_from_internal(ret); } #define _mm256_ceil_pd(V) _mm256_round_pd((V), _MM_FROUND_CEIL) #define _mm256_floor_pd(V) _mm256_round_pd((V), _MM_FROUND_FLOOR) #define _mm256_ceil_ps(V) _mm256_round_ps((V), _MM_FROUND_CEIL) #define _mm256_floor_ps(V) _mm256_round_ps((V), _MM_FROUND_FLOOR) static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_and_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_and_pd(a.v0, b.v0); ret.v1 = _mm_and_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_and_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_and_ps(a.v0, b.v0); ret.v1 = _mm_and_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_andnot_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_andnot_pd(a.v0, b.v0); ret.v1 = _mm_andnot_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_andnot_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_andnot_ps(a.v0, b.v0); ret.v1 = _mm_andnot_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_or_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_or_pd(a.v0, b.v0); ret.v1 = _mm_or_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_or_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_or_ps(a.v0, b.v0); ret.v1 = _mm_or_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_xor_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_xor_pd(a.v0, b.v0); ret.v1 = _mm_xor_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_xor_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_xor_ps(a.v0, b.v0); ret.v1 = _mm_xor_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_hadd_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_hadd_pd(a.v0, b.v0); ret.v1 = _mm_hadd_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_hadd_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_hadd_ps(a.v0, b.v0); ret.v1 = _mm_hadd_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_hsub_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_hsub_pd(a.v0, b.v0); ret.v1 = _mm_hsub_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_hsub_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_hsub_ps(a.v0, b.v0); ret.v1 = _mm_hsub_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_permutevar_pd(__m128d __a, __m128i __c) { return (__m128d)wasm_f64x2_make( ((__f64x2)__a)[(wasm_i64x2_extract_lane(__c, 0) >> 1) & 1], ((__f64x2)__a)[(wasm_i64x2_extract_lane(__c, 1) >> 1) & 1]); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_permutevar_pd(__m256d __a, __m256i __c) { __m256d_internal ret, a; __m256i_internal c; a = __m256d_to_internal(__a); c = __m256i_to_internal(__c); ret.v0 = _mm_permutevar_pd(a.v0, c.v0); ret.v1 = _mm_permutevar_pd(a.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_permutevar_ps(__m128 __a, __m128i __c) { return (__m128)wasm_f32x4_make( ((__f32x4)__a)[wasm_i32x4_extract_lane(__c, 0) & 3], ((__f32x4)__a)[wasm_i32x4_extract_lane(__c, 1) & 3], ((__f32x4)__a)[wasm_i32x4_extract_lane(__c, 2) & 3], ((__f32x4)__a)[wasm_i32x4_extract_lane(__c, 3) & 3]); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_permutevar_ps(__m256 __a, __m256i __c) { __m256_internal ret, a; __m256i_internal c; a = __m256_to_internal(__a); c = __m256i_to_internal(__c); ret.v0 = _mm_permutevar_ps(a.v0, c.v0); ret.v1 = _mm_permutevar_ps(a.v1, c.v1); return __m256_from_internal(ret); } #define _mm_permute_pd(__a, __imm) \ ((__m128d)wasm_i64x2_shuffle( \ (__m128d)(__a), (__m128d)(__a), ((__imm) & 1), (((__imm) >> 1) & 1))) #define _mm256_permute_pd(__A, __imm) \ __extension__({ \ __m256d_internal __a = __m256d_to_internal(__A); \ _mm256_set_m128d(_mm_permute_pd(__a.v1, (__imm) >> 2), \ _mm_permute_pd(__a.v0, (__imm))); \ }) #define _mm_permute_ps(__a, __imm) \ ((__m128)wasm_i32x4_shuffle((__m128)(__a), \ (__m128)(__a), \ ((__imm) & 3), \ (((__imm) >> 2) & 3), \ (((__imm) >> 4) & 3), \ (((__imm) >> 6) & 3))) #define _mm256_permute_ps(__A, __imm) \ __extension__({ \ __m256_internal __a = __m256_to_internal(__A); \ _mm256_set_m128(_mm_permute_ps(__a.v1, (__imm)), \ _mm_permute_ps(__a.v0, (__imm))); \ }) static __inline__ __m128d __avx_select4d(__m256d __a, __m256d __b, const int imm8) { __m256d_internal a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); switch (imm8 & 0xF) { case 0: case 4: return a.v0; case 1: case 5: return a.v1; case 2: case 6: return b.v0; case 3: case 7: return b.v1; default: return (__m128d)wasm_i64x2_const_splat(0); } } static __inline__ __m128 __avx_select4(__m256 __a, __m256 __b, const int imm8) { __m256_internal a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); switch (imm8 & 0xF) { case 0: case 4: return a.v0; case 1: case 5: return a.v1; case 2: case 6: return b.v0; case 3: case 7: return b.v1; default: return (__m128)wasm_i64x2_const_splat(0); } } static __inline__ __m128i __avx_select4i(__m256i __a, __m256i __b, const int imm8) { __m256i_internal a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); switch (imm8 & 0xF) { case 0: case 4: return a.v0; case 1: case 5: return a.v1; case 2: case 6: return b.v0; case 3: case 7: return b.v1; default: return wasm_i64x2_const_splat(0); } } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_permute2f128_pd(__m256d __a, __m256d __b, const int imm8) { __m256d_internal ret; ret.v0 = __avx_select4d(__a, __b, imm8); ret.v1 = __avx_select4d(__a, __b, imm8 >> 4); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_permute2f128_ps(__m256 __a, __m256 __b, const int imm8) { __m256_internal ret; ret.v0 = __avx_select4(__a, __b, imm8); ret.v1 = __avx_select4(__a, __b, imm8 >> 4); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_permute2f128_si256(__m256i __a, __m256i __b, const int imm8) { __m256i_internal ret; ret.v0 = __avx_select4i(__a, __b, imm8); ret.v1 = __avx_select4i(__a, __b, imm8 >> 4); return __m256i_from_internal(ret); } #define _mm256_blend_pd(__A, __B, imm8) \ __extension__({ \ __m256d_internal __a = __m256d_to_internal(__A); \ __m256d_internal __b = __m256d_to_internal(__B); \ _mm256_set_m128d(_mm_blend_pd(__a.v1, __b.v1, (imm8) >> 2), \ _mm_blend_pd(__a.v0, __b.v0, (imm8))); \ }) #define _mm256_blend_ps(__A, __B, imm) \ __extension__({ \ __m256_internal __a = __m256_to_internal(__A); \ __m256_internal __b = __m256_to_internal(__B); \ _mm256_set_m128(_mm_blend_ps(__a.v1, __b.v1, (imm) >> 4), \ _mm_blend_ps(__a.v0, __b.v0, (imm))); \ }) static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) { __m256d_internal ret, a, b, c; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); c = __m256d_to_internal(__c); ret.v0 = _mm_blendv_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_blendv_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) { __m256_internal ret, a, b, c; a = __m256_to_internal(__a); b = __m256_to_internal(__b); c = __m256_to_internal(__c); ret.v0 = _mm_blendv_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_blendv_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } #define _mm256_dp_ps(__A, __B, imm) \ __extension__({ \ __m256_internal __a = __m256_to_internal(__A); \ __m256_internal __b = __m256_to_internal(__B); \ _mm256_set_m128(_mm_dp_ps(__a.v1, __b.v1, (imm)), \ _mm_dp_ps(__a.v0, __b.v0, (imm))); \ }) #define _mm256_shuffle_ps(__A, __B, mask) \ __extension__({ \ __m256_internal __a = __m256_to_internal(__A); \ __m256_internal __b = __m256_to_internal(__B); \ _mm256_set_m128(_mm_shuffle_ps(__a.v1, __b.v1, (mask)), \ _mm_shuffle_ps(__a.v0, __b.v0, (mask))); \ }) #define _mm256_shuffle_pd(__A, __B, mask) \ __extension__({ \ __m256d_internal __a = __m256d_to_internal(__A); \ __m256d_internal __b = __m256d_to_internal(__B); \ _mm256_set_m128d(_mm_shuffle_pd(__a.v1, __b.v1, (mask) >> 2), \ _mm_shuffle_pd(__a.v0, __b.v0, (mask))); \ }) #define _CMP_EQ_OQ 0 #define _CMP_LT_OS 1 #define _CMP_LE_OS 2 #define _CMP_UNORD_Q 3 #define _CMP_NEQ_UQ 4 #define _CMP_NLT_US 5 #define _CMP_NLE_US 6 #define _CMP_ORD_Q 7 #define _CMP_EQ_UQ 8 #define _CMP_NGE_US 9 #define _CMP_NGT_US 10 #define _CMP_FALSE_OQ 11 #define _CMP_NEQ_OQ 12 #define _CMP_GE_OS 13 #define _CMP_GT_OS 14 #define _CMP_TRUE_UQ 15 #define _CMP_EQ_OS 16 #define _CMP_LT_OQ 17 #define _CMP_LE_OQ 18 #define _CMP_UNORD_S 19 #define _CMP_NEQ_US 20 #define _CMP_NLT_UQ 21 #define _CMP_NLE_UQ 22 #define _CMP_ORD_S 23 #define _CMP_EQ_US 24 #define _CMP_NGE_UQ 25 #define _CMP_NGT_UQ 26 #define _CMP_FALSE_OS 27 #define _CMP_NEQ_OS 28 #define _CMP_GE_OQ 29 #define _CMP_GT_OQ 30 #define _CMP_TRUE_US 31 #define _mm_cmp_pd(__a, __b, __imm) \ __extension__({ \ __m128d __ret; \ switch ((__imm)) { \ case _CMP_EQ_OQ: \ case _CMP_EQ_OS: \ __ret = _mm_cmpeq_pd((__a), (__b)); \ break; \ case _CMP_EQ_UQ: \ case _CMP_EQ_US: \ __ret = _mm_or_pd(_mm_cmpeq_pd((__a), (__b)), \ _mm_cmpunord_pd((__a), (__b))); \ break; \ case _CMP_LT_OS: \ case _CMP_LT_OQ: \ __ret = _mm_cmplt_pd((__a), (__b)); \ break; \ case _CMP_LE_OS: \ case _CMP_LE_OQ: \ __ret = _mm_cmple_pd((__a), (__b)); \ break; \ case _CMP_UNORD_Q: \ case _CMP_UNORD_S: \ __ret = _mm_cmpunord_pd((__a), (__b)); \ break; \ case _CMP_NEQ_UQ: \ case _CMP_NEQ_US: \ __ret = _mm_cmpneq_pd((__a), (__b)); \ break; \ case _CMP_NEQ_OQ: \ case _CMP_NEQ_OS: \ __ret = _mm_andnot_pd(_mm_cmpunord_pd((__a), (__b)), \ _mm_cmpneq_pd((__a), (__b))); \ break; \ case _CMP_NLT_US: \ case _CMP_NLT_UQ: \ __ret = _mm_cmpnlt_pd((__a), (__b)); \ break; \ case _CMP_ORD_Q: \ case _CMP_ORD_S: \ __ret = _mm_cmpord_pd((__a), (__b)); \ break; \ case _CMP_NGE_US: \ case _CMP_NGE_UQ: \ __ret = _mm_cmpnge_pd((__a), (__b)); \ break; \ case _CMP_NGT_US: \ case _CMP_NGT_UQ: \ __ret = _mm_cmpngt_pd((__a), (__b)); \ break; \ case _CMP_FALSE_OQ: \ case _CMP_FALSE_OS: \ __ret = _mm_setzero_pd(); \ break; \ case _CMP_GE_OS: \ case _CMP_GE_OQ: \ __ret = _mm_cmpge_pd((__a), (__b)); \ break; \ case _CMP_GT_OS: \ case _CMP_GT_OQ: \ __ret = _mm_cmpgt_pd((__a), (__b)); \ break; \ case _CMP_TRUE_UQ: \ case _CMP_TRUE_US: \ __ret = (__m128d)wasm_i8x16_splat(0xFF); \ break; \ case _CMP_NLE_US: \ case _CMP_NLE_UQ: \ __ret = _mm_cmpnle_pd((__a), (__b)); \ break; \ } \ __ret; \ }) #define _mm_cmp_ps(__a, __b, __imm) \ __extension__({ \ __m128 __ret; \ switch ((__imm)) { \ case _CMP_EQ_OQ: \ case _CMP_EQ_OS: \ __ret = _mm_cmpeq_ps((__a), (__b)); \ break; \ case _CMP_EQ_UQ: \ case _CMP_EQ_US: \ __ret = _mm_or_ps(_mm_cmpeq_ps((__a), (__b)), \ _mm_cmpunord_ps((__a), (__b))); \ break; \ case _CMP_LT_OS: \ case _CMP_LT_OQ: \ __ret = _mm_cmplt_ps((__a), (__b)); \ break; \ case _CMP_LE_OS: \ case _CMP_LE_OQ: \ __ret = _mm_cmple_ps((__a), (__b)); \ break; \ case _CMP_UNORD_Q: \ case _CMP_UNORD_S: \ __ret = _mm_cmpunord_ps((__a), (__b)); \ break; \ case _CMP_NEQ_UQ: \ case _CMP_NEQ_US: \ __ret = _mm_cmpneq_ps((__a), (__b)); \ break; \ case _CMP_NEQ_OQ: \ case _CMP_NEQ_OS: \ __ret = _mm_andnot_ps(_mm_cmpunord_ps((__a), (__b)), \ _mm_cmpneq_ps((__a), (__b))); \ break; \ case _CMP_NLT_US: \ case _CMP_NLT_UQ: \ __ret = _mm_cmpnlt_ps((__a), (__b)); \ break; \ case _CMP_ORD_Q: \ case _CMP_ORD_S: \ __ret = _mm_cmpord_ps((__a), (__b)); \ break; \ case _CMP_NGE_US: \ case _CMP_NGE_UQ: \ __ret = _mm_cmpnge_ps((__a), (__b)); \ break; \ case _CMP_NGT_US: \ case _CMP_NGT_UQ: \ __ret = _mm_cmpngt_ps((__a), (__b)); \ break; \ case _CMP_FALSE_OQ: \ case _CMP_FALSE_OS: \ __ret = _mm_setzero_ps(); \ break; \ case _CMP_GE_OS: \ case _CMP_GE_OQ: \ __ret = _mm_cmpge_ps((__a), (__b)); \ break; \ case _CMP_GT_OS: \ case _CMP_GT_OQ: \ __ret = _mm_cmpgt_ps((__a), (__b)); \ break; \ case _CMP_TRUE_UQ: \ case _CMP_TRUE_US: \ __ret = (__m128)wasm_i8x16_splat(0xFF); \ break; \ case _CMP_NLE_US: \ case _CMP_NLE_UQ: \ __ret = _mm_cmpnle_ps((__a), (__b)); \ break; \ } \ __ret; \ }) #define _mm_cmp_sd(__a, __b, __imm) \ __extension__({ \ __m128d __ret; \ switch ((__imm)) { \ case _CMP_EQ_OQ: \ case _CMP_EQ_OS: \ __ret = _mm_cmpeq_sd((__a), (__b)); \ break; \ case _CMP_EQ_UQ: \ case _CMP_EQ_US: \ __ret = _mm_move_sd((__a), \ _mm_or_pd(_mm_cmpeq_sd((__a), (__b)), \ _mm_cmpunord_sd((__a), (__b)))); \ break; \ case _CMP_LT_OS: \ case _CMP_LT_OQ: \ __ret = _mm_cmplt_sd((__a), (__b)); \ break; \ case _CMP_LE_OS: \ case _CMP_LE_OQ: \ __ret = _mm_cmple_sd((__a), (__b)); \ break; \ case _CMP_UNORD_Q: \ case _CMP_UNORD_S: \ __ret = _mm_cmpunord_sd((__a), (__b)); \ break; \ case _CMP_NEQ_UQ: \ case _CMP_NEQ_US: \ __ret = _mm_cmpneq_sd((__a), (__b)); \ break; \ case _CMP_NEQ_OQ: \ case _CMP_NEQ_OS: \ __ret = _mm_move_sd((__a), \ _mm_andnot_pd(_mm_cmpunord_sd((__a), (__b)), \ _mm_cmpneq_sd((__a), (__b)))); \ break; \ case _CMP_NLT_US: \ case _CMP_NLT_UQ: \ __ret = _mm_cmpnlt_sd((__a), (__b)); \ break; \ case _CMP_ORD_Q: \ case _CMP_ORD_S: \ __ret = _mm_cmpord_sd((__a), (__b)); \ break; \ case _CMP_NGE_US: \ case _CMP_NGE_UQ: \ __ret = _mm_cmpnge_sd((__a), (__b)); \ break; \ case _CMP_NGT_US: \ case _CMP_NGT_UQ: \ __ret = _mm_cmpngt_sd((__a), (__b)); \ break; \ case _CMP_FALSE_OQ: \ case _CMP_FALSE_OS: \ __ret = _mm_move_sd((__a), _mm_setzero_pd()); \ break; \ case _CMP_GE_OS: \ case _CMP_GE_OQ: \ __ret = _mm_cmpge_sd((__a), (__b)); \ break; \ case _CMP_GT_OS: \ case _CMP_GT_OQ: \ __ret = _mm_cmpgt_sd((__a), (__b)); \ break; \ case _CMP_TRUE_UQ: \ case _CMP_TRUE_US: \ __ret = _mm_move_sd((__a), (__m128d)wasm_i8x16_splat(0xFF)); \ break; \ case _CMP_NLE_US: \ case _CMP_NLE_UQ: \ __ret = _mm_cmpnle_sd((__a), (__b)); \ break; \ } \ __ret; \ }) #define _mm_cmp_ss(__a, __b, __imm) \ __extension__({ \ __m128 __ret; \ switch ((__imm)) { \ case _CMP_EQ_OQ: \ case _CMP_EQ_OS: \ __ret = _mm_cmpeq_ss((__a), (__b)); \ break; \ case _CMP_EQ_UQ: \ case _CMP_EQ_US: \ __ret = _mm_move_ss((__a), \ _mm_or_ps(_mm_cmpeq_ss((__a), (__b)), \ _mm_cmpunord_ss((__a), (__b)))); \ break; \ case _CMP_LT_OS: \ case _CMP_LT_OQ: \ __ret = _mm_cmplt_ss((__a), (__b)); \ break; \ case _CMP_LE_OS: \ case _CMP_LE_OQ: \ __ret = _mm_cmple_ss((__a), (__b)); \ break; \ case _CMP_UNORD_Q: \ case _CMP_UNORD_S: \ __ret = _mm_cmpunord_ss((__a), (__b)); \ break; \ case _CMP_NEQ_UQ: \ case _CMP_NEQ_US: \ __ret = _mm_cmpneq_ss((__a), (__b)); \ break; \ case _CMP_NEQ_OQ: \ case _CMP_NEQ_OS: \ __ret = _mm_move_ss((__a), \ _mm_andnot_ps(_mm_cmpunord_ss((__a), (__b)), \ _mm_cmpneq_ss((__a), (__b)))); \ break; \ case _CMP_NLT_US: \ case _CMP_NLT_UQ: \ __ret = _mm_cmpnlt_ss((__a), (__b)); \ break; \ case _CMP_ORD_Q: \ case _CMP_ORD_S: \ __ret = _mm_cmpord_ss((__a), (__b)); \ break; \ case _CMP_NGE_US: \ case _CMP_NGE_UQ: \ __ret = _mm_cmpnge_ss((__a), (__b)); \ break; \ case _CMP_NGT_US: \ case _CMP_NGT_UQ: \ __ret = _mm_cmpngt_ss((__a), (__b)); \ break; \ case _CMP_FALSE_OQ: \ case _CMP_FALSE_OS: \ __ret = _mm_move_ss((__a), _mm_setzero_ps()); \ break; \ case _CMP_GE_OS: \ case _CMP_GE_OQ: \ __ret = _mm_cmpge_ss((__a), (__b)); \ break; \ case _CMP_GT_OS: \ case _CMP_GT_OQ: \ __ret = _mm_cmpgt_ss((__a), (__b)); \ break; \ case _CMP_TRUE_UQ: \ case _CMP_TRUE_US: \ __ret = _mm_move_ss((__a), (__m128)wasm_i8x16_splat(0xFF)); \ break; \ case _CMP_NLE_US: \ case _CMP_NLE_UQ: \ __ret = _mm_cmpnle_ss((__a), (__b)); \ break; \ } \ __ret; \ }) static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_cmp_pd(__m256d __a, __m256d __b, const int imm8) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_cmp_pd(a.v0, b.v0, imm8); ret.v1 = _mm_cmp_pd(a.v1, b.v1, imm8); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_cmp_ps(__m256 __a, __m256 __b, const int imm8) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_cmp_ps(a.v0, b.v0, imm8); ret.v1 = _mm_cmp_ps(a.v1, b.v1, imm8); return __m256_from_internal(ret); } #define _mm256_extract_epi32(__A, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ ((N) & 0x7) < 4 ? _mm_extract_epi32(__a.v0, (N) & 0x3) \ : _mm_extract_epi32(__a.v1, (N) & 0x3); \ }) #define _mm256_extract_epi16(__A, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ ((N) & 0xF) < 8 ? _mm_extract_epi16(__a.v0, (N) & 0x7) \ : _mm_extract_epi16(__a.v1, (N) & 0x7); \ }) #define _mm256_extract_epi8(__A, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ ((N) & 0x1F) < 16 ? _mm_extract_epi8(__a.v0, (N) & 0xF) \ : _mm_extract_epi8(__a.v1, (N) & 0xF); \ }) #define _mm256_extract_epi64(__A, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ ((N) & 0x3) < 2 ? _mm_extract_epi64(__a.v0, (N) & 0x1) \ : _mm_extract_epi64(__a.v1, (N) & 0x1); \ }) #define _mm256_insert_epi32(__A, __I, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ int32_t __i = (__I); \ ((N) & 0x7) < 4 \ ? _mm256_set_m128i(__a.v1, _mm_insert_epi32(__a.v0, __i, (N) & 0x3)) \ : _mm256_set_m128i(_mm_insert_epi32(__a.v1, __i, (N) & 0x3), __a.v0); \ }) #define _mm256_insert_epi16(__A, __I, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ int16_t __i = (__I); \ ((N) & 0xF) < 8 \ ? _mm256_set_m128i(__a.v1, _mm_insert_epi16(__a.v0, __i, (N) & 0x7)) \ : _mm256_set_m128i(_mm_insert_epi16(__a.v1, __i, (N) & 0x7), __a.v0); \ }) #define _mm256_insert_epi8(__A, __I, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ int8_t __i = (__I); \ ((N) & 0x1F) < 16 \ ? _mm256_set_m128i(__a.v1, _mm_insert_epi8(__a.v0, __i, (N) & 0xF)) \ : _mm256_set_m128i(_mm_insert_epi8(__a.v1, __i, (N) & 0xF), __a.v0); \ }) #define _mm256_insert_epi64(__A, __I, N) \ __extension__({ \ __m256i_internal __a = __m256i_to_internal(__A); \ int64_t __i = (__I); \ ((N) & 0x3) < 2 \ ? _mm256_set_m128i(__a.v1, _mm_insert_epi64(__a.v0, __i, (N) & 0x1)) \ : _mm256_set_m128i(_mm_insert_epi64(__a.v1, __i, (N) & 0x1), __a.v0); \ }) static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi32_pd(__m128i __a) { __m256d_internal ret; ret.v0 = _mm_cvtepi32_pd(__a); __m128i __a1 = wasm_i32x4_shuffle(__a, __a, 2, 3, 0, 0); ret.v1 = _mm_cvtepi32_pd(__a1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_cvtepi32_ps(__m256i __a) { __m256_internal ret; __m256i_internal a = __m256i_to_internal(__a); ret.v0 = _mm_cvtepi32_ps(a.v0); ret.v1 = _mm_cvtepi32_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm256_cvtpd_ps(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); __m128 low = _mm_cvtpd_ps(a.v0); __m128 high = _mm_cvtpd_ps(a.v1); __m128 ret = (__m128)wasm_i32x4_shuffle(low, high, 0, 1, 4, 5); return ret; } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtps_epi32(__m256 __a) { __m256i_internal ret; __m256_internal a = __m256_to_internal(__a); ret.v0 = _mm_cvtps_epi32(a.v0); ret.v1 = _mm_cvtps_epi32(a.v1); return __m256i_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_cvtps_pd(__m128 __a) { __m256d_internal ret; ret.v0 = _mm_cvtps_pd(__a); __m128 __a1 = (__m128)wasm_i32x4_shuffle(__a, __a, 2, 3, 0, 0); ret.v1 = _mm_cvtps_pd(__a1); return __m256d_from_internal(ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm256_cvttpd_epi32(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); __m128i low = _mm_cvttpd_epi32(a.v0); __m128i high = _mm_cvttpd_epi32(a.v1); __m128i ret = wasm_i32x4_shuffle(low, high, 0, 1, 4, 5); return ret; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm256_cvtpd_epi32(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); __m128i low = _mm_cvtpd_epi32(a.v0); __m128i high = _mm_cvtpd_epi32(a.v1); __m128i ret = wasm_i32x4_shuffle(low, high, 0, 1, 4, 5); return ret; } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_cvttps_epi32(__m256 __a) { __m256i_internal ret; __m256_internal a = __m256_to_internal(__a); ret.v0 = _mm_cvttps_epi32(a.v0); ret.v1 = _mm_cvttps_epi32(a.v1); return __m256i_from_internal(ret); } static __inline__ double __attribute__((__always_inline__, __nodebug__)) _mm256_cvtsd_f64(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); return _mm_cvtsd_f64(a.v0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_cvtsi256_si32(__m256i __a) { __m256i_internal a = __m256i_to_internal(__a); return _mm_cvtsi128_si32(a.v0); } static __inline__ float __attribute__((__always_inline__, __nodebug__)) _mm256_cvtss_f32(__m256 __a) { __m256_internal a = __m256_to_internal(__a); return _mm_cvtss_f32(a.v0); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_movehdup_ps(__m256 __a) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_movehdup_ps(a.v0); ret.v1 = _mm_movehdup_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_moveldup_ps(__m256 __a) { __m256_internal ret, a; a = __m256_to_internal(__a); ret.v0 = _mm_moveldup_ps(a.v0); ret.v1 = _mm_moveldup_ps(a.v1); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_movedup_pd(__m256d __a) { __m256d_internal ret, a; a = __m256d_to_internal(__a); ret.v0 = _mm_movedup_pd(a.v0); ret.v1 = _mm_movedup_pd(a.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_unpackhi_pd(a.v0, b.v0); ret.v1 = _mm_unpackhi_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_pd(__m256d __a, __m256d __b) { __m256d_internal ret, a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); ret.v0 = _mm_unpacklo_pd(a.v0, b.v0); ret.v1 = _mm_unpacklo_pd(a.v1, b.v1); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_unpackhi_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_unpackhi_ps(a.v0, b.v0); ret.v1 = _mm_unpackhi_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_unpacklo_ps(__m256 __a, __m256 __b) { __m256_internal ret, a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); ret.v0 = _mm_unpacklo_ps(a.v0, b.v0); ret.v1 = _mm_unpacklo_ps(a.v1, b.v1); return __m256_from_internal(ret); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testz_pd(__m128d __a, __m128d __b) { v128_t __m = wasm_u64x2_shr(wasm_v128_not(wasm_v128_and((v128_t)__a, (v128_t)__b)), 63); return wasm_i64x2_extract_lane(__m, 0) & wasm_i64x2_extract_lane(__m, 1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testc_pd(__m128d __a, __m128d __b) { v128_t __m = wasm_u64x2_shr(wasm_v128_or(wasm_v128_not((v128_t)__b), (v128_t)__a), 63); return wasm_i64x2_extract_lane(__m, 0) & wasm_i64x2_extract_lane(__m, 1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testnzc_pd(__m128d __a, __m128d __b) { v128_t __m = wasm_u64x2_shr(wasm_v128_and((v128_t)__a, (v128_t)__b), 63); v128_t __m2 = wasm_u64x2_shr(wasm_v128_andnot((v128_t)__b, (v128_t)__a), 63); return (wasm_i64x2_extract_lane(__m, 0) | wasm_i64x2_extract_lane(__m, 1)) & (wasm_i64x2_extract_lane(__m2, 0) | wasm_i64x2_extract_lane(__m2, 1)); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testz_ps(__m128 __a, __m128 __b) { v128_t __m = wasm_u32x4_shr(wasm_v128_not(wasm_v128_and((v128_t)__a, (v128_t)__b)), 31); __m = wasm_v128_and(__m, (v128_t)_mm_movehl_ps((__m128)__m, (__m128)__m)); __m = wasm_v128_and(__m, _mm_shuffle_epi32(__m, _MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(__m, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testc_ps(__m128 __a, __m128 __b) { v128_t __m = wasm_u32x4_shr(wasm_v128_or(wasm_v128_not((v128_t)__b), (v128_t)__a), 31); __m = wasm_v128_and(__m, (v128_t)_mm_movehl_ps((__m128)__m, (__m128)__m)); __m = wasm_v128_and(__m, _mm_shuffle_epi32(__m, _MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(__m, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testnzc_ps(__m128 __a, __m128 __b) { v128_t __m = wasm_u32x4_shr(wasm_v128_and((v128_t)__a, (v128_t)__b), 31); v128_t __m2 = wasm_u32x4_shr(wasm_v128_andnot((v128_t)__b, (v128_t)__a), 31); __m = wasm_v128_or(__m, (v128_t)_mm_movehl_ps((__m128)__m, (__m128)__m)); __m2 = wasm_v128_or(__m2, (v128_t)_mm_movehl_ps((__m128)__m2, (__m128)__m2)); __m = wasm_v128_or(__m, _mm_shuffle_epi32(__m, _MM_SHUFFLE(3, 2, 0, 1))); __m2 = wasm_v128_or(__m2, _mm_shuffle_epi32(__m2, _MM_SHUFFLE(3, 2, 0, 1))); return wasm_i32x4_extract_lane(__m, 0) & wasm_i32x4_extract_lane(__m2, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testz_pd(__m256d __a, __m256d __b) { __m256d_internal a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); return _mm_testz_pd(a.v0, b.v0) & _mm_testz_pd(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testc_pd(__m256d __a, __m256d __b) { __m256d_internal a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); return _mm_testc_pd(a.v0, b.v0) & _mm_testc_pd(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testnzc_pd(__m256d __a, __m256d __b) { __m256d_internal a, b; a = __m256d_to_internal(__a); b = __m256d_to_internal(__b); v128_t __m = wasm_u64x2_shr(wasm_v128_and((v128_t)a.v0, (v128_t)b.v0), 63); v128_t __m1 = wasm_u64x2_shr(wasm_v128_and((v128_t)a.v1, (v128_t)b.v1), 63); v128_t __m2 = wasm_u64x2_shr(wasm_v128_andnot((v128_t)b.v0, (v128_t)a.v0), 63); v128_t __m3 = wasm_u64x2_shr(wasm_v128_andnot((v128_t)b.v1, (v128_t)a.v1), 63); return wasm_v128_any_true(wasm_v128_or(__m, __m1)) & wasm_v128_any_true(wasm_v128_or(__m2, __m3)); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testz_ps(__m256 __a, __m256 __b) { __m256_internal a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); return _mm_testz_ps(a.v0, b.v0) & _mm_testz_ps(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testc_ps(__m256 __a, __m256 __b) { __m256_internal a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); return _mm_testc_ps(a.v0, b.v0) & _mm_testc_ps(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testnzc_ps(__m256 __a, __m256 __b) { __m256_internal a, b; a = __m256_to_internal(__a); b = __m256_to_internal(__b); v128_t __m = wasm_u32x4_shr(wasm_v128_and((v128_t)a.v0, (v128_t)b.v0), 31); v128_t __m1 = wasm_u32x4_shr(wasm_v128_and((v128_t)a.v1, (v128_t)b.v1), 31); v128_t __m2 = wasm_u32x4_shr(wasm_v128_andnot((v128_t)b.v0, (v128_t)a.v0), 31); v128_t __m3 = wasm_u32x4_shr(wasm_v128_andnot((v128_t)b.v1, (v128_t)a.v1), 31); return wasm_v128_any_true(wasm_v128_or(__m, __m1)) & wasm_v128_any_true(wasm_v128_or(__m2, __m3)); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testz_si256(__m256i __a, __m256i __b) { __m256i_internal a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); return _mm_testz_si128(a.v0, b.v0) & _mm_testz_si128(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testc_si256(__m256i __a, __m256i __b) { __m256i_internal a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); return _mm_testc_si128(a.v0, b.v0) & _mm_testc_si128(a.v1, b.v1); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_testnzc_si256(__m256i __a, __m256i __b) { __m256i_internal a, b; a = __m256i_to_internal(__a); b = __m256i_to_internal(__b); v128_t __m = wasm_v128_and(a.v0, b.v0); v128_t __m1 = wasm_v128_and(a.v1, b.v1); v128_t __m2 = wasm_v128_andnot(b.v0, a.v0); v128_t __m3 = wasm_v128_andnot(b.v1, a.v1); return wasm_v128_any_true(wasm_v128_or(__m, __m1)) & wasm_v128_any_true(wasm_v128_or(__m2, __m3)); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_movemask_pd(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); return _mm_movemask_pd(a.v0) | (_mm_movemask_pd(a.v1) << 2); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm256_movemask_ps(__m256 __a) { __m256_internal a = __m256_to_internal(__a); return _mm_movemask_ps(a.v0) | (_mm_movemask_ps(a.v1) << 4); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_zeroall(void) { // Do nothing // when porting any assembly code that would have calls to these functions // around, that assembly code in the first place will not compile. } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_zeroupper(void) { // Do nothing // when porting any assembly code that would have calls to these functions // around, that assembly code in the first place will not compile. } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_broadcast_ss(float const* __a) { return (__m128)wasm_v128_load32_splat(__a); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_broadcast_sd(double const* __a) { __m256d_internal ret; ret.v1 = ret.v0 = (__m128d)wasm_v128_load64_splat(__a); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_broadcast_ss(float const* __a) { __m256_internal ret; ret.v1 = ret.v0 = _mm_broadcast_ss(__a); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_broadcast_pd(__m128d const* __a) { __m256d_internal ret; ret.v1 = ret.v0 = (__m128d)wasm_v128_load(__a); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_broadcast_ps(__m128 const* __a) { __m256_internal ret; ret.v1 = ret.v0 = (__m128)wasm_v128_load(__a); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_load_pd(double const* __p) { __m256d_internal ret; ret.v0 = _mm_load_pd(__p); ret.v1 = _mm_load_pd(__p + 2); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_load_ps(float const* __p) { __m256_internal ret; ret.v0 = _mm_load_ps(__p); ret.v1 = _mm_load_ps(__p + 4); return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_loadu_pd(double const* __p) { __m256d_internal ret; ret.v0 = _mm_loadu_pd(__p); ret.v1 = _mm_loadu_pd(__p + 2); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_loadu_ps(float const* __p) { __m256_internal ret; ret.v0 = _mm_loadu_ps(__p); ret.v1 = _mm_loadu_ps(__p + 4); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_load_si256(__m256i const* __p) { __m256i_internal ret; ret.v0 = _mm_load_si128((__m128i const*)__p); ret.v1 = _mm_load_si128(((__m128i const*)__p) + 1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_loadu_si256(__m256i_u const* __p) { __m256i_internal ret; ret.v0 = _mm_loadu_si128((__m128i const*)__p); ret.v1 = _mm_loadu_si128(((__m128i const*)__p) + 1); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_lddqu_si256(__m256i_u const* __p) { __m256i_internal ret; ret.v0 = _mm_lddqu_si128((__m128i const*)__p); ret.v1 = _mm_lddqu_si128(((__m128i const*)__p) + 1); return __m256i_from_internal(ret); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_store_pd(double* __p, __m256d __a) { __m256d_internal a = __m256d_to_internal(__a); _mm_store_pd(__p, a.v0); _mm_store_pd(__p + 2, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_store_ps(float* __p, __m256 __a) { __m256_internal a = __m256_to_internal(__a); _mm_store_ps(__p, a.v0); _mm_store_ps(__p + 4, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu_pd(double* __p, __m256d __a) { __m256d_internal a = __m256d_to_internal(__a); _mm_storeu_pd(__p, a.v0); _mm_storeu_pd(__p + 2, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu_ps(float* __p, __m256 __a) { __m256_internal a = __m256_to_internal(__a); _mm_storeu_ps(__p, a.v0); _mm_storeu_ps(__p + 4, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_store_si256(__m256i* __p, __m256i __a) { __m256i_internal a = __m256i_to_internal(__a); _mm_store_si128((__m128i*)__p, a.v0); _mm_store_si128(((__m128i*)__p) + 1, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu_si256(__m256i_u* __p, __m256i __a) { __m256i_internal a = __m256i_to_internal(__a); _mm_storeu_si128((__m128i*)__p, a.v0); _mm_storeu_si128(((__m128i*)__p) + 1, a.v1); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_maskload_pd(double const* __p, __m128i __m) { // This may cause an out-of-bounds memory load since we first load and // then mask, but since there are no segmentation faults in Wasm memory // accesses, that is ok (as long as we are within the heap bounds - // a negligible limitation in practice) return _mm_and_pd(_mm_load_pd(__p), (__m128d)wasm_i64x2_shr(__m, 63)); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_maskload_pd(double const* __p, __m256i __m) { __m256d_internal ret; __m256i_internal m = __m256i_to_internal(__m); ret.v0 = _mm_maskload_pd(__p, m.v0); ret.v1 = _mm_maskload_pd(__p + 2, m.v1); return __m256d_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_maskload_ps(float const* __p, __m128i __m) { // This may cause an out-of-bounds memory load since we first load and // then mask, but since there are no segmentation faults in Wasm memory // accesses, that is ok (as long as we are within the heap bounds - // a negligible limitation in practice) return _mm_and_ps(_mm_load_ps(__p), (__m128)_mm_srai_epi32(__m, 31)); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_maskload_ps(float const* __p, __m256i __m) { __m256_internal ret; __m256i_internal m = __m256i_to_internal(__m); ret.v0 = _mm_maskload_ps(__p, m.v0); ret.v1 = _mm_maskload_ps(__p + 4, m.v1); return __m256_from_internal(ret); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_maskstore_ps(float* __p, __m128i __m, __m128 __a) { if ((wasm_i32x4_extract_lane(__m, 0) & 0x80000000ull) != 0) __p[0] = wasm_f32x4_extract_lane((v128_t)__a, 0); if ((wasm_i32x4_extract_lane(__m, 1) & 0x80000000ull) != 0) __p[1] = wasm_f32x4_extract_lane((v128_t)__a, 1); if ((wasm_i32x4_extract_lane(__m, 2) & 0x80000000ull) != 0) __p[2] = wasm_f32x4_extract_lane((v128_t)__a, 2); if ((wasm_i32x4_extract_lane(__m, 3) & 0x80000000ull) != 0) __p[3] = wasm_f32x4_extract_lane((v128_t)__a, 3); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_maskstore_ps(float* __p, __m256i __m, __m256 __a) { __m256_internal a = __m256_to_internal(__a); __m256i_internal m = __m256i_to_internal(__m); _mm_maskstore_ps(__p, m.v0, a.v0); _mm_maskstore_ps(__p + 4, m.v1, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_maskstore_pd(double* __p, __m128i __m, __m128d __a) { if ((wasm_i64x2_extract_lane(__m, 0) & 0x8000000000000000ull) != 0) __p[0] = wasm_f64x2_extract_lane((v128_t)__a, 0); if ((wasm_i64x2_extract_lane(__m, 1) & 0x8000000000000000ull) != 0) __p[1] = wasm_f64x2_extract_lane((v128_t)__a, 1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_maskstore_pd(double* __p, __m256i __m, __m256d __a) { __m256i_internal m = __m256i_to_internal(__m); __m256d_internal a = __m256d_to_internal(__a); _mm_maskstore_pd(__p, m.v0, a.v0); _mm_maskstore_pd(__p + 2, m.v1, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_stream_si256(void* __a, __m256i __b) { __m256i_internal b = __m256i_to_internal(__b); _mm_stream_si128((__m128i*)__a, b.v0); _mm_stream_si128(((__m128i*)__a) + 1, b.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_stream_pd(void* __a, __m256d __b) { __m256d_internal b = __m256d_to_internal(__b); _mm_stream_pd((double*)__a, b.v0); _mm_stream_pd(((double*)__a) + 2, b.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_stream_ps(void* __p, __m256 __a) { __m256_internal a = __m256_to_internal(__a); _mm_stream_ps((float*)__p, a.v0); _mm_stream_ps(((float*)__p) + 4, a.v1); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_undefined_pd(void) { __m256d val; return val; } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_undefined_ps(void) { __m256 val; return val; } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_undefined_si256(void) { __m256i val; return val; } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_set_pd(double __a, double __b, double __c, double __d) { __m256d_internal ret; ret.v0 = _mm_set_pd(__c, __d); ret.v1 = _mm_set_pd(__a, __b); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_set_ps(float __a, float __b, float __c, float __d, float __e, float __f, float __g, float __h) { __m256_internal ret; ret.v0 = _mm_set_ps(__e, __f, __g, __h); ret.v1 = _mm_set_ps(__a, __b, __c, __d); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set_epi32(int __i0, int __i1, int __i2, int __i3, int __i4, int __i5, int __i6, int __i7) { __m256i_internal ret; ret.v0 = _mm_set_epi32(__i4, __i5, __i6, __i7); ret.v1 = _mm_set_epi32(__i0, __i1, __i2, __i3); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set_epi16(short __w15, short __w14, short __w13, short __w12, short __w11, short __w10, short __w09, short __w08, short __w07, short __w06, short __w05, short __w04, short __w03, short __w02, short __w01, short __w00) { __m256i_internal ret; ret.v0 = _mm_set_epi16(__w07, __w06, __w05, __w04, __w03, __w02, __w01, __w00); ret.v1 = _mm_set_epi16(__w15, __w14, __w13, __w12, __w11, __w10, __w09, __w08); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set_epi8(char __b31, char __b30, char __b29, char __b28, char __b27, char __b26, char __b25, char __b24, char __b23, char __b22, char __b21, char __b20, char __b19, char __b18, char __b17, char __b16, char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b09, char __b08, char __b07, char __b06, char __b05, char __b04, char __b03, char __b02, char __b01, char __b00) { __m256i_internal ret; ret.v0 = _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b09, __b08, __b07, __b06, __b05, __b04, __b03, __b02, __b01, __b00); ret.v1 = _mm_set_epi8(__b31, __b30, __b29, __b28, __b27, __b26, __b25, __b24, __b23, __b22, __b21, __b20, __b19, __b18, __b17, __b16); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set_epi64x(long long __a, long long __b, long long __c, long long __d) { __m256i_internal ret; ret.v0 = _mm_set_epi64x(__c, __d); ret.v1 = _mm_set_epi64x(__a, __b); return __m256i_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_setr_pd(double __a, double __b, double __c, double __d) { return _mm256_set_pd(__d, __c, __b, __a); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_setr_ps(float __a, float __b, float __c, float __d, float __e, float __f, float __g, float __h) { return _mm256_set_ps(__h, __g, __f, __e, __d, __c, __b, __a); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3, int __i4, int __i5, int __i6, int __i7) { return _mm256_set_epi32(__i7, __i6, __i5, __i4, __i3, __i2, __i1, __i0); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12, short __w11, short __w10, short __w09, short __w08, short __w07, short __w06, short __w05, short __w04, short __w03, short __w02, short __w01, short __w00) { return _mm256_set_epi16(__w00, __w01, __w02, __w03, __w04, __w05, __w06, __w07, __w08, __w09, __w10, __w11, __w12, __w13, __w14, __w15); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28, char __b27, char __b26, char __b25, char __b24, char __b23, char __b22, char __b21, char __b20, char __b19, char __b18, char __b17, char __b16, char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b09, char __b08, char __b07, char __b06, char __b05, char __b04, char __b03, char __b02, char __b01, char __b00) { return _mm256_set_epi8(__b00, __b01, __b02, __b03, __b04, __b05, __b06, __b07, __b08, __b09, __b10, __b11, __b12, __b13, __b14, __b15, __b16, __b17, __b18, __b19, __b20, __b21, __b22, __b23, __b24, __b25, __b26, __b27, __b28, __b29, __b30, __b31); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setr_epi64x(long long __a, long long __b, long long __c, long long __d) { return _mm256_set_epi64x(__d, __c, __b, __a); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_set1_pd(double __w) { __m256d_internal ret; ret.v1 = ret.v0 = (__m128d)wasm_f64x2_splat(__w); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_set1_ps(float __w) { __m256_internal ret; ret.v1 = ret.v0 = (__m128)wasm_f32x4_splat(__w); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set1_epi32(int __i) { __m256i_internal ret; ret.v1 = ret.v0 = wasm_i32x4_splat(__i); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set1_epi16(short __w) { __m256i_internal ret; ret.v1 = ret.v0 = wasm_i16x8_splat(__w); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set1_epi8(char __b) { __m256i_internal ret; ret.v1 = ret.v0 = wasm_i8x16_splat(__b); return __m256i_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set1_epi64x(long long __q) { __m256i_internal ret; ret.v1 = ret.v0 = wasm_i64x2_splat(__q); return __m256i_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_setzero_pd(void) { __m256d_internal ret; ret.v1 = ret.v0 = _mm_setzero_pd(); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_setzero_ps(void) { __m256_internal ret; ret.v1 = ret.v0 = _mm_setzero_ps(); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setzero_si256(void) { __m256i_internal ret; ret.v1 = ret.v0 = _mm_setzero_si128(); return __m256i_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_castpd_ps(__m256d __a) { union __m256_data ret; ret.double_view = __a; return ret.float_view; } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_castpd_si256(__m256d __a) { union __m256_data ret; ret.double_view = __a; return ret.int_view; } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_castps_pd(__m256 __a) { union __m256_data ret; ret.float_view = __a; return ret.double_view; } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_castps_si256(__m256 __a) { union __m256_data ret; ret.float_view = __a; return ret.int_view; } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_castsi256_ps(__m256i __a) { union __m256_data ret; ret.int_view = __a; return ret.float_view; } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_castsi256_pd(__m256i __a) { union __m256_data ret; ret.int_view = __a; return ret.double_view; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm256_castpd256_pd128(__m256d __a) { __m256d_internal a = __m256d_to_internal(__a); return a.v0; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm256_castps256_ps128(__m256 __a) { __m256_internal a = __m256_to_internal(__a); return a.v0; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm256_castsi256_si128(__m256i __a) { __m256i_internal a = __m256i_to_internal(__a); return a.v0; } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_castpd128_pd256(__m128d __a) { __m256d_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_pd(); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_castps128_ps256(__m128 __a) { __m256_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_ps(); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_castsi128_si256(__m128i __a) { __m256i_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_si128(); return __m256i_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_zextpd128_pd256(__m128d __a) { __m256d_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_pd(); return __m256d_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_zextps128_ps256(__m128 __a) { __m256_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_ps(); return __m256_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_zextsi128_si256(__m128i __a) { __m256i_internal ret; ret.v0 = __a; ret.v1 = _mm_setzero_si128(); return __m256i_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_insertf128_ps(__m256 __a, __m128 __b, const int imm8) { __m256_internal ret = __m256_to_internal(__a); if (imm8 & 0x1) { ret.v1 = __b; } else { ret.v0 = __b; } return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_insertf128_pd(__m256d __a, __m128d __b, const int imm8) { __m256d_internal ret = __m256d_to_internal(__a); if (imm8 & 0x1) { ret.v1 = __b; } else { ret.v0 = __b; } return __m256d_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_insertf128_si256(__m256i __a, __m128i __b, const int imm8) { __m256i_internal ret = __m256i_to_internal(__a); if (imm8 & 0x1) { ret.v1 = __b; } else { ret.v0 = __b; } return __m256i_from_internal(ret); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm256_extractf128_ps(__m256 __a, const int imm8) { __m256_internal a = __m256_to_internal(__a); if (imm8 & 0x1) { return a.v1; } else { return a.v0; } } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm256_extractf128_pd(__m256d __a, const int imm8) { __m256d_internal a = __m256d_to_internal(__a); if (imm8 & 0x1) { return a.v1; } else { return a.v0; } } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm256_extractf128_si256(__m256i __a, const int imm8) { __m256i_internal a = __m256i_to_internal(__a); if (imm8 & 0x1) { return a.v1; } else { return a.v0; } } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_set_m128(__m128 __hi, __m128 __lo) { __m256_internal ret; ret.v0 = __lo; ret.v1 = __hi; return __m256_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_set_m128d(__m128d __hi, __m128d __lo) { __m256d_internal ret; ret.v0 = __lo; ret.v1 = __hi; return __m256d_from_internal(ret); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_set_m128i(__m128i __hi, __m128i __lo) { __m256i_internal ret; ret.v0 = __lo; ret.v1 = __hi; return __m256i_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_setr_m128(__m128 __lo, __m128 __hi) { return _mm256_set_m128(__hi, __lo); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_setr_m128d(__m128d __lo, __m128d __hi) { return (__m256d)_mm256_set_m128d(__hi, __lo); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_setr_m128i(__m128i __lo, __m128i __hi) { return (__m256i)_mm256_set_m128i(__hi, __lo); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_loadu2_m128(float const* __addr_hi, float const* __addr_lo) { return _mm256_set_m128(_mm_loadu_ps(__addr_hi), _mm_loadu_ps(__addr_lo)); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_loadu2_m128d(double const* __addr_hi, double const* __addr_lo) { return _mm256_set_m128d(_mm_loadu_pd(__addr_hi), _mm_loadu_pd(__addr_lo)); } static __inline__ __m256i __attribute__((__always_inline__, __nodebug__)) _mm256_loadu2_m128i(__m128i_u const* __addr_hi, __m128i_u const* __addr_lo) { return _mm256_set_m128i(_mm_loadu_si128((__m128i const*)__addr_hi), _mm_loadu_si128((__m128i const*)__addr_lo)); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu2_m128(float* __addr_hi, float* __addr_lo, __m256 __a) { __m256_internal a = __m256_to_internal(__a); _mm_storeu_ps(__addr_lo, a.v0); _mm_storeu_ps(__addr_hi, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu2_m128d(double* __addr_hi, double* __addr_lo, __m256d __a) { __m256d_internal a = __m256d_to_internal(__a); _mm_storeu_pd(__addr_lo, a.v0); _mm_storeu_pd(__addr_hi, a.v1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm256_storeu2_m128i(__m128i_u* __addr_hi, __m128i_u* __addr_lo, __m256i __a) { __m256i_internal a = __m256i_to_internal(__a); _mm_storeu_si128((__m128i*)__addr_lo, a.v0); _mm_storeu_si128((__m128i*)__addr_hi, a.v1); } #endif /* __emscripten_avxintrin_h__ */ PK!P S3emscripten/cache/sysroot/include/compat/emmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_emmintrin_h__ #define __emscripten_emmintrin_h__ #ifndef __SSE2__ #error "SSE2 instruction set not enabled" #endif #include // Alias different (functionally) equivalent intrinsics. #define _mm_set_epi64x _mm_set_epi64 #define _mm_cvtsd_si64x _mm_cvtsd_si64 #define _mm_cvtsi128_si64x _mm_cvtsi128_si64 #define _mm_cvtsi64x_sd _mm_cvtsi64_sd #define _mm_cvtsi64x_si128 _mm_cvtsi64_si128 #define _mm_cvttsd_si64x _mm_cvttsd_si64 #define _mm_store_pd1 _mm_store1_pd typedef __f64x2 __m128d; static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_move_sd(__m128d __a, __m128d __b) { return (__m128d){ __b[0], __a[1] }; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_add_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_add_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_add_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_sub_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_sub_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_sub_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_mul_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_mul((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_mul_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_mul_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_div_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_div((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_div_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_div_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_sqrt_pd(__m128d __a) { return (__m128d)wasm_f64x2_sqrt((v128_t)__a); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_sqrt_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_sqrt_pd(__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_min_pd(__m128d __a, __m128d __b) { // return (__m128d)wasm_f32x4_pmin((v128_t)__a, (v128_t)__b); // TODO: Migrate to this, once it works in VMs return (__m128d)wasm_v128_bitselect((v128_t)__a, (v128_t)__b, (v128_t)wasm_f64x2_lt((v128_t)__a, (v128_t)__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_min_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_min_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_max_pd(__m128d __a, __m128d __b) { // return (__m128)wasm_f32x4_pmax((v128_t)__a, (v128_t)__b); // TODO: Migrate to this, once it works in VMs return (__m128d)wasm_v128_bitselect((v128_t)__a, (v128_t)__b, (v128_t)wasm_f64x2_gt((v128_t)__a, (v128_t)__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_max_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_max_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_and_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_and((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_andnot_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_andnot((v128_t)__b, (v128_t)__a); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_or_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_or((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_xor_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_xor((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_eq((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_lt((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmple_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_le((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_gt((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpge_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_ge((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpord_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_and(wasm_f64x2_eq((v128_t)__a, (v128_t)__a), wasm_f64x2_eq((v128_t)__b, (v128_t)__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpunord_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_or(wasm_f64x2_ne((v128_t)__a, (v128_t)__a), wasm_f64x2_ne((v128_t)__b, (v128_t)__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpneq_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_f64x2_ne((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnlt_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_not((v128_t)_mm_cmplt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnle_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_not((v128_t)_mm_cmple_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpngt_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_not((v128_t)_mm_cmpgt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnge_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_v128_not((v128_t)_mm_cmpge_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpeq_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmplt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmple_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmple_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpgt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpge_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpge_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpord_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpord_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpunord_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpunord_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpneq_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpneq_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnlt_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpnlt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnle_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpnle_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpngt_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpngt_pd(__a, __b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cmpnge_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_cmpnge_pd(__a, __b)); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comieq_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) == wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comilt_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) < wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comile_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) <= wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comigt_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) > wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comige_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) >= wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_comineq_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) != wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomieq_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) == wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomilt_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) < wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomile_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) <= wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomigt_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) > wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomige_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) >= wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_ucomineq_sd(__m128d __a, __m128d __b) { return wasm_f64x2_extract_lane((v128_t)__a, 0) != wasm_f64x2_extract_lane((v128_t)__b, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cvtpd_ps(__m128d __a) { return (__m128)wasm_f32x4_demote_f64x2_zero((v128_t)__a); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtps_pd(__m128 __a) { return (__m128d)wasm_f64x2_promote_low_f32x4((v128_t)__a); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi32_pd(__m128i __a) { return (__m128d)wasm_f64x2_convert_low_i32x4((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtpd_epi32(__m128d __a) { // TODO: OPTIMIZE! int m[2]; for(int i = 0; i < 2; ++i) { double e = __a[i]; int x = lrint(e); if (e <= INT_MAX && e >= INT_MIN && (x != 0 || fabs(e) < 2.0)) m[i] = x; else m[i] = (int)0x80000000; } return wasm_i32x4_make(m[0], m[1], 0, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_cvtsd_si32(__m128d __a) { // TODO: OPTIMIZE! double e = __a[0]; int x = lrint(e); if (e <= INT_MAX && e >= INT_MIN && (x != 0 || fabs(e) < 2.0)) return x; else return (int)0x80000000; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cvtsd_ss(__m128 __a, __m128d __b) { __a[0] = __b[0]; return __a; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi32_sd(__m128d __a, int __b) { __a[0] = __b; return __a; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtss_sd(__m128d __a, __m128 __b) { __a[0] = __b[0]; return __a; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvttpd_epi32(__m128d __a) { // TODO: OPTIMIZE! int m[2]; for(int i = 0; i < 2; ++i) { double elem = __a[i]; if (elem < 2147483648.0 && elem >= -2147483648.0 && (lrint(elem) != 0 || fabs(elem) < 2.0)) // Use the trapping instruction here since we have explicit bounds checks // above. m[i] = __builtin_wasm_trunc_s_i32_f64(elem); else m[i] = (int)0x80000000; } return wasm_i32x4_make(m[0], m[1], 0, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_cvttsd_si32(__m128d __a) { // TODO: OPTIMIZE! double elem = __a[0]; if (elem < 2147483648.0 && elem >= -2147483648.0 && (lrint(elem) != 0 || fabs(elem) < 2.0)) // Use the trapping instruction here since we have explicit bounds checks // above. return __builtin_wasm_trunc_s_i32_f64(elem); else return (int)0x80000000; } static __inline__ double __attribute__((__always_inline__, __nodebug__)) _mm_cvtsd_f64(__m128d __a) { return wasm_f64x2_extract_lane((v128_t)__a, 0); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_load_pd(double const *__dp) { return *(__m128d*)__dp; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_load1_pd(double const *__dp) { return (__m128d)wasm_v64x2_load_splat(__dp); } #define _mm_load_pd1(dp) _mm_load1_pd(dp) static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_loadr_pd(double const *__p) { __m128d __u = *(__m128d*)__p; // aligned load return (__m128d)wasm_i64x2_shuffle((v128_t)__u, (v128_t)__u, 1, 0); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_loadu_pd(double const *__dp) { struct __loadu_pd { __m128d __v; } __attribute__((__packed__, __may_alias__)); return ((struct __loadu_pd*)__dp)->__v; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_load_sd(double const *__p) { return (__m128d)wasm_v128_load64_zero((const void*)__p); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_loadh_pd(__m128d __a, double const *__dp) { return (__m128d)wasm_v128_load64_lane((const void*)__dp, (v128_t)__a, 1); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_loadl_pd(__m128d __a, double const *__dp) { return (__m128d)wasm_v128_load64_lane((const void*)__dp, (v128_t)__a, 0); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_set_sd(double __w) { return (__m128d)wasm_f64x2_make(__w, 0); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_set1_pd(double __w) { return (__m128d)wasm_f64x2_splat(__w); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_set_pd(double __c1, double __c0) { return (__m128d)wasm_f64x2_make(__c0, __c1); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_setr_pd(double __c0, double __c1) { return (__m128d)wasm_f64x2_make(__c0, __c1); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_setzero_pd(void) { return (__m128d)wasm_f64x2_const(0.0, 0.0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_sd(double *__dp, __m128d __a) { wasm_v128_store64_lane((void*)__dp, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store1_pd(double *__dp, __m128d __a) { struct __mm_store1_pd_struct { double __u[2]; } __attribute__((__packed__, __may_alias__)); ((struct __mm_store1_pd_struct*)__dp)->__u[0] = __a[0]; ((struct __mm_store1_pd_struct*)__dp)->__u[1] = __a[0]; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_pd(double *__dp, __m128d __a) { *(__m128d *)__dp = __a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_pd(double *__dp, __m128d __a) { struct __unaligned { __m128d __v; } __attribute__((__packed__, __may_alias__)); ((struct __unaligned *)__dp)->__v = __a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storer_pd(double *__p, __m128d __a) { *(__m128d *)__p = (__m128d)wasm_i64x2_shuffle((v128_t)__a, (v128_t)__a, 1, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeh_pd(double *__dp, __m128d __a) { wasm_v128_store64_lane((void*)__dp, (v128_t)__a, 1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storel_pd(double *__dp, __m128d __a) { wasm_v128_store64_lane((void*)__dp, (v128_t)__a, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_add_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_add_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_add_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_add_epi64(__m128i __a, __m128i __b) { return (__m128i)wasm_i64x2_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_adds_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_add_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_adds_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_add_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_adds_epu8(__m128i __a, __m128i __b) { return (__m128i)wasm_u8x16_add_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_adds_epu16(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_add_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_avg_epu8(__m128i __a, __m128i __b) { return (__m128i)wasm_u8x16_avgr((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_avg_epu16(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_avgr((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_madd_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_dot_i16x8((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_max((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epu8(__m128i __a, __m128i __b) { return (__m128i)wasm_u8x16_max((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_min((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epu8(__m128i __a, __m128i __b) { return (__m128i)wasm_u8x16_min((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mulhi_epi16(__m128i __a, __m128i __b) { const v128_t lo = wasm_i32x4_extmul_low_i16x8((v128_t)__a, (v128_t)__b); const v128_t hi = wasm_i32x4_extmul_high_i16x8((v128_t)__a, (v128_t)__b); return (__m128i)wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mulhi_epu16(__m128i __a, __m128i __b) { const v128_t lo = wasm_u32x4_extmul_low_u16x8((v128_t)__a, (v128_t)__b); const v128_t hi = wasm_u32x4_extmul_high_u16x8((v128_t)__a, (v128_t)__b); return (__m128i)wasm_i16x8_shuffle(lo, hi, 1, 3, 5, 7, 9, 11, 13, 15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mullo_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_mul((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mul_epu32(__m128i __a, __m128i __b) { return (__m128i)wasm_u64x2_extmul_low_u32x4( wasm_v32x4_shuffle((v128_t)__a, (v128_t)__a, 0, 2, 0, 2), wasm_v32x4_shuffle((v128_t)__b, (v128_t)__b, 0, 2, 0, 2)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sub_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sub_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sub_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sub_epi64(__m128i __a, __m128i __b) { return (__m128i)wasm_i64x2_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_subs_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_sub_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_subs_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_sub_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_subs_epu8(__m128i __a, __m128i __b) { return (__m128i)wasm_u8x16_sub_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_subs_epu16(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_sub_saturate((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_and_si128(__m128i __a, __m128i __b) { return (__m128i)wasm_v128_and((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_andnot_si128(__m128i __a, __m128i __b) { return (__m128i)wasm_v128_andnot((v128_t)__b, (v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_or_si128(__m128i __a, __m128i __b) { return (__m128i)wasm_v128_or((v128_t)__b, (v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_xor_si128(__m128i __a, __m128i __b) { return (__m128i)wasm_v128_xor((v128_t)__b, (v128_t)__a); } #define _mm_slli_si128(__a, __imm) __extension__ ({ \ (__m128i)wasm_i8x16_shuffle(_mm_setzero_si128(), \ (__a), \ ((__imm)&0xF0) ? 0 : 16 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 17 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 18 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 19 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 20 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 21 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 22 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 23 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 24 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 25 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 26 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 27 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 28 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 29 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 30 - ((__imm)&0xF), \ ((__imm)&0xF0) ? 0 : 31 - ((__imm)&0xF)); }) #define _mm_bslli_si128(__a, __imm) \ _mm_slli_si128((__a), (__imm)) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_slli_epi16(__m128i __a, int __count) { return (__m128i)((__count < 16) ? wasm_i16x8_shl((v128_t)__a, __count) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sll_epi16(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 16) ? wasm_i16x8_shl((v128_t)__a, __c) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_slli_epi32(__m128i __a, int __count) { return (__m128i)((__count < 32) ? wasm_i32x4_shl((v128_t)__a, __count) : wasm_i32x4_const(0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sll_epi32(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 32) ? wasm_i32x4_shl((v128_t)__a, __c) : wasm_i32x4_const(0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_slli_epi64(__m128i __a, int __count) { return (__m128i)((__count < 64) ? wasm_i64x2_shl((v128_t)__a, __count) : wasm_i64x2_const(0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sll_epi64(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 64) ? wasm_i64x2_shl((v128_t)__a, __c) : wasm_i64x2_const(0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srai_epi16(__m128i __a, int __count) { __count = __count < 15 ? __count : 15; return (__m128i)wasm_i16x8_shr((v128_t)__a, __count); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sra_epi16(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; __c = __c < 15 ? __c : 15; return (__m128i)wasm_i16x8_shr((v128_t)__a, __c); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srai_epi32(__m128i __a, int __count) { __count = __count < 31 ? __count : 31; return (__m128i)wasm_i32x4_shr((v128_t)__a, __count); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sra_epi32(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; __c = __c < 31 ? __c : 31; return (__m128i)wasm_i32x4_shr((v128_t)__a, __c); } #define _mm_srli_si128(__a, __imm) __extension__ ({ \ (__m128i)wasm_i8x16_shuffle((__a), \ _mm_setzero_si128(), \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 0, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 1, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 2, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 3, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 4, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 5, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 6, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 7, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 8, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 9, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 10, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 11, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 12, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 13, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 14, \ ((__imm)&0xF0) ? 16 : ((__imm)&0xF) + 15); }) #define _mm_bsrli_si128(__a, __imm) \ _mm_srli_si128((__a), (__imm)) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srli_epi16(__m128i __a, int __count) { return (__m128i)(((unsigned int)__count < 16) ? wasm_u16x8_shr((v128_t)__a, __count) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srl_epi16(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 16) ? wasm_u16x8_shr((v128_t)__a, __c) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srli_epi32(__m128i __a, int __count) { return (__m128i)(((unsigned int)__count < 32) ? wasm_u32x4_shr((v128_t)__a, __count) : wasm_i32x4_const(0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srl_epi32(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 32) ? wasm_u32x4_shr((v128_t)__a, __c) : wasm_i32x4_const(0,0,0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srli_epi64(__m128i __a, int __count) { return (__m128i)(((unsigned int)__count < 64) ? wasm_u64x2_shr((v128_t)__a, __count) : wasm_i64x2_const(0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_srl_epi64(__m128i __a, __m128i __count) { unsigned long long __c = (unsigned long long)((__u64x2)__count)[0]; return (__m128i)((__c < 64) ? wasm_u64x2_shr((v128_t)__a, __c) : wasm_i64x2_const(0,0)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_eq((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_eq((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_eq((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_gt((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_gt((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_gt((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_lt((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_lt((v128_t)__a, (v128_t)__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_lt((v128_t)__a, (v128_t)__b); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64_sd(__m128d __a, long long __b) { // TODO: optimize union { double x[2]; __m128d m; } m; m.m = __a; m.x[0] = (double)__b; return m.m; } static __inline__ long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtsd_si64(__m128d __a) { // TODO: optimize double e = __a[0]; if (isnan(e) || isinf(e)) return 0x8000000000000000LL; long long x = llrint(e); if (e <= LLONG_MAX && e >= LLONG_MIN && (x != 0 || fabs(e) < 2.f)) return x; else return 0x8000000000000000LL; } static __inline__ long long __attribute__((__always_inline__, __nodebug__)) _mm_cvttsd_si64(__m128d __a) { // TODO: optimize double e = __a[0]; if (isnan(e) || isinf(e) || e > LLONG_MAX || e < LLONG_MIN) return 0x8000000000000000LL; long long x = llrint(e); if (x != 0 || fabs(e) < 2.f) // Use the trapping instruction here since we have explicit bounds checks // above return __builtin_wasm_trunc_s_i64_f64(e); else return 0x8000000000000000LL; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi32_ps(__m128i __a) { return (__m128)wasm_f32x4_convert_i32x4(__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtps_epi32(__m128 __a) { // TODO: optimize union { int x[4]; __m128i m; } u; for(int i = 0; i < 4; ++i) { double e = __a[i]; int x = lrint(e); if (e <= INT_MAX && e >= INT_MIN && (x != 0 || fabs(e) < 2.0)) u.x[i] = x; else u.x[i] = (int)0x80000000; } return u.m; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvttps_epi32(__m128 __a) { // TODO: optimize union { int x[4]; __m128i m; } u; for(int i = 0; i < 4; ++i) { float e = __a[i]; if (e < 2147483648.0f && e >= -2147483648.0f && (lrint(e) != 0 || fabs(e) < 2.0)) // Use the trapping instruction here since we have explicit bounds checks // above. u.x[i] = __builtin_wasm_trunc_s_i32_f32(e); else u.x[i] = (int)0x80000000; } return u.m; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi32_si128(int __a) { return (__m128i)wasm_i32x4_make(__a, 0, 0, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi64_si128(long long __a) { return (__m128i)wasm_i64x2_make(__a, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi128_si32(__m128i __a) { return wasm_i32x4_extract_lane(__a, 0); } static __inline__ long long __attribute__((__always_inline__, __nodebug__)) _mm_cvtsi128_si64(__m128i __a) { return wasm_i64x2_extract_lane(__a, 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_load_si128(__m128i const *__p) { return *__p; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_loadu_si128(__m128i const *__p) { // UB-free unaligned access copied from wasm_simd128.h struct __mm_loadu_si128_struct { __m128i __v; } __attribute__((__packed__, __may_alias__)); return ((struct __mm_loadu_si128_struct*)__p)->__v; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_loadu_si16(void const *__p) { return (__m128i)wasm_v128_load16_lane(__p, wasm_i64x2_const(0, 0), 0); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_loadu_si32(void const *__p) { return (__m128i)wasm_v128_load32_zero(__p); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_loadu_si64(void const *__p) { return (__m128i)wasm_v128_load64_zero(__p); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_loadl_epi64(__m128i const *__p) { return _mm_loadu_si64(__p); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set_epi64(long long q1, long long q0) { return (__m128i)wasm_i64x2_make(q0, q1); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set_epi32(int i3, int i2, int i1, int i0) { return (__m128i)wasm_i32x4_make(i0, i1, i2, i3); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set_epi16(short w7, short w6, short w5, short w4, short w3, short w2, short w1, short w0) { return (__m128i)wasm_i16x8_make(w0, w1, w2, w3, w4, w5, w6, w7); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set_epi8(char b15, char b14, char b13, char b12, char b11, char b10, char b9, char b8, char b7, char b6, char b5, char b4, char b3, char b2, char b1, char b0) { return (__m128i)wasm_i8x16_make(b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set1_epi64x(long long __q) { return (__m128i)wasm_i64x2_splat(__q); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set1_epi32(int __i) { return (__m128i)wasm_i32x4_splat(__i); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set1_epi16(short __w) { return (__m128i)wasm_i16x8_splat(__w); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_set1_epi8(char __b) { return (__m128i)wasm_i8x16_splat(__b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_setr_epi32(int i0, int i1, int i2, int i3) { return (__m128i)wasm_i32x4_make(i0, i1, i2, i3); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_setr_epi16(short w0, short w1, short w2, short w3, short w4, short w5, short w6, short w7) { return (__m128i)wasm_i16x8_make(w0, w1, w2, w3, w4, w5, w6, w7); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_setr_epi8(char b0, char b1, char b2, char b3, char b4, char b5, char b6, char b7, char b8, char b9, char b10, char b11, char b12, char b13, char b14, char b15) { return (__m128i)wasm_i8x16_make(b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_setzero_si128(void) { return wasm_i64x2_const(0, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_si128(__m128i *__p, __m128i __b) { *__p = __b; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_si16(void *__p, __m128i __a) { wasm_v128_store16_lane(__p, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_si32(void *__p, __m128i __a) { wasm_v128_store32_lane(__p, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_si64(void *__p, __m128i __a) { wasm_v128_store64_lane(__p, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_si128(__m128i *__p, __m128i __a) { // UB-free unaligned access copied from wasm_simd128.h struct __mm_storeu_si128_struct { __m128i __v; } __attribute__((__packed__, __may_alias__)); ((struct __mm_storeu_si128_struct *)__p)->__v = __a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p) { // TODO: optimize union { unsigned char x[16]; __m128i m; } mask, data; mask.m = __n; data.m = __d; for(int i = 0; i < 16; ++i) if (mask.x[i] & 0x80) __p[i] = data.x[i]; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storel_epi64(__m128i *__p, __m128i __a) { _mm_storeu_si64(__p, __a); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_stream_pd(double *__p, __m128d __a) { // Emscripten/SIMD.js does not have cache hinting. _mm_store_pd(__p, __a); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_stream_si128(__m128i *__p, __m128i __a) { // Emscripten/SIMD.js does not have cache hinting. _mm_store_si128(__p, __a); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_stream_si32(int *__p, int __a) { // No cache hinting available. *__p = __a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_stream_si64(long long *__p, long long __a) { // No cache hinting available. *__p = __a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_clflush(void const *__p) { // Wasm SIMD does not have cache hinting } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_lfence(void) { __sync_synchronize(); // Wasm/SharedArrayBuffer has only a full barrier instruction, which gives a stronger guarantee. } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_mfence(void) { __sync_synchronize(); // Wasm/SharedArrayBuffer has only a full barrier instruction, which gives a stronger guarantee. } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_packs_epi16(__m128i __a, __m128i __b) { return wasm_i8x16_narrow_i16x8(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_packs_epi32(__m128i __a, __m128i __b) { return wasm_i16x8_narrow_i32x4(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_packus_epi16(__m128i __a, __m128i __b) { return wasm_u8x16_narrow_i16x8(__a, __b); } #define _mm_extract_epi16(__a, __imm) wasm_u16x8_extract_lane((v128_t)(__a), (__imm) & 7) #define _mm_insert_epi16(__a, __b, __imm) wasm_i16x8_replace_lane((__a), (__imm) & 7, (__b)) static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_movemask_epi8(__m128i __a) { return (int)wasm_i8x16_bitmask((v128_t)__a); } #define _mm_shuffle_epi32(__a, __imm) __extension__ ({ \ (__m128i)wasm_i32x4_shuffle((__a), \ _mm_set1_epi32(0), \ ((__imm) & 0x3), (((__imm) & 0xc) >> 2), \ (((__imm) & 0x30) >> 4), (((__imm) & 0xc0) >> 6)); }) #define _mm_shufflelo_epi16(__a, __imm) __extension__ ({ \ (__m128i)wasm_i16x8_shuffle((__a), \ _mm_set1_epi16(0), \ ((__imm) & 0x3), (((__imm) & 0xc) >> 2), \ (((__imm) & 0x30) >> 4), (((__imm) & 0xc0) >> 6), \ 4, 5, 6, 7); }) #define _mm_shufflehi_epi16(__a, __imm) __extension__ ({ \ (__m128i)wasm_i16x8_shuffle((__a), \ _mm_set1_epi16(0), \ 0, 1, 2, 3, \ (4 + (((__imm) & 0x03) >> 0)), \ (4 + (((__imm) & 0x0c) >> 2)), \ (4 + (((__imm) & 0x30) >> 4)), \ (4 + (((__imm) & 0xc0) >> 6))); }) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_shuffle(__a, __b, 8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_shuffle(__a, __b, 4, 12, 5, 13, 6, 14, 7, 15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_shuffle(__a, __b, 2, 6, 3, 7); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_epi64(__m128i __a, __m128i __b) { return (__m128i)wasm_i64x2_shuffle(__a, __b, 1, 3); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_shuffle(__a, __b, 0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_epi16(__m128i __a, __m128i __b) { return (__m128i)wasm_i16x8_shuffle(__a, __b, 0, 8, 1, 9, 2, 10, 3, 11); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_shuffle(__a, __b, 0, 4, 1, 5); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_epi64(__m128i __a, __m128i __b) { return (__m128i)wasm_i64x2_shuffle(__a, __b, 0, 2); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_move_epi64(__m128i __a) { return wasm_i64x2_shuffle(__a, wasm_i64x2_const(0, 0), 0, 2); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_i64x2_shuffle((v128_t)__a, (v128_t)__b, 1, 3); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_pd(__m128d __a, __m128d __b) { return (__m128d)wasm_i64x2_shuffle((v128_t)__a, (v128_t)__b, 0, 2); } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_movemask_pd(__m128d __a) { return (int)wasm_i64x2_bitmask((v128_t)__a); } #define _mm_shuffle_pd(__a, __b, __i) __extension__ ({ \ (__m128d) __builtin_shufflevector((__u64x2)(__a), (__u64x2)(__b), \ (__i) & 1, \ (((__i) & 2) >> 1) + 2); }) static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_castpd_ps(__m128d __a) { return (__m128)__a; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_castpd_si128(__m128d __a) { return (__m128i)__a; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_castps_pd(__m128 __a) { return (__m128d)__a; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_castps_si128(__m128 __a) { return (__m128i)__a; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_castsi128_ps(__m128i __a) { return (__m128)__a; } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_castsi128_pd(__m128i __a) { return (__m128d)__a; } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_pause(void) { // No pause/wait instruction in Wasm/SIMD. } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_undefined_pd() { __m128d val; return val; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_undefined_si128() { __m128i val; return val; } // Must be in the very end as it uses other SSE2 intrinsics static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sad_epu8(__m128i __a, __m128i __b) { __m128i __diff = _mm_or_si128(_mm_subs_epu8(__a, __b), _mm_subs_epu8(__b, __a)); __diff = _mm_add_epi16(_mm_srli_epi16(__diff, 8), _mm_and_si128(__diff, _mm_set1_epi16(0x00FF))); __diff = _mm_add_epi16(__diff, _mm_slli_epi32(__diff, 16)); __diff = _mm_add_epi16(__diff, _mm_slli_epi64(__diff, 32)); return _mm_srli_epi64(__diff, 48); } #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y)) #endif /* __emscripten_emmintrin_h__ */ PK!Ve9??3emscripten/cache/sysroot/include/compat/fmaintrin.h/* * Copyright 2026 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. * * FMA intrinsics implementation for Emscripten. * Emulates x86 FMA (Fused Multiply-Add) operations using Wasm SIMD. * * With -mrelaxed-simd: uses Wasm relaxed SIMD FMA, which the host engine may * lower to a hardware fused multiply-add (single rounding step) where * available, e.g. on x86/ARM with FMA support. The relaxed SIMD spec leaves * fusion implementation-defined, so on hosts without hardware FMA the result * may instead be a separate multiply and add (two rounding steps). * With -msimd128 only: emulates FMA with separate multiply and add/sub * (two rounding steps). */ #ifndef __emscripten_immintrin_h__ #error "Never use directly; include instead." #endif #ifndef __emscripten_fmaintrin_h__ #define __emscripten_fmaintrin_h__ #ifndef __FMA__ #error "FMA instruction set not enabled" #endif #ifdef __wasm_relaxed_simd__ #include #endif /* ============================================================ * 128-bit packed float (ps) — 4x float * ============================================================ */ /* a * b + c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return (__m128)wasm_f32x4_relaxed_madd( (__f32x4)__A, (__f32x4)__B, (__f32x4)__C); #else return _mm_add_ps(_mm_mul_ps(__A, __B), __C); #endif } /* a * b - c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return (__m128)wasm_f32x4_relaxed_madd( (__f32x4)__A, (__f32x4)__B, (__f32x4)_mm_xor_ps(__C, _mm_set1_ps(-0.0f))); #else return _mm_sub_ps(_mm_mul_ps(__A, __B), __C); #endif } /* -(a * b) + c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return (__m128)wasm_f32x4_relaxed_nmadd( (__f32x4)__A, (__f32x4)__B, (__f32x4)__C); #else return _mm_sub_ps(__C, _mm_mul_ps(__A, __B)); #endif } /* -(a * b) - c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return (__m128)wasm_f32x4_relaxed_nmadd( (__f32x4)__A, (__f32x4)__B, (__f32x4)_mm_xor_ps(__C, _mm_set1_ps(-0.0f))); #else __m128 neg_ab = _mm_sub_ps(_mm_setzero_ps(), _mm_mul_ps(__A, __B)); return _mm_sub_ps(neg_ab, __C); #endif } /* even elements: a*b - c, odd elements: a*b + c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ __m128 neg_c = _mm_xor_ps(__C, (__m128)_mm_set_epi32(0, 0x80000000, 0, 0x80000000)); return (__m128)wasm_f32x4_relaxed_madd( (__f32x4)__A, (__f32x4)__B, (__f32x4)neg_c); #else __m128 add = _mm_add_ps(_mm_mul_ps(__A, __B), __C); __m128 sub = _mm_sub_ps(_mm_mul_ps(__A, __B), __C); return _mm_blend_ps(sub, add, 0xA); /* 0xA = 1010b: elements 1,3 from add */ #endif } /* even elements: a*b + c, odd elements: a*b - c */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ __m128 neg_c = _mm_xor_ps(__C, (__m128)_mm_set_epi32(0x80000000, 0, 0x80000000, 0)); return (__m128)wasm_f32x4_relaxed_madd( (__f32x4)__A, (__f32x4)__B, (__f32x4)neg_c); #else __m128 add = _mm_add_ps(_mm_mul_ps(__A, __B), __C); __m128 sub = _mm_sub_ps(_mm_mul_ps(__A, __B), __C); return _mm_blend_ps(add, sub, 0xA); /* 0xA = 1010b: elements 1,3 from sub */ #endif } /* ============================================================ * 128-bit packed double (pd) — 2x double * ============================================================ */ /* a * b + c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return (__m128d)wasm_f64x2_relaxed_madd( (__f64x2)__A, (__f64x2)__B, (__f64x2)__C); #else return _mm_add_pd(_mm_mul_pd(__A, __B), __C); #endif } /* a * b - c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return (__m128d)wasm_f64x2_relaxed_madd( (__f64x2)__A, (__f64x2)__B, (__f64x2)_mm_xor_pd(__C, _mm_set1_pd(-0.0))); #else return _mm_sub_pd(_mm_mul_pd(__A, __B), __C); #endif } /* -(a * b) + c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return (__m128d)wasm_f64x2_relaxed_nmadd( (__f64x2)__A, (__f64x2)__B, (__f64x2)__C); #else return _mm_sub_pd(__C, _mm_mul_pd(__A, __B)); #endif } /* -(a * b) - c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return (__m128d)wasm_f64x2_relaxed_nmadd( (__f64x2)__A, (__f64x2)__B, (__f64x2)_mm_xor_pd(__C, _mm_set1_pd(-0.0))); #else __m128d neg_ab = _mm_sub_pd(_mm_setzero_pd(), _mm_mul_pd(__A, __B)); return _mm_sub_pd(neg_ab, __C); #endif } /* even elements: a*b - c, odd elements: a*b + c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ __m128d neg_c = _mm_xor_pd(__C, (__m128d)_mm_set_epi64x(0, 0x8000000000000000LL)); return (__m128d)wasm_f64x2_relaxed_madd( (__f64x2)__A, (__f64x2)__B, (__f64x2)neg_c); #else __m128d add = _mm_add_pd(_mm_mul_pd(__A, __B), __C); __m128d sub = _mm_sub_pd(_mm_mul_pd(__A, __B), __C); return _mm_blend_pd(sub, add, 0x2); /* 0x2 = 10b: element 1 from add */ #endif } /* even elements: a*b + c, odd elements: a*b - c */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ __m128d neg_c = _mm_xor_pd(__C, (__m128d)_mm_set_epi64x(0x8000000000000000LL, 0)); return (__m128d)wasm_f64x2_relaxed_madd( (__f64x2)__A, (__f64x2)__B, (__f64x2)neg_c); #else __m128d add = _mm_add_pd(_mm_mul_pd(__A, __B), __C); __m128d sub = _mm_sub_pd(_mm_mul_pd(__A, __B), __C); return _mm_blend_pd(add, sub, 0x2); /* 0x2 = 10b: element 1 from sub */ #endif } /* ============================================================ * Scalar float (ss) — lowest element only, upper from first operand * ============================================================ */ /* a[0] * b[0] + c[0], a[1..3] pass through */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return _mm_move_ss( __A, (__m128)wasm_f32x4_relaxed_madd((__f32x4)__A, (__f32x4)__B, (__f32x4)__C)); #else return _mm_move_ss(__A, _mm_add_ss(_mm_mul_ss(__A, __B), __C)); #endif } /* a[0] * b[0] - c[0], a[1..3] pass through */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ __m128 neg_c = _mm_xor_ps(__C, _mm_set1_ps(-0.0f)); return _mm_move_ss(__A, (__m128)wasm_f32x4_relaxed_madd( (__f32x4)__A, (__f32x4)__B, (__f32x4)neg_c)); #else return _mm_move_ss(__A, _mm_sub_ss(_mm_mul_ss(__A, __B), __C)); #endif } /* -(a[0] * b[0]) + c[0], a[1..3] pass through */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ return _mm_move_ss( __A, (__m128)wasm_f32x4_relaxed_nmadd((__f32x4)__A, (__f32x4)__B, (__f32x4)__C)); #else return _mm_move_ss(__A, _mm_sub_ss(__C, _mm_mul_ss(__A, __B))); #endif } /* -(a[0] * b[0]) - c[0], a[1..3] pass through */ static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) { #ifdef __wasm_relaxed_simd__ __m128 neg_c = _mm_xor_ps(__C, _mm_set1_ps(-0.0f)); return _mm_move_ss(__A, (__m128)wasm_f32x4_relaxed_nmadd( (__f32x4)__A, (__f32x4)__B, (__f32x4)neg_c)); #else __m128 neg_ab = _mm_sub_ss(_mm_setzero_ps(), _mm_mul_ss(__A, __B)); return _mm_move_ss(__A, _mm_sub_ss(neg_ab, __C)); #endif } /* ============================================================ * Scalar double (sd) — lowest element only, upper from first operand * ============================================================ */ /* a[0] * b[0] + c[0], a[1] pass through */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return _mm_move_sd( __A, (__m128d)wasm_f64x2_relaxed_madd((__f64x2)__A, (__f64x2)__B, (__f64x2)__C)); #else return _mm_move_sd(__A, _mm_add_sd(_mm_mul_sd(__A, __B), __C)); #endif } /* a[0] * b[0] - c[0], a[1] pass through */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ __m128d neg_c = _mm_xor_pd(__C, _mm_set1_pd(-0.0)); return _mm_move_sd(__A, (__m128d)wasm_f64x2_relaxed_madd( (__f64x2)__A, (__f64x2)__B, (__f64x2)neg_c)); #else return _mm_move_sd(__A, _mm_sub_sd(_mm_mul_sd(__A, __B), __C)); #endif } /* -(a[0] * b[0]) + c[0], a[1] pass through */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ return _mm_move_sd(__A, (__m128d)wasm_f64x2_relaxed_nmadd( (__f64x2)__A, (__f64x2)__B, (__f64x2)__C)); #else return _mm_move_sd(__A, _mm_sub_sd(__C, _mm_mul_sd(__A, __B))); #endif } /* -(a[0] * b[0]) - c[0], a[1] pass through */ static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C) { #ifdef __wasm_relaxed_simd__ __m128d neg_c = _mm_xor_pd(__C, _mm_set1_pd(-0.0)); return _mm_move_sd(__A, (__m128d)wasm_f64x2_relaxed_nmadd( (__f64x2)__A, (__f64x2)__B, (__f64x2)neg_c)); #else __m128d neg_ab = _mm_sub_sd(_mm_setzero_pd(), _mm_mul_sd(__A, __B)); return _mm_move_sd(__A, _mm_sub_sd(neg_ab, __C)); #endif } #ifdef __AVX__ /* ============================================================ * 256-bit packed float (ps) — 8x float * ============================================================ */ static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fmadd_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fmadd_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fmsub_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fmsub_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fnmadd_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fnmadd_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fnmsub_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fnmsub_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fmaddsub_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fmaddsub_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } static __inline__ __m256 __attribute__((__always_inline__, __nodebug__)) _mm256_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C) { __m256_internal a = __m256_to_internal(__A); __m256_internal b = __m256_to_internal(__B); __m256_internal c = __m256_to_internal(__C); __m256_internal ret; ret.v0 = _mm_fmsubadd_ps(a.v0, b.v0, c.v0); ret.v1 = _mm_fmsubadd_ps(a.v1, b.v1, c.v1); return __m256_from_internal(ret); } /* ============================================================ * 256-bit packed double (pd) — 4x double * ============================================================ */ static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fmadd_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fmadd_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fmsub_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fmsub_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fnmadd_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fnmadd_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fnmsub_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fnmsub_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fmaddsub_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fmaddsub_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } static __inline__ __m256d __attribute__((__always_inline__, __nodebug__)) _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C) { __m256d_internal a = __m256d_to_internal(__A); __m256d_internal b = __m256d_to_internal(__B); __m256d_internal c = __m256d_to_internal(__C); __m256d_internal ret; ret.v0 = _mm_fmsubadd_pd(a.v0, b.v0, c.v0); ret.v1 = _mm_fmsubadd_pd(a.v1, b.v1, c.v1); return __m256d_from_internal(ret); } #endif /* __AVX__ */ #endif /* __emscripten_fmaintrin_h__ */ PK!#3emscripten/cache/sysroot/include/compat/immintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_immintrin_h__ #define __emscripten_immintrin_h__ #ifdef __SSE__ #include #endif #ifdef __SSE2__ #include #endif #ifdef __SSE3__ #include #endif #ifdef __SSSE3__ #include #endif #ifdef __SSE4_1__ #include #endif #ifdef __SSE4_2__ #include #endif #ifdef __AVX__ #include #endif #ifdef __AVX2__ #include #endif #ifdef __FMA__ #include #endif #endif /* __emscripten_immintrin_h__ */ PK!c^^0emscripten/cache/sysroot/include/compat/malloc.h#ifndef _COMPAT_MALLOC_H_ #define _COMPAT_MALLOC_H_ #include #ifdef __cplusplus extern "C" { #endif /* This version of struct mallinfo must match the one in system/lib/dlmalloc.c. */ struct mallinfo { size_t arena; /* total space allocated from system */ size_t ordblks; /* number of non-inuse chunks */ size_t smblks; /* unused -- always zero */ size_t hblks; /* number of mmapped regions */ size_t hblkhd; /* total space in mmapped regions */ size_t usmblks; /* unused -- always zero */ size_t fsmblks; /* unused -- always zero */ size_t uordblks; /* total allocated space */ size_t fordblks; /* total non-inuse space */ size_t keepcost; /* top-most, releasable (via malloc_trim) space */ }; /* The routines. */ extern struct mallinfo mallinfo(void); extern void malloc_stats(void); extern int mallopt(int, int); extern size_t malloc_usable_size(void*); /* mallopt options */ #define M_TRIM_THRESHOLD -1 #define M_GRANULARITY -2 #define M_MMAP_THRESHOLD -3 #ifdef __cplusplus } #endif #include_next #endif /* _COMPAT_MALLOC_H_ */ PK!q.emscripten/cache/sysroot/include/compat/math.h#ifndef _COMPAT_MATH_H_ #define _COMPAT_MATH_H_ #ifndef isinff #define isinff isinf #endif #ifndef isnanf #define isnanf isnan #endif #include_next #endif /* _COMPAT_MATH_H_ */ PK!2/emscripten/cache/sysroot/include/compat/netdb.h#ifndef _COMPAT_NETDB_H_ #define _COMPAT_NETDB_H_ #include_next #ifdef __cplusplus extern "C" { #endif /* The musl includes only define these things for old sources or when certain flags are activated. We want these available all of the time for now. */ struct hostent *gethostbyname (const char *); struct hostent *gethostbyaddr (const void *, socklen_t, int); int gethostbyname_r(const char *, struct hostent *, char *, size_t, struct hostent **, int *); #ifdef __cplusplus } #endif #endif /* _COMPAT_NETDB_H_ */ PK!I¤3emscripten/cache/sysroot/include/compat/nmmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_nmmintrin_h__ #define __emscripten_nmmintrin_h__ #ifndef __SSE4_2__ #error "SSE4.2 instruction set not enabled" #endif #include static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_epi64(__m128i __a, __m128i __b) { return wasm_i64x2_gt(__a, __b); } // Unsupported functions: // _mm_cmpestra // _mm_cmpestrc // _mm_cmpestri // _mm_cmpestrm // _mm_cmpestro // _mm_cmpestrs // _mm_cmpestrz // _mm_cmpistra // _mm_cmpistrc // _mm_cmpistri // _mm_cmpistrm // _mm_cmpistro // _mm_cmpistrs // _mm_cmpistrz // _mm_crc32_u16 // _mm_crc32_u32 // _mm_crc32_u64 // _mm_crc32_u8 #endif /* __emscripten_nmmintrin_h__ */ PK!G7h 3emscripten/cache/sysroot/include/compat/pmmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_pmmintrin_h__ #define __emscripten_pmmintrin_h__ #ifndef __SSE3__ #error "SSE3 instruction set not enabled" #endif #include static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_lddqu_si128(__m128i const *__p) { return _mm_loadu_si128(__p); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_addsub_ps(__m128 __a, __m128 __b) { return _mm_add_ps(__a, _mm_mul_ps(__b, _mm_set_ps(1.f, -1.f, 1.f, -1.f))); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_hadd_ps(__m128 __a, __m128 __b) { return _mm_add_ps(_mm_shuffle_ps(__a, __b, _MM_SHUFFLE(2, 0, 2, 0)), _mm_shuffle_ps(__a, __b, _MM_SHUFFLE(3, 1, 3, 1))); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_hsub_ps(__m128 __a, __m128 __b) { return _mm_sub_ps(_mm_shuffle_ps(__a, __b, _MM_SHUFFLE(2, 0, 2, 0)), _mm_shuffle_ps(__a, __b, _MM_SHUFFLE(3, 1, 3, 1))); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_movehdup_ps(__m128 __a) { return (__m128)wasm_i32x4_shuffle(__a, __a, 1, 1, 3, 3); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_moveldup_ps(__m128 __a) { return (__m128)wasm_i32x4_shuffle(__a, __a, 0, 0, 2, 2); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_addsub_pd(__m128d __a, __m128d __b) { return _mm_add_pd(__a, _mm_mul_pd(__b, _mm_set_pd(1.0, -1.0))); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_hadd_pd(__m128d __a, __m128d __b) { return _mm_add_pd(_mm_shuffle_pd(__a, __b, _MM_SHUFFLE2(0, 0)), _mm_shuffle_pd(__a, __b, _MM_SHUFFLE2(1, 1))); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_hsub_pd(__m128d __a, __m128d __b) { return _mm_sub_pd(_mm_shuffle_pd(__a, __b, _MM_SHUFFLE2(0, 0)), _mm_shuffle_pd(__a, __b, _MM_SHUFFLE2(1, 1))); } #define _mm_loaddup_pd(dp) _mm_load1_pd(dp) static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_movedup_pd(__m128d __a) { return (__m128d)wasm_i64x2_shuffle(__a, __a, 0, 0); } #define _MM_DENORMALS_ZERO_ON (0x0040) #define _MM_DENORMALS_ZERO_OFF (0x0000) #define _MM_DENORMALS_ZERO_MASK (0x0040) #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK) // Unavailable functions: // #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x))) // void _mm_monitor(void const *__p, unsigned __extensions, unsigned __hints); // void _mm_mwait(unsigned __extensions, unsigned __hints); #endif /* __emscripten_pmmintrin_h__ */ PK!hnHDD3emscripten/cache/sysroot/include/compat/smmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_smmintrin_h__ #define __emscripten_smmintrin_h__ #ifndef __SSE4_1__ #error "SSE4.1 instruction set not enabled" #endif #include #include // For rint and rintf #define _mm_blend_epi16(__a, __b, __imm8) __extension__ ({ \ (__m128i)__builtin_shufflevector((__i16x8)(__m128i)(__a), \ (__i16x8)(__m128i)(__b), \ (((__imm8) & 1) ? 8 : 0), \ (((__imm8) & 2) ? 9 : 1), \ (((__imm8) & 4) ? 10 : 2), \ (((__imm8) & 8) ? 11 : 3), \ (((__imm8) & 16) ? 12 : 4), \ (((__imm8) & 32) ? 13 : 5), \ (((__imm8) & 64) ? 14 : 6), \ (((__imm8) & 128) ? 15 : 7)); }) #define _mm_blend_pd(__a, __b, __imm8) __extension__ ({ \ (__m128d)__builtin_shufflevector((__f64x2)(__m128d)(__a), \ (__f64x2)(__m128d)(__b), \ (((__imm8) & 0x01) ? 2 : 0), \ (((__imm8) & 0x02) ? 3 : 1)); }) #define _mm_blend_ps(__a, __b, __imm8) __extension__ ({ \ (__m128)__builtin_shufflevector((__f32x4)(__m128)(__a), (__f32x4)(__m128)(__b), \ (((__imm8) & 0x01) ? 4 : 0), \ (((__imm8) & 0x02) ? 5 : 1), \ (((__imm8) & 0x04) ? 6 : 2), \ (((__imm8) & 0x08) ? 7 : 3)); }) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_blendv_epi8(__m128i __a, __m128i __b, __m128i __mask) { v128_t __M = wasm_i8x16_shr((v128_t)__mask, 7); return (__m128i)wasm_v128_bitselect((v128_t)__b, (v128_t)__a, __M); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_blendv_pd(__m128d __a, __m128d __b, __m128d __mask) { v128_t __M = wasm_i64x2_shr((v128_t)__mask, 63); return (__m128d)wasm_v128_bitselect((v128_t)__b, (v128_t)__a, __M); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_blendv_ps(__m128 __a, __m128 __b, __m128 __mask) { v128_t __M = wasm_i32x4_shr((v128_t)__mask, 31); return (__m128)wasm_v128_bitselect((v128_t)__b, (v128_t)__a, __M); } #define _MM_FROUND_TO_NEAREST_INT 0x00 #define _MM_FROUND_TO_NEG_INF 0x01 #define _MM_FROUND_TO_POS_INF 0x02 #define _MM_FROUND_TO_ZERO 0x03 #define _MM_FROUND_CUR_DIRECTION 0x04 #define _MM_FROUND_RAISE_EXC 0x00 #define _MM_FROUND_NO_EXC 0x08 #define _MM_FROUND_NINT (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_NEAREST_INT) #define _MM_FROUND_FLOOR (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_NEG_INF) #define _MM_FROUND_CEIL (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_POS_INF) #define _MM_FROUND_TRUNC (_MM_FROUND_RAISE_EXC | _MM_FROUND_TO_ZERO) #define _MM_FROUND_RINT (_MM_FROUND_RAISE_EXC | _MM_FROUND_CUR_DIRECTION) #define _MM_FROUND_NEARBYINT (_MM_FROUND_NO_EXC | _MM_FROUND_CUR_DIRECTION) static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_ceil_pd(__m128d __a) { return (__m128d)wasm_f64x2_ceil((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_ceil_ps(__m128 __a) { return (__m128)wasm_f32x4_ceil((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_ceil_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_ceil_ps(__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_ceil_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_ceil_pd(__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_floor_pd(__m128d __a) { return (__m128d)wasm_f64x2_floor((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_floor_ps(__m128 __a) { return (__m128)wasm_f32x4_floor((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_floor_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_floor_ps(__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_floor_sd(__m128d __a, __m128d __b) { return _mm_move_sd(__a, _mm_floor_pd(__b)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_round_pd(__m128d __a, int __rounding) { switch(__rounding & 7) { case _MM_FROUND_TO_NEG_INF: return _mm_floor_pd(__a); case _MM_FROUND_TO_POS_INF: return _mm_ceil_pd(__a); case _MM_FROUND_TO_ZERO: return (__m128d)wasm_f64x2_trunc((v128_t)__a); default: // _MM_FROUND_TO_NEAREST_INT and _MM_FROUND_CUR_DIRECTION (which is always nearest in Wasm SIMD) // SSE implements "Banker's rounding", where even half-ways, e.g. 2.5 are rounded down, // and odd numbers e.g. 3.5 are rounded up. return (__m128d)wasm_f64x2_nearest((v128_t)__a); } } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_round_ps(__m128 __a, int __rounding) { switch(__rounding & 7) { case _MM_FROUND_TO_NEG_INF: return _mm_floor_ps(__a); case _MM_FROUND_TO_POS_INF: return _mm_ceil_ps(__a); case _MM_FROUND_TO_ZERO: return (__m128)wasm_f32x4_trunc((v128_t)__a); default: // _MM_FROUND_TO_NEAREST_INT and _MM_FROUND_CUR_DIRECTION (which is always nearest in Wasm SIMD) // SSE implements "Banker's rounding", where even half-ways, e.g. 2.5 are rounded down, // and odd numbers e.g. 3.5 are rounded up. return (__m128)wasm_f32x4_nearest((v128_t)__a); } } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_round_ss(__m128 __a, __m128 __b, int __rounding) { return _mm_move_ss(__a, _mm_round_ps(__b, __rounding)); } static __inline__ __m128d __attribute__((__always_inline__, __nodebug__)) _mm_round_sd(__m128d __a, __m128d __b, int __rounding) { return _mm_move_sd(__a, _mm_round_pd(__b, __rounding)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mullo_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_mul(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mul_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i64x2_extmul_low_i32x4( (v128_t)_mm_shuffle_epi32(__a, _MM_SHUFFLE(2, 0, 2, 0)), (v128_t)_mm_shuffle_epi32(__b, _MM_SHUFFLE(2, 0, 2, 0))); } #define _mm_dp_ps(__a, __b, __imm8) __extension__ ({ \ __m128 __tmp = _mm_mul_ps(__a, __b); \ __m128 __zero = _mm_setzero_ps(); \ __tmp = _mm_blend_ps(__zero, __tmp, __imm8 >> 4); \ __m128 __sum = _mm_add_ps(__tmp, _mm_shuffle_ps(__tmp, __tmp, _MM_SHUFFLE(2, 3, 0, 1))); \ __sum = _mm_add_ps(__sum, _mm_shuffle_ps(__sum, __sum, _MM_SHUFFLE(1, 0, 3, 2))); \ _mm_blend_ps(__zero, __sum, __imm8); }) #define _mm_dp_pd(__a, __b, __imm8) __extension__ ({ \ __m128d __tmp = _mm_mul_pd(__a, __b); \ __m128d __zero = _mm_setzero_pd(); \ __tmp = _mm_blend_pd(__zero, __tmp, __imm8 >> 4); \ __m128d __sum = _mm_add_pd(__tmp, _mm_shuffle_pd(__tmp, __tmp, _MM_SHUFFLE2(0, 1))); \ _mm_blend_pd(__zero, __sum, __imm8); }) #define _mm_stream_load_si128 _mm_load_si128 static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_min(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_i8x16_max(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epu16(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_min(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epu16(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_max(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_min(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_i32x4_max(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_min_epu32(__m128i __a, __m128i __b) { return (__m128i)wasm_u32x4_min(__a, __b); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_max_epu32(__m128i __a, __m128i __b) { return (__m128i)wasm_u32x4_max(__a, __b); } #define _mm_insert_ps(__a, __b, __imm8) __extension__ ({ \ _Static_assert(__builtin_constant_p(__imm8), "Expected constant"); \ __m128 __tmp = __builtin_shufflevector((__f32x4)__a, (__f32x4)__b, \ ((((__imm8) >> 4) & 3) == 0) ? ((((__imm8) >> 6) & 3) + 4) : 0, \ ((((__imm8) >> 4) & 3) == 1) ? ((((__imm8) >> 6) & 3) + 4) : 1, \ ((((__imm8) >> 4) & 3) == 2) ? ((((__imm8) >> 6) & 3) + 4) : 2, \ ((((__imm8) >> 4) & 3) == 3) ? ((((__imm8) >> 6) & 3) + 4) : 3); \ (__m128)__builtin_shufflevector(__tmp, _mm_setzero_ps(), \ (((__imm8) & 1) ? 4 : 0), \ (((__imm8) & 2) ? 5 : 1), \ (((__imm8) & 4) ? 6 : 2), \ (((__imm8) & 8) ? 7 : 3)); }) #define _mm_extract_ps(__a, __imm8) \ __extension__({ wasm_i32x4_extract_lane((v128_t)(__a), (__imm8)&3); }) #define _MM_EXTRACT_FLOAT(D, X, N) (__extension__ ({ __f32x4 __a = (__f32x4)(X); \ (D) = __a[N]; })) #define _MM_MK_INSERTPS_NDX(X, Y, Z) (((X) << 6) | ((Y) << 4) | (Z)) #define _MM_PICK_OUT_PS(X, N) _mm_insert_ps(_mm_setzero_ps(), (X), \ _MM_MK_INSERTPS_NDX((N), 0, 0x0e)) #define _mm_insert_epi8(__a, __i, __imm8) __extension__ ({ \ (__m128i)wasm_i8x16_replace_lane((__a), (__imm8) & 15, (__i)); }) #define _mm_insert_epi32(__a, __i, __imm8) __extension__ ({ \ (__m128i)wasm_i32x4_replace_lane((__a), (__imm8) & 3, (__i)); }) #define _mm_insert_epi64(__a, __i, __imm8) __extension__ ({ \ (__m128i)wasm_i64x2_replace_lane((__a), (__imm8) & 1, (__i)); }) #define _mm_extract_epi8(__a, __imm8) __extension__ ({ \ wasm_u8x16_extract_lane((__a), (__imm8) & 15); }) #define _mm_extract_epi32(__a, __imm8) __extension__ ({ \ wasm_i32x4_extract_lane((__a), (__imm8) & 3); }) #define _mm_extract_epi64(__a, __imm8) __extension__ ({ \ wasm_i64x2_extract_lane((__a), (__imm8) & 1); }) static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_testz_si128(__m128i __a, __m128i __b) { v128_t __m = wasm_v128_and(__a, __b); return (wasm_i64x2_extract_lane(__m, 0) | wasm_i64x2_extract_lane(__m, 1)) == 0; } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_testc_si128(__m128i __a, __m128i __b) { v128_t __m = wasm_v128_andnot(__b, __a); return (wasm_i64x2_extract_lane(__m, 0) | wasm_i64x2_extract_lane(__m, 1)) == 0; } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_testnzc_si128(__m128i __a, __m128i __b) { v128_t __m1 = wasm_v128_and(__a, __b); v128_t __m2 = wasm_v128_andnot(__b, __a); return (wasm_i64x2_extract_lane(__m1, 0) | wasm_i64x2_extract_lane(__m1, 1)) && (wasm_i64x2_extract_lane(__m2, 0) | wasm_i64x2_extract_lane(__m2, 1)); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_test_all_ones(__m128i __a) { return (wasm_i64x2_extract_lane(__a, 0) & wasm_i64x2_extract_lane(__a, 1)) == 0xFFFFFFFFFFFFFFFFull; } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_test_all_zeros(__m128i __a, __m128i __mask) { v128_t __m = wasm_v128_and(__a, __mask); return (wasm_i64x2_extract_lane(__m, 0) | wasm_i64x2_extract_lane(__m, 1)) == 0; } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_test_mix_ones_zeros(__m128i __a, __m128i __mask) { v128_t __m = wasm_v128_and(__a, __mask); long long __c0 = wasm_i64x2_extract_lane(__m, 0); long long __c1 = wasm_i64x2_extract_lane(__m, 1); long long __ones = __c0 | __c1; long long __zeros = ~(__c0 & __c1); return __ones && __zeros; } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_epi64(__m128i __a, __m128i __b) { const __m128i __mask = _mm_cmpeq_epi32(__a, __b); return _mm_and_si128(__mask, _mm_shuffle_epi32(__mask, _MM_SHUFFLE(2, 3, 0, 1))); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi8_epi16(__m128i __a) { return (__m128i)wasm_i16x8_widen_low_i8x16((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi8_epi32(__m128i __a) { return (__m128i)wasm_i32x4_widen_low_i16x8(wasm_i16x8_widen_low_i8x16((v128_t)__a)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi8_epi64(__m128i __a) { const __m128i __exta = _mm_cvtepi8_epi32(__a); const __m128i __sign = _mm_cmpgt_epi32(_mm_setzero_si128(), __exta); return _mm_unpacklo_epi32(__exta, __sign); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi16_epi32(__m128i __a) { return (__m128i)wasm_i32x4_widen_low_i16x8((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi16_epi64(__m128i __a) { const __m128i __exta = _mm_cvtepi16_epi32(__a); const __m128i __sign = _mm_cmpgt_epi32(_mm_setzero_si128(), __exta); return _mm_unpacklo_epi32(__exta, __sign); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepi32_epi64(__m128i __a) { const __m128i __sign = _mm_cmpgt_epi32(_mm_setzero_si128(), __a); return _mm_unpacklo_epi32(__a, __sign); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu8_epi16(__m128i __a) { return (__m128i)wasm_u16x8_extend_low_u8x16((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu8_epi32(__m128i __a) { return (__m128i)wasm_u32x4_extend_low_u16x8(wasm_i16x8_widen_low_u8x16((v128_t)__a)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu8_epi64(__m128i __a) { const __m128i __zero = _mm_setzero_si128(); return _mm_unpacklo_epi32(_mm_unpacklo_epi16(_mm_unpacklo_epi8(__a, __zero), __zero), __zero); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu16_epi32(__m128i __a) { return (__m128i)wasm_u32x4_extend_low_u16x8((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu16_epi64(__m128i __a) { const __m128i __zero = _mm_setzero_si128(); return _mm_unpacklo_epi32(_mm_unpacklo_epi16(__a, __zero), __zero); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_cvtepu32_epi64(__m128i __a) { const __m128i __zero = _mm_setzero_si128(); return _mm_unpacklo_epi32(__a, __zero); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_packus_epi32(__m128i __a, __m128i __b) { return (__m128i)wasm_u16x8_narrow_i32x4(__a, __b); } static __inline__ unsigned short __attribute__((__always_inline__, __nodebug__)) __uabs(int __i) { return (unsigned short)((__i >= 0) ? __i : -__i); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mpsadbw_epu8(__m128i __a, __m128i __b, int __imm8) { int __aOffset = __imm8 & 4; int __bOffset = (__imm8 & 3) << 2; unsigned short __ret[8]; for(int __i = 0; __i < 8; ++__i) { __ret[__i] = __uabs(((__u8x16)__a)[__i + __aOffset ] - ((__u8x16)__b)[__bOffset ]) + __uabs(((__u8x16)__a)[__i + __aOffset + 1] - ((__u8x16)__b)[__bOffset + 1]) + __uabs(((__u8x16)__a)[__i + __aOffset + 2] - ((__u8x16)__b)[__bOffset + 2]) + __uabs(((__u8x16)__a)[__i + __aOffset + 3] - ((__u8x16)__b)[__bOffset + 3]); } return (__m128i)wasm_v128_load(__ret); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_minpos_epu16(__m128i __a) { unsigned short __min[2] = { 0xFFFF, 0 }; for(int __i = 0; __i < 8; ++__i) { unsigned short __v = ((__u16x8)__a)[__i]; if (__v < __min[0]) { __min[0] = __v; __min[1] = __i; } } return (__m128i)wasm_i32x4_make(*(int*)__min, 0, 0, 0); } // Clang and GCC compatibility: Both Clang and GCC include SSE4.2 headers from SSE4.1 headers #ifdef __SSE4_2__ #include #endif #endif /* __emscripten_smmintrin_h__ */ PK!M60emscripten/cache/sysroot/include/compat/stdarg.h#ifndef _COMPAT_STDARG_H #define _COMPAT_STDARG_H #ifdef __cplusplus extern "C" { #endif #define __va_copy(d,s) __builtin_va_copy(d,s) #ifdef __cplusplus } #endif #include_next #endif PK!a0emscripten/cache/sysroot/include/compat/stdlib.h#ifndef _COMPAT_STDLIB_H #define _COMPAT_STDLIB_H #ifdef __cplusplus extern "C" { #endif int getloadavg(double loadavg[], int nelem); #ifdef __cplusplus } #endif #include_next #endif PK!/0emscripten/cache/sysroot/include/compat/string.h#ifndef _COMPAT_STRING_H #define _COMPAT_STRING_H #ifdef __cplusplus extern "C" { #endif extern char* strlwr(char *); extern char* strupr(char *); #ifdef __cplusplus } #endif #include_next #endif PK! `4emscripten/cache/sysroot/include/compat/sys/random.h#ifdef __cplusplus extern "C" { #endif // This is used by libc++ as an efficient way to get high-quality random data // (more efficiently than via the filesystem using /dev/urandom). // Upstream musl added support for this, so we can switch to that, but it isn't // where libc++ looks for it (which is here and not unistd.h), and it uses a // syscall which is unnecessary indirection for us. int getentropy(void *buffer, size_t length); #include_next #ifdef __cplusplus } #endif PK!b!7emscripten/cache/sysroot/include/compat/sys/socketvar.h#ifndef _COMPAT_SOCKETVAR_H #define _COMPAT_SOCKETVAR_H #ifdef __cplusplus extern "C" { #endif #include #ifdef __cplusplus } #endif #endif PK!#ޜ2emscripten/cache/sysroot/include/compat/sys/stat.h#ifndef _COMPAT_STAT_H #define _COMPAT_STAT_H #ifdef __cplusplus extern "C" { #endif #include_next #define S_IRWXUGO (S_IRWXU|S_IRWXG|S_IRWXO) #define S_IALLUGO (S_ISUID|S_ISGID|S_ISVTX|S_IRWXUGO) #define S_IRUGO (S_IRUSR|S_IRGRP|S_IROTH) #define S_IWUGO (S_IWUSR|S_IWGRP|S_IWOTH) #define S_IXUGO (S_IXUSR|S_IXGRP|S_IXOTH) #ifdef __cplusplus } #endif #endif PK!? 3emscripten/cache/sysroot/include/compat/sys/timeb.h/* timeb.h -- An implementation of the standard Unix file. Written by Ian Lance Taylor Public domain; no rights reserved. declares the structure used by the ftime function, as well as the ftime function itself. Newlib does not provide an implementation of ftime. */ #ifndef _SYS_TIMEB_H #ifdef __cplusplus extern "C" { #endif #define _SYS_TIMEB_H #define __NEED_time_t #include struct timeb { time_t time; unsigned short millitm; short timezone; short dstflag; }; extern int ftime(struct timeb *); #ifdef __cplusplus } #endif #endif /* ! defined (_SYS_TIMEB_H) */ PK!M_ 4emscripten/cache/sysroot/include/compat/sys/unistd.h#include PK!D̅.emscripten/cache/sysroot/include/compat/time.h#ifndef _COMPAT_TIME_H #define _COMPAT_TIME_H #ifdef __cplusplus extern "C" { #endif int dysize(int year); #define _timezone timezone #define _daylight daylight #ifdef __cplusplus } #endif #include_next #endif PK!b@3emscripten/cache/sysroot/include/compat/tmmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_tmmintrin_h__ #define __emscripten_tmmintrin_h__ #ifndef __SSSE3__ #error "SSSE3 instruction set not enabled" #endif #include static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_abs_epi8(__m128i __a) { return (__m128i)wasm_i8x16_abs((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_abs_epi16(__m128i __a) { return (__m128i)wasm_i16x8_abs((v128_t)__a); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_abs_epi32(__m128i __a) { return (__m128i)wasm_i32x4_abs((v128_t)__a); } #define _mm_alignr_epi8(__a, __b, __count) \ ((__count <= 16) \ ? (_mm_or_si128(_mm_bslli_si128((__a), 16 - (((unsigned int)(__count)) & 0xFF)), _mm_bsrli_si128((__b), (((unsigned int)(__count)) & 0xFF)))) \ : (_mm_bsrli_si128((__a), (((unsigned int)(__count)) & 0xFF) - 16))) static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hadd_epi16(__m128i __a, __m128i __b) { return _mm_add_epi16((__m128i)wasm_i16x8_shuffle(__a, __b, 0, 2, 4, 6, 8, 10, 12, 14), (__m128i)wasm_i16x8_shuffle(__a, __b, 1, 3, 5, 7, 9, 11, 13, 15)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hadd_epi32(__m128i __a, __m128i __b) { return _mm_add_epi32((__m128i)_mm_shuffle_ps((__m128)__a, (__m128)__b, _MM_SHUFFLE(2, 0, 2, 0)), (__m128i)_mm_shuffle_ps((__m128)__a, (__m128)__b, _MM_SHUFFLE(3, 1, 3, 1))); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hadds_epi16(__m128i __a, __m128i __b) { return _mm_adds_epi16((__m128i)wasm_i16x8_shuffle(__a, __b, 0, 2, 4, 6, 8, 10, 12, 14), (__m128i)wasm_i16x8_shuffle(__a, __b, 1, 3, 5, 7, 9, 11, 13, 15)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hsub_epi16(__m128i __a, __m128i __b) { return _mm_sub_epi16((__m128i)wasm_i16x8_shuffle(__a, __b, 0, 2, 4, 6, 8, 10, 12, 14), (__m128i)wasm_i16x8_shuffle(__a, __b, 1, 3, 5, 7, 9, 11, 13, 15)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hsub_epi32(__m128i __a, __m128i __b) { return _mm_sub_epi32((__m128i)_mm_shuffle_ps((__m128)__a, (__m128)__b, _MM_SHUFFLE(2, 0, 2, 0)), (__m128i)_mm_shuffle_ps((__m128)__a, (__m128)__b, _MM_SHUFFLE(3, 1, 3, 1))); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_hsubs_epi16(__m128i __a, __m128i __b) { return _mm_subs_epi16((__m128i)wasm_i16x8_shuffle(__a, __b, 0, 2, 4, 6, 8, 10, 12, 14), (__m128i)wasm_i16x8_shuffle(__a, __b, 1, 3, 5, 7, 9, 11, 13, 15)); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_maddubs_epi16(__m128i __a, __m128i __b) { return _mm_adds_epi16( _mm_mullo_epi16( _mm_and_si128(__a, _mm_set1_epi16(0x00FF)), _mm_srai_epi16(_mm_slli_epi16(__b, 8), 8)), _mm_mullo_epi16(_mm_srli_epi16(__a, 8), _mm_srai_epi16(__b, 8))); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_mulhrs_epi16(__m128i __a, __m128i __b) { v128_t __lo = wasm_i32x4_mul(wasm_i32x4_widen_low_i16x8((v128_t)__a), wasm_i32x4_widen_low_i16x8((v128_t)__b)); v128_t __hi = wasm_i32x4_mul(wasm_i32x4_widen_high_i16x8((v128_t)__a), wasm_i32x4_widen_high_i16x8((v128_t)__b)); const v128_t __inc = wasm_i32x4_splat(0x4000); __lo = wasm_i32x4_add(__lo, __inc); __hi = wasm_i32x4_add(__hi, __inc); __lo = wasm_i32x4_add(__lo, __lo); __hi = wasm_i32x4_add(__hi, __hi); return (__m128i)wasm_i16x8_shuffle(__lo, __hi, 1, 3, 5, 7, 9, 11, 13, 15); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_shuffle_epi8(__m128i __a, __m128i __b) { return (__m128i)wasm_v8x16_swizzle((v128_t)__a, (v128_t)_mm_and_si128(__b, _mm_set1_epi8(0x8F))); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sign_epi8(__m128i __a, __m128i __b) { const __m128i __zero = _mm_setzero_si128(); __a = _mm_andnot_si128(_mm_cmpeq_epi8(__b, __zero), __a); const __m128i __mask = _mm_cmpgt_epi8(__zero, __b); return _mm_xor_si128(_mm_add_epi8(__a, __mask), __mask); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sign_epi16(__m128i __a, __m128i __b) { const __m128i __zero = _mm_setzero_si128(); __a = _mm_andnot_si128(_mm_cmpeq_epi16(__b, __zero), __a); const __m128i __mask = _mm_cmpgt_epi16(__zero, __b); return _mm_xor_si128(_mm_add_epi16(__a, __mask), __mask); } static __inline__ __m128i __attribute__((__always_inline__, __nodebug__)) _mm_sign_epi32(__m128i __a, __m128i __b) { const __m128i __zero = _mm_setzero_si128(); __a = _mm_andnot_si128(_mm_cmpeq_epi32(__b, __zero), __a); const __m128i __mask = _mm_cmpgt_epi32(__zero, __b); return _mm_xor_si128(_mm_add_epi32(__a, __mask), __mask); } // Unavailable functions: // _mm_abs_pi8 // _mm_abs_pi16 // _mm_abs_pi32 // _mm_alignr_pi8 // _mm_hadd_pi16 // _mm_hadd_pi32 // _mm_hadds_pi16 // _mm_hsub_pi16 // _mm_hsub_pi32 // _mm_hsubs_pi16 // _mm_maddubs_pi16 // _mm_mulhrs_pi16 // _mm_shuffle_pi8 // _mm_sign_pi8 // _mm_sign_pi16 // _mm_sign_pi32 #endif /* __emscripten_tmmintrin_h__ */ PK!U1emscripten/cache/sysroot/include/compat/xlocale.h#ifndef _COMPAT_XLOCALE_H_ #define _COMPAT_XLOCALE_H_ #define __NEED_locale_t #include #include #ifdef __cplusplus extern "C" { #endif long long strtoll_l(const char *start, char **end, int base, locale_t loc); unsigned long long strtoull_l(const char *start, char **end, int base, locale_t loc); long double strtold_l(const char *start, char **end, locale_t loc); #ifdef __cplusplus } #endif #endif /* _COMPAT_XLOCALE_H_ */ PK!UU3emscripten/cache/sysroot/include/compat/xmmintrin.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #ifndef __emscripten_xmmintrin_h__ #define __emscripten_xmmintrin_h__ #include #include #include #include #ifndef __SSE__ #error "SSE instruction set not enabled" #endif #ifdef WASM_SIMD_COMPAT_SLOW #define DIAGNOSE_SLOW diagnose_if(1, "Instruction emulated via slow path.", "warning") #else #define DIAGNOSE_SLOW #endif // Emscripten SIMD support doesn't support MMX/float32x2/__m64. // However, we support loading and storing 2-vectors, so // recognize the type at least. typedef float __m64 __attribute__((__vector_size__(8), __aligned__(8))); typedef __f32x4 __m128; typedef v128_t __m128i; #define __f32x4_shuffle(__a, __b, __c0, __c1, __c2, __c3) \ ((v128_t)(__builtin_shufflevector((__f32x4)(__a), (__f32x4)(__b), __c0, \ __c1, __c2, __c3))) // This is defined as a macro because __builtin_shufflevector requires its // mask argument to be a compile-time constant. #define _mm_shuffle_ps(__a, __b, __mask) __extension__ ({ \ ((__m128)__f32x4_shuffle(__a, __b, \ (((__mask) >> 0) & 0x3) + 0, \ (((__mask) >> 2) & 0x3) + 0, \ (((__mask) >> 4) & 0x3) + 4, \ (((__mask) >> 6) & 0x3) + 4)); }) static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_set_ps(float __z, float __y, float __x, float __w) { return (__m128)wasm_f32x4_make(__w, __x, __y, __z); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_setr_ps(float __z, float __y, float __x, float __w) { return (__m128)wasm_f32x4_make(__z, __y, __x, __w); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_set_ss(float __w) { return (__m128)wasm_f32x4_make(__w, 0, 0, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_set_ps1(float __w) { return (__m128)wasm_f32x4_splat(__w); } #define _mm_set1_ps _mm_set_ps1 static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_setzero_ps(void) { return (__m128)wasm_f32x4_const(0.f, 0.f, 0.f, 0.f); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_load_ps(const float *__p) { return *(__m128*)__p; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_loadl_pi(__m128 __a, const void /*__m64*/ *__p) { return (__m128)wasm_v128_load64_lane(__p, (v128_t)__a, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_loadh_pi(__m128 __a, const void /*__m64*/ *__p) { return (__m128)wasm_v128_load64_lane(__p, (v128_t)__a, 1); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_loadr_ps(const float *__p) { __m128 __v = _mm_load_ps(__p); return (__m128)__f32x4_shuffle(__v, __v, 3, 2, 1, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_loadu_ps(const float *__p) { return (__m128)wasm_v128_load(__p); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_load_ps1(const float *__p) { return (__m128)wasm_v32x4_load_splat(__p); } #define _mm_load1_ps _mm_load_ps1 static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_load_ss(const float *__p) { return (__m128)wasm_v128_load32_zero(__p); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_storel_pi(__m64 *__p, __m128 __a) { wasm_v128_store64_lane((void*)__p, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_storeh_pi(__m64 *__p, __m128 __a) { wasm_v128_store64_lane((void*)__p, (v128_t)__a, 1); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_ps(float *__p, __m128 __a) { *(__m128 *)__p = __a; } // No NTA cache hint available. #define _mm_stream_ps _mm_store_ps #define _MM_HINT_T0 3 #define _MM_HINT_T1 2 #define _MM_HINT_T2 1 #define _MM_HINT_NTA 0 // No prefetch available, dummy it out. static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_prefetch(const void *__p, int __i) { ((void)__p); ((void)__i); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_sfence(void) { // Wasm/SharedArrayBuffer memory model is sequentially consistent. // Perhaps a future version of the spec can provide a related fence. __sync_synchronize(); } #define _MM_SHUFFLE(w, z, y, x) (((w) << 6) | ((z) << 4) | ((y) << 2) | (x)) static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storer_ps(float *__p, __m128 __a) { _mm_store_ps(__p, _mm_shuffle_ps(__a, __a, _MM_SHUFFLE(0, 1, 2, 3))); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_ps1(float *__p, __m128 __a) { _mm_store_ps(__p, _mm_shuffle_ps(__a, __a, _MM_SHUFFLE(0, 0, 0, 0))); } #define _mm_store1_ps _mm_store_ps1 static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_store_ss(float *__p, __m128 __a) { wasm_v128_store32_lane((void*)__p, (v128_t)__a, 0); } static __inline__ void __attribute__((__always_inline__, __nodebug__)) _mm_storeu_ps(float *__p, __m128 __a) { struct __unaligned { __m128 __v; } __attribute__((__packed__, __may_alias__)); ((struct __unaligned *)__p)->__v = __a; } static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_movemask_ps(__m128 __a) { return (int)wasm_i32x4_bitmask((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_move_ss(__m128 __a, __m128 __b) { return (__m128)__f32x4_shuffle(__a, __b, 4, 1, 2, 3); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_add_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_add((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_add_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_add_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_sub_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_sub((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_sub_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_sub_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_mul_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_mul((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_mul_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_mul_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_div_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_div((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_div_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_div_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_min_ps(__m128 __a, __m128 __b) { // return (__m128)wasm_f32x4_pmin((v128_t)__a, (v128_t)__b); // TODO: Migrate to this, once it works in VMs return (__m128)wasm_v128_bitselect((v128_t)__a, (v128_t)__b, (v128_t)wasm_f32x4_lt((v128_t)__a, (v128_t)__b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_min_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_min_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_max_ps(__m128 __a, __m128 __b) { // return (__m128)wasm_f32x4_pmax((v128_t)__a, (v128_t)__b); // TODO: Migrate to this, once it works in VMs return (__m128)wasm_v128_bitselect((v128_t)__a, (v128_t)__b, (v128_t)wasm_f32x4_gt((v128_t)__a, (v128_t)__b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_max_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_max_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_rcp_ps(__m128 __a) { return (__m128)wasm_f32x4_div((v128_t)_mm_set1_ps(1.0f), (v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_rcp_ss(__m128 __a) { return _mm_move_ss(__a, _mm_rcp_ps(__a)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_sqrt_ps(__m128 __a) { return (__m128)wasm_f32x4_sqrt((v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_sqrt_ss(__m128 __a) { return _mm_move_ss(__a, _mm_sqrt_ps(__a)); } #define _mm_rsqrt_ps(__a) _mm_rcp_ps(_mm_sqrt_ps((__a))) static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_rsqrt_ss(__m128 __a) { return _mm_move_ss(__a, _mm_rsqrt_ps(__a)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_unpackhi_ps(__m128 __a, __m128 __b) { return (__m128)__f32x4_shuffle(__a, __b, 2, 6, 3, 7); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_unpacklo_ps(__m128 __a, __m128 __b) { return (__m128)__f32x4_shuffle(__a, __b, 0, 4, 1, 5); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_movehl_ps(__m128 __a, __m128 __b) { return (__m128)__f32x4_shuffle(__a, __b, 6, 7, 2, 3); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_movelh_ps(__m128 __a, __m128 __b) { return (__m128)__f32x4_shuffle(__a, __b, 0, 1, 4, 5); } #define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \ do { \ __m128 __row0 = (row0); \ __m128 __row1 = (row1); \ __m128 __row2 = (row2); \ __m128 __row3 = (row3); \ __m128 __tmp0 = _mm_unpacklo_ps(__row0, __row1); \ __m128 __tmp1 = _mm_unpackhi_ps(__row0, __row1); \ __m128 __tmp2 = _mm_unpacklo_ps(__row2, __row3); \ __m128 __tmp3 = _mm_unpackhi_ps(__row2, __row3); \ (row0) = _mm_movelh_ps(__tmp0, __tmp2); \ (row1) = _mm_movehl_ps(__tmp2, __tmp0); \ (row2) = _mm_movelh_ps(__tmp1, __tmp3); \ (row3) = _mm_movehl_ps(__tmp3, __tmp1); \ } while (0) static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_lt((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmplt_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmplt_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmple_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_le((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmple_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmple_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_eq((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpeq_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpeq_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpge_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_ge((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpge_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpge_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_gt((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpgt_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpgt_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cmpord_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_and(wasm_f32x4_eq((v128_t)__a, (v128_t)__a), wasm_f32x4_eq((v128_t)__b, (v128_t)__b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cmpord_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpord_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cmpunord_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_or(wasm_f32x4_ne((v128_t)__a, (v128_t)__a), wasm_f32x4_ne((v128_t)__b, (v128_t)__b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cmpunord_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpunord_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_and_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_and((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_andnot_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_andnot((v128_t)__b, (v128_t)__a); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_or_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_or((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_xor_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_xor((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpneq_ps(__m128 __a, __m128 __b) { return (__m128)wasm_f32x4_ne((v128_t)__a, (v128_t)__b); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpneq_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpneq_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnge_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_not((v128_t)_mm_cmpge_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnge_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpnge_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpngt_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_not((v128_t)_mm_cmpgt_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpngt_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpngt_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnle_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_not((v128_t)_mm_cmple_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnle_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpnle_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnlt_ps(__m128 __a, __m128 __b) { return (__m128)wasm_v128_not((v128_t)_mm_cmplt_ps(__a, __b)); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_cmpnlt_ss(__m128 __a, __m128 __b) { return _mm_move_ss(__a, _mm_cmpnlt_ps(__a, __b)); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comieq_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) == wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comige_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) >= wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comigt_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) > wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comile_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) <= wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comilt_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) < wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_comineq_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) != wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomieq_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) == wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomige_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) >= wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomigt_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) > wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomile_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) <= wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomilt_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) < wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_ucomineq_ss(__m128 __a, __m128 __b) { return wasm_f32x4_extract_lane((v128_t)__a, 0) != wasm_f32x4_extract_lane((v128_t)__b, 0); } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvtsi32_ss(__m128 __a, int __b) { __f32x4 __v = (__f32x4)__a; __v[0] = (float)__b; return (__m128)__v; } #define _mm_cvt_si2ss _mm_cvtsi32_ss static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvtss_si32(__m128 __a) { float e = ((__f32x4)__a)[0]; if (e < 2147483648.0f && e >= -2147483648.0f && (lrint(e) != 0 || fabsf(e) < 2.f)) return lrint(e); else return (int)0x80000000; } #define _mm_cvt_ss2si _mm_cvtss_si32 static __inline__ int __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvttss_si32(__m128 __a) { float e = ((__f32x4)__a)[0]; if (e < 2147483648.0f && e >= -2147483648.0f && (lrint(e) != 0 || fabsf(e) < 2.f)) return (int)e; else return (int)0x80000000; } #define _mm_cvtt_ss2si _mm_cvttss_si32 static __inline__ __m128 __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvtsi64_ss(__m128 __a, long long __b) { __f32x4 __v = (__f32x4)__a; __v[0] = (float)__b; return (__m128)__v; } static __inline__ long long __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvtss_si64(__m128 __a) { float e = ((__f32x4)__a)[0]; long long x = llrintf(e); if (e <= LLONG_MAX && e >= LLONG_MIN && (x != 0 || fabsf(e) < 2.f)) return x; else return 0x8000000000000000LL; } static __inline__ long long __attribute__((__always_inline__, __nodebug__, DIAGNOSE_SLOW)) _mm_cvttss_si64(__m128 __a) { float e = ((__f32x4)__a)[0]; long long x = llrintf(e); if (e <= LLONG_MAX && e >= LLONG_MIN && (x != 0 || fabsf(e) < 2.f)) return (long long)e; else return 0x8000000000000000LL; } static __inline__ float __attribute__((__always_inline__, __nodebug__)) _mm_cvtss_f32(__m128 __a) { return (float)((__f32x4)__a)[0]; } #define _mm_malloc(__size, __align) memalign((__align), (__size)) #define _mm_free free static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_undefined() { __m128 val; return val; } static __inline__ __m128 __attribute__((__always_inline__, __nodebug__)) _mm_undefined_ps() { __m128 val; return val; } #define _MM_EXCEPT_MASK 0x003f #define _MM_EXCEPT_INVALID 0x0001 #define _MM_EXCEPT_DENORM 0x0002 #define _MM_EXCEPT_DIV_ZERO 0x0004 #define _MM_EXCEPT_OVERFLOW 0x0008 #define _MM_EXCEPT_UNDERFLOW 0x0010 #define _MM_EXCEPT_INEXACT 0x0020 #define _MM_MASK_MASK 0x1f80 #define _MM_MASK_INVALID 0x0080 #define _MM_MASK_DENORM 0x0100 #define _MM_MASK_DIV_ZERO 0x0200 #define _MM_MASK_OVERFLOW 0x0400 #define _MM_MASK_UNDERFLOW 0x0800 #define _MM_MASK_INEXACT 0x1000 #define _MM_ROUND_MASK 0x6000 #define _MM_ROUND_NEAREST 0x0000 #define _MM_ROUND_DOWN 0x2000 #define _MM_ROUND_UP 0x4000 #define _MM_ROUND_TOWARD_ZERO 0x6000 #define _MM_FLUSH_ZERO_MASK 0x8000 #define _MM_FLUSH_ZERO_ON 0x8000 #define _MM_FLUSH_ZERO_OFF 0x0000 static __inline__ int __attribute__((__always_inline__, __nodebug__)) _mm_getcsr() { return _MM_MASK_INEXACT | _MM_MASK_DENORM | _MM_MASK_DIV_ZERO | _MM_MASK_OVERFLOW | _MM_MASK_UNDERFLOW | _MM_MASK_INVALID | _MM_ROUND_NEAREST | _MM_FLUSH_ZERO_OFF; } #define _MM_GET_EXCEPTION_STATE() (_mm_getcsr() & _MM_EXCEPT_MASK) #define _MM_GET_EXCEPTION_MASK() (_mm_getcsr() & _MM_MASK_MASK) #define _MM_GET_ROUNDING_MODE() (_mm_getcsr() & _MM_ROUND_MASK) #define _MM_GET_FLUSH_ZERO_MODE() (_mm_getcsr() & _MM_FLUSH_ZERO_MASK) // Unavailable functions: // void _MM_SET_EXCEPTION_STATE(unsigned int __a); // void _MM_SET_EXCEPTION_MASK(unsigned int __a); // void _MM_GET_ROUNDING_MODE(unsigned int __a); // void _MM_GET_FLUSH_ZERO_MODE(unsigned int __a); #endif /* __emscripten_xmmintrin_h__ */ PK!Dyy*emscripten/cache/sysroot/include/complex.h#ifndef _COMPLEX_H #define _COMPLEX_H #ifdef __cplusplus extern "C" { #endif #define complex _Complex #ifdef __GNUC__ #define _Complex_I (__extension__ (0.0f+1.0fi)) #else #define _Complex_I (0.0f+1.0fi) #endif #define I _Complex_I double complex cacos(double complex); float complex cacosf(float complex); long double complex cacosl(long double complex); double complex casin(double complex); float complex casinf(float complex); long double complex casinl(long double complex); double complex catan(double complex); float complex catanf(float complex); long double complex catanl(long double complex); double complex ccos(double complex); float complex ccosf(float complex); long double complex ccosl(long double complex); double complex csin(double complex); float complex csinf(float complex); long double complex csinl(long double complex); double complex ctan(double complex); float complex ctanf(float complex); long double complex ctanl(long double complex); double complex cacosh(double complex); float complex cacoshf(float complex); long double complex cacoshl(long double complex); double complex casinh(double complex); float complex casinhf(float complex); long double complex casinhl(long double complex); double complex catanh(double complex); float complex catanhf(float complex); long double complex catanhl(long double complex); double complex ccosh(double complex); float complex ccoshf(float complex); long double complex ccoshl(long double complex); double complex csinh(double complex); float complex csinhf(float complex); long double complex csinhl(long double complex); double complex ctanh(double complex); float complex ctanhf(float complex); long double complex ctanhl(long double complex); double complex cexp(double complex); float complex cexpf(float complex); long double complex cexpl(long double complex); double complex clog(double complex); float complex clogf(float complex); long double complex clogl(long double complex); double cabs(double complex); float cabsf(float complex); long double cabsl(long double complex); double complex cpow(double complex, double complex); float complex cpowf(float complex, float complex); long double complex cpowl(long double complex, long double complex); double complex csqrt(double complex); float complex csqrtf(float complex); long double complex csqrtl(long double complex); double carg(double complex); float cargf(float complex); long double cargl(long double complex); double cimag(double complex); float cimagf(float complex); long double cimagl(long double complex); double complex conj(double complex); float complex conjf(float complex); long double complex conjl(long double complex); double complex cproj(double complex); float complex cprojf(float complex); long double complex cprojl(long double complex); double creal(double complex); float crealf(float complex); long double creall(long double complex); #ifndef __cplusplus #define __CIMAG(x, t) \ (+(union { _Complex t __z; t __xy[2]; }){(_Complex t)(x)}.__xy[1]) #define creal(x) ((double)(x)) #define crealf(x) ((float)(x)) #define creall(x) ((long double)(x)) #define cimag(x) __CIMAG(x, double) #define cimagf(x) __CIMAG(x, float) #define cimagl(x) __CIMAG(x, long double) #endif #if __STDC_VERSION__ >= 201112L #if defined(_Imaginary_I) #define __CMPLX(x, y, t) ((t)(x) + _Imaginary_I*(t)(y)) #elif defined(__clang__) #define __CMPLX(x, y, t) (+(_Complex t){ (t)(x), (t)(y) }) #else #define __CMPLX(x, y, t) (__builtin_complex((t)(x), (t)(y))) #endif #define CMPLX(x, y) __CMPLX(x, y, double) #define CMPLXF(x, y) __CMPLX(x, y, float) #define CMPLXL(x, y) __CMPLX(x, y, long double) #endif #ifdef __cplusplus } #endif #endif PK!5'''emscripten/cache/sysroot/include/cpio.h#ifndef _CPIO_H #define _CPIO_H #define MAGIC "070707" #define C_IRUSR 000400 #define C_IWUSR 000200 #define C_IXUSR 000100 #define C_IRGRP 000040 #define C_IWGRP 000020 #define C_IXGRP 000010 #define C_IROTH 000004 #define C_IWOTH 000002 #define C_IXOTH 000001 #define C_ISUID 004000 #define C_ISGID 002000 #define C_ISVTX 001000 #define C_ISBLK 060000 #define C_ISCHR 020000 #define C_ISDIR 040000 #define C_ISFIFO 010000 #define C_ISSOCK 0140000 #define C_ISLNK 0120000 #define C_ISCTG 0110000 #define C_ISREG 0100000 #endif PK!=(emscripten/cache/sysroot/include/crypt.h#ifndef _CRYPT_H #define _CRYPT_H #ifdef __cplusplus extern "C" { #endif struct crypt_data { int initialized; char __buf[256]; }; char *crypt(const char *, const char *); char *crypt_r(const char *, const char *, struct crypt_data *); #ifdef __cplusplus } #endif #endif PK!(emscripten/cache/sysroot/include/ctype.h#ifndef _CTYPE_H #define _CTYPE_H #ifdef __cplusplus extern "C" { #endif #include int isalnum(int); int isalpha(int); int isblank(int); int iscntrl(int); int isdigit(int); int isgraph(int); int islower(int); int isprint(int); int ispunct(int); int isspace(int); int isupper(int); int isxdigit(int); int tolower(int); int toupper(int); #ifndef __cplusplus static __inline int __isspace(int _c) { return _c == ' ' || (unsigned)_c-'\t' < 5; } #define isalpha(a) (0 ? isalpha(a) : (((unsigned)(a)|32)-'a') < 26) #define isdigit(a) (0 ? isdigit(a) : ((unsigned)(a)-'0') < 10) #define islower(a) (0 ? islower(a) : ((unsigned)(a)-'a') < 26) #define isupper(a) (0 ? isupper(a) : ((unsigned)(a)-'A') < 26) #define isprint(a) (0 ? isprint(a) : ((unsigned)(a)-0x20) < 0x5f) #define isgraph(a) (0 ? isgraph(a) : ((unsigned)(a)-0x21) < 0x5e) #define isspace(a) __isspace(a) #endif #if defined(_POSIX_SOURCE) || defined(_POSIX_C_SOURCE) \ || defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) \ || defined(_BSD_SOURCE) #define __NEED_locale_t #include int isalnum_l(int, locale_t); int isalpha_l(int, locale_t); int isblank_l(int, locale_t); int iscntrl_l(int, locale_t); int isdigit_l(int, locale_t); int isgraph_l(int, locale_t); int islower_l(int, locale_t); int isprint_l(int, locale_t); int ispunct_l(int, locale_t); int isspace_l(int, locale_t); int isupper_l(int, locale_t); int isxdigit_l(int, locale_t); int tolower_l(int, locale_t); int toupper_l(int, locale_t); int isascii(int); int toascii(int); #define _tolower(a) ((a)|0x20) #define _toupper(a) ((a)&0x5f) #ifndef __cplusplus #define isascii(a) (0 ? isascii(a) : (unsigned)(a) < 128) #endif #endif #ifdef __cplusplus } #endif #endif PK!UD#SS)emscripten/cache/sysroot/include/dirent.h#ifndef _DIRENT_H #define _DIRENT_H #ifdef __cplusplus extern "C" { #endif #include #define __NEED_ino_t #define __NEED_off_t #define __NEED_size_t #define __NEED_ssize_t #include #include typedef unsigned short reclen_t; struct posix_dent { ino_t d_ino; off_t d_off; reclen_t d_reclen; unsigned char d_type; char d_name[]; }; typedef struct __dirstream DIR; #define d_fileno d_ino int closedir(DIR *); DIR *fdopendir(int); DIR *opendir(const char *); struct dirent *readdir(DIR *); int readdir_r(DIR *__restrict, struct dirent *__restrict, struct dirent **__restrict); void rewinddir(DIR *); int dirfd(DIR *); ssize_t posix_getdents(int, void *, size_t, int); int alphasort(const struct dirent **, const struct dirent **); int scandir(const char *, struct dirent ***, int (*)(const struct dirent *), int (*)(const struct dirent **, const struct dirent **)); #if defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || defined(_BSD_SOURCE) void seekdir(DIR *, long); long telldir(DIR *); #endif #define DT_UNKNOWN 0 #define DT_FIFO 1 #define DT_CHR 2 #define DT_DIR 4 #define DT_BLK 6 #define DT_REG 8 #define DT_LNK 10 #define DT_SOCK 12 #define DT_WHT 14 #if defined(_GNU_SOURCE) || defined(_BSD_SOURCE) #define IFTODT(x) ((x)>>12 & 017) #define DTTOIF(x) ((x)<<12) int getdents(int, struct dirent *, size_t); #endif #ifdef _GNU_SOURCE int versionsort(const struct dirent **, const struct dirent **); #endif #if defined(_LARGEFILE64_SOURCE) #define dirent64 dirent #define readdir64 readdir #define readdir64_r readdir_r #define scandir64 scandir #define alphasort64 alphasort #define versionsort64 versionsort #define off64_t off_t #define ino64_t ino_t #define getdents64 getdents #endif #ifdef __cplusplus } #endif #endif PK!tÈ##(emscripten/cache/sysroot/include/dlfcn.h#ifndef _DLFCN_H #define _DLFCN_H #ifdef __cplusplus extern "C" { #endif #include #define RTLD_LAZY 1 #define RTLD_NOW 2 #define RTLD_NOLOAD 4 #define RTLD_NODELETE 4096 #define RTLD_GLOBAL 256 #define RTLD_LOCAL 0 #define RTLD_NEXT ((void *)-1) #define RTLD_DEFAULT ((void *)0) #define RTLD_DI_LINKMAP 2 int dlclose(void *); char *dlerror(void); void *dlopen(const char *, int); void *dlsym(void *__restrict, const char *__restrict); #if defined(_GNU_SOURCE) || defined(_BSD_SOURCE) typedef struct { const char *dli_fname; void *dli_fbase; const char *dli_sname; void *dli_saddr; } Dl_info; int dladdr(const void *, Dl_info *); int dlinfo(void *, int, void *); #endif #if _REDIR_TIME64 __REDIR(dlsym, __dlsym_time64); #endif #ifdef __cplusplus } #endif #endif PK!RzQSS&emscripten/cache/sysroot/include/elf.h#ifndef _ELF_H #define _ELF_H #ifdef __cplusplus extern "C" { #endif #include typedef uint16_t Elf32_Half; typedef uint16_t Elf64_Half; typedef uint32_t Elf32_Word; typedef int32_t Elf32_Sword; typedef uint32_t Elf64_Word; typedef int32_t Elf64_Sword; typedef uint64_t Elf32_Xword; typedef int64_t Elf32_Sxword; typedef uint64_t Elf64_Xword; typedef int64_t Elf64_Sxword; typedef uint32_t Elf32_Addr; typedef uint64_t Elf64_Addr; typedef uint32_t Elf32_Off; typedef uint64_t Elf64_Off; typedef uint16_t Elf32_Section; typedef uint16_t Elf64_Section; typedef Elf32_Half Elf32_Versym; typedef Elf64_Half Elf64_Versym; #define EI_NIDENT (16) typedef struct { unsigned char e_ident[EI_NIDENT]; Elf32_Half e_type; Elf32_Half e_machine; Elf32_Word e_version; Elf32_Addr e_entry; Elf32_Off e_phoff; Elf32_Off e_shoff; Elf32_Word e_flags; Elf32_Half e_ehsize; Elf32_Half e_phentsize; Elf32_Half e_phnum; Elf32_Half e_shentsize; Elf32_Half e_shnum; Elf32_Half e_shstrndx; } Elf32_Ehdr; typedef struct { unsigned char e_ident[EI_NIDENT]; Elf64_Half e_type; Elf64_Half e_machine; Elf64_Word e_version; Elf64_Addr e_entry; Elf64_Off e_phoff; Elf64_Off e_shoff; Elf64_Word e_flags; Elf64_Half e_ehsize; Elf64_Half e_phentsize; Elf64_Half e_phnum; Elf64_Half e_shentsize; Elf64_Half e_shnum; Elf64_Half e_shstrndx; } Elf64_Ehdr; #define EI_MAG0 0 #define ELFMAG0 0x7f #define EI_MAG1 1 #define ELFMAG1 'E' #define EI_MAG2 2 #define ELFMAG2 'L' #define EI_MAG3 3 #define ELFMAG3 'F' #define ELFMAG "\177ELF" #define SELFMAG 4 #define EI_CLASS 4 #define ELFCLASSNONE 0 #define ELFCLASS32 1 #define ELFCLASS64 2 #define ELFCLASSNUM 3 #define EI_DATA 5 #define ELFDATANONE 0 #define ELFDATA2LSB 1 #define ELFDATA2MSB 2 #define ELFDATANUM 3 #define EI_VERSION 6 #define EI_OSABI 7 #define ELFOSABI_NONE 0 #define ELFOSABI_SYSV 0 #define ELFOSABI_HPUX 1 #define ELFOSABI_NETBSD 2 #define ELFOSABI_LINUX 3 #define ELFOSABI_GNU 3 #define ELFOSABI_SOLARIS 6 #define ELFOSABI_AIX 7 #define ELFOSABI_IRIX 8 #define ELFOSABI_FREEBSD 9 #define ELFOSABI_TRU64 10 #define ELFOSABI_MODESTO 11 #define ELFOSABI_OPENBSD 12 #define ELFOSABI_ARM 97 #define ELFOSABI_STANDALONE 255 #define EI_ABIVERSION 8 #define EI_PAD 9 #define ET_NONE 0 #define ET_REL 1 #define ET_EXEC 2 #define ET_DYN 3 #define ET_CORE 4 #define ET_NUM 5 #define ET_LOOS 0xfe00 #define ET_HIOS 0xfeff #define ET_LOPROC 0xff00 #define ET_HIPROC 0xffff #define EM_NONE 0 #define EM_M32 1 #define EM_SPARC 2 #define EM_386 3 #define EM_68K 4 #define EM_88K 5 #define EM_860 7 #define EM_MIPS 8 #define EM_S370 9 #define EM_MIPS_RS3_LE 10 #define EM_PARISC 15 #define EM_VPP500 17 #define EM_SPARC32PLUS 18 #define EM_960 19 #define EM_PPC 20 #define EM_PPC64 21 #define EM_S390 22 #define EM_V800 36 #define EM_FR20 37 #define EM_RH32 38 #define EM_RCE 39 #define EM_ARM 40 #define EM_FAKE_ALPHA 41 #define EM_SH 42 #define EM_SPARCV9 43 #define EM_TRICORE 44 #define EM_ARC 45 #define EM_H8_300 46 #define EM_H8_300H 47 #define EM_H8S 48 #define EM_H8_500 49 #define EM_IA_64 50 #define EM_MIPS_X 51 #define EM_COLDFIRE 52 #define EM_68HC12 53 #define EM_MMA 54 #define EM_PCP 55 #define EM_NCPU 56 #define EM_NDR1 57 #define EM_STARCORE 58 #define EM_ME16 59 #define EM_ST100 60 #define EM_TINYJ 61 #define EM_X86_64 62 #define EM_PDSP 63 #define EM_FX66 66 #define EM_ST9PLUS 67 #define EM_ST7 68 #define EM_68HC16 69 #define EM_68HC11 70 #define EM_68HC08 71 #define EM_68HC05 72 #define EM_SVX 73 #define EM_ST19 74 #define EM_VAX 75 #define EM_CRIS 76 #define EM_JAVELIN 77 #define EM_FIREPATH 78 #define EM_ZSP 79 #define EM_MMIX 80 #define EM_HUANY 81 #define EM_PRISM 82 #define EM_AVR 83 #define EM_FR30 84 #define EM_D10V 85 #define EM_D30V 86 #define EM_V850 87 #define EM_M32R 88 #define EM_MN10300 89 #define EM_MN10200 90 #define EM_PJ 91 #define EM_OR1K 92 #define EM_OPENRISC 92 #define EM_ARC_A5 93 #define EM_ARC_COMPACT 93 #define EM_XTENSA 94 #define EM_VIDEOCORE 95 #define EM_TMM_GPP 96 #define EM_NS32K 97 #define EM_TPC 98 #define EM_SNP1K 99 #define EM_ST200 100 #define EM_IP2K 101 #define EM_MAX 102 #define EM_CR 103 #define EM_F2MC16 104 #define EM_MSP430 105 #define EM_BLACKFIN 106 #define EM_SE_C33 107 #define EM_SEP 108 #define EM_ARCA 109 #define EM_UNICORE 110 #define EM_EXCESS 111 #define EM_DXP 112 #define EM_ALTERA_NIOS2 113 #define EM_CRX 114 #define EM_XGATE 115 #define EM_C166 116 #define EM_M16C 117 #define EM_DSPIC30F 118 #define EM_CE 119 #define EM_M32C 120 #define EM_TSK3000 131 #define EM_RS08 132 #define EM_SHARC 133 #define EM_ECOG2 134 #define EM_SCORE7 135 #define EM_DSP24 136 #define EM_VIDEOCORE3 137 #define EM_LATTICEMICO32 138 #define EM_SE_C17 139 #define EM_TI_C6000 140 #define EM_TI_C2000 141 #define EM_TI_C5500 142 #define EM_TI_ARP32 143 #define EM_TI_PRU 144 #define EM_MMDSP_PLUS 160 #define EM_CYPRESS_M8C 161 #define EM_R32C 162 #define EM_TRIMEDIA 163 #define EM_QDSP6 164 #define EM_8051 165 #define EM_STXP7X 166 #define EM_NDS32 167 #define EM_ECOG1X 168 #define EM_MAXQ30 169 #define EM_XIMO16 170 #define EM_MANIK 171 #define EM_CRAYNV2 172 #define EM_RX 173 #define EM_METAG 174 #define EM_MCST_ELBRUS 175 #define EM_ECOG16 176 #define EM_CR16 177 #define EM_ETPU 178 #define EM_SLE9X 179 #define EM_L10M 180 #define EM_K10M 181 #define EM_AARCH64 183 #define EM_AVR32 185 #define EM_STM8 186 #define EM_TILE64 187 #define EM_TILEPRO 188 #define EM_MICROBLAZE 189 #define EM_CUDA 190 #define EM_TILEGX 191 #define EM_CLOUDSHIELD 192 #define EM_COREA_1ST 193 #define EM_COREA_2ND 194 #define EM_ARC_COMPACT2 195 #define EM_OPEN8 196 #define EM_RL78 197 #define EM_VIDEOCORE5 198 #define EM_78KOR 199 #define EM_56800EX 200 #define EM_BA1 201 #define EM_BA2 202 #define EM_XCORE 203 #define EM_MCHP_PIC 204 #define EM_KM32 210 #define EM_KMX32 211 #define EM_EMX16 212 #define EM_EMX8 213 #define EM_KVARC 214 #define EM_CDP 215 #define EM_COGE 216 #define EM_COOL 217 #define EM_NORC 218 #define EM_CSR_KALIMBA 219 #define EM_Z80 220 #define EM_VISIUM 221 #define EM_FT32 222 #define EM_MOXIE 223 #define EM_AMDGPU 224 #define EM_RISCV 243 #define EM_BPF 247 #define EM_CSKY 252 #define EM_LOONGARCH 258 #define EM_NUM 259 #define EM_ALPHA 0x9026 #define EV_NONE 0 #define EV_CURRENT 1 #define EV_NUM 2 typedef struct { Elf32_Word sh_name; Elf32_Word sh_type; Elf32_Word sh_flags; Elf32_Addr sh_addr; Elf32_Off sh_offset; Elf32_Word sh_size; Elf32_Word sh_link; Elf32_Word sh_info; Elf32_Word sh_addralign; Elf32_Word sh_entsize; } Elf32_Shdr; typedef struct { Elf64_Word sh_name; Elf64_Word sh_type; Elf64_Xword sh_flags; Elf64_Addr sh_addr; Elf64_Off sh_offset; Elf64_Xword sh_size; Elf64_Word sh_link; Elf64_Word sh_info; Elf64_Xword sh_addralign; Elf64_Xword sh_entsize; } Elf64_Shdr; #define SHN_UNDEF 0 #define SHN_LORESERVE 0xff00 #define SHN_LOPROC 0xff00 #define SHN_BEFORE 0xff00 #define SHN_AFTER 0xff01 #define SHN_HIPROC 0xff1f #define SHN_LOOS 0xff20 #define SHN_HIOS 0xff3f #define SHN_ABS 0xfff1 #define SHN_COMMON 0xfff2 #define SHN_XINDEX 0xffff #define SHN_HIRESERVE 0xffff #define SHT_NULL 0 #define SHT_PROGBITS 1 #define SHT_SYMTAB 2 #define SHT_STRTAB 3 #define SHT_RELA 4 #define SHT_HASH 5 #define SHT_DYNAMIC 6 #define SHT_NOTE 7 #define SHT_NOBITS 8 #define SHT_REL 9 #define SHT_SHLIB 10 #define SHT_DYNSYM 11 #define SHT_INIT_ARRAY 14 #define SHT_FINI_ARRAY 15 #define SHT_PREINIT_ARRAY 16 #define SHT_GROUP 17 #define SHT_SYMTAB_SHNDX 18 #define SHT_RELR 19 #define SHT_NUM 20 #define SHT_LOOS 0x60000000 #define SHT_GNU_ATTRIBUTES 0x6ffffff5 #define SHT_GNU_HASH 0x6ffffff6 #define SHT_GNU_LIBLIST 0x6ffffff7 #define SHT_CHECKSUM 0x6ffffff8 #define SHT_LOSUNW 0x6ffffffa #define SHT_SUNW_move 0x6ffffffa #define SHT_SUNW_COMDAT 0x6ffffffb #define SHT_SUNW_syminfo 0x6ffffffc #define SHT_GNU_verdef 0x6ffffffd #define SHT_GNU_verneed 0x6ffffffe #define SHT_GNU_versym 0x6fffffff #define SHT_HISUNW 0x6fffffff #define SHT_HIOS 0x6fffffff #define SHT_LOPROC 0x70000000 #define SHT_HIPROC 0x7fffffff #define SHT_LOUSER 0x80000000 #define SHT_HIUSER 0x8fffffff #define SHF_WRITE (1 << 0) #define SHF_ALLOC (1 << 1) #define SHF_EXECINSTR (1 << 2) #define SHF_MERGE (1 << 4) #define SHF_STRINGS (1 << 5) #define SHF_INFO_LINK (1 << 6) #define SHF_LINK_ORDER (1 << 7) #define SHF_OS_NONCONFORMING (1 << 8) #define SHF_GROUP (1 << 9) #define SHF_TLS (1 << 10) #define SHF_COMPRESSED (1 << 11) #define SHF_MASKOS 0x0ff00000 #define SHF_MASKPROC 0xf0000000 #define SHF_ORDERED (1 << 30) #define SHF_EXCLUDE (1U << 31) typedef struct { Elf32_Word ch_type; Elf32_Word ch_size; Elf32_Word ch_addralign; } Elf32_Chdr; typedef struct { Elf64_Word ch_type; Elf64_Word ch_reserved; Elf64_Xword ch_size; Elf64_Xword ch_addralign; } Elf64_Chdr; #define ELFCOMPRESS_ZLIB 1 #define ELFCOMPRESS_ZSTD 2 #define ELFCOMPRESS_LOOS 0x60000000 #define ELFCOMPRESS_HIOS 0x6fffffff #define ELFCOMPRESS_LOPROC 0x70000000 #define ELFCOMPRESS_HIPROC 0x7fffffff #define GRP_COMDAT 0x1 typedef struct { Elf32_Word st_name; Elf32_Addr st_value; Elf32_Word st_size; unsigned char st_info; unsigned char st_other; Elf32_Section st_shndx; } Elf32_Sym; typedef struct { Elf64_Word st_name; unsigned char st_info; unsigned char st_other; Elf64_Section st_shndx; Elf64_Addr st_value; Elf64_Xword st_size; } Elf64_Sym; typedef struct { Elf32_Half si_boundto; Elf32_Half si_flags; } Elf32_Syminfo; typedef struct { Elf64_Half si_boundto; Elf64_Half si_flags; } Elf64_Syminfo; #define SYMINFO_BT_SELF 0xffff #define SYMINFO_BT_PARENT 0xfffe #define SYMINFO_BT_LOWRESERVE 0xff00 #define SYMINFO_FLG_DIRECT 0x0001 #define SYMINFO_FLG_PASSTHRU 0x0002 #define SYMINFO_FLG_COPY 0x0004 #define SYMINFO_FLG_LAZYLOAD 0x0008 #define SYMINFO_NONE 0 #define SYMINFO_CURRENT 1 #define SYMINFO_NUM 2 #define ELF32_ST_BIND(val) (((unsigned char) (val)) >> 4) #define ELF32_ST_TYPE(val) ((val) & 0xf) #define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf)) #define ELF64_ST_BIND(val) ELF32_ST_BIND (val) #define ELF64_ST_TYPE(val) ELF32_ST_TYPE (val) #define ELF64_ST_INFO(bind, type) ELF32_ST_INFO ((bind), (type)) #define STB_LOCAL 0 #define STB_GLOBAL 1 #define STB_WEAK 2 #define STB_NUM 3 #define STB_LOOS 10 #define STB_GNU_UNIQUE 10 #define STB_HIOS 12 #define STB_LOPROC 13 #define STB_HIPROC 15 #define STT_NOTYPE 0 #define STT_OBJECT 1 #define STT_FUNC 2 #define STT_SECTION 3 #define STT_FILE 4 #define STT_COMMON 5 #define STT_TLS 6 #define STT_NUM 7 #define STT_LOOS 10 #define STT_GNU_IFUNC 10 #define STT_HIOS 12 #define STT_LOPROC 13 #define STT_HIPROC 15 #define STN_UNDEF 0 #define ELF32_ST_VISIBILITY(o) ((o) & 0x03) #define ELF64_ST_VISIBILITY(o) ELF32_ST_VISIBILITY (o) #define STV_DEFAULT 0 #define STV_INTERNAL 1 #define STV_HIDDEN 2 #define STV_PROTECTED 3 typedef struct { Elf32_Addr r_offset; Elf32_Word r_info; } Elf32_Rel; typedef struct { Elf64_Addr r_offset; Elf64_Xword r_info; } Elf64_Rel; typedef struct { Elf32_Addr r_offset; Elf32_Word r_info; Elf32_Sword r_addend; } Elf32_Rela; typedef struct { Elf64_Addr r_offset; Elf64_Xword r_info; Elf64_Sxword r_addend; } Elf64_Rela; typedef Elf32_Word Elf32_Relr; typedef Elf64_Xword Elf64_Relr; #define ELF32_R_SYM(val) ((val) >> 8) #define ELF32_R_TYPE(val) ((val) & 0xff) #define ELF32_R_INFO(sym, type) (((sym) << 8) + ((type) & 0xff)) #define ELF64_R_SYM(i) ((i) >> 32) #define ELF64_R_TYPE(i) ((i) & 0xffffffff) #define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type)) typedef struct { Elf32_Word p_type; Elf32_Off p_offset; Elf32_Addr p_vaddr; Elf32_Addr p_paddr; Elf32_Word p_filesz; Elf32_Word p_memsz; Elf32_Word p_flags; Elf32_Word p_align; } Elf32_Phdr; typedef struct { Elf64_Word p_type; Elf64_Word p_flags; Elf64_Off p_offset; Elf64_Addr p_vaddr; Elf64_Addr p_paddr; Elf64_Xword p_filesz; Elf64_Xword p_memsz; Elf64_Xword p_align; } Elf64_Phdr; #define PT_NULL 0 #define PT_LOAD 1 #define PT_DYNAMIC 2 #define PT_INTERP 3 #define PT_NOTE 4 #define PT_SHLIB 5 #define PT_PHDR 6 #define PT_TLS 7 #define PT_NUM 8 #define PT_LOOS 0x60000000 #define PT_GNU_EH_FRAME 0x6474e550 #define PT_GNU_STACK 0x6474e551 #define PT_GNU_RELRO 0x6474e552 #define PT_GNU_PROPERTY 0x6474e553 #define PT_LOSUNW 0x6ffffffa #define PT_SUNWBSS 0x6ffffffa #define PT_SUNWSTACK 0x6ffffffb #define PT_HISUNW 0x6fffffff #define PT_HIOS 0x6fffffff #define PT_LOPROC 0x70000000 #define PT_HIPROC 0x7fffffff #define PN_XNUM 0xffff #define PF_X (1 << 0) #define PF_W (1 << 1) #define PF_R (1 << 2) #define PF_MASKOS 0x0ff00000 #define PF_MASKPROC 0xf0000000 #define NT_PRSTATUS 1 #define NT_PRFPREG 2 #define NT_FPREGSET 2 #define NT_PRPSINFO 3 #define NT_PRXREG 4 #define NT_TASKSTRUCT 4 #define NT_PLATFORM 5 #define NT_AUXV 6 #define NT_GWINDOWS 7 #define NT_ASRS 8 #define NT_PSTATUS 10 #define NT_PSINFO 13 #define NT_PRCRED 14 #define NT_UTSNAME 15 #define NT_LWPSTATUS 16 #define NT_LWPSINFO 17 #define NT_PRFPXREG 20 #define NT_SIGINFO 0x53494749 #define NT_FILE 0x46494c45 #define NT_PRXFPREG 0x46e62b7f #define NT_PPC_VMX 0x100 #define NT_PPC_SPE 0x101 #define NT_PPC_VSX 0x102 #define NT_PPC_TAR 0x103 #define NT_PPC_PPR 0x104 #define NT_PPC_DSCR 0x105 #define NT_PPC_EBB 0x106 #define NT_PPC_PMU 0x107 #define NT_PPC_TM_CGPR 0x108 #define NT_PPC_TM_CFPR 0x109 #define NT_PPC_TM_CVMX 0x10a #define NT_PPC_TM_CVSX 0x10b #define NT_PPC_TM_SPR 0x10c #define NT_PPC_TM_CTAR 0x10d #define NT_PPC_TM_CPPR 0x10e #define NT_PPC_TM_CDSCR 0x10f #define NT_386_TLS 0x200 #define NT_386_IOPERM 0x201 #define NT_X86_XSTATE 0x202 #define NT_S390_HIGH_GPRS 0x300 #define NT_S390_TIMER 0x301 #define NT_S390_TODCMP 0x302 #define NT_S390_TODPREG 0x303 #define NT_S390_CTRS 0x304 #define NT_S390_PREFIX 0x305 #define NT_S390_LAST_BREAK 0x306 #define NT_S390_SYSTEM_CALL 0x307 #define NT_S390_TDB 0x308 #define NT_S390_VXRS_LOW 0x309 #define NT_S390_VXRS_HIGH 0x30a #define NT_S390_GS_CB 0x30b #define NT_S390_GS_BC 0x30c #define NT_S390_RI_CB 0x30d #define NT_ARM_VFP 0x400 #define NT_ARM_TLS 0x401 #define NT_ARM_HW_BREAK 0x402 #define NT_ARM_HW_WATCH 0x403 #define NT_ARM_SYSTEM_CALL 0x404 #define NT_ARM_SVE 0x405 #define NT_ARM_PAC_MASK 0x406 #define NT_ARM_PACA_KEYS 0x407 #define NT_ARM_PACG_KEYS 0x408 #define NT_ARM_TAGGED_ADDR_CTRL 0x409 #define NT_ARM_PAC_ENABLED_KEYS 0x40a #define NT_METAG_CBUF 0x500 #define NT_METAG_RPIPE 0x501 #define NT_METAG_TLS 0x502 #define NT_ARC_V2 0x600 #define NT_VMCOREDD 0x700 #define NT_MIPS_DSP 0x800 #define NT_MIPS_FP_MODE 0x801 #define NT_MIPS_MSA 0x802 #define NT_RISCV_CSR 0x900 #define NT_RISCV_VECTOR 0x901 #define NT_VERSION 1 #define NT_LOONGARCH_CPUCFG 0xa00 #define NT_LOONGARCH_CSR 0xa01 #define NT_LOONGARCH_LSX 0xa02 #define NT_LOONGARCH_LASX 0xa03 #define NT_LOONGARCH_LBT 0xa04 #define NT_LOONGARCH_HW_BREAK 0xa05 #define NT_LOONGARCH_HW_WATCH 0xa06 typedef struct { Elf32_Sword d_tag; union { Elf32_Word d_val; Elf32_Addr d_ptr; } d_un; } Elf32_Dyn; typedef struct { Elf64_Sxword d_tag; union { Elf64_Xword d_val; Elf64_Addr d_ptr; } d_un; } Elf64_Dyn; #define DT_NULL 0 #define DT_NEEDED 1 #define DT_PLTRELSZ 2 #define DT_PLTGOT 3 #define DT_HASH 4 #define DT_STRTAB 5 #define DT_SYMTAB 6 #define DT_RELA 7 #define DT_RELASZ 8 #define DT_RELAENT 9 #define DT_STRSZ 10 #define DT_SYMENT 11 #define DT_INIT 12 #define DT_FINI 13 #define DT_SONAME 14 #define DT_RPATH 15 #define DT_SYMBOLIC 16 #define DT_REL 17 #define DT_RELSZ 18 #define DT_RELENT 19 #define DT_PLTREL 20 #define DT_DEBUG 21 #define DT_TEXTREL 22 #define DT_JMPREL 23 #define DT_BIND_NOW 24 #define DT_INIT_ARRAY 25 #define DT_FINI_ARRAY 26 #define DT_INIT_ARRAYSZ 27 #define DT_FINI_ARRAYSZ 28 #define DT_RUNPATH 29 #define DT_FLAGS 30 #define DT_ENCODING 32 #define DT_PREINIT_ARRAY 32 #define DT_PREINIT_ARRAYSZ 33 #define DT_SYMTAB_SHNDX 34 #define DT_RELRSZ 35 #define DT_RELR 36 #define DT_RELRENT 37 #define DT_NUM 38 #define DT_LOOS 0x6000000d #define DT_HIOS 0x6ffff000 #define DT_LOPROC 0x70000000 #define DT_HIPROC 0x7fffffff #define DT_PROCNUM DT_MIPS_NUM #define DT_VALRNGLO 0x6ffffd00 #define DT_GNU_PRELINKED 0x6ffffdf5 #define DT_GNU_CONFLICTSZ 0x6ffffdf6 #define DT_GNU_LIBLISTSZ 0x6ffffdf7 #define DT_CHECKSUM 0x6ffffdf8 #define DT_PLTPADSZ 0x6ffffdf9 #define DT_MOVEENT 0x6ffffdfa #define DT_MOVESZ 0x6ffffdfb #define DT_FEATURE_1 0x6ffffdfc #define DT_POSFLAG_1 0x6ffffdfd #define DT_SYMINSZ 0x6ffffdfe #define DT_SYMINENT 0x6ffffdff #define DT_VALRNGHI 0x6ffffdff #define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) #define DT_VALNUM 12 #define DT_ADDRRNGLO 0x6ffffe00 #define DT_GNU_HASH 0x6ffffef5 #define DT_TLSDESC_PLT 0x6ffffef6 #define DT_TLSDESC_GOT 0x6ffffef7 #define DT_GNU_CONFLICT 0x6ffffef8 #define DT_GNU_LIBLIST 0x6ffffef9 #define DT_CONFIG 0x6ffffefa #define DT_DEPAUDIT 0x6ffffefb #define DT_AUDIT 0x6ffffefc #define DT_PLTPAD 0x6ffffefd #define DT_MOVETAB 0x6ffffefe #define DT_SYMINFO 0x6ffffeff #define DT_ADDRRNGHI 0x6ffffeff #define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) #define DT_ADDRNUM 11 #define DT_VERSYM 0x6ffffff0 #define DT_RELACOUNT 0x6ffffff9 #define DT_RELCOUNT 0x6ffffffa #define DT_FLAGS_1 0x6ffffffb #define DT_VERDEF 0x6ffffffc #define DT_VERDEFNUM 0x6ffffffd #define DT_VERNEED 0x6ffffffe #define DT_VERNEEDNUM 0x6fffffff #define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) #define DT_VERSIONTAGNUM 16 #define DT_AUXILIARY 0x7ffffffd #define DT_FILTER 0x7fffffff #define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1) #define DT_EXTRANUM 3 #define DF_ORIGIN 0x00000001 #define DF_SYMBOLIC 0x00000002 #define DF_TEXTREL 0x00000004 #define DF_BIND_NOW 0x00000008 #define DF_STATIC_TLS 0x00000010 #define DF_1_NOW 0x00000001 #define DF_1_GLOBAL 0x00000002 #define DF_1_GROUP 0x00000004 #define DF_1_NODELETE 0x00000008 #define DF_1_LOADFLTR 0x00000010 #define DF_1_INITFIRST 0x00000020 #define DF_1_NOOPEN 0x00000040 #define DF_1_ORIGIN 0x00000080 #define DF_1_DIRECT 0x00000100 #define DF_1_TRANS 0x00000200 #define DF_1_INTERPOSE 0x00000400 #define DF_1_NODEFLIB 0x00000800 #define DF_1_NODUMP 0x00001000 #define DF_1_CONFALT 0x00002000 #define DF_1_ENDFILTEE 0x00004000 #define DF_1_DISPRELDNE 0x00008000 #define DF_1_DISPRELPND 0x00010000 #define DF_1_NODIRECT 0x00020000 #define DF_1_IGNMULDEF 0x00040000 #define DF_1_NOKSYMS 0x00080000 #define DF_1_NOHDR 0x00100000 #define DF_1_EDITED 0x00200000 #define DF_1_NORELOC 0x00400000 #define DF_1_SYMINTPOSE 0x00800000 #define DF_1_GLOBAUDIT 0x01000000 #define DF_1_SINGLETON 0x02000000 #define DF_1_STUB 0x04000000 #define DF_1_PIE 0x08000000 #define DTF_1_PARINIT 0x00000001 #define DTF_1_CONFEXP 0x00000002 #define DF_P1_LAZYLOAD 0x00000001 #define DF_P1_GROUPPERM 0x00000002 typedef struct { Elf32_Half vd_version; Elf32_Half vd_flags; Elf32_Half vd_ndx; Elf32_Half vd_cnt; Elf32_Word vd_hash; Elf32_Word vd_aux; Elf32_Word vd_next; } Elf32_Verdef; typedef struct { Elf64_Half vd_version; Elf64_Half vd_flags; Elf64_Half vd_ndx; Elf64_Half vd_cnt; Elf64_Word vd_hash; Elf64_Word vd_aux; Elf64_Word vd_next; } Elf64_Verdef; #define VER_DEF_NONE 0 #define VER_DEF_CURRENT 1 #define VER_DEF_NUM 2 #define VER_FLG_BASE 0x1 #define VER_FLG_WEAK 0x2 #define VER_NDX_LOCAL 0 #define VER_NDX_GLOBAL 1 #define VER_NDX_LORESERVE 0xff00 #define VER_NDX_ELIMINATE 0xff01 typedef struct { Elf32_Word vda_name; Elf32_Word vda_next; } Elf32_Verdaux; typedef struct { Elf64_Word vda_name; Elf64_Word vda_next; } Elf64_Verdaux; typedef struct { Elf32_Half vn_version; Elf32_Half vn_cnt; Elf32_Word vn_file; Elf32_Word vn_aux; Elf32_Word vn_next; } Elf32_Verneed; typedef struct { Elf64_Half vn_version; Elf64_Half vn_cnt; Elf64_Word vn_file; Elf64_Word vn_aux; Elf64_Word vn_next; } Elf64_Verneed; #define VER_NEED_NONE 0 #define VER_NEED_CURRENT 1 #define VER_NEED_NUM 2 typedef struct { Elf32_Word vna_hash; Elf32_Half vna_flags; Elf32_Half vna_other; Elf32_Word vna_name; Elf32_Word vna_next; } Elf32_Vernaux; typedef struct { Elf64_Word vna_hash; Elf64_Half vna_flags; Elf64_Half vna_other; Elf64_Word vna_name; Elf64_Word vna_next; } Elf64_Vernaux; #define VER_FLG_WEAK 0x2 typedef struct { uint32_t a_type; union { uint32_t a_val; } a_un; } Elf32_auxv_t; typedef struct { uint64_t a_type; union { uint64_t a_val; } a_un; } Elf64_auxv_t; #define AT_NULL 0 #define AT_IGNORE 1 #define AT_EXECFD 2 #define AT_PHDR 3 #define AT_PHENT 4 #define AT_PHNUM 5 #define AT_PAGESZ 6 #define AT_BASE 7 #define AT_FLAGS 8 #define AT_ENTRY 9 #define AT_NOTELF 10 #define AT_UID 11 #define AT_EUID 12 #define AT_GID 13 #define AT_EGID 14 #define AT_CLKTCK 17 #define AT_PLATFORM 15 #define AT_HWCAP 16 #define AT_FPUCW 18 #define AT_DCACHEBSIZE 19 #define AT_ICACHEBSIZE 20 #define AT_UCACHEBSIZE 21 #define AT_IGNOREPPC 22 #define AT_SECURE 23 #define AT_BASE_PLATFORM 24 #define AT_RANDOM 25 #define AT_HWCAP2 26 #define AT_HWCAP3 29 #define AT_HWCAP4 30 #define AT_EXECFN 31 #define AT_SYSINFO 32 #define AT_SYSINFO_EHDR 33 #define AT_L1I_CACHESHAPE 34 #define AT_L1D_CACHESHAPE 35 #define AT_L2_CACHESHAPE 36 #define AT_L3_CACHESHAPE 37 #define AT_L1I_CACHESIZE 40 #define AT_L1I_CACHEGEOMETRY 41 #define AT_L1D_CACHESIZE 42 #define AT_L1D_CACHEGEOMETRY 43 #define AT_L2_CACHESIZE 44 #define AT_L2_CACHEGEOMETRY 45 #define AT_L3_CACHESIZE 46 #define AT_L3_CACHEGEOMETRY 47 #define AT_MINSIGSTKSZ 51 typedef struct { Elf32_Word n_namesz; Elf32_Word n_descsz; Elf32_Word n_type; } Elf32_Nhdr; typedef struct { Elf64_Word n_namesz; Elf64_Word n_descsz; Elf64_Word n_type; } Elf64_Nhdr; #define ELF_NOTE_SOLARIS "SUNW Solaris" #define ELF_NOTE_GNU "GNU" #define ELF_NOTE_PAGESIZE_HINT 1 #define NT_GNU_ABI_TAG 1 #define ELF_NOTE_ABI NT_GNU_ABI_TAG #define ELF_NOTE_OS_LINUX 0 #define ELF_NOTE_OS_GNU 1 #define ELF_NOTE_OS_SOLARIS2 2 #define ELF_NOTE_OS_FREEBSD 3 #define NT_GNU_BUILD_ID 3 #define NT_GNU_GOLD_VERSION 4 #define NT_GNU_PROPERTY_TYPE_0 5 typedef struct { Elf32_Xword m_value; Elf32_Word m_info; Elf32_Word m_poffset; Elf32_Half m_repeat; Elf32_Half m_stride; } Elf32_Move; typedef struct { Elf64_Xword m_value; Elf64_Xword m_info; Elf64_Xword m_poffset; Elf64_Half m_repeat; Elf64_Half m_stride; } Elf64_Move; #define ELF32_M_SYM(info) ((info) >> 8) #define ELF32_M_SIZE(info) ((unsigned char) (info)) #define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size)) #define ELF64_M_SYM(info) ELF32_M_SYM (info) #define ELF64_M_SIZE(info) ELF32_M_SIZE (info) #define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size) #define EF_CPU32 0x00810000 #define R_68K_NONE 0 #define R_68K_32 1 #define R_68K_16 2 #define R_68K_8 3 #define R_68K_PC32 4 #define R_68K_PC16 5 #define R_68K_PC8 6 #define R_68K_GOT32 7 #define R_68K_GOT16 8 #define R_68K_GOT8 9 #define R_68K_GOT32O 10 #define R_68K_GOT16O 11 #define R_68K_GOT8O 12 #define R_68K_PLT32 13 #define R_68K_PLT16 14 #define R_68K_PLT8 15 #define R_68K_PLT32O 16 #define R_68K_PLT16O 17 #define R_68K_PLT8O 18 #define R_68K_COPY 19 #define R_68K_GLOB_DAT 20 #define R_68K_JMP_SLOT 21 #define R_68K_RELATIVE 22 #define R_68K_TLS_GD32 25 #define R_68K_TLS_GD16 26 #define R_68K_TLS_GD8 27 #define R_68K_TLS_LDM32 28 #define R_68K_TLS_LDM16 29 #define R_68K_TLS_LDM8 30 #define R_68K_TLS_LDO32 31 #define R_68K_TLS_LDO16 32 #define R_68K_TLS_LDO8 33 #define R_68K_TLS_IE32 34 #define R_68K_TLS_IE16 35 #define R_68K_TLS_IE8 36 #define R_68K_TLS_LE32 37 #define R_68K_TLS_LE16 38 #define R_68K_TLS_LE8 39 #define R_68K_TLS_DTPMOD32 40 #define R_68K_TLS_DTPREL32 41 #define R_68K_TLS_TPREL32 42 #define R_68K_NUM 43 #define R_386_NONE 0 #define R_386_32 1 #define R_386_PC32 2 #define R_386_GOT32 3 #define R_386_PLT32 4 #define R_386_COPY 5 #define R_386_GLOB_DAT 6 #define R_386_JMP_SLOT 7 #define R_386_RELATIVE 8 #define R_386_GOTOFF 9 #define R_386_GOTPC 10 #define R_386_32PLT 11 #define R_386_TLS_TPOFF 14 #define R_386_TLS_IE 15 #define R_386_TLS_GOTIE 16 #define R_386_TLS_LE 17 #define R_386_TLS_GD 18 #define R_386_TLS_LDM 19 #define R_386_16 20 #define R_386_PC16 21 #define R_386_8 22 #define R_386_PC8 23 #define R_386_TLS_GD_32 24 #define R_386_TLS_GD_PUSH 25 #define R_386_TLS_GD_CALL 26 #define R_386_TLS_GD_POP 27 #define R_386_TLS_LDM_32 28 #define R_386_TLS_LDM_PUSH 29 #define R_386_TLS_LDM_CALL 30 #define R_386_TLS_LDM_POP 31 #define R_386_TLS_LDO_32 32 #define R_386_TLS_IE_32 33 #define R_386_TLS_LE_32 34 #define R_386_TLS_DTPMOD32 35 #define R_386_TLS_DTPOFF32 36 #define R_386_TLS_TPOFF32 37 #define R_386_SIZE32 38 #define R_386_TLS_GOTDESC 39 #define R_386_TLS_DESC_CALL 40 #define R_386_TLS_DESC 41 #define R_386_IRELATIVE 42 #define R_386_GOT32X 43 #define R_386_NUM 44 #define STT_SPARC_REGISTER 13 #define EF_SPARCV9_MM 3 #define EF_SPARCV9_TSO 0 #define EF_SPARCV9_PSO 1 #define EF_SPARCV9_RMO 2 #define EF_SPARC_LEDATA 0x800000 #define EF_SPARC_EXT_MASK 0xFFFF00 #define EF_SPARC_32PLUS 0x000100 #define EF_SPARC_SUN_US1 0x000200 #define EF_SPARC_HAL_R1 0x000400 #define EF_SPARC_SUN_US3 0x000800 #define R_SPARC_NONE 0 #define R_SPARC_8 1 #define R_SPARC_16 2 #define R_SPARC_32 3 #define R_SPARC_DISP8 4 #define R_SPARC_DISP16 5 #define R_SPARC_DISP32 6 #define R_SPARC_WDISP30 7 #define R_SPARC_WDISP22 8 #define R_SPARC_HI22 9 #define R_SPARC_22 10 #define R_SPARC_13 11 #define R_SPARC_LO10 12 #define R_SPARC_GOT10 13 #define R_SPARC_GOT13 14 #define R_SPARC_GOT22 15 #define R_SPARC_PC10 16 #define R_SPARC_PC22 17 #define R_SPARC_WPLT30 18 #define R_SPARC_COPY 19 #define R_SPARC_GLOB_DAT 20 #define R_SPARC_JMP_SLOT 21 #define R_SPARC_RELATIVE 22 #define R_SPARC_UA32 23 #define R_SPARC_PLT32 24 #define R_SPARC_HIPLT22 25 #define R_SPARC_LOPLT10 26 #define R_SPARC_PCPLT32 27 #define R_SPARC_PCPLT22 28 #define R_SPARC_PCPLT10 29 #define R_SPARC_10 30 #define R_SPARC_11 31 #define R_SPARC_64 32 #define R_SPARC_OLO10 33 #define R_SPARC_HH22 34 #define R_SPARC_HM10 35 #define R_SPARC_LM22 36 #define R_SPARC_PC_HH22 37 #define R_SPARC_PC_HM10 38 #define R_SPARC_PC_LM22 39 #define R_SPARC_WDISP16 40 #define R_SPARC_WDISP19 41 #define R_SPARC_GLOB_JMP 42 #define R_SPARC_7 43 #define R_SPARC_5 44 #define R_SPARC_6 45 #define R_SPARC_DISP64 46 #define R_SPARC_PLT64 47 #define R_SPARC_HIX22 48 #define R_SPARC_LOX10 49 #define R_SPARC_H44 50 #define R_SPARC_M44 51 #define R_SPARC_L44 52 #define R_SPARC_REGISTER 53 #define R_SPARC_UA64 54 #define R_SPARC_UA16 55 #define R_SPARC_TLS_GD_HI22 56 #define R_SPARC_TLS_GD_LO10 57 #define R_SPARC_TLS_GD_ADD 58 #define R_SPARC_TLS_GD_CALL 59 #define R_SPARC_TLS_LDM_HI22 60 #define R_SPARC_TLS_LDM_LO10 61 #define R_SPARC_TLS_LDM_ADD 62 #define R_SPARC_TLS_LDM_CALL 63 #define R_SPARC_TLS_LDO_HIX22 64 #define R_SPARC_TLS_LDO_LOX10 65 #define R_SPARC_TLS_LDO_ADD 66 #define R_SPARC_TLS_IE_HI22 67 #define R_SPARC_TLS_IE_LO10 68 #define R_SPARC_TLS_IE_LD 69 #define R_SPARC_TLS_IE_LDX 70 #define R_SPARC_TLS_IE_ADD 71 #define R_SPARC_TLS_LE_HIX22 72 #define R_SPARC_TLS_LE_LOX10 73 #define R_SPARC_TLS_DTPMOD32 74 #define R_SPARC_TLS_DTPMOD64 75 #define R_SPARC_TLS_DTPOFF32 76 #define R_SPARC_TLS_DTPOFF64 77 #define R_SPARC_TLS_TPOFF32 78 #define R_SPARC_TLS_TPOFF64 79 #define R_SPARC_GOTDATA_HIX22 80 #define R_SPARC_GOTDATA_LOX10 81 #define R_SPARC_GOTDATA_OP_HIX22 82 #define R_SPARC_GOTDATA_OP_LOX10 83 #define R_SPARC_GOTDATA_OP 84 #define R_SPARC_H34 85 #define R_SPARC_SIZE32 86 #define R_SPARC_SIZE64 87 #define R_SPARC_GNU_VTINHERIT 250 #define R_SPARC_GNU_VTENTRY 251 #define R_SPARC_REV32 252 #define R_SPARC_NUM 253 #define DT_SPARC_REGISTER 0x70000001 #define DT_SPARC_NUM 2 #define EF_MIPS_NOREORDER 1 #define EF_MIPS_PIC 2 #define EF_MIPS_CPIC 4 #define EF_MIPS_XGOT 8 #define EF_MIPS_64BIT_WHIRL 16 #define EF_MIPS_ABI2 32 #define EF_MIPS_ABI_ON32 64 #define EF_MIPS_FP64 512 #define EF_MIPS_NAN2008 1024 #define EF_MIPS_ARCH 0xf0000000 #define EF_MIPS_ARCH_1 0x00000000 #define EF_MIPS_ARCH_2 0x10000000 #define EF_MIPS_ARCH_3 0x20000000 #define EF_MIPS_ARCH_4 0x30000000 #define EF_MIPS_ARCH_5 0x40000000 #define EF_MIPS_ARCH_32 0x50000000 #define EF_MIPS_ARCH_64 0x60000000 #define EF_MIPS_ARCH_32R2 0x70000000 #define EF_MIPS_ARCH_64R2 0x80000000 #define E_MIPS_ARCH_1 0x00000000 #define E_MIPS_ARCH_2 0x10000000 #define E_MIPS_ARCH_3 0x20000000 #define E_MIPS_ARCH_4 0x30000000 #define E_MIPS_ARCH_5 0x40000000 #define E_MIPS_ARCH_32 0x50000000 #define E_MIPS_ARCH_64 0x60000000 #define SHN_MIPS_ACOMMON 0xff00 #define SHN_MIPS_TEXT 0xff01 #define SHN_MIPS_DATA 0xff02 #define SHN_MIPS_SCOMMON 0xff03 #define SHN_MIPS_SUNDEFINED 0xff04 #define SHT_MIPS_LIBLIST 0x70000000 #define SHT_MIPS_MSYM 0x70000001 #define SHT_MIPS_CONFLICT 0x70000002 #define SHT_MIPS_GPTAB 0x70000003 #define SHT_MIPS_UCODE 0x70000004 #define SHT_MIPS_DEBUG 0x70000005 #define SHT_MIPS_REGINFO 0x70000006 #define SHT_MIPS_PACKAGE 0x70000007 #define SHT_MIPS_PACKSYM 0x70000008 #define SHT_MIPS_RELD 0x70000009 #define SHT_MIPS_IFACE 0x7000000b #define SHT_MIPS_CONTENT 0x7000000c #define SHT_MIPS_OPTIONS 0x7000000d #define SHT_MIPS_SHDR 0x70000010 #define SHT_MIPS_FDESC 0x70000011 #define SHT_MIPS_EXTSYM 0x70000012 #define SHT_MIPS_DENSE 0x70000013 #define SHT_MIPS_PDESC 0x70000014 #define SHT_MIPS_LOCSYM 0x70000015 #define SHT_MIPS_AUXSYM 0x70000016 #define SHT_MIPS_OPTSYM 0x70000017 #define SHT_MIPS_LOCSTR 0x70000018 #define SHT_MIPS_LINE 0x70000019 #define SHT_MIPS_RFDESC 0x7000001a #define SHT_MIPS_DELTASYM 0x7000001b #define SHT_MIPS_DELTAINST 0x7000001c #define SHT_MIPS_DELTACLASS 0x7000001d #define SHT_MIPS_DWARF 0x7000001e #define SHT_MIPS_DELTADECL 0x7000001f #define SHT_MIPS_SYMBOL_LIB 0x70000020 #define SHT_MIPS_EVENTS 0x70000021 #define SHT_MIPS_TRANSLATE 0x70000022 #define SHT_MIPS_PIXIE 0x70000023 #define SHT_MIPS_XLATE 0x70000024 #define SHT_MIPS_XLATE_DEBUG 0x70000025 #define SHT_MIPS_WHIRL 0x70000026 #define SHT_MIPS_EH_REGION 0x70000027 #define SHT_MIPS_XLATE_OLD 0x70000028 #define SHT_MIPS_PDR_EXCEPTION 0x70000029 #define SHF_MIPS_GPREL 0x10000000 #define SHF_MIPS_MERGE 0x20000000 #define SHF_MIPS_ADDR 0x40000000 #define SHF_MIPS_STRINGS 0x80000000 #define SHF_MIPS_NOSTRIP 0x08000000 #define SHF_MIPS_LOCAL 0x04000000 #define SHF_MIPS_NAMES 0x02000000 #define SHF_MIPS_NODUPE 0x01000000 #define STO_MIPS_DEFAULT 0x0 #define STO_MIPS_INTERNAL 0x1 #define STO_MIPS_HIDDEN 0x2 #define STO_MIPS_PROTECTED 0x3 #define STO_MIPS_PLT 0x8 #define STO_MIPS_SC_ALIGN_UNUSED 0xff #define STB_MIPS_SPLIT_COMMON 13 typedef union { struct { Elf32_Word gt_current_g_value; Elf32_Word gt_unused; } gt_header; struct { Elf32_Word gt_g_value; Elf32_Word gt_bytes; } gt_entry; } Elf32_gptab; typedef struct { Elf32_Word ri_gprmask; Elf32_Word ri_cprmask[4]; Elf32_Sword ri_gp_value; } Elf32_RegInfo; typedef struct { unsigned char kind; unsigned char size; Elf32_Section section; Elf32_Word info; } Elf_Options; #define ODK_NULL 0 #define ODK_REGINFO 1 #define ODK_EXCEPTIONS 2 #define ODK_PAD 3 #define ODK_HWPATCH 4 #define ODK_FILL 5 #define ODK_TAGS 6 #define ODK_HWAND 7 #define ODK_HWOR 8 #define OEX_FPU_MIN 0x1f #define OEX_FPU_MAX 0x1f00 #define OEX_PAGE0 0x10000 #define OEX_SMM 0x20000 #define OEX_FPDBUG 0x40000 #define OEX_PRECISEFP OEX_FPDBUG #define OEX_DISMISS 0x80000 #define OEX_FPU_INVAL 0x10 #define OEX_FPU_DIV0 0x08 #define OEX_FPU_OFLO 0x04 #define OEX_FPU_UFLO 0x02 #define OEX_FPU_INEX 0x01 #define OHW_R4KEOP 0x1 #define OHW_R8KPFETCH 0x2 #define OHW_R5KEOP 0x4 #define OHW_R5KCVTL 0x8 #define OPAD_PREFIX 0x1 #define OPAD_POSTFIX 0x2 #define OPAD_SYMBOL 0x4 typedef struct { Elf32_Word hwp_flags1; Elf32_Word hwp_flags2; } Elf_Options_Hw; #define OHWA0_R4KEOP_CHECKED 0x00000001 #define OHWA1_R4KEOP_CLEAN 0x00000002 #define R_MIPS_NONE 0 #define R_MIPS_16 1 #define R_MIPS_32 2 #define R_MIPS_REL32 3 #define R_MIPS_26 4 #define R_MIPS_HI16 5 #define R_MIPS_LO16 6 #define R_MIPS_GPREL16 7 #define R_MIPS_LITERAL 8 #define R_MIPS_GOT16 9 #define R_MIPS_PC16 10 #define R_MIPS_CALL16 11 #define R_MIPS_GPREL32 12 #define R_MIPS_SHIFT5 16 #define R_MIPS_SHIFT6 17 #define R_MIPS_64 18 #define R_MIPS_GOT_DISP 19 #define R_MIPS_GOT_PAGE 20 #define R_MIPS_GOT_OFST 21 #define R_MIPS_GOT_HI16 22 #define R_MIPS_GOT_LO16 23 #define R_MIPS_SUB 24 #define R_MIPS_INSERT_A 25 #define R_MIPS_INSERT_B 26 #define R_MIPS_DELETE 27 #define R_MIPS_HIGHER 28 #define R_MIPS_HIGHEST 29 #define R_MIPS_CALL_HI16 30 #define R_MIPS_CALL_LO16 31 #define R_MIPS_SCN_DISP 32 #define R_MIPS_REL16 33 #define R_MIPS_ADD_IMMEDIATE 34 #define R_MIPS_PJUMP 35 #define R_MIPS_RELGOT 36 #define R_MIPS_JALR 37 #define R_MIPS_TLS_DTPMOD32 38 #define R_MIPS_TLS_DTPREL32 39 #define R_MIPS_TLS_DTPMOD64 40 #define R_MIPS_TLS_DTPREL64 41 #define R_MIPS_TLS_GD 42 #define R_MIPS_TLS_LDM 43 #define R_MIPS_TLS_DTPREL_HI16 44 #define R_MIPS_TLS_DTPREL_LO16 45 #define R_MIPS_TLS_GOTTPREL 46 #define R_MIPS_TLS_TPREL32 47 #define R_MIPS_TLS_TPREL64 48 #define R_MIPS_TLS_TPREL_HI16 49 #define R_MIPS_TLS_TPREL_LO16 50 #define R_MIPS_GLOB_DAT 51 #define R_MIPS_COPY 126 #define R_MIPS_JUMP_SLOT 127 #define R_MIPS_NUM 128 #define PT_MIPS_REGINFO 0x70000000 #define PT_MIPS_RTPROC 0x70000001 #define PT_MIPS_OPTIONS 0x70000002 #define PT_MIPS_ABIFLAGS 0x70000003 #define PF_MIPS_LOCAL 0x10000000 #define DT_MIPS_RLD_VERSION 0x70000001 #define DT_MIPS_TIME_STAMP 0x70000002 #define DT_MIPS_ICHECKSUM 0x70000003 #define DT_MIPS_IVERSION 0x70000004 #define DT_MIPS_FLAGS 0x70000005 #define DT_MIPS_BASE_ADDRESS 0x70000006 #define DT_MIPS_MSYM 0x70000007 #define DT_MIPS_CONFLICT 0x70000008 #define DT_MIPS_LIBLIST 0x70000009 #define DT_MIPS_LOCAL_GOTNO 0x7000000a #define DT_MIPS_CONFLICTNO 0x7000000b #define DT_MIPS_LIBLISTNO 0x70000010 #define DT_MIPS_SYMTABNO 0x70000011 #define DT_MIPS_UNREFEXTNO 0x70000012 #define DT_MIPS_GOTSYM 0x70000013 #define DT_MIPS_HIPAGENO 0x70000014 #define DT_MIPS_RLD_MAP 0x70000016 #define DT_MIPS_DELTA_CLASS 0x70000017 #define DT_MIPS_DELTA_CLASS_NO 0x70000018 #define DT_MIPS_DELTA_INSTANCE 0x70000019 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a #define DT_MIPS_DELTA_RELOC 0x7000001b #define DT_MIPS_DELTA_RELOC_NO 0x7000001c #define DT_MIPS_DELTA_SYM 0x7000001d #define DT_MIPS_DELTA_SYM_NO 0x7000001e #define DT_MIPS_DELTA_CLASSSYM 0x70000020 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 #define DT_MIPS_CXX_FLAGS 0x70000022 #define DT_MIPS_PIXIE_INIT 0x70000023 #define DT_MIPS_SYMBOL_LIB 0x70000024 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 #define DT_MIPS_LOCAL_GOTIDX 0x70000026 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028 #define DT_MIPS_OPTIONS 0x70000029 #define DT_MIPS_INTERFACE 0x7000002a #define DT_MIPS_DYNSTR_ALIGN 0x7000002b #define DT_MIPS_INTERFACE_SIZE 0x7000002c #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d #define DT_MIPS_PERF_SUFFIX 0x7000002e #define DT_MIPS_COMPACT_SIZE 0x7000002f #define DT_MIPS_GP_VALUE 0x70000030 #define DT_MIPS_AUX_DYNAMIC 0x70000031 #define DT_MIPS_PLTGOT 0x70000032 #define DT_MIPS_RWPLT 0x70000034 #define DT_MIPS_RLD_MAP_REL 0x70000035 #define DT_MIPS_NUM 0x36 #define RHF_NONE 0 #define RHF_QUICKSTART (1 << 0) #define RHF_NOTPOT (1 << 1) #define RHF_NO_LIBRARY_REPLACEMENT (1 << 2) #define RHF_NO_MOVE (1 << 3) #define RHF_SGI_ONLY (1 << 4) #define RHF_GUARANTEE_INIT (1 << 5) #define RHF_DELTA_C_PLUS_PLUS (1 << 6) #define RHF_GUARANTEE_START_INIT (1 << 7) #define RHF_PIXIE (1 << 8) #define RHF_DEFAULT_DELAY_LOAD (1 << 9) #define RHF_REQUICKSTART (1 << 10) #define RHF_REQUICKSTARTED (1 << 11) #define RHF_CORD (1 << 12) #define RHF_NO_UNRES_UNDEF (1 << 13) #define RHF_RLD_ORDER_SAFE (1 << 14) typedef struct { Elf32_Word l_name; Elf32_Word l_time_stamp; Elf32_Word l_checksum; Elf32_Word l_version; Elf32_Word l_flags; } Elf32_Lib; typedef struct { Elf64_Word l_name; Elf64_Word l_time_stamp; Elf64_Word l_checksum; Elf64_Word l_version; Elf64_Word l_flags; } Elf64_Lib; #define LL_NONE 0 #define LL_EXACT_MATCH (1 << 0) #define LL_IGNORE_INT_VER (1 << 1) #define LL_REQUIRE_MINOR (1 << 2) #define LL_EXPORTS (1 << 3) #define LL_DELAY_LOAD (1 << 4) #define LL_DELTA (1 << 5) typedef Elf32_Addr Elf32_Conflict; typedef struct { Elf32_Half version; unsigned char isa_level; unsigned char isa_rev; unsigned char gpr_size; unsigned char cpr1_size; unsigned char cpr2_size; unsigned char fp_abi; Elf32_Word isa_ext; Elf32_Word ases; Elf32_Word flags1; Elf32_Word flags2; } Elf_MIPS_ABIFlags_v0; #define MIPS_AFL_REG_NONE 0x00 #define MIPS_AFL_REG_32 0x01 #define MIPS_AFL_REG_64 0x02 #define MIPS_AFL_REG_128 0x03 #define MIPS_AFL_ASE_DSP 0x00000001 #define MIPS_AFL_ASE_DSPR2 0x00000002 #define MIPS_AFL_ASE_EVA 0x00000004 #define MIPS_AFL_ASE_MCU 0x00000008 #define MIPS_AFL_ASE_MDMX 0x00000010 #define MIPS_AFL_ASE_MIPS3D 0x00000020 #define MIPS_AFL_ASE_MT 0x00000040 #define MIPS_AFL_ASE_SMARTMIPS 0x00000080 #define MIPS_AFL_ASE_VIRT 0x00000100 #define MIPS_AFL_ASE_MSA 0x00000200 #define MIPS_AFL_ASE_MIPS16 0x00000400 #define MIPS_AFL_ASE_MICROMIPS 0x00000800 #define MIPS_AFL_ASE_XPA 0x00001000 #define MIPS_AFL_ASE_MASK 0x00001fff #define MIPS_AFL_EXT_XLR 1 #define MIPS_AFL_EXT_OCTEON2 2 #define MIPS_AFL_EXT_OCTEONP 3 #define MIPS_AFL_EXT_LOONGSON_3A 4 #define MIPS_AFL_EXT_OCTEON 5 #define MIPS_AFL_EXT_5900 6 #define MIPS_AFL_EXT_4650 7 #define MIPS_AFL_EXT_4010 8 #define MIPS_AFL_EXT_4100 9 #define MIPS_AFL_EXT_3900 10 #define MIPS_AFL_EXT_10000 11 #define MIPS_AFL_EXT_SB1 12 #define MIPS_AFL_EXT_4111 13 #define MIPS_AFL_EXT_4120 14 #define MIPS_AFL_EXT_5400 15 #define MIPS_AFL_EXT_5500 16 #define MIPS_AFL_EXT_LOONGSON_2E 17 #define MIPS_AFL_EXT_LOONGSON_2F 18 #define MIPS_AFL_FLAGS1_ODDSPREG 1 enum { Val_GNU_MIPS_ABI_FP_ANY = 0, Val_GNU_MIPS_ABI_FP_DOUBLE = 1, Val_GNU_MIPS_ABI_FP_SINGLE = 2, Val_GNU_MIPS_ABI_FP_SOFT = 3, Val_GNU_MIPS_ABI_FP_OLD_64 = 4, Val_GNU_MIPS_ABI_FP_XX = 5, Val_GNU_MIPS_ABI_FP_64 = 6, Val_GNU_MIPS_ABI_FP_64A = 7, Val_GNU_MIPS_ABI_FP_MAX = 7 }; #define EF_PARISC_TRAPNIL 0x00010000 #define EF_PARISC_EXT 0x00020000 #define EF_PARISC_LSB 0x00040000 #define EF_PARISC_WIDE 0x00080000 #define EF_PARISC_NO_KABP 0x00100000 #define EF_PARISC_LAZYSWAP 0x00400000 #define EF_PARISC_ARCH 0x0000ffff #define EFA_PARISC_1_0 0x020b #define EFA_PARISC_1_1 0x0210 #define EFA_PARISC_2_0 0x0214 #define SHN_PARISC_ANSI_COMMON 0xff00 #define SHN_PARISC_HUGE_COMMON 0xff01 #define SHT_PARISC_EXT 0x70000000 #define SHT_PARISC_UNWIND 0x70000001 #define SHT_PARISC_DOC 0x70000002 #define SHF_PARISC_SHORT 0x20000000 #define SHF_PARISC_HUGE 0x40000000 #define SHF_PARISC_SBP 0x80000000 #define STT_PARISC_MILLICODE 13 #define STT_HP_OPAQUE (STT_LOOS + 0x1) #define STT_HP_STUB (STT_LOOS + 0x2) #define R_PARISC_NONE 0 #define R_PARISC_DIR32 1 #define R_PARISC_DIR21L 2 #define R_PARISC_DIR17R 3 #define R_PARISC_DIR17F 4 #define R_PARISC_DIR14R 6 #define R_PARISC_PCREL32 9 #define R_PARISC_PCREL21L 10 #define R_PARISC_PCREL17R 11 #define R_PARISC_PCREL17F 12 #define R_PARISC_PCREL14R 14 #define R_PARISC_DPREL21L 18 #define R_PARISC_DPREL14R 22 #define R_PARISC_GPREL21L 26 #define R_PARISC_GPREL14R 30 #define R_PARISC_LTOFF21L 34 #define R_PARISC_LTOFF14R 38 #define R_PARISC_SECREL32 41 #define R_PARISC_SEGBASE 48 #define R_PARISC_SEGREL32 49 #define R_PARISC_PLTOFF21L 50 #define R_PARISC_PLTOFF14R 54 #define R_PARISC_LTOFF_FPTR32 57 #define R_PARISC_LTOFF_FPTR21L 58 #define R_PARISC_LTOFF_FPTR14R 62 #define R_PARISC_FPTR64 64 #define R_PARISC_PLABEL32 65 #define R_PARISC_PLABEL21L 66 #define R_PARISC_PLABEL14R 70 #define R_PARISC_PCREL64 72 #define R_PARISC_PCREL22F 74 #define R_PARISC_PCREL14WR 75 #define R_PARISC_PCREL14DR 76 #define R_PARISC_PCREL16F 77 #define R_PARISC_PCREL16WF 78 #define R_PARISC_PCREL16DF 79 #define R_PARISC_DIR64 80 #define R_PARISC_DIR14WR 83 #define R_PARISC_DIR14DR 84 #define R_PARISC_DIR16F 85 #define R_PARISC_DIR16WF 86 #define R_PARISC_DIR16DF 87 #define R_PARISC_GPREL64 88 #define R_PARISC_GPREL14WR 91 #define R_PARISC_GPREL14DR 92 #define R_PARISC_GPREL16F 93 #define R_PARISC_GPREL16WF 94 #define R_PARISC_GPREL16DF 95 #define R_PARISC_LTOFF64 96 #define R_PARISC_LTOFF14WR 99 #define R_PARISC_LTOFF14DR 100 #define R_PARISC_LTOFF16F 101 #define R_PARISC_LTOFF16WF 102 #define R_PARISC_LTOFF16DF 103 #define R_PARISC_SECREL64 104 #define R_PARISC_SEGREL64 112 #define R_PARISC_PLTOFF14WR 115 #define R_PARISC_PLTOFF14DR 116 #define R_PARISC_PLTOFF16F 117 #define R_PARISC_PLTOFF16WF 118 #define R_PARISC_PLTOFF16DF 119 #define R_PARISC_LTOFF_FPTR64 120 #define R_PARISC_LTOFF_FPTR14WR 123 #define R_PARISC_LTOFF_FPTR14DR 124 #define R_PARISC_LTOFF_FPTR16F 125 #define R_PARISC_LTOFF_FPTR16WF 126 #define R_PARISC_LTOFF_FPTR16DF 127 #define R_PARISC_LORESERVE 128 #define R_PARISC_COPY 128 #define R_PARISC_IPLT 129 #define R_PARISC_EPLT 130 #define R_PARISC_TPREL32 153 #define R_PARISC_TPREL21L 154 #define R_PARISC_TPREL14R 158 #define R_PARISC_LTOFF_TP21L 162 #define R_PARISC_LTOFF_TP14R 166 #define R_PARISC_LTOFF_TP14F 167 #define R_PARISC_TPREL64 216 #define R_PARISC_TPREL14WR 219 #define R_PARISC_TPREL14DR 220 #define R_PARISC_TPREL16F 221 #define R_PARISC_TPREL16WF 222 #define R_PARISC_TPREL16DF 223 #define R_PARISC_LTOFF_TP64 224 #define R_PARISC_LTOFF_TP14WR 227 #define R_PARISC_LTOFF_TP14DR 228 #define R_PARISC_LTOFF_TP16F 229 #define R_PARISC_LTOFF_TP16WF 230 #define R_PARISC_LTOFF_TP16DF 231 #define R_PARISC_GNU_VTENTRY 232 #define R_PARISC_GNU_VTINHERIT 233 #define R_PARISC_TLS_GD21L 234 #define R_PARISC_TLS_GD14R 235 #define R_PARISC_TLS_GDCALL 236 #define R_PARISC_TLS_LDM21L 237 #define R_PARISC_TLS_LDM14R 238 #define R_PARISC_TLS_LDMCALL 239 #define R_PARISC_TLS_LDO21L 240 #define R_PARISC_TLS_LDO14R 241 #define R_PARISC_TLS_DTPMOD32 242 #define R_PARISC_TLS_DTPMOD64 243 #define R_PARISC_TLS_DTPOFF32 244 #define R_PARISC_TLS_DTPOFF64 245 #define R_PARISC_TLS_LE21L R_PARISC_TPREL21L #define R_PARISC_TLS_LE14R R_PARISC_TPREL14R #define R_PARISC_TLS_IE21L R_PARISC_LTOFF_TP21L #define R_PARISC_TLS_IE14R R_PARISC_LTOFF_TP14R #define R_PARISC_TLS_TPREL32 R_PARISC_TPREL32 #define R_PARISC_TLS_TPREL64 R_PARISC_TPREL64 #define R_PARISC_HIRESERVE 255 #define PT_HP_TLS (PT_LOOS + 0x0) #define PT_HP_CORE_NONE (PT_LOOS + 0x1) #define PT_HP_CORE_VERSION (PT_LOOS + 0x2) #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) #define PT_HP_CORE_COMM (PT_LOOS + 0x4) #define PT_HP_CORE_PROC (PT_LOOS + 0x5) #define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) #define PT_HP_CORE_STACK (PT_LOOS + 0x7) #define PT_HP_CORE_SHM (PT_LOOS + 0x8) #define PT_HP_CORE_MMF (PT_LOOS + 0x9) #define PT_HP_PARALLEL (PT_LOOS + 0x10) #define PT_HP_FASTBIND (PT_LOOS + 0x11) #define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) #define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) #define PT_HP_STACK (PT_LOOS + 0x14) #define PT_PARISC_ARCHEXT 0x70000000 #define PT_PARISC_UNWIND 0x70000001 #define PF_PARISC_SBP 0x08000000 #define PF_HP_PAGE_SIZE 0x00100000 #define PF_HP_FAR_SHARED 0x00200000 #define PF_HP_NEAR_SHARED 0x00400000 #define PF_HP_CODE 0x01000000 #define PF_HP_MODIFY 0x02000000 #define PF_HP_LAZYSWAP 0x04000000 #define PF_HP_SBP 0x08000000 #define EF_ALPHA_32BIT 1 #define EF_ALPHA_CANRELAX 2 #define SHT_ALPHA_DEBUG 0x70000001 #define SHT_ALPHA_REGINFO 0x70000002 #define SHF_ALPHA_GPREL 0x10000000 #define STO_ALPHA_NOPV 0x80 #define STO_ALPHA_STD_GPLOAD 0x88 #define R_ALPHA_NONE 0 #define R_ALPHA_REFLONG 1 #define R_ALPHA_REFQUAD 2 #define R_ALPHA_GPREL32 3 #define R_ALPHA_LITERAL 4 #define R_ALPHA_LITUSE 5 #define R_ALPHA_GPDISP 6 #define R_ALPHA_BRADDR 7 #define R_ALPHA_HINT 8 #define R_ALPHA_SREL16 9 #define R_ALPHA_SREL32 10 #define R_ALPHA_SREL64 11 #define R_ALPHA_GPRELHIGH 17 #define R_ALPHA_GPRELLOW 18 #define R_ALPHA_GPREL16 19 #define R_ALPHA_COPY 24 #define R_ALPHA_GLOB_DAT 25 #define R_ALPHA_JMP_SLOT 26 #define R_ALPHA_RELATIVE 27 #define R_ALPHA_TLS_GD_HI 28 #define R_ALPHA_TLSGD 29 #define R_ALPHA_TLS_LDM 30 #define R_ALPHA_DTPMOD64 31 #define R_ALPHA_GOTDTPREL 32 #define R_ALPHA_DTPREL64 33 #define R_ALPHA_DTPRELHI 34 #define R_ALPHA_DTPRELLO 35 #define R_ALPHA_DTPREL16 36 #define R_ALPHA_GOTTPREL 37 #define R_ALPHA_TPREL64 38 #define R_ALPHA_TPRELHI 39 #define R_ALPHA_TPRELLO 40 #define R_ALPHA_TPREL16 41 #define R_ALPHA_NUM 46 #define LITUSE_ALPHA_ADDR 0 #define LITUSE_ALPHA_BASE 1 #define LITUSE_ALPHA_BYTOFF 2 #define LITUSE_ALPHA_JSR 3 #define LITUSE_ALPHA_TLS_GD 4 #define LITUSE_ALPHA_TLS_LDM 5 #define DT_ALPHA_PLTRO (DT_LOPROC + 0) #define DT_ALPHA_NUM 1 #define EF_PPC_EMB 0x80000000 #define EF_PPC_RELOCATABLE 0x00010000 #define EF_PPC_RELOCATABLE_LIB 0x00008000 #define R_PPC_NONE 0 #define R_PPC_ADDR32 1 #define R_PPC_ADDR24 2 #define R_PPC_ADDR16 3 #define R_PPC_ADDR16_LO 4 #define R_PPC_ADDR16_HI 5 #define R_PPC_ADDR16_HA 6 #define R_PPC_ADDR14 7 #define R_PPC_ADDR14_BRTAKEN 8 #define R_PPC_ADDR14_BRNTAKEN 9 #define R_PPC_REL24 10 #define R_PPC_REL14 11 #define R_PPC_REL14_BRTAKEN 12 #define R_PPC_REL14_BRNTAKEN 13 #define R_PPC_GOT16 14 #define R_PPC_GOT16_LO 15 #define R_PPC_GOT16_HI 16 #define R_PPC_GOT16_HA 17 #define R_PPC_PLTREL24 18 #define R_PPC_COPY 19 #define R_PPC_GLOB_DAT 20 #define R_PPC_JMP_SLOT 21 #define R_PPC_RELATIVE 22 #define R_PPC_LOCAL24PC 23 #define R_PPC_UADDR32 24 #define R_PPC_UADDR16 25 #define R_PPC_REL32 26 #define R_PPC_PLT32 27 #define R_PPC_PLTREL32 28 #define R_PPC_PLT16_LO 29 #define R_PPC_PLT16_HI 30 #define R_PPC_PLT16_HA 31 #define R_PPC_SDAREL16 32 #define R_PPC_SECTOFF 33 #define R_PPC_SECTOFF_LO 34 #define R_PPC_SECTOFF_HI 35 #define R_PPC_SECTOFF_HA 36 #define R_PPC_TLS 67 #define R_PPC_DTPMOD32 68 #define R_PPC_TPREL16 69 #define R_PPC_TPREL16_LO 70 #define R_PPC_TPREL16_HI 71 #define R_PPC_TPREL16_HA 72 #define R_PPC_TPREL32 73 #define R_PPC_DTPREL16 74 #define R_PPC_DTPREL16_LO 75 #define R_PPC_DTPREL16_HI 76 #define R_PPC_DTPREL16_HA 77 #define R_PPC_DTPREL32 78 #define R_PPC_GOT_TLSGD16 79 #define R_PPC_GOT_TLSGD16_LO 80 #define R_PPC_GOT_TLSGD16_HI 81 #define R_PPC_GOT_TLSGD16_HA 82 #define R_PPC_GOT_TLSLD16 83 #define R_PPC_GOT_TLSLD16_LO 84 #define R_PPC_GOT_TLSLD16_HI 85 #define R_PPC_GOT_TLSLD16_HA 86 #define R_PPC_GOT_TPREL16 87 #define R_PPC_GOT_TPREL16_LO 88 #define R_PPC_GOT_TPREL16_HI 89 #define R_PPC_GOT_TPREL16_HA 90 #define R_PPC_GOT_DTPREL16 91 #define R_PPC_GOT_DTPREL16_LO 92 #define R_PPC_GOT_DTPREL16_HI 93 #define R_PPC_GOT_DTPREL16_HA 94 #define R_PPC_TLSGD 95 #define R_PPC_TLSLD 96 #define R_PPC_EMB_NADDR32 101 #define R_PPC_EMB_NADDR16 102 #define R_PPC_EMB_NADDR16_LO 103 #define R_PPC_EMB_NADDR16_HI 104 #define R_PPC_EMB_NADDR16_HA 105 #define R_PPC_EMB_SDAI16 106 #define R_PPC_EMB_SDA2I16 107 #define R_PPC_EMB_SDA2REL 108 #define R_PPC_EMB_SDA21 109 #define R_PPC_EMB_MRKREF 110 #define R_PPC_EMB_RELSEC16 111 #define R_PPC_EMB_RELST_LO 112 #define R_PPC_EMB_RELST_HI 113 #define R_PPC_EMB_RELST_HA 114 #define R_PPC_EMB_BIT_FLD 115 #define R_PPC_EMB_RELSDA 116 #define R_PPC_DIAB_SDA21_LO 180 #define R_PPC_DIAB_SDA21_HI 181 #define R_PPC_DIAB_SDA21_HA 182 #define R_PPC_DIAB_RELSDA_LO 183 #define R_PPC_DIAB_RELSDA_HI 184 #define R_PPC_DIAB_RELSDA_HA 185 #define R_PPC_IRELATIVE 248 #define R_PPC_REL16 249 #define R_PPC_REL16_LO 250 #define R_PPC_REL16_HI 251 #define R_PPC_REL16_HA 252 #define R_PPC_TOC16 255 #define DT_PPC_GOT (DT_LOPROC + 0) #define DT_PPC_OPT (DT_LOPROC + 1) #define DT_PPC_NUM 2 #define PPC_OPT_TLS 1 #define R_PPC64_NONE R_PPC_NONE #define R_PPC64_ADDR32 R_PPC_ADDR32 #define R_PPC64_ADDR24 R_PPC_ADDR24 #define R_PPC64_ADDR16 R_PPC_ADDR16 #define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO #define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI #define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA #define R_PPC64_ADDR14 R_PPC_ADDR14 #define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN #define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN #define R_PPC64_REL24 R_PPC_REL24 #define R_PPC64_REL14 R_PPC_REL14 #define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN #define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN #define R_PPC64_GOT16 R_PPC_GOT16 #define R_PPC64_GOT16_LO R_PPC_GOT16_LO #define R_PPC64_GOT16_HI R_PPC_GOT16_HI #define R_PPC64_GOT16_HA R_PPC_GOT16_HA #define R_PPC64_COPY R_PPC_COPY #define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT #define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT #define R_PPC64_RELATIVE R_PPC_RELATIVE #define R_PPC64_UADDR32 R_PPC_UADDR32 #define R_PPC64_UADDR16 R_PPC_UADDR16 #define R_PPC64_REL32 R_PPC_REL32 #define R_PPC64_PLT32 R_PPC_PLT32 #define R_PPC64_PLTREL32 R_PPC_PLTREL32 #define R_PPC64_PLT16_LO R_PPC_PLT16_LO #define R_PPC64_PLT16_HI R_PPC_PLT16_HI #define R_PPC64_PLT16_HA R_PPC_PLT16_HA #define R_PPC64_SECTOFF R_PPC_SECTOFF #define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO #define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI #define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA #define R_PPC64_ADDR30 37 #define R_PPC64_ADDR64 38 #define R_PPC64_ADDR16_HIGHER 39 #define R_PPC64_ADDR16_HIGHERA 40 #define R_PPC64_ADDR16_HIGHEST 41 #define R_PPC64_ADDR16_HIGHESTA 42 #define R_PPC64_UADDR64 43 #define R_PPC64_REL64 44 #define R_PPC64_PLT64 45 #define R_PPC64_PLTREL64 46 #define R_PPC64_TOC16 47 #define R_PPC64_TOC16_LO 48 #define R_PPC64_TOC16_HI 49 #define R_PPC64_TOC16_HA 50 #define R_PPC64_TOC 51 #define R_PPC64_PLTGOT16 52 #define R_PPC64_PLTGOT16_LO 53 #define R_PPC64_PLTGOT16_HI 54 #define R_PPC64_PLTGOT16_HA 55 #define R_PPC64_ADDR16_DS 56 #define R_PPC64_ADDR16_LO_DS 57 #define R_PPC64_GOT16_DS 58 #define R_PPC64_GOT16_LO_DS 59 #define R_PPC64_PLT16_LO_DS 60 #define R_PPC64_SECTOFF_DS 61 #define R_PPC64_SECTOFF_LO_DS 62 #define R_PPC64_TOC16_DS 63 #define R_PPC64_TOC16_LO_DS 64 #define R_PPC64_PLTGOT16_DS 65 #define R_PPC64_PLTGOT16_LO_DS 66 #define R_PPC64_TLS 67 #define R_PPC64_DTPMOD64 68 #define R_PPC64_TPREL16 69 #define R_PPC64_TPREL16_LO 70 #define R_PPC64_TPREL16_HI 71 #define R_PPC64_TPREL16_HA 72 #define R_PPC64_TPREL64 73 #define R_PPC64_DTPREL16 74 #define R_PPC64_DTPREL16_LO 75 #define R_PPC64_DTPREL16_HI 76 #define R_PPC64_DTPREL16_HA 77 #define R_PPC64_DTPREL64 78 #define R_PPC64_GOT_TLSGD16 79 #define R_PPC64_GOT_TLSGD16_LO 80 #define R_PPC64_GOT_TLSGD16_HI 81 #define R_PPC64_GOT_TLSGD16_HA 82 #define R_PPC64_GOT_TLSLD16 83 #define R_PPC64_GOT_TLSLD16_LO 84 #define R_PPC64_GOT_TLSLD16_HI 85 #define R_PPC64_GOT_TLSLD16_HA 86 #define R_PPC64_GOT_TPREL16_DS 87 #define R_PPC64_GOT_TPREL16_LO_DS 88 #define R_PPC64_GOT_TPREL16_HI 89 #define R_PPC64_GOT_TPREL16_HA 90 #define R_PPC64_GOT_DTPREL16_DS 91 #define R_PPC64_GOT_DTPREL16_LO_DS 92 #define R_PPC64_GOT_DTPREL16_HI 93 #define R_PPC64_GOT_DTPREL16_HA 94 #define R_PPC64_TPREL16_DS 95 #define R_PPC64_TPREL16_LO_DS 96 #define R_PPC64_TPREL16_HIGHER 97 #define R_PPC64_TPREL16_HIGHERA 98 #define R_PPC64_TPREL16_HIGHEST 99 #define R_PPC64_TPREL16_HIGHESTA 100 #define R_PPC64_DTPREL16_DS 101 #define R_PPC64_DTPREL16_LO_DS 102 #define R_PPC64_DTPREL16_HIGHER 103 #define R_PPC64_DTPREL16_HIGHERA 104 #define R_PPC64_DTPREL16_HIGHEST 105 #define R_PPC64_DTPREL16_HIGHESTA 106 #define R_PPC64_TLSGD 107 #define R_PPC64_TLSLD 108 #define R_PPC64_TOCSAVE 109 #define R_PPC64_ADDR16_HIGH 110 #define R_PPC64_ADDR16_HIGHA 111 #define R_PPC64_TPREL16_HIGH 112 #define R_PPC64_TPREL16_HIGHA 113 #define R_PPC64_DTPREL16_HIGH 114 #define R_PPC64_DTPREL16_HIGHA 115 #define R_PPC64_JMP_IREL 247 #define R_PPC64_IRELATIVE 248 #define R_PPC64_REL16 249 #define R_PPC64_REL16_LO 250 #define R_PPC64_REL16_HI 251 #define R_PPC64_REL16_HA 252 #define EF_PPC64_ABI 3 #define DT_PPC64_GLINK (DT_LOPROC + 0) #define DT_PPC64_OPD (DT_LOPROC + 1) #define DT_PPC64_OPDSZ (DT_LOPROC + 2) #define DT_PPC64_OPT (DT_LOPROC + 3) #define DT_PPC64_NUM 4 #define PPC64_OPT_TLS 1 #define PPC64_OPT_MULTI_TOC 2 #define PPC64_OPT_LOCALENTRY 4 #define STO_PPC64_LOCAL_BIT 5 #define STO_PPC64_LOCAL_MASK 0xe0 #define PPC64_LOCAL_ENTRY_OFFSET(x) (1 << (((x)&0xe0)>>5) & 0xfc) #define EF_ARM_RELEXEC 0x01 #define EF_ARM_HASENTRY 0x02 #define EF_ARM_INTERWORK 0x04 #define EF_ARM_APCS_26 0x08 #define EF_ARM_APCS_FLOAT 0x10 #define EF_ARM_PIC 0x20 #define EF_ARM_ALIGN8 0x40 #define EF_ARM_NEW_ABI 0x80 #define EF_ARM_OLD_ABI 0x100 #define EF_ARM_SOFT_FLOAT 0x200 #define EF_ARM_VFP_FLOAT 0x400 #define EF_ARM_MAVERICK_FLOAT 0x800 #define EF_ARM_ABI_FLOAT_SOFT 0x200 #define EF_ARM_ABI_FLOAT_HARD 0x400 #define EF_ARM_SYMSARESORTED 0x04 #define EF_ARM_DYNSYMSUSESEGIDX 0x08 #define EF_ARM_MAPSYMSFIRST 0x10 #define EF_ARM_EABIMASK 0XFF000000 #define EF_ARM_BE8 0x00800000 #define EF_ARM_LE8 0x00400000 #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) #define EF_ARM_EABI_UNKNOWN 0x00000000 #define EF_ARM_EABI_VER1 0x01000000 #define EF_ARM_EABI_VER2 0x02000000 #define EF_ARM_EABI_VER3 0x03000000 #define EF_ARM_EABI_VER4 0x04000000 #define EF_ARM_EABI_VER5 0x05000000 #define STT_ARM_TFUNC STT_LOPROC #define STT_ARM_16BIT STT_HIPROC #define SHF_ARM_ENTRYSECT 0x10000000 #define SHF_ARM_COMDEF 0x80000000 #define PF_ARM_SB 0x10000000 #define PF_ARM_PI 0x20000000 #define PF_ARM_ABS 0x40000000 #define PT_ARM_EXIDX (PT_LOPROC + 1) #define SHT_ARM_EXIDX (SHT_LOPROC + 1) #define SHT_ARM_PREEMPTMAP (SHT_LOPROC + 2) #define SHT_ARM_ATTRIBUTES (SHT_LOPROC + 3) #define R_AARCH64_NONE 0 #define R_AARCH64_P32_ABS32 1 #define R_AARCH64_P32_COPY 180 #define R_AARCH64_P32_GLOB_DAT 181 #define R_AARCH64_P32_JUMP_SLOT 182 #define R_AARCH64_P32_RELATIVE 183 #define R_AARCH64_P32_TLS_DTPMOD 184 #define R_AARCH64_P32_TLS_DTPREL 185 #define R_AARCH64_P32_TLS_TPREL 186 #define R_AARCH64_P32_TLSDESC 187 #define R_AARCH64_P32_IRELATIVE 188 #define R_AARCH64_ABS64 257 #define R_AARCH64_ABS32 258 #define R_AARCH64_ABS16 259 #define R_AARCH64_PREL64 260 #define R_AARCH64_PREL32 261 #define R_AARCH64_PREL16 262 #define R_AARCH64_MOVW_UABS_G0 263 #define R_AARCH64_MOVW_UABS_G0_NC 264 #define R_AARCH64_MOVW_UABS_G1 265 #define R_AARCH64_MOVW_UABS_G1_NC 266 #define R_AARCH64_MOVW_UABS_G2 267 #define R_AARCH64_MOVW_UABS_G2_NC 268 #define R_AARCH64_MOVW_UABS_G3 269 #define R_AARCH64_MOVW_SABS_G0 270 #define R_AARCH64_MOVW_SABS_G1 271 #define R_AARCH64_MOVW_SABS_G2 272 #define R_AARCH64_LD_PREL_LO19 273 #define R_AARCH64_ADR_PREL_LO21 274 #define R_AARCH64_ADR_PREL_PG_HI21 275 #define R_AARCH64_ADR_PREL_PG_HI21_NC 276 #define R_AARCH64_ADD_ABS_LO12_NC 277 #define R_AARCH64_LDST8_ABS_LO12_NC 278 #define R_AARCH64_TSTBR14 279 #define R_AARCH64_CONDBR19 280 #define R_AARCH64_JUMP26 282 #define R_AARCH64_CALL26 283 #define R_AARCH64_LDST16_ABS_LO12_NC 284 #define R_AARCH64_LDST32_ABS_LO12_NC 285 #define R_AARCH64_LDST64_ABS_LO12_NC 286 #define R_AARCH64_MOVW_PREL_G0 287 #define R_AARCH64_MOVW_PREL_G0_NC 288 #define R_AARCH64_MOVW_PREL_G1 289 #define R_AARCH64_MOVW_PREL_G1_NC 290 #define R_AARCH64_MOVW_PREL_G2 291 #define R_AARCH64_MOVW_PREL_G2_NC 292 #define R_AARCH64_MOVW_PREL_G3 293 #define R_AARCH64_LDST128_ABS_LO12_NC 299 #define R_AARCH64_MOVW_GOTOFF_G0 300 #define R_AARCH64_MOVW_GOTOFF_G0_NC 301 #define R_AARCH64_MOVW_GOTOFF_G1 302 #define R_AARCH64_MOVW_GOTOFF_G1_NC 303 #define R_AARCH64_MOVW_GOTOFF_G2 304 #define R_AARCH64_MOVW_GOTOFF_G2_NC 305 #define R_AARCH64_MOVW_GOTOFF_G3 306 #define R_AARCH64_GOTREL64 307 #define R_AARCH64_GOTREL32 308 #define R_AARCH64_GOT_LD_PREL19 309 #define R_AARCH64_LD64_GOTOFF_LO15 310 #define R_AARCH64_ADR_GOT_PAGE 311 #define R_AARCH64_LD64_GOT_LO12_NC 312 #define R_AARCH64_LD64_GOTPAGE_LO15 313 #define R_AARCH64_TLSGD_ADR_PREL21 512 #define R_AARCH64_TLSGD_ADR_PAGE21 513 #define R_AARCH64_TLSGD_ADD_LO12_NC 514 #define R_AARCH64_TLSGD_MOVW_G1 515 #define R_AARCH64_TLSGD_MOVW_G0_NC 516 #define R_AARCH64_TLSLD_ADR_PREL21 517 #define R_AARCH64_TLSLD_ADR_PAGE21 518 #define R_AARCH64_TLSLD_ADD_LO12_NC 519 #define R_AARCH64_TLSLD_MOVW_G1 520 #define R_AARCH64_TLSLD_MOVW_G0_NC 521 #define R_AARCH64_TLSLD_LD_PREL19 522 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 #define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 #define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 #define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 #define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 #define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 #define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 #define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 #define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 #define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 #define R_AARCH64_TLSDESC_LD_PREL19 560 #define R_AARCH64_TLSDESC_ADR_PREL21 561 #define R_AARCH64_TLSDESC_ADR_PAGE21 562 #define R_AARCH64_TLSDESC_LD64_LO12 563 #define R_AARCH64_TLSDESC_ADD_LO12 564 #define R_AARCH64_TLSDESC_OFF_G1 565 #define R_AARCH64_TLSDESC_OFF_G0_NC 566 #define R_AARCH64_TLSDESC_LDR 567 #define R_AARCH64_TLSDESC_ADD 568 #define R_AARCH64_TLSDESC_CALL 569 #define R_AARCH64_TLSLE_LDST128_TPREL_LO12 570 #define R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC 571 #define R_AARCH64_TLSLD_LDST128_DTPREL_LO12 572 #define R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC 573 #define R_AARCH64_COPY 1024 #define R_AARCH64_GLOB_DAT 1025 #define R_AARCH64_JUMP_SLOT 1026 #define R_AARCH64_RELATIVE 1027 #define R_AARCH64_TLS_DTPMOD 1028 #define R_AARCH64_TLS_DTPMOD64 1028 #define R_AARCH64_TLS_DTPREL 1029 #define R_AARCH64_TLS_DTPREL64 1029 #define R_AARCH64_TLS_TPREL 1030 #define R_AARCH64_TLS_TPREL64 1030 #define R_AARCH64_TLSDESC 1031 #define R_ARM_NONE 0 #define R_ARM_PC24 1 #define R_ARM_ABS32 2 #define R_ARM_REL32 3 #define R_ARM_PC13 4 #define R_ARM_ABS16 5 #define R_ARM_ABS12 6 #define R_ARM_THM_ABS5 7 #define R_ARM_ABS8 8 #define R_ARM_SBREL32 9 #define R_ARM_THM_PC22 10 #define R_ARM_THM_PC8 11 #define R_ARM_AMP_VCALL9 12 #define R_ARM_TLS_DESC 13 #define R_ARM_THM_SWI8 14 #define R_ARM_XPC25 15 #define R_ARM_THM_XPC22 16 #define R_ARM_TLS_DTPMOD32 17 #define R_ARM_TLS_DTPOFF32 18 #define R_ARM_TLS_TPOFF32 19 #define R_ARM_COPY 20 #define R_ARM_GLOB_DAT 21 #define R_ARM_JUMP_SLOT 22 #define R_ARM_RELATIVE 23 #define R_ARM_GOTOFF 24 #define R_ARM_GOTPC 25 #define R_ARM_GOT32 26 #define R_ARM_PLT32 27 #define R_ARM_CALL 28 #define R_ARM_JUMP24 29 #define R_ARM_THM_JUMP24 30 #define R_ARM_BASE_ABS 31 #define R_ARM_ALU_PCREL_7_0 32 #define R_ARM_ALU_PCREL_15_8 33 #define R_ARM_ALU_PCREL_23_15 34 #define R_ARM_LDR_SBREL_11_0 35 #define R_ARM_ALU_SBREL_19_12 36 #define R_ARM_ALU_SBREL_27_20 37 #define R_ARM_TARGET1 38 #define R_ARM_SBREL31 39 #define R_ARM_V4BX 40 #define R_ARM_TARGET2 41 #define R_ARM_PREL31 42 #define R_ARM_MOVW_ABS_NC 43 #define R_ARM_MOVT_ABS 44 #define R_ARM_MOVW_PREL_NC 45 #define R_ARM_MOVT_PREL 46 #define R_ARM_THM_MOVW_ABS_NC 47 #define R_ARM_THM_MOVT_ABS 48 #define R_ARM_THM_MOVW_PREL_NC 49 #define R_ARM_THM_MOVT_PREL 50 #define R_ARM_THM_JUMP19 51 #define R_ARM_THM_JUMP6 52 #define R_ARM_THM_ALU_PREL_11_0 53 #define R_ARM_THM_PC12 54 #define R_ARM_ABS32_NOI 55 #define R_ARM_REL32_NOI 56 #define R_ARM_ALU_PC_G0_NC 57 #define R_ARM_ALU_PC_G0 58 #define R_ARM_ALU_PC_G1_NC 59 #define R_ARM_ALU_PC_G1 60 #define R_ARM_ALU_PC_G2 61 #define R_ARM_LDR_PC_G1 62 #define R_ARM_LDR_PC_G2 63 #define R_ARM_LDRS_PC_G0 64 #define R_ARM_LDRS_PC_G1 65 #define R_ARM_LDRS_PC_G2 66 #define R_ARM_LDC_PC_G0 67 #define R_ARM_LDC_PC_G1 68 #define R_ARM_LDC_PC_G2 69 #define R_ARM_ALU_SB_G0_NC 70 #define R_ARM_ALU_SB_G0 71 #define R_ARM_ALU_SB_G1_NC 72 #define R_ARM_ALU_SB_G1 73 #define R_ARM_ALU_SB_G2 74 #define R_ARM_LDR_SB_G0 75 #define R_ARM_LDR_SB_G1 76 #define R_ARM_LDR_SB_G2 77 #define R_ARM_LDRS_SB_G0 78 #define R_ARM_LDRS_SB_G1 79 #define R_ARM_LDRS_SB_G2 80 #define R_ARM_LDC_SB_G0 81 #define R_ARM_LDC_SB_G1 82 #define R_ARM_LDC_SB_G2 83 #define R_ARM_MOVW_BREL_NC 84 #define R_ARM_MOVT_BREL 85 #define R_ARM_MOVW_BREL 86 #define R_ARM_THM_MOVW_BREL_NC 87 #define R_ARM_THM_MOVT_BREL 88 #define R_ARM_THM_MOVW_BREL 89 #define R_ARM_TLS_GOTDESC 90 #define R_ARM_TLS_CALL 91 #define R_ARM_TLS_DESCSEQ 92 #define R_ARM_THM_TLS_CALL 93 #define R_ARM_PLT32_ABS 94 #define R_ARM_GOT_ABS 95 #define R_ARM_GOT_PREL 96 #define R_ARM_GOT_BREL12 97 #define R_ARM_GOTOFF12 98 #define R_ARM_GOTRELAX 99 #define R_ARM_GNU_VTENTRY 100 #define R_ARM_GNU_VTINHERIT 101 #define R_ARM_THM_PC11 102 #define R_ARM_THM_PC9 103 #define R_ARM_TLS_GD32 104 #define R_ARM_TLS_LDM32 105 #define R_ARM_TLS_LDO32 106 #define R_ARM_TLS_IE32 107 #define R_ARM_TLS_LE32 108 #define R_ARM_TLS_LDO12 109 #define R_ARM_TLS_LE12 110 #define R_ARM_TLS_IE12GP 111 #define R_ARM_ME_TOO 128 #define R_ARM_THM_TLS_DESCSEQ 129 #define R_ARM_THM_TLS_DESCSEQ16 129 #define R_ARM_THM_TLS_DESCSEQ32 130 #define R_ARM_THM_GOT_BREL12 131 #define R_ARM_IRELATIVE 160 #define R_ARM_RXPC25 249 #define R_ARM_RSBREL32 250 #define R_ARM_THM_RPC22 251 #define R_ARM_RREL32 252 #define R_ARM_RABS22 253 #define R_ARM_RPC24 254 #define R_ARM_RBASE 255 #define R_ARM_NUM 256 #define R_CKCORE_NONE 0 #define R_CKCORE_ADDR32 1 #define R_CKCORE_PCRELIMM8BY4 2 #define R_CKCORE_PCRELIMM11BY2 3 #define R_CKCORE_PCREL32 5 #define R_CKCORE_PCRELJSR_IMM11BY2 6 #define R_CKCORE_RELATIVE 9 #define R_CKCORE_COPY 10 #define R_CKCORE_GLOB_DAT 11 #define R_CKCORE_JUMP_SLOT 12 #define R_CKCORE_GOTOFF 13 #define R_CKCORE_GOTPC 14 #define R_CKCORE_GOT32 15 #define R_CKCORE_PLT32 16 #define R_CKCORE_ADDRGOT 17 #define R_CKCORE_ADDRPLT 18 #define R_CKCORE_PCREL_IMM26BY2 19 #define R_CKCORE_PCREL_IMM16BY2 20 #define R_CKCORE_PCREL_IMM16BY4 21 #define R_CKCORE_PCREL_IMM10BY2 22 #define R_CKCORE_PCREL_IMM10BY4 23 #define R_CKCORE_ADDR_HI16 24 #define R_CKCORE_ADDR_LO16 25 #define R_CKCORE_GOTPC_HI16 26 #define R_CKCORE_GOTPC_LO16 27 #define R_CKCORE_GOTOFF_HI16 28 #define R_CKCORE_GOTOFF_LO16 29 #define R_CKCORE_GOT12 30 #define R_CKCORE_GOT_HI16 31 #define R_CKCORE_GOT_LO16 32 #define R_CKCORE_PLT12 33 #define R_CKCORE_PLT_HI16 34 #define R_CKCORE_PLT_LO16 35 #define R_CKCORE_ADDRGOT_HI16 36 #define R_CKCORE_ADDRGOT_LO16 37 #define R_CKCORE_ADDRPLT_HI16 38 #define R_CKCORE_ADDRPLT_LO16 39 #define R_CKCORE_PCREL_JSR_IMM26BY2 40 #define R_CKCORE_TOFFSET_LO16 41 #define R_CKCORE_DOFFSET_LO16 42 #define R_CKCORE_PCREL_IMM18BY2 43 #define R_CKCORE_DOFFSET_IMM18 44 #define R_CKCORE_DOFFSET_IMM18BY2 45 #define R_CKCORE_DOFFSET_IMM18BY4 46 #define R_CKCORE_GOT_IMM18BY4 48 #define R_CKCORE_PLT_IMM18BY4 49 #define R_CKCORE_PCREL_IMM7BY4 50 #define R_CKCORE_TLS_LE32 51 #define R_CKCORE_TLS_IE32 52 #define R_CKCORE_TLS_GD32 53 #define R_CKCORE_TLS_LDM32 54 #define R_CKCORE_TLS_LDO32 55 #define R_CKCORE_TLS_DTPMOD32 56 #define R_CKCORE_TLS_DTPOFF32 57 #define R_CKCORE_TLS_TPOFF32 58 #define EF_IA_64_MASKOS 0x0000000f #define EF_IA_64_ABI64 0x00000010 #define EF_IA_64_ARCH 0xff000000 #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) #define PT_IA_64_UNWIND (PT_LOPROC + 1) #define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12) #define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13) #define PT_IA_64_HP_STACK (PT_LOOS + 0x14) #define PF_IA_64_NORECOV 0x80000000 #define SHT_IA_64_EXT (SHT_LOPROC + 0) #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) #define SHF_IA_64_SHORT 0x10000000 #define SHF_IA_64_NORECOV 0x20000000 #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) #define DT_IA_64_NUM 1 #define R_IA64_NONE 0x00 #define R_IA64_IMM14 0x21 #define R_IA64_IMM22 0x22 #define R_IA64_IMM64 0x23 #define R_IA64_DIR32MSB 0x24 #define R_IA64_DIR32LSB 0x25 #define R_IA64_DIR64MSB 0x26 #define R_IA64_DIR64LSB 0x27 #define R_IA64_GPREL22 0x2a #define R_IA64_GPREL64I 0x2b #define R_IA64_GPREL32MSB 0x2c #define R_IA64_GPREL32LSB 0x2d #define R_IA64_GPREL64MSB 0x2e #define R_IA64_GPREL64LSB 0x2f #define R_IA64_LTOFF22 0x32 #define R_IA64_LTOFF64I 0x33 #define R_IA64_PLTOFF22 0x3a #define R_IA64_PLTOFF64I 0x3b #define R_IA64_PLTOFF64MSB 0x3e #define R_IA64_PLTOFF64LSB 0x3f #define R_IA64_FPTR64I 0x43 #define R_IA64_FPTR32MSB 0x44 #define R_IA64_FPTR32LSB 0x45 #define R_IA64_FPTR64MSB 0x46 #define R_IA64_FPTR64LSB 0x47 #define R_IA64_PCREL60B 0x48 #define R_IA64_PCREL21B 0x49 #define R_IA64_PCREL21M 0x4a #define R_IA64_PCREL21F 0x4b #define R_IA64_PCREL32MSB 0x4c #define R_IA64_PCREL32LSB 0x4d #define R_IA64_PCREL64MSB 0x4e #define R_IA64_PCREL64LSB 0x4f #define R_IA64_LTOFF_FPTR22 0x52 #define R_IA64_LTOFF_FPTR64I 0x53 #define R_IA64_LTOFF_FPTR32MSB 0x54 #define R_IA64_LTOFF_FPTR32LSB 0x55 #define R_IA64_LTOFF_FPTR64MSB 0x56 #define R_IA64_LTOFF_FPTR64LSB 0x57 #define R_IA64_SEGREL32MSB 0x5c #define R_IA64_SEGREL32LSB 0x5d #define R_IA64_SEGREL64MSB 0x5e #define R_IA64_SEGREL64LSB 0x5f #define R_IA64_SECREL32MSB 0x64 #define R_IA64_SECREL32LSB 0x65 #define R_IA64_SECREL64MSB 0x66 #define R_IA64_SECREL64LSB 0x67 #define R_IA64_REL32MSB 0x6c #define R_IA64_REL32LSB 0x6d #define R_IA64_REL64MSB 0x6e #define R_IA64_REL64LSB 0x6f #define R_IA64_LTV32MSB 0x74 #define R_IA64_LTV32LSB 0x75 #define R_IA64_LTV64MSB 0x76 #define R_IA64_LTV64LSB 0x77 #define R_IA64_PCREL21BI 0x79 #define R_IA64_PCREL22 0x7a #define R_IA64_PCREL64I 0x7b #define R_IA64_IPLTMSB 0x80 #define R_IA64_IPLTLSB 0x81 #define R_IA64_COPY 0x84 #define R_IA64_SUB 0x85 #define R_IA64_LTOFF22X 0x86 #define R_IA64_LDXMOV 0x87 #define R_IA64_TPREL14 0x91 #define R_IA64_TPREL22 0x92 #define R_IA64_TPREL64I 0x93 #define R_IA64_TPREL64MSB 0x96 #define R_IA64_TPREL64LSB 0x97 #define R_IA64_LTOFF_TPREL22 0x9a #define R_IA64_DTPMOD64MSB 0xa6 #define R_IA64_DTPMOD64LSB 0xa7 #define R_IA64_LTOFF_DTPMOD22 0xaa #define R_IA64_DTPREL14 0xb1 #define R_IA64_DTPREL22 0xb2 #define R_IA64_DTPREL64I 0xb3 #define R_IA64_DTPREL32MSB 0xb4 #define R_IA64_DTPREL32LSB 0xb5 #define R_IA64_DTPREL64MSB 0xb6 #define R_IA64_DTPREL64LSB 0xb7 #define R_IA64_LTOFF_DTPREL22 0xba #define EF_SH_MACH_MASK 0x1f #define EF_SH_UNKNOWN 0x0 #define EF_SH1 0x1 #define EF_SH2 0x2 #define EF_SH3 0x3 #define EF_SH_DSP 0x4 #define EF_SH3_DSP 0x5 #define EF_SH4AL_DSP 0x6 #define EF_SH3E 0x8 #define EF_SH4 0x9 #define EF_SH2E 0xb #define EF_SH4A 0xc #define EF_SH2A 0xd #define EF_SH4_NOFPU 0x10 #define EF_SH4A_NOFPU 0x11 #define EF_SH4_NOMMU_NOFPU 0x12 #define EF_SH2A_NOFPU 0x13 #define EF_SH3_NOMMU 0x14 #define EF_SH2A_SH4_NOFPU 0x15 #define EF_SH2A_SH3_NOFPU 0x16 #define EF_SH2A_SH4 0x17 #define EF_SH2A_SH3E 0x18 #define R_SH_NONE 0 #define R_SH_DIR32 1 #define R_SH_REL32 2 #define R_SH_DIR8WPN 3 #define R_SH_IND12W 4 #define R_SH_DIR8WPL 5 #define R_SH_DIR8WPZ 6 #define R_SH_DIR8BP 7 #define R_SH_DIR8W 8 #define R_SH_DIR8L 9 #define R_SH_SWITCH16 25 #define R_SH_SWITCH32 26 #define R_SH_USES 27 #define R_SH_COUNT 28 #define R_SH_ALIGN 29 #define R_SH_CODE 30 #define R_SH_DATA 31 #define R_SH_LABEL 32 #define R_SH_SWITCH8 33 #define R_SH_GNU_VTINHERIT 34 #define R_SH_GNU_VTENTRY 35 #define R_SH_TLS_GD_32 144 #define R_SH_TLS_LD_32 145 #define R_SH_TLS_LDO_32 146 #define R_SH_TLS_IE_32 147 #define R_SH_TLS_LE_32 148 #define R_SH_TLS_DTPMOD32 149 #define R_SH_TLS_DTPOFF32 150 #define R_SH_TLS_TPOFF32 151 #define R_SH_GOT32 160 #define R_SH_PLT32 161 #define R_SH_COPY 162 #define R_SH_GLOB_DAT 163 #define R_SH_JMP_SLOT 164 #define R_SH_RELATIVE 165 #define R_SH_GOTOFF 166 #define R_SH_GOTPC 167 #define R_SH_GOT20 201 #define R_SH_GOTOFF20 202 #define R_SH_GOTFUNCDESC 203 #define R_SH_GOTFUNCDEST20 204 #define R_SH_GOTOFFFUNCDESC 205 #define R_SH_GOTOFFFUNCDEST20 206 #define R_SH_FUNCDESC 207 #define R_SH_FUNCDESC_VALUE 208 #define R_SH_NUM 256 #define R_390_NONE 0 #define R_390_8 1 #define R_390_12 2 #define R_390_16 3 #define R_390_32 4 #define R_390_PC32 5 #define R_390_GOT12 6 #define R_390_GOT32 7 #define R_390_PLT32 8 #define R_390_COPY 9 #define R_390_GLOB_DAT 10 #define R_390_JMP_SLOT 11 #define R_390_RELATIVE 12 #define R_390_GOTOFF32 13 #define R_390_GOTPC 14 #define R_390_GOT16 15 #define R_390_PC16 16 #define R_390_PC16DBL 17 #define R_390_PLT16DBL 18 #define R_390_PC32DBL 19 #define R_390_PLT32DBL 20 #define R_390_GOTPCDBL 21 #define R_390_64 22 #define R_390_PC64 23 #define R_390_GOT64 24 #define R_390_PLT64 25 #define R_390_GOTENT 26 #define R_390_GOTOFF16 27 #define R_390_GOTOFF64 28 #define R_390_GOTPLT12 29 #define R_390_GOTPLT16 30 #define R_390_GOTPLT32 31 #define R_390_GOTPLT64 32 #define R_390_GOTPLTENT 33 #define R_390_PLTOFF16 34 #define R_390_PLTOFF32 35 #define R_390_PLTOFF64 36 #define R_390_TLS_LOAD 37 #define R_390_TLS_GDCALL 38 #define R_390_TLS_LDCALL 39 #define R_390_TLS_GD32 40 #define R_390_TLS_GD64 41 #define R_390_TLS_GOTIE12 42 #define R_390_TLS_GOTIE32 43 #define R_390_TLS_GOTIE64 44 #define R_390_TLS_LDM32 45 #define R_390_TLS_LDM64 46 #define R_390_TLS_IE32 47 #define R_390_TLS_IE64 48 #define R_390_TLS_IEENT 49 #define R_390_TLS_LE32 50 #define R_390_TLS_LE64 51 #define R_390_TLS_LDO32 52 #define R_390_TLS_LDO64 53 #define R_390_TLS_DTPMOD 54 #define R_390_TLS_DTPOFF 55 #define R_390_TLS_TPOFF 56 #define R_390_20 57 #define R_390_GOT20 58 #define R_390_GOTPLT20 59 #define R_390_TLS_GOTIE20 60 #define R_390_NUM 61 #define R_CRIS_NONE 0 #define R_CRIS_8 1 #define R_CRIS_16 2 #define R_CRIS_32 3 #define R_CRIS_8_PCREL 4 #define R_CRIS_16_PCREL 5 #define R_CRIS_32_PCREL 6 #define R_CRIS_GNU_VTINHERIT 7 #define R_CRIS_GNU_VTENTRY 8 #define R_CRIS_COPY 9 #define R_CRIS_GLOB_DAT 10 #define R_CRIS_JUMP_SLOT 11 #define R_CRIS_RELATIVE 12 #define R_CRIS_16_GOT 13 #define R_CRIS_32_GOT 14 #define R_CRIS_16_GOTPLT 15 #define R_CRIS_32_GOTPLT 16 #define R_CRIS_32_GOTREL 17 #define R_CRIS_32_PLT_GOTREL 18 #define R_CRIS_32_PLT_PCREL 19 #define R_CRIS_NUM 20 #define R_X86_64_NONE 0 #define R_X86_64_64 1 #define R_X86_64_PC32 2 #define R_X86_64_GOT32 3 #define R_X86_64_PLT32 4 #define R_X86_64_COPY 5 #define R_X86_64_GLOB_DAT 6 #define R_X86_64_JUMP_SLOT 7 #define R_X86_64_RELATIVE 8 #define R_X86_64_GOTPCREL 9 #define R_X86_64_32 10 #define R_X86_64_32S 11 #define R_X86_64_16 12 #define R_X86_64_PC16 13 #define R_X86_64_8 14 #define R_X86_64_PC8 15 #define R_X86_64_DTPMOD64 16 #define R_X86_64_DTPOFF64 17 #define R_X86_64_TPOFF64 18 #define R_X86_64_TLSGD 19 #define R_X86_64_TLSLD 20 #define R_X86_64_DTPOFF32 21 #define R_X86_64_GOTTPOFF 22 #define R_X86_64_TPOFF32 23 #define R_X86_64_PC64 24 #define R_X86_64_GOTOFF64 25 #define R_X86_64_GOTPC32 26 #define R_X86_64_GOT64 27 #define R_X86_64_GOTPCREL64 28 #define R_X86_64_GOTPC64 29 #define R_X86_64_GOTPLT64 30 #define R_X86_64_PLTOFF64 31 #define R_X86_64_SIZE32 32 #define R_X86_64_SIZE64 33 #define R_X86_64_GOTPC32_TLSDESC 34 #define R_X86_64_TLSDESC_CALL 35 #define R_X86_64_TLSDESC 36 #define R_X86_64_IRELATIVE 37 #define R_X86_64_RELATIVE64 38 #define R_X86_64_GOTPCRELX 41 #define R_X86_64_REX_GOTPCRELX 42 #define R_X86_64_NUM 43 #define R_MN10300_NONE 0 #define R_MN10300_32 1 #define R_MN10300_16 2 #define R_MN10300_8 3 #define R_MN10300_PCREL32 4 #define R_MN10300_PCREL16 5 #define R_MN10300_PCREL8 6 #define R_MN10300_GNU_VTINHERIT 7 #define R_MN10300_GNU_VTENTRY 8 #define R_MN10300_24 9 #define R_MN10300_GOTPC32 10 #define R_MN10300_GOTPC16 11 #define R_MN10300_GOTOFF32 12 #define R_MN10300_GOTOFF24 13 #define R_MN10300_GOTOFF16 14 #define R_MN10300_PLT32 15 #define R_MN10300_PLT16 16 #define R_MN10300_GOT32 17 #define R_MN10300_GOT24 18 #define R_MN10300_GOT16 19 #define R_MN10300_COPY 20 #define R_MN10300_GLOB_DAT 21 #define R_MN10300_JMP_SLOT 22 #define R_MN10300_RELATIVE 23 #define R_MN10300_NUM 24 #define R_M32R_NONE 0 #define R_M32R_16 1 #define R_M32R_32 2 #define R_M32R_24 3 #define R_M32R_10_PCREL 4 #define R_M32R_18_PCREL 5 #define R_M32R_26_PCREL 6 #define R_M32R_HI16_ULO 7 #define R_M32R_HI16_SLO 8 #define R_M32R_LO16 9 #define R_M32R_SDA16 10 #define R_M32R_GNU_VTINHERIT 11 #define R_M32R_GNU_VTENTRY 12 #define R_M32R_16_RELA 33 #define R_M32R_32_RELA 34 #define R_M32R_24_RELA 35 #define R_M32R_10_PCREL_RELA 36 #define R_M32R_18_PCREL_RELA 37 #define R_M32R_26_PCREL_RELA 38 #define R_M32R_HI16_ULO_RELA 39 #define R_M32R_HI16_SLO_RELA 40 #define R_M32R_LO16_RELA 41 #define R_M32R_SDA16_RELA 42 #define R_M32R_RELA_GNU_VTINHERIT 43 #define R_M32R_RELA_GNU_VTENTRY 44 #define R_M32R_REL32 45 #define R_M32R_GOT24 48 #define R_M32R_26_PLTREL 49 #define R_M32R_COPY 50 #define R_M32R_GLOB_DAT 51 #define R_M32R_JMP_SLOT 52 #define R_M32R_RELATIVE 53 #define R_M32R_GOTOFF 54 #define R_M32R_GOTPC24 55 #define R_M32R_GOT16_HI_ULO 56 #define R_M32R_GOT16_HI_SLO 57 #define R_M32R_GOT16_LO 58 #define R_M32R_GOTPC_HI_ULO 59 #define R_M32R_GOTPC_HI_SLO 60 #define R_M32R_GOTPC_LO 61 #define R_M32R_GOTOFF_HI_ULO 62 #define R_M32R_GOTOFF_HI_SLO 63 #define R_M32R_GOTOFF_LO 64 #define R_M32R_NUM 256 #define R_MICROBLAZE_NONE 0 #define R_MICROBLAZE_32 1 #define R_MICROBLAZE_32_PCREL 2 #define R_MICROBLAZE_64_PCREL 3 #define R_MICROBLAZE_32_PCREL_LO 4 #define R_MICROBLAZE_64 5 #define R_MICROBLAZE_32_LO 6 #define R_MICROBLAZE_SRO32 7 #define R_MICROBLAZE_SRW32 8 #define R_MICROBLAZE_64_NONE 9 #define R_MICROBLAZE_32_SYM_OP_SYM 10 #define R_MICROBLAZE_GNU_VTINHERIT 11 #define R_MICROBLAZE_GNU_VTENTRY 12 #define R_MICROBLAZE_GOTPC_64 13 #define R_MICROBLAZE_GOT_64 14 #define R_MICROBLAZE_PLT_64 15 #define R_MICROBLAZE_REL 16 #define R_MICROBLAZE_JUMP_SLOT 17 #define R_MICROBLAZE_GLOB_DAT 18 #define R_MICROBLAZE_GOTOFF_64 19 #define R_MICROBLAZE_GOTOFF_32 20 #define R_MICROBLAZE_COPY 21 #define R_MICROBLAZE_TLS 22 #define R_MICROBLAZE_TLSGD 23 #define R_MICROBLAZE_TLSLD 24 #define R_MICROBLAZE_TLSDTPMOD32 25 #define R_MICROBLAZE_TLSDTPREL32 26 #define R_MICROBLAZE_TLSDTPREL64 27 #define R_MICROBLAZE_TLSGOTTPREL32 28 #define R_MICROBLAZE_TLSTPREL32 29 #define DT_NIOS2_GP 0x70000002 #define R_NIOS2_NONE 0 #define R_NIOS2_S16 1 #define R_NIOS2_U16 2 #define R_NIOS2_PCREL16 3 #define R_NIOS2_CALL26 4 #define R_NIOS2_IMM5 5 #define R_NIOS2_CACHE_OPX 6 #define R_NIOS2_IMM6 7 #define R_NIOS2_IMM8 8 #define R_NIOS2_HI16 9 #define R_NIOS2_LO16 10 #define R_NIOS2_HIADJ16 11 #define R_NIOS2_BFD_RELOC_32 12 #define R_NIOS2_BFD_RELOC_16 13 #define R_NIOS2_BFD_RELOC_8 14 #define R_NIOS2_GPREL 15 #define R_NIOS2_GNU_VTINHERIT 16 #define R_NIOS2_GNU_VTENTRY 17 #define R_NIOS2_UJMP 18 #define R_NIOS2_CJMP 19 #define R_NIOS2_CALLR 20 #define R_NIOS2_ALIGN 21 #define R_NIOS2_GOT16 22 #define R_NIOS2_CALL16 23 #define R_NIOS2_GOTOFF_LO 24 #define R_NIOS2_GOTOFF_HA 25 #define R_NIOS2_PCREL_LO 26 #define R_NIOS2_PCREL_HA 27 #define R_NIOS2_TLS_GD16 28 #define R_NIOS2_TLS_LDM16 29 #define R_NIOS2_TLS_LDO16 30 #define R_NIOS2_TLS_IE16 31 #define R_NIOS2_TLS_LE16 32 #define R_NIOS2_TLS_DTPMOD 33 #define R_NIOS2_TLS_DTPREL 34 #define R_NIOS2_TLS_TPREL 35 #define R_NIOS2_COPY 36 #define R_NIOS2_GLOB_DAT 37 #define R_NIOS2_JUMP_SLOT 38 #define R_NIOS2_RELATIVE 39 #define R_NIOS2_GOTOFF 40 #define R_NIOS2_CALL26_NOAT 41 #define R_NIOS2_GOT_LO 42 #define R_NIOS2_GOT_HA 43 #define R_NIOS2_CALL_LO 44 #define R_NIOS2_CALL_HA 45 #define R_OR1K_NONE 0 #define R_OR1K_32 1 #define R_OR1K_16 2 #define R_OR1K_8 3 #define R_OR1K_LO_16_IN_INSN 4 #define R_OR1K_HI_16_IN_INSN 5 #define R_OR1K_INSN_REL_26 6 #define R_OR1K_GNU_VTENTRY 7 #define R_OR1K_GNU_VTINHERIT 8 #define R_OR1K_32_PCREL 9 #define R_OR1K_16_PCREL 10 #define R_OR1K_8_PCREL 11 #define R_OR1K_GOTPC_HI16 12 #define R_OR1K_GOTPC_LO16 13 #define R_OR1K_GOT16 14 #define R_OR1K_PLT26 15 #define R_OR1K_GOTOFF_HI16 16 #define R_OR1K_GOTOFF_LO16 17 #define R_OR1K_COPY 18 #define R_OR1K_GLOB_DAT 19 #define R_OR1K_JMP_SLOT 20 #define R_OR1K_RELATIVE 21 #define R_OR1K_TLS_GD_HI16 22 #define R_OR1K_TLS_GD_LO16 23 #define R_OR1K_TLS_LDM_HI16 24 #define R_OR1K_TLS_LDM_LO16 25 #define R_OR1K_TLS_LDO_HI16 26 #define R_OR1K_TLS_LDO_LO16 27 #define R_OR1K_TLS_IE_HI16 28 #define R_OR1K_TLS_IE_LO16 29 #define R_OR1K_TLS_LE_HI16 30 #define R_OR1K_TLS_LE_LO16 31 #define R_OR1K_TLS_TPOFF 32 #define R_OR1K_TLS_DTPOFF 33 #define R_OR1K_TLS_DTPMOD 34 #define R_BPF_NONE 0 #define R_BPF_MAP_FD 1 #define R_RISCV_NONE 0 #define R_RISCV_32 1 #define R_RISCV_64 2 #define R_RISCV_RELATIVE 3 #define R_RISCV_COPY 4 #define R_RISCV_JUMP_SLOT 5 #define R_RISCV_TLS_DTPMOD32 6 #define R_RISCV_TLS_DTPMOD64 7 #define R_RISCV_TLS_DTPREL32 8 #define R_RISCV_TLS_DTPREL64 9 #define R_RISCV_TLS_TPREL32 10 #define R_RISCV_TLS_TPREL64 11 #define R_RISCV_TLSDESC 12 #define R_RISCV_BRANCH 16 #define R_RISCV_JAL 17 #define R_RISCV_CALL 18 #define R_RISCV_CALL_PLT 19 #define R_RISCV_GOT_HI20 20 #define R_RISCV_TLS_GOT_HI20 21 #define R_RISCV_TLS_GD_HI20 22 #define R_RISCV_PCREL_HI20 23 #define R_RISCV_PCREL_LO12_I 24 #define R_RISCV_PCREL_LO12_S 25 #define R_RISCV_HI20 26 #define R_RISCV_LO12_I 27 #define R_RISCV_LO12_S 28 #define R_RISCV_TPREL_HI20 29 #define R_RISCV_TPREL_LO12_I 30 #define R_RISCV_TPREL_LO12_S 31 #define R_RISCV_TPREL_ADD 32 #define R_RISCV_ADD8 33 #define R_RISCV_ADD16 34 #define R_RISCV_ADD32 35 #define R_RISCV_ADD64 36 #define R_RISCV_SUB8 37 #define R_RISCV_SUB16 38 #define R_RISCV_SUB32 39 #define R_RISCV_SUB64 40 #define R_RISCV_GOT32_PCREL 41 #define R_RISCV_ALIGN 43 #define R_RISCV_RVC_BRANCH 44 #define R_RISCV_RVC_JUMP 45 #define R_RISCV_RVC_LUI 46 #define R_RISCV_RELAX 51 #define R_RISCV_SUB6 52 #define R_RISCV_SET6 53 #define R_RISCV_SET8 54 #define R_RISCV_SET16 55 #define R_RISCV_SET32 56 #define R_RISCV_32_PCREL 57 #define R_RISCV_IRELATIVE 58 #define R_RISCV_PLT32 59 #define R_RISCV_SET_ULEB128 60 #define R_RISCV_SUB_ULEB128 61 #define R_RISCV_TLSDESC_HI20 62 #define R_RISCV_TLSDESC_LOAD_LO12 63 #define R_RISCV_TLSDESC_ADD_LO12 64 #define R_RISCV_TLSDESC_CALL 65 #define EF_LARCH_ABI_MODIFIER_MASK 0x07 #define EF_LARCH_ABI_SOFT_FLOAT 0x01 #define EF_LARCH_ABI_SINGLE_FLOAT 0x02 #define EF_LARCH_ABI_DOUBLE_FLOAT 0x03 #define EF_LARCH_OBJABI_V1 0x40 #define R_LARCH_NONE 0 #define R_LARCH_32 1 #define R_LARCH_64 2 #define R_LARCH_RELATIVE 3 #define R_LARCH_COPY 4 #define R_LARCH_JUMP_SLOT 5 #define R_LARCH_TLS_DTPMOD32 6 #define R_LARCH_TLS_DTPMOD64 7 #define R_LARCH_TLS_DTPREL32 8 #define R_LARCH_TLS_DTPREL64 9 #define R_LARCH_TLS_TPREL32 10 #define R_LARCH_TLS_TPREL64 11 #define R_LARCH_IRELATIVE 12 #define R_LARCH_TLS_DESC64 14 #define R_LARCH_MARK_LA 20 #define R_LARCH_MARK_PCREL 21 #define R_LARCH_SOP_PUSH_PCREL 22 #define R_LARCH_SOP_PUSH_ABSOLUTE 23 #define R_LARCH_SOP_PUSH_DUP 24 #define R_LARCH_SOP_PUSH_GPREL 25 #define R_LARCH_SOP_PUSH_TLS_TPREL 26 #define R_LARCH_SOP_PUSH_TLS_GOT 27 #define R_LARCH_SOP_PUSH_TLS_GD 28 #define R_LARCH_SOP_PUSH_PLT_PCREL 29 #define R_LARCH_SOP_ASSERT 30 #define R_LARCH_SOP_NOT 31 #define R_LARCH_SOP_SUB 32 #define R_LARCH_SOP_SL 33 #define R_LARCH_SOP_SR 34 #define R_LARCH_SOP_ADD 35 #define R_LARCH_SOP_AND 36 #define R_LARCH_SOP_IF_ELSE 37 #define R_LARCH_SOP_POP_32_S_10_5 38 #define R_LARCH_SOP_POP_32_U_10_12 39 #define R_LARCH_SOP_POP_32_S_10_12 40 #define R_LARCH_SOP_POP_32_S_10_16 41 #define R_LARCH_SOP_POP_32_S_10_16_S2 42 #define R_LARCH_SOP_POP_32_S_5_20 43 #define R_LARCH_SOP_POP_32_S_0_5_10_16_S2 44 #define R_LARCH_SOP_POP_32_S_0_10_10_16_S2 45 #define R_LARCH_SOP_POP_32_U 46 #define R_LARCH_ADD8 47 #define R_LARCH_ADD16 48 #define R_LARCH_ADD24 49 #define R_LARCH_ADD32 50 #define R_LARCH_ADD64 51 #define R_LARCH_SUB8 52 #define R_LARCH_SUB16 53 #define R_LARCH_SUB24 54 #define R_LARCH_SUB32 55 #define R_LARCH_SUB64 56 #define R_LARCH_GNU_VTINHERIT 57 #define R_LARCH_GNU_VTENTRY 58 #define R_LARCH_B16 64 #define R_LARCH_B21 65 #define R_LARCH_B26 66 #define R_LARCH_ABS_HI20 67 #define R_LARCH_ABS_LO12 68 #define R_LARCH_ABS64_LO20 69 #define R_LARCH_ABS64_HI12 70 #define R_LARCH_PCALA_HI20 71 #define R_LARCH_PCALA_LO12 72 #define R_LARCH_PCALA64_LO20 73 #define R_LARCH_PCALA64_HI12 74 #define R_LARCH_GOT_PC_HI20 75 #define R_LARCH_GOT_PC_LO12 76 #define R_LARCH_GOT64_PC_LO20 77 #define R_LARCH_GOT64_PC_HI12 78 #define R_LARCH_GOT_HI20 79 #define R_LARCH_GOT_LO12 80 #define R_LARCH_GOT64_LO20 81 #define R_LARCH_GOT64_HI12 82 #define R_LARCH_TLS_LE_HI20 83 #define R_LARCH_TLS_LE_LO12 84 #define R_LARCH_TLS_LE64_LO20 85 #define R_LARCH_TLS_LE64_HI12 86 #define R_LARCH_TLS_IE_PC_HI20 87 #define R_LARCH_TLS_IE_PC_LO12 88 #define R_LARCH_TLS_IE64_PC_LO20 89 #define R_LARCH_TLS_IE64_PC_HI12 90 #define R_LARCH_TLS_IE_HI20 91 #define R_LARCH_TLS_IE_LO12 92 #define R_LARCH_TLS_IE64_LO20 93 #define R_LARCH_TLS_IE64_HI12 94 #define R_LARCH_TLS_LD_PC_HI20 95 #define R_LARCH_TLS_LD_HI20 96 #define R_LARCH_TLS_GD_PC_HI20 97 #define R_LARCH_TLS_GD_HI20 98 #define R_LARCH_32_PCREL 99 #define R_LARCH_RELAX 100 #define R_LARCH_DELETE 101 #define R_LARCH_ALIGN 102 #define R_LARCH_PCREL20_S2 103 #define R_LARCH_CFA 104 #define R_LARCH_ADD6 105 #define R_LARCH_SUB6 106 #define R_LARCH_ADD_ULEB128 107 #define R_LARCH_SUB_ULEB128 108 #define R_LARCH_64_PCREL 109 #define R_LARCH_CALL36 110 #define R_LARCH_TLS_DESC_PC_HI20 111 #define R_LARCH_TLS_DESC_PC_LO12 112 #define R_LARCH_TLS_DESC64_PC_LO20 113 #define R_LARCH_TLS_DESC64_PC_HI12 114 #define R_LARCH_TLS_DESC_HI20 115 #define R_LARCH_TLS_DESC_LO12 116 #define R_LARCH_TLS_DESC64_LO20 117 #define R_LARCH_TLS_DESC64_HI12 118 #define R_LARCH_TLS_DESC_LD 119 #define R_LARCH_TLS_DESC_CALL 120 #define R_LARCH_TLS_LE_HI20_R 121 #define R_LARCH_TLS_LE_ADD_R 122 #define R_LARCH_TLS_LE_LO12_R 123 #define R_LARCH_TLS_LD_PCREL20_S2 124 #define R_LARCH_TLS_GD_PCREL20_S2 125 #define R_LARCH_TLS_DESC_PCREL20_S2 126 #ifdef __cplusplus } #endif #endif PK!]~/~##-emscripten/cache/sysroot/include/emscripten.h#include "emscripten/emscripten.h" PK!ϭBABA4emscripten/cache/sysroot/include/emscripten/atomic.h/* * Copyright 2015 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #ifdef __cplusplus extern "C" { #endif #define _EM_INLINE static __inline__ __attribute__((always_inline, nodebug)) // Note on 64bit atomics ops: All 64-bit atomic ops defined here, while single // instruction under wasm, will be emulated by using locks in wasm2js mode. // This is also true for C/C++ native atomics as well as intrinsics. // Atomically stores the given value to the memory location, and returns the // value that was there prior to the store. _EM_INLINE uint8_t emscripten_atomic_exchange_u8(void /*uint8_t*/* _Nonnull addr, uint8_t newVal) { return __c11_atomic_exchange((_Atomic uint8_t*)addr, newVal, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_exchange_u16(void /*uint16_t*/* _Nonnull addr, uint16_t newVal) { return __c11_atomic_exchange((_Atomic uint16_t*)addr, newVal, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_exchange_u32(void /*uint32_t*/* _Nonnull addr, uint32_t newVal) { return __c11_atomic_exchange((_Atomic uint32_t*)addr, newVal, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_exchange_u64(void /*uint64_t*/* _Nonnull addr, uint64_t newVal) { return __c11_atomic_exchange((_Atomic uint64_t*)addr, newVal, __ATOMIC_SEQ_CST); } // CAS returns the *old* value that was in the memory location before the // operation took place. // That is, if the return value when calling this function equals to 'oldVal', // then the operation succeeded, otherwise it was ignored. _EM_INLINE uint8_t emscripten_atomic_cas_u8(void /*uint8_t*/* _Nonnull addr, uint8_t oldVal, uint8_t newVal) { uint8_t expected = oldVal; __c11_atomic_compare_exchange_strong((_Atomic uint8_t*)addr, &expected, newVal, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); return expected; } _EM_INLINE uint16_t emscripten_atomic_cas_u16(void /*uint16_t*/* _Nonnull addr, uint16_t oldVal, uint16_t newVal) { uint16_t expected = oldVal; __c11_atomic_compare_exchange_strong((_Atomic uint16_t*)addr, &expected, newVal, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); return expected; } _EM_INLINE uint32_t emscripten_atomic_cas_u32(void /*uint32_t*/* _Nonnull addr, uint32_t oldVal, uint32_t newVal) { uint32_t expected = oldVal; __c11_atomic_compare_exchange_strong((_Atomic uint32_t*)addr, &expected, newVal, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); return expected; } _EM_INLINE uint64_t emscripten_atomic_cas_u64(void /*uint64_t*/* _Nonnull addr, uint64_t oldVal, uint64_t newVal) { uint64_t expected = oldVal; __c11_atomic_compare_exchange_strong((_Atomic uint64_t*)addr, &expected, newVal, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); return expected; } _EM_INLINE uint8_t emscripten_atomic_load_u8(const void /*uint8_t*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(uint8_t)*)addr, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_load_u16(const void /*uint16_t*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(uint16_t)*)addr, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_load_u32(const void /*uint32_t*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(uint32_t)*)addr, __ATOMIC_SEQ_CST); } _EM_INLINE float emscripten_atomic_load_f32(const void /*float*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(float)*)addr, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_load_u64(const void /*uint64_t*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(uint64_t)*)addr, __ATOMIC_SEQ_CST); } _EM_INLINE double emscripten_atomic_load_f64(const void /*double*/* _Nonnull addr) { return __c11_atomic_load((_Atomic(double)*)addr, __ATOMIC_SEQ_CST); } // Returns the value that was stored (i.e. 'val') _EM_INLINE uint8_t emscripten_atomic_store_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { __c11_atomic_store((_Atomic(uint8_t)*)addr, val, __ATOMIC_SEQ_CST); return val; } _EM_INLINE uint16_t emscripten_atomic_store_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { __c11_atomic_store((_Atomic(uint16_t)*)addr, val, __ATOMIC_SEQ_CST); return val; } _EM_INLINE uint32_t emscripten_atomic_store_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { __c11_atomic_store((_Atomic(uint32_t)*)addr, val, __ATOMIC_SEQ_CST); return val; } _EM_INLINE float emscripten_atomic_store_f32(void /*float*/* _Nonnull addr, float val) { __c11_atomic_store((_Atomic(float)*)addr, val, __ATOMIC_SEQ_CST); return val; } _EM_INLINE uint64_t emscripten_atomic_store_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { __c11_atomic_store((_Atomic(uint64_t)*)addr, val, __ATOMIC_SEQ_CST); return val; } _EM_INLINE double emscripten_atomic_store_f64(void /*double*/* _Nonnull addr, double val) { __c11_atomic_store((_Atomic(double)*)addr, val, __ATOMIC_SEQ_CST); return val; } // Each of the functions below (add, sub, and, or, xor) return the value that // was in the memory location before the operation occurred. _EM_INLINE uint8_t emscripten_atomic_add_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { return __c11_atomic_fetch_add((_Atomic uint8_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_add_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { return __c11_atomic_fetch_add((_Atomic uint16_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_add_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { return __c11_atomic_fetch_add((_Atomic uint32_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_add_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { return __c11_atomic_fetch_add((_Atomic uint64_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint8_t emscripten_atomic_sub_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { return __c11_atomic_fetch_sub((_Atomic uint8_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_sub_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { return __c11_atomic_fetch_sub((_Atomic uint16_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_sub_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { return __c11_atomic_fetch_sub((_Atomic uint32_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_sub_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { return __c11_atomic_fetch_sub((_Atomic uint64_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint8_t emscripten_atomic_and_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { return __c11_atomic_fetch_and((_Atomic uint8_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_and_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { return __c11_atomic_fetch_and((_Atomic uint16_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_and_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { return __c11_atomic_fetch_and((_Atomic uint32_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_and_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { return __c11_atomic_fetch_and((_Atomic uint64_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint8_t emscripten_atomic_or_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { return __c11_atomic_fetch_or((_Atomic uint8_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_or_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { return __c11_atomic_fetch_or((_Atomic uint16_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_or_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { return __c11_atomic_fetch_or((_Atomic uint32_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_or_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { return __c11_atomic_fetch_or((_Atomic uint64_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint8_t emscripten_atomic_xor_u8(void /*uint8_t*/* _Nonnull addr, uint8_t val) { return __c11_atomic_fetch_xor((_Atomic uint8_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint16_t emscripten_atomic_xor_u16(void /*uint16_t*/* _Nonnull addr, uint16_t val) { return __c11_atomic_fetch_xor((_Atomic uint16_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint32_t emscripten_atomic_xor_u32(void /*uint32_t*/* _Nonnull addr, uint32_t val) { return __c11_atomic_fetch_xor((_Atomic uint32_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE uint64_t emscripten_atomic_xor_u64(void /*uint64_t*/* _Nonnull addr, uint64_t val) { return __c11_atomic_fetch_xor((_Atomic uint64_t*)addr, val, __ATOMIC_SEQ_CST); } _EM_INLINE void emscripten_atomic_fence(void) { // Fake a fence with an arbitrary atomic operation uint8_t temp = 0; emscripten_atomic_or_u8(&temp, 0); } #define ATOMICS_WAIT_RESULT_T int // Numbering dictated by https://github.com/WebAssembly/threads/blob/master/proposals/threads/Overview.md#wait: // 0 => "ok", woken by another agent. // 1 => "not-equal", loaded value != expected value // 2 => "timed-out", the timeout expired #define ATOMICS_WAIT_OK 0 #define ATOMICS_WAIT_NOT_EQUAL 1 #define ATOMICS_WAIT_TIMED_OUT 2 #define ATOMICS_WAIT_DURATION_INFINITE -1ll // Issues the wasm 'memory.atomic.wait32' instruction: // If the given memory address contains value 'expectedValue', puts the calling // thread to sleep to wait for that address to be notified. // Returns one of the ATOMICS_WAIT_* return codes. // NOTE: This function takes in the wait value in int64_t nanosecond units. Pass // in maxWaitNanoseconds = -1 (or ATOMICS_WAIT_DURATION_INFINITE) to wait // infinitely long. // NOTE: This function is thin wrapper around the Wasm atomic.wait instruction // and therefore cannot be used on the main browser thread, or in Audio Worklets. // If you need a wait primitive that works everywhere you can use // `emscripten_futex_wait`. _EM_INLINE ATOMICS_WAIT_RESULT_T emscripten_atomic_wait_u32(void /*uint32_t*/* _Nonnull addr, uint32_t expectedValue, int64_t maxWaitNanoseconds) { return __builtin_wasm_memory_atomic_wait32((int32_t*)addr, expectedValue, maxWaitNanoseconds); } // Issues the wasm 'memory.atomic.wait64' instruction: // If the given memory address contains value 'expectedValue', puts the calling // thread to sleep to wait for that address to be notified. // Returns one of the ATOMICS_WAIT_* return codes. // NOTE: This function takes in the wait value in int64_t nanosecond units. Pass // in maxWaitNanoseconds = -1 (or ATOMICS_WAIT_DURATION_INFINITE) to wait // infinitely long. // NOTE: This function is thin wrapper around the Wasm atomic.wait instruction // and therefore cannot be used on the main browser thread, or in Audio Worklets. // If you need a wait primitive that works everywhere you can use // `emscripten_futex_wait`. _EM_INLINE ATOMICS_WAIT_RESULT_T emscripten_atomic_wait_u64(void /*uint64_t*/* _Nonnull addr, uint64_t expectedValue, int64_t maxWaitNanoseconds) { return __builtin_wasm_memory_atomic_wait64((int64_t*)addr, expectedValue, maxWaitNanoseconds); } #define EMSCRIPTEN_NOTIFY_ALL_WAITERS UINT32_MAX // Issues the wasm 'memory.atomic.notify' instruction: // Notifies the given number of threads waiting on a location. // Pass count == EMSCRIPTEN_NOTIFY_ALL_WAITERS to notify all waiters on the // given location. // Returns the number of threads that were woken up. // Note: this function is used to notify both waiters waiting on an u32 and u64 // addresses. _EM_INLINE int64_t emscripten_atomic_notify(void * _Nonnull addr, uint32_t count) { return __builtin_wasm_memory_atomic_notify((int*)addr, count); } #define EMSCRIPTEN_WAIT_ASYNC_INFINITY __builtin_inf() // Represents a pending 'Atomics.waitAsync' wait operation. #define ATOMICS_WAIT_TOKEN_T int32_t typedef void (*emscripten_async_wait_callback_t)(int32_t* address, uint32_t value, ATOMICS_WAIT_RESULT_T waitResult, void* userData); #define EMSCRIPTEN_IS_VALID_WAIT_TOKEN(token) ((token) <= 0) // Issues the JavaScript 'Atomics.waitAsync' instruction: // performs an asynchronous wait operation on the main thread. If the given // 'addr' contains 'value', issues a deferred wait that will invoke the // specified callback function 'asyncWaitFinished' once that address has been // notified by another thread. // NOTE: Unlike functions emscripten_atomic_wait_u32() and // emscripten_atomic_wait_u64() which take in the wait timeout parameter as int64 // nanosecond units, this function takes in the wait timeout parameter as double // millisecond units. See https://github.com/WebAssembly/threads/issues/175 for // more information. // Pass in maxWaitMilliseconds == EMSCRIPTEN_WAIT_ASYNC_INFINITY // (==__builtin_inf()) to wait infinitely long. // Returns one of: // - ATOMICS_WAIT_NOT_EQUAL if the waitAsync operation could not be registered // since the memory value did not contain the value 'value'. // - ATOMICS_WAIT_TIMED_OUT if the waitAsync operation timeout parameter was <= 0. // - Any other value: denotes a 'wait token' that can be passed to function // emscripten_atomic_cancel_wait_async() to unregister an asynchronous wait. // You can use the macro EMSCRIPTEN_IS_VALID_WAIT_TOKEN(retval) to check if // this function returned a valid wait token. ATOMICS_WAIT_TOKEN_T emscripten_atomic_wait_async(volatile void * _Nonnull addr, uint32_t value, emscripten_async_wait_callback_t _Nonnull asyncWaitFinished, void *userData, double maxWaitMilliseconds); // Unregisters a pending Atomics.waitAsync operation that was established via a // call to emscripten_atomic_wait_async() in the calling thread. Pass in the // wait token handle that was received as the return value from the wait // function. Returns EMSCRIPTEN_RESULT_SUCCESS if the cancellation was // successful, or EMSCRIPTEN_RESULT_INVALID_PARAM if the asynchronous wait has // already resolved prior and the callback has already been called. // NOTE: Because of needing to work around issue // https://github.com/WebAssembly/threads/issues/176, calling this function has // an effect of introducing spurious wakeups to any other threads waiting on the // same address that the async wait denoted by the token does. This means that // in order to safely use this function, the mechanisms used in any wait code on // that address must be written to be spurious wakeup safe. (this is the case // for all the synchronization primitives declared in this header, but if you // are rolling out your own, you need to be aware of this). If // https://github.com/tc39/proposal-cancellation/issues/29 is resolved, then the // spurious wakeups can be avoided. EMSCRIPTEN_RESULT emscripten_atomic_cancel_wait_async(ATOMICS_WAIT_TOKEN_T waitToken); // Cancels all pending async waits in the calling thread. Because of // https://github.com/WebAssembly/threads/issues/176, if you are using // asynchronous waits in your application, and need to be able to let GC reclaim // Wasm heap memory when deinitializing an application, you *must* call this // function to help the GC unpin all necessary memory. Otherwise, you can wrap // the Wasm content in an iframe and unload the iframe to let GC occur. // (navigating away from the page or closing that tab will also naturally // reclaim the memory) int emscripten_atomic_cancel_all_wait_asyncs(void); // Cancels all pending async waits in the calling thread to the given memory // address. Returns the number of async waits canceled. int emscripten_atomic_cancel_all_wait_asyncs_at_address(void * _Nonnull addr); // Like emscripten_atomic_wait_async, but suspends the current Wasm executation // using JSPI/ASYNCIFY. // This function is not available unless linking with -sJSPI or -sASYNCIFY. ATOMICS_WAIT_TOKEN_T emscripten_atomic_wait_suspending(volatile void * _Nonnull addr, uint32_t value, double maxWaitMilliseconds); // Returns the value of the expression "Atomics.isLockFree(byteWidth)": true if // the given memory access width can be accessed atomically, and false // otherwise. Generally will return true on 1, 2 and 4 byte accesses. On 8 byte // accesses, behavior differs across browsers, see // - https://bugzil.la/1246139 // - https://bugs.chromium.org/p/chromium/issues/detail?id=1167449 bool emscripten_atomics_is_lock_free(int byteWidth); #undef _EM_INLINE #ifdef __cplusplus } #endif PK!˷=2emscripten/cache/sysroot/include/emscripten/bind.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #if __cplusplus < 201703L #error "embind requires -std=c++17 or newer" #endif #include #include #include #include #include #include #include #include #include #include #include #if __has_feature(leak_sanitizer) || __has_feature(address_sanitizer) #include #endif namespace emscripten { enum class sharing_policy { NONE = 0, INTRUSIVE = 1, BY_EMVAL = 2, }; namespace internal { typedef int GenericEnumValue; typedef void* GenericFunction; typedef void (*VoidFunctionPtr)(void); // Implemented in JavaScript. Don't call these directly. extern "C" { void _embind_fatal_error( const char* name, const char* payload) __attribute__((__noreturn__)); void _embind_register_void( TYPEID voidType, const char* name); void _embind_register_bool( TYPEID boolType, const char* name, bool trueValue, bool falseValue); void _embind_register_integer( TYPEID integerType, const char* name, size_t size, int32_t minRange, uint32_t maxRange); void _embind_register_bigint( TYPEID integerType, const char* name, size_t size, int64_t minRange, uint64_t maxRange); void _embind_register_float( TYPEID floatType, const char* name, size_t size); void _embind_register_std_string( TYPEID stringType, const char* name); void _embind_register_std_wstring( TYPEID stringType, size_t charSize, const char* name); void _embind_register_emval( TYPEID emvalType); void _embind_register_memory_view( TYPEID memoryViewType, unsigned typedArrayIndex, const char* name); void _embind_register_function( const char* name, unsigned argCount, const TYPEID argTypes[], const char* signature, GenericFunction invoker, GenericFunction function, bool isAsync, bool isNonnullReturn); void _embind_register_value_array( TYPEID tupleType, const char* name, const char* constructorSignature, GenericFunction constructor, const char* destructorSignature, GenericFunction destructor); void _embind_register_value_array_element( TYPEID tupleType, TYPEID getterReturnType, const char* getterSignature, GenericFunction getter, void* getterContext, TYPEID setterArgumentType, const char* setterSignature, GenericFunction setter, void* setterContext); void _embind_finalize_value_array(TYPEID tupleType); void _embind_register_value_object( TYPEID structType, const char* fieldName, const char* constructorSignature, GenericFunction constructor, const char* destructorSignature, GenericFunction destructor); void _embind_register_value_object_field( TYPEID structType, const char* fieldName, TYPEID getterReturnType, const char* getterSignature, GenericFunction getter, void* getterContext, TYPEID setterArgumentType, const char* setterSignature, GenericFunction setter, void* setterContext); void _embind_finalize_value_object(TYPEID structType); void _embind_register_class( TYPEID classType, TYPEID pointerType, TYPEID constPointerType, TYPEID baseClassType, const char* getActualTypeSignature, GenericFunction getActualType, const char* upcastSignature, GenericFunction upcast, const char* downcastSignature, GenericFunction downcast, const char* className, const char* destructorSignature, GenericFunction destructor); void _embind_register_class_constructor( TYPEID classType, unsigned argCount, const TYPEID argTypes[], const char* invokerSignature, GenericFunction invoker, GenericFunction constructor); void _embind_register_class_function( TYPEID classType, const char* methodName, unsigned argCount, const TYPEID argTypes[], const char* invokerSignature, GenericFunction invoker, void* context, unsigned isPureVirtual, bool isAsync, bool isNonnullReturn); void _embind_register_class_property( TYPEID classType, const char* fieldName, TYPEID getterReturnType, const char* getterSignature, GenericFunction getter, void* getterContext, TYPEID setterArgumentType, const char* setterSignature, GenericFunction setter, void* setterContext); void _embind_register_class_class_function( TYPEID classType, const char* methodName, unsigned argCount, const TYPEID argTypes[], const char* invokerSignature, GenericFunction invoker, GenericFunction method, bool isAsync, bool isNonnullReturn); void _embind_register_class_class_property( TYPEID classType, const char* fieldName, TYPEID fieldType, const void* fieldContext, const char* getterSignature, GenericFunction getter, const char* setterSignature, GenericFunction setter); void _embind_register_iterable( TYPEID classType, TYPEID elementType, const char* sizeMethodName, const char* getMethodName); EM_VAL _embind_create_inheriting_constructor( const char* constructorName, TYPEID wrapperType, EM_VAL properties); void _embind_register_enum( TYPEID enumType, const char* name, size_t size, bool isSigned, int policyValue); void _embind_register_smart_ptr( TYPEID pointerType, TYPEID pointeeType, const char* pointerName, sharing_policy sharingPolicy, const char* getPointeeSignature, GenericFunction getPointee, const char* constructorSignature, GenericFunction constructor, const char* shareSignature, GenericFunction share, const char* destructorSignature, GenericFunction destructor); void _embind_register_enum_value( TYPEID enumType, const char* valueName, GenericEnumValue value); void _embind_register_constant( const char* name, TYPEID constantType, double value); void _embind_register_optional( TYPEID optionalType, TYPEID type); void _embind_register_user_type( TYPEID type, const char* typeName); void _embind_register_user_type_definition( TYPEID type, const char* typeName, const char* typeDefinition); // Register an InitFunc in the global linked list of init functions. void _embind_register_bindings(struct InitFunc* f); // Binding initialization functions registered by EMSCRIPTEN_BINDINGS macro // below. Stored as linked list of static data object avoiding std containers // to avoid static constructor ordering issues. struct InitFunc { InitFunc(void (*init_func)()) : init_func(init_func) { // This calls the function immediately upon construction, and also registers // it so that it can be called again on each worker that starts. init_func(); _embind_register_bindings(this); } void (*init_func)(); InitFunc* next = nullptr; }; } // end extern "C" } // end namespace internal //////////////////////////////////////////////////////////////////////////////// // select_overload and select_const //////////////////////////////////////////////////////////////////////////////// template Signature* select_overload(Signature* fn) { return fn; } template auto select_overload(Signature (ClassType::*fn)) -> decltype(fn) { return fn; } template auto select_const(ReturnType (ClassType::*method)(Args...) const) -> decltype(method) { return method; } namespace internal { // this should be in , but alas, it's not template struct remove_class; template struct remove_class { using type = R(A...); }; template struct remove_class { using type = R(A...); }; template struct remove_class { using type = R(A...); }; template struct remove_class { using type = R(A...); }; template using LambdaSignature = typename remove_class< decltype(&LambdaType::operator()) >::type; } // end namespace internal // requires captureless lambda because implicitly coerces to function pointer template internal::LambdaSignature* optional_override(const LambdaType& fp) { return fp; } //////////////////////////////////////////////////////////////////////////////// // Invoker //////////////////////////////////////////////////////////////////////////////// namespace internal { template struct Invoker { static typename internal::BindingType::WireType invoke( ReturnType (*fn)(Args...), typename internal::BindingType::WireType... args ) { return internal::BindingType::toWireType( fn(internal::BindingType::fromWireType(args)...), ReturnPolicy{} ); } }; template struct Invoker { static void invoke( void (*fn)(Args...), typename internal::BindingType::WireType... args ) { return fn( internal::BindingType::fromWireType(args)... ); } }; template struct FunctorInvoker { static typename internal::BindingType::WireType invoke( FunctorType& function, typename internal::BindingType::WireType... args ) { return internal::BindingType::toWireType( function( internal::BindingType::fromWireType(args)...) , ReturnPolicy{} ); } }; template struct FunctorInvoker { static void invoke( FunctorType& function, typename internal::BindingType::WireType... args ) { function( internal::BindingType::fromWireType(args)...); } }; } // end namespace internal //////////////////////////////////////////////////////////////////////////////// // SignatureCode, SignatureString //////////////////////////////////////////////////////////////////////////////// namespace internal { // TODO: this is a historical default, but we should probably use 'p' instead, // and only enable it for smart_ptr_trait<> descendants. template::value)> struct SignatureCode : __em_asm_sig {}; template struct SignatureCode::value)> : __em_asm_sig {}; template struct SignatureCode : SignatureCode {}; template<> struct SignatureCode { static constexpr char value = 'v'; }; template constexpr const char Signature[] = { SignatureCode::value..., 0 }; template constexpr const char* getSignature(Return (*)(Args...)) { return Signature; } } // end namespace internal //////////////////////////////////////////////////////////////////////////////// // FUNCTIONS //////////////////////////////////////////////////////////////////////////////// template void function(const char* name, ReturnType (*fn)(Args...), Policies...) { using namespace internal; typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = Invoker::invoke; _embind_register_function( name, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(fn), isAsync::value, isNonnullReturn::value); } namespace internal { template ClassType* operator_new(Args&&... args) { return new ClassType(std::forward(args)...); } template WrapperType wrapped_new(Args&&... args) { return WrapperType(new ClassType(std::forward(args)...)); } template ClassType* raw_constructor( typename internal::BindingType::WireType... args ) { return new ClassType( internal::BindingType::fromWireType(args)... ); } template void raw_destructor(ClassType* ptr) { delete ptr; } template struct FunctionInvoker { static typename internal::BindingType::WireType invoke( FunctionPointerType* function, typename internal::BindingType::WireType wireThis, typename internal::BindingType::WireType... args ) { return internal::BindingType::toWireType( (*function)( internal::BindingType::fromWireType(wireThis), internal::BindingType::fromWireType(args)...), ReturnPolicy{} ); } }; template struct FunctionInvoker { static void invoke( FunctionPointerType* function, typename internal::BindingType::WireType wireThis, typename internal::BindingType::WireType... args ) { (*function)( internal::BindingType::fromWireType(wireThis), internal::BindingType::fromWireType(args)...); } }; template struct MethodInvoker { static typename internal::BindingType::WireType invoke( const MemberPointer& method, typename internal::BindingType::WireType wireThis, typename internal::BindingType::WireType... args ) { return internal::BindingType::toWireType( (internal::BindingType::fromWireType(wireThis)->*method)( internal::BindingType::fromWireType(args)... ) , ReturnPolicy{} ); } }; template struct MethodInvoker { static void invoke( const MemberPointer& method, typename internal::BindingType::WireType wireThis, typename internal::BindingType::WireType... args ) { return (internal::BindingType::fromWireType(wireThis)->*method)( internal::BindingType::fromWireType(args)... ); } }; template struct MemberAccess { typedef MemberType InstanceType::*MemberPointer; typedef internal::BindingType MemberBinding; typedef typename MemberBinding::WireType WireType; template static WireType getWire( const MemberPointer& field, ClassType& ptr ) { return MemberBinding::toWireType(ptr.*field, ReturnPolicy{}); } template static void setWire( const MemberPointer& field, ClassType& ptr, WireType value ) { ptr.*field = MemberBinding::fromWireType(value); } }; template struct GlobalAccess { typedef internal::BindingType MemberBinding; typedef typename MemberBinding::WireType WireType; static WireType get(FieldType* context) { return MemberBinding::toWireType(*context, rvp::default_tag{}); } static void set(FieldType* context, WireType value) { *context = MemberBinding::fromWireType(value); } }; // TODO: This could do a reinterpret-cast if sizeof(T) === sizeof(void*) template inline T* getContext(const T& t) { // not a leak because this is called once per binding auto* ret = new T(t); #if __has_feature(leak_sanitizer) || __has_feature(address_sanitizer) __lsan_ignore_object(ret); #endif return ret; } template struct FunctionTag {}; template struct GetterPolicy; template struct GetterPolicy { typedef GetterReturnType ReturnType; typedef GetterReturnType (GetterThisType::*Context)() const; typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static WireType get(const Context& context, const ClassType& ptr) { return Binding::toWireType((ptr.*context)(), ReturnPolicy{}); } static void* getContext(Context context) { return internal::getContext(context); } }; #ifdef __cpp_noexcept_function_type template struct GetterPolicy : GetterPolicy {}; #endif template struct GetterPolicy { typedef GetterReturnType ReturnType; typedef GetterReturnType (*Context)(const GetterThisType&); typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static WireType get(const Context& context, const ClassType& ptr) { return Binding::toWireType(context(ptr), ReturnPolicy{}); } static void* getContext(Context context) { return internal::getContext(context); } }; template struct GetterPolicy> { typedef GetterReturnType ReturnType; typedef std::function Context; typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static WireType get(const Context& context, const ClassType& ptr) { return Binding::toWireType(context(ptr), ReturnPolicy{}); } static void* getContext(const Context& context) { return internal::getContext(context); } }; template struct GetterPolicy> { typedef GetterReturnType ReturnType; typedef Getter Context; typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static WireType get(const Context& context, const ClassType& ptr) { return Binding::toWireType(context(ptr), ReturnPolicy{}); } static void* getContext(const Context& context) { return internal::getContext(context); } }; template struct SetterPolicy; template struct SetterPolicy { typedef SetterArgumentType ArgumentType; typedef SetterReturnType (SetterThisType::*Context)(SetterArgumentType); typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static void set(const Context& context, ClassType& ptr, WireType wt) { (ptr.*context)(Binding::fromWireType(wt)); } static void* getContext(Context context) { return internal::getContext(context); } }; #ifdef __cpp_noexcept_function_type template struct SetterPolicy : SetterPolicy {}; #endif template struct SetterPolicy { typedef SetterArgumentType ArgumentType; typedef SetterReturnType (*Context)(SetterThisType&, SetterArgumentType); typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static void set(const Context& context, ClassType& ptr, WireType wt) { context(ptr, Binding::fromWireType(wt)); } static void* getContext(Context context) { return internal::getContext(context); } }; template struct SetterPolicy> { typedef SetterArgumentType ArgumentType; typedef std::function Context; typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static void set(const Context& context, ClassType& ptr, WireType wt) { context(ptr, Binding::fromWireType(wt)); } static void* getContext(const Context& context) { return internal::getContext(context); } }; template struct SetterPolicy> { typedef SetterArgumentType ArgumentType; typedef Setter Context; typedef internal::BindingType Binding; typedef typename Binding::WireType WireType; template static void set(const Context& context, ClassType& ptr, WireType wt) { context(ptr, Binding::fromWireType(wt)); } static void* getContext(const Context& context) { return internal::getContext(context); } }; class noncopyable { protected: noncopyable() {} ~noncopyable() {} private: noncopyable(const noncopyable&) = delete; const noncopyable& operator=(const noncopyable&) = delete; }; template typename BindingType::WireType get_by_index(int index, ClassType& ptr) { return BindingType::toWireType(ptr[index], rvp::default_tag{}); } template void set_by_index(int index, ClassType& ptr, typename BindingType::WireType wt) { ptr[index] = BindingType::fromWireType(wt); } } // end namespace internal template struct index { }; //////////////////////////////////////////////////////////////////////////////// // VALUE TUPLES //////////////////////////////////////////////////////////////////////////////// template class value_array : public internal::noncopyable { public: typedef ClassType class_type; value_array(const char* name) { using namespace internal; auto constructor = &raw_constructor; auto destructor = &raw_destructor; _embind_register_value_array( TypeID::get(), name, getSignature(constructor), reinterpret_cast(constructor), getSignature(destructor), reinterpret_cast(destructor)); } ~value_array() { using namespace internal; _embind_finalize_value_array(TypeID::get()); } template value_array& element(ElementType InstanceType::*field) { using namespace internal; auto getter = &MemberAccess ::template getWire; auto setter = &MemberAccess ::template setWire; _embind_register_value_array_element( TypeID::get(), TypeID::get(), getSignature(getter), reinterpret_cast(getter), getContext(field), TypeID::get(), getSignature(setter), reinterpret_cast(setter), getContext(field)); return *this; } template value_array& element(Getter getter, Setter setter) { using namespace internal; typedef GetterPolicy GP; typedef SetterPolicy SP; auto g = &GP::template get; auto s = &SP::template set; _embind_register_value_array_element( TypeID::get(), TypeID::get(), getSignature(g), reinterpret_cast(g), GP::getContext(getter), TypeID::get(), getSignature(s), reinterpret_cast(s), SP::getContext(setter)); return *this; } template value_array& element(index) { using namespace internal; ClassType* null = 0; typedef typename std::remove_reference::type ElementType; auto getter = &internal::get_by_index; auto setter = &internal::set_by_index; _embind_register_value_array_element( TypeID::get(), TypeID::get(), getSignature(getter), reinterpret_cast(getter), reinterpret_cast(Index), TypeID::get(), getSignature(setter), reinterpret_cast(setter), reinterpret_cast(Index)); return *this; } }; //////////////////////////////////////////////////////////////////////////////// // VALUE STRUCTS //////////////////////////////////////////////////////////////////////////////// template class value_object : public internal::noncopyable { public: typedef ClassType class_type; value_object(const char* name) { using namespace internal; auto ctor = &raw_constructor; auto dtor = &raw_destructor; _embind_register_value_object( TypeID::get(), name, getSignature(ctor), reinterpret_cast(ctor), getSignature(dtor), reinterpret_cast(dtor)); } ~value_object() { using namespace internal; _embind_finalize_value_object(internal::TypeID::get()); } template value_object& field(const char* fieldName, FieldType InstanceType::*field) { using namespace internal; auto getter = &MemberAccess ::template getWire; auto setter = &MemberAccess ::template setWire; _embind_register_value_object_field( TypeID::get(), fieldName, TypeID::get(), getSignature(getter), reinterpret_cast(getter), getContext(field), TypeID::get(), getSignature(setter), reinterpret_cast(setter), getContext(field)); return *this; } template value_object& field(const char* fieldName, ElementType (InstanceType::*field)[N]) { using namespace internal; typedef std::array FieldType; static_assert(sizeof(FieldType) == sizeof(ElementType[N])); auto getter = &MemberAccess ::template getWire; auto setter = &MemberAccess ::template setWire; _embind_register_value_object_field( TypeID::get(), fieldName, TypeID::get(), getSignature(getter), reinterpret_cast(getter), getContext(field), TypeID::get(), getSignature(setter), reinterpret_cast(setter), getContext(field)); return *this; } template value_object& field( const char* fieldName, Getter getter, Setter setter ) { using namespace internal; typedef GetterPolicy GP; typedef SetterPolicy SP; auto g = &GP::template get; auto s = &SP::template set; _embind_register_value_object_field( TypeID::get(), fieldName, TypeID::get(), getSignature(g), reinterpret_cast(g), GP::getContext(getter), TypeID::get(), getSignature(s), reinterpret_cast(s), SP::getContext(setter)); return *this; } template value_object& field(const char* fieldName, index) { using namespace internal; ClassType* null = 0; typedef typename std::remove_reference::type ElementType; auto getter = &internal::get_by_index; auto setter = &internal::set_by_index; _embind_register_value_object_field( TypeID::get(), fieldName, TypeID::get(), getSignature(getter), reinterpret_cast(getter), reinterpret_cast(Index), TypeID::get(), getSignature(setter), reinterpret_cast(setter), reinterpret_cast(Index)); return *this; } }; //////////////////////////////////////////////////////////////////////////////// // SMART POINTERS //////////////////////////////////////////////////////////////////////////////// template struct default_smart_ptr_trait { static sharing_policy get_sharing_policy() { return sharing_policy::NONE; } static void* share(void* v) { return 0; // no sharing } static PointerType* construct_null() { return new PointerType; } }; // specialize if you have a different pointer type template struct smart_ptr_trait : public default_smart_ptr_trait { typedef typename PointerType::element_type element_type; static element_type* get(const PointerType& ptr) { return ptr.get(); } }; template struct smart_ptr_trait> { typedef std::shared_ptr PointerType; typedef typename PointerType::element_type element_type; static element_type* get(const PointerType& ptr) { return ptr.get(); } static sharing_policy get_sharing_policy() { return sharing_policy::BY_EMVAL; } static std::shared_ptr* share(PointeeType* p, EM_VAL v) { return new std::shared_ptr( p, val_deleter(val::take_ownership(v))); } static PointerType* construct_null() { return new PointerType; } private: class val_deleter { public: val_deleter() = delete; explicit val_deleter(val v) : v(v) {} void operator()(void const*) { v(); // eventually we'll need to support emptied out val v = val::undefined(); } private: val v; }; }; //////////////////////////////////////////////////////////////////////////////// // CLASSES //////////////////////////////////////////////////////////////////////////////// namespace internal { class WrapperBase { public: void setNotifyJSOnDestruction(bool notify) { notifyJSOnDestruction = notify; } protected: bool notifyJSOnDestruction = false; }; } // end namespace internal // abstract classes template class wrapper : public T, public internal::WrapperBase { public: typedef T class_type; template explicit wrapper(val&& wrapped, Args&&... args) : T(std::forward(args)...) , wrapped(std::forward(wrapped)) {} ~wrapper() { if (notifyJSOnDestruction) { call("__destruct"); } } template ReturnType call(const char* name, Args&&... args) const { return wrapped.call(name, std::forward(args)...); } private: val wrapped; }; #define EMSCRIPTEN_WRAPPER(T) \ template \ T(::emscripten::val&& v, Args&&... args) \ : wrapper(std::forward<::emscripten::val>(v), std::forward(args)...) \ {} namespace internal { struct NoBaseClass { template static void verify() { } static TYPEID get() { return nullptr; } template static VoidFunctionPtr getUpcaster() { return nullptr; } template static VoidFunctionPtr getDowncaster() { return nullptr; } }; // NOTE: this returns the class type, not the pointer type template inline TYPEID getActualType(T* ptr) { return getLightTypeID(*ptr); }; } // end namespace internal template struct base { typedef BaseClass class_type; template static void verify() { static_assert(!std::is_same::value, "Base must not have same type as class"); static_assert(std::is_base_of::value, "Derived class must derive from base"); } static internal::TYPEID get() { return internal::TypeID::get(); } template using Upcaster = BaseClass* (*)(ClassType*); template using Downcaster = ClassType* (*)(BaseClass*); template static Upcaster getUpcaster() { return &convertPointer; } template static Downcaster getDowncaster() { return &convertPointer; } template static To* convertPointer(From* ptr) { return static_cast(ptr); } }; namespace internal { template val wrapped_extend(const std::string& name, const val& properties) { return val::take_ownership(_embind_create_inheriting_constructor( name.c_str(), TypeID::get(), properties.as_handle())); } } // end namespace internal namespace internal { template struct isPureVirtual; template struct isPureVirtual { static constexpr bool value = true; }; template struct isPureVirtual { static constexpr bool value = isPureVirtual::value; }; template<> struct isPureVirtual<> { static constexpr bool value = false; }; struct DeduceArgumentsTag {}; //////////////////////////////////////////////////////////////////////////// // RegisterClassConstructor //////////////////////////////////////////////////////////////////////////// template struct RegisterClassConstructor; template struct RegisterClassConstructor { template static void invoke(ReturnType (*factory)(Args...)) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = rvp::take_ownership; auto invoke = &Invoker::invoke; _embind_register_class_constructor( TypeID::get(), args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(factory)); } }; template struct RegisterClassConstructor> { template static void invoke(std::function factory) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = rvp::take_ownership; auto invoke = &FunctorInvoker::invoke; _embind_register_class_constructor( TypeID::get(), args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(getContext(factory))); } }; template struct RegisterClassConstructor> { template static void invoke(Callable& factory) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = rvp::take_ownership; auto invoke = &FunctorInvoker::invoke; _embind_register_class_constructor( TypeID::get(), args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(getContext(factory))); } }; //////////////////////////////////////////////////////////////////////////// // RegisterClassMethod //////////////////////////////////////////////////////////////////////////// template struct RegisterClassMethod; template struct RegisterClassMethod { template static void invoke(const char* methodName, ReturnType (ClassType::*memberFunction)(Args...)) { using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = MethodInvoker::invoke; typename WithPolicies::template ArgTypeList, Args...> args; _embind_register_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), getContext(memberFunction), isPureVirtual::value, isAsync::value, isNonnullReturn::value); } }; #ifdef __cpp_noexcept_function_type template struct RegisterClassMethod : RegisterClassMethod {}; #endif template struct RegisterClassMethod { template static void invoke(const char* methodName, ReturnType (ClassType::*memberFunction)(Args...) const) { using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = MethodInvoker::invoke; typename WithPolicies::template ArgTypeList, Args...> args; _embind_register_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), getContext(memberFunction), isPureVirtual::value, isAsync::value, isNonnullReturn::value); } }; #ifdef __cpp_noexcept_function_type template struct RegisterClassMethod : RegisterClassMethod {}; #endif template struct RegisterClassMethod { template static void invoke(const char* methodName, ReturnType (*function)(ThisType, Args...)) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = FunctionInvoker::invoke; _embind_register_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), getContext(function), false, isAsync::value, isNonnullReturn::value); } }; #ifdef __cpp_noexcept_function_type template struct RegisterClassMethod : RegisterClassMethod {}; #endif template struct RegisterClassMethod> { template static void invoke(const char* methodName, std::function function) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = FunctorInvoker::invoke; _embind_register_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), getContext(function), false, isAsync::value, isNonnullReturn::value); } }; template struct RegisterClassMethod> { template static void invoke(const char* methodName, Callable& callable) { typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = FunctorInvoker::invoke; _embind_register_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), getContext(callable), false, isAsync::value, isNonnullReturn::value); } }; // Helper structs for shifting argument indices when a policy is applied. template struct ShiftSlot { using type = Slot; }; template struct ShiftSlot> { using type = arg; }; template struct ShiftPolicy { using type = Policy; }; template struct ShiftPolicy> { using type = allow_raw_pointer::type>; }; template struct ShiftPolicy> { using type = nonnull::type>; }; } // end namespace internal template struct constructor { }; template class class_ { public: typedef ClassType class_type; typedef BaseSpecifier base_specifier; class_() = delete; EMSCRIPTEN_ALWAYS_INLINE explicit class_(const char* name) { using namespace internal; BaseSpecifier::template verify(); auto _getActualType = &getActualType; auto upcast = BaseSpecifier::template getUpcaster(); auto downcast = BaseSpecifier::template getDowncaster(); auto destructor = &raw_destructor; _embind_register_class( TypeID::get(), TypeID>::get(), TypeID>::get(), BaseSpecifier::get(), getSignature(_getActualType), reinterpret_cast(_getActualType), getSignature(upcast), reinterpret_cast(upcast), getSignature(downcast), reinterpret_cast(downcast), name, getSignature(destructor), reinterpret_cast(destructor)); } template EMSCRIPTEN_ALWAYS_INLINE const class_& smart_ptr(const char* name) const { using namespace internal; typedef smart_ptr_trait PointerTrait; typedef typename PointerTrait::element_type PointeeType; static_assert(std::is_same::type>::value, "smart pointer must point to this class"); auto get = &PointerTrait::get; auto construct_null = &PointerTrait::construct_null; auto share = &PointerTrait::share; auto destructor = &raw_destructor; _embind_register_smart_ptr( TypeID::get(), TypeID::get(), name, PointerTrait::get_sharing_policy(), getSignature(get), reinterpret_cast(get), getSignature(construct_null), reinterpret_cast(construct_null), getSignature(share), reinterpret_cast(share), getSignature(destructor), reinterpret_cast(destructor)); return *this; }; template EMSCRIPTEN_ALWAYS_INLINE const class_& constructor(Policies... policies) const { return constructor( &internal::operator_new, policies...); } template EMSCRIPTEN_ALWAYS_INLINE const class_& constructor(Callable callable, Policies...) const { using invoker = internal::RegisterClassConstructor< typename std::conditional::value, Callable, internal::FunctionTag>::type>; invoker::template invoke(callable); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& smart_ptr_constructor(const char* smartPtrName, SmartPtr (*factory)(Args...), Policies...) const { using namespace internal; smart_ptr(smartPtrName); typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = &Invoker::invoke; _embind_register_class_constructor( TypeID::get(), args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(factory)); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& allow_subclass( const char* wrapperClassName, ::emscripten::constructor = ::emscripten::constructor<>(), Policies... policies ) const { using namespace internal; auto cls = class_>(wrapperClassName) .function("notifyOnDestruction", select_overload([](WrapperType& wrapper) { wrapper.setNotifyJSOnDestruction(true); })) ; return class_function( "implement", &wrapped_new, allow_raw_pointer(), nonnull(), typename ShiftPolicy::type()...) .class_function( "extend", &wrapped_extend) ; } template EMSCRIPTEN_ALWAYS_INLINE const class_& allow_subclass( const char* wrapperClassName, const char* pointerName, ::emscripten::constructor = ::emscripten::constructor<>(), Policies... policies ) const { using namespace internal; auto cls = class_>(wrapperClassName) .function("notifyOnDestruction", select_overload([](WrapperType& wrapper) { wrapper.setNotifyJSOnDestruction(true); })) .template smart_ptr(pointerName) ; return class_function( "implement", &wrapped_new, allow_raw_pointer(), typename ShiftPolicy::type()...) .class_function( "extend", &wrapped_extend) ; } template EMSCRIPTEN_ALWAYS_INLINE const class_& function(const char* methodName, Callable callable, Policies...) const { using invoker = internal::RegisterClassMethod< typename std::conditional::value, Callable, internal::FunctionTag>::type>; invoker::template invoke(methodName, callable); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& iterable( const char* sizeMethodName, const char* getMethodName) const { using namespace internal; _embind_register_iterable( TypeID::get(), TypeID::get(), sizeMethodName, getMethodName); return *this; } template< typename FieldType, typename... Policies, // Prevent the template from wrongly matching the getter function // overload. typename = typename std::enable_if< !std::is_function::value && std::conjunction...>::value>::type> EMSCRIPTEN_ALWAYS_INLINE const class_& property(const char* fieldName, const FieldType ClassType::*field, Policies...) const { using namespace internal; using ReturnPolicy = typename GetReturnValuePolicy::tag; typename WithPolicies::template ArgTypeList returnType; auto getter = &MemberAccess::template getWire; _embind_register_class_property( TypeID::get(), fieldName, returnType.getTypes()[0], getSignature(getter), reinterpret_cast(getter), getContext(field), 0, 0, 0, 0); return *this; } template< typename FieldType, typename... Policies, // Prevent the template from wrongly matching the getter function // overload. typename = typename std::enable_if< !std::is_function::value && std::conjunction...>::value>::type> EMSCRIPTEN_ALWAYS_INLINE const class_& property(const char* fieldName, FieldType ClassType::*field, Policies...) const { using namespace internal; using ReturnPolicy = typename GetReturnValuePolicy::tag; typename WithPolicies::template ArgTypeList returnType; auto getter = &MemberAccess::template getWire; auto setter = &MemberAccess::template setWire; _embind_register_class_property( TypeID::get(), fieldName, returnType.getTypes()[0], getSignature(getter), reinterpret_cast(getter), getContext(field), returnType.getTypes()[0], getSignature(setter), reinterpret_cast(setter), getContext(field)); return *this; } template< typename PropertyType = internal::DeduceArgumentsTag, typename Getter, typename... Policies, // Prevent the template from wrongly matching the getter/setter overload // of this function. typename = typename std::enable_if< std::conjunction...>::value>::type> EMSCRIPTEN_ALWAYS_INLINE const class_& property(const char* fieldName, Getter getter, Policies...) const { using namespace internal; typedef GetterPolicy< typename std::conditional::value, Getter, FunctionTag>::type> GP; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto gter = &GP::template get; typename WithPolicies::template ArgTypeList returnType; _embind_register_class_property( TypeID::get(), fieldName, returnType.getTypes()[0], getSignature(gter), reinterpret_cast(gter), GP::getContext(getter), 0, 0, 0, 0); return *this; } template< typename PropertyType = internal::DeduceArgumentsTag, typename Getter, typename Setter, typename... Policies, // Similar to the other variadic property overloads this can greedily // match the wrong overload so we need to ensure the setter is not a // policy argument. typename = typename std::enable_if::value>::type> EMSCRIPTEN_ALWAYS_INLINE const class_& property(const char* fieldName, Getter getter, Setter setter, Policies...) const { using namespace internal; typedef GetterPolicy< typename std::conditional::value, Getter, FunctionTag>::type> GP; typedef SetterPolicy< typename std::conditional::value, Setter, FunctionTag>::type> SP; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto gter = &GP::template get; auto ster = &SP::template set; typename WithPolicies::template ArgTypeList returnType; // XXX: This currently applies all the policies (including return value policies) to the // setter function argument to allow pointers. Using return value policies doesn't really // make sense on an argument, but we don't have separate argument policies yet. typename WithPolicies::template ArgTypeList argType; _embind_register_class_property( TypeID::get(), fieldName, returnType.getTypes()[0], getSignature(gter), reinterpret_cast(gter), GP::getContext(getter), argType.getTypes()[0], getSignature(ster), reinterpret_cast(ster), SP::getContext(setter)); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& class_function(const char* methodName, ReturnType (*classMethod)(Args...), Policies...) const { using namespace internal; typename WithPolicies::template ArgTypeList args; using ReturnPolicy = typename GetReturnValuePolicy::tag; auto invoke = internal::Invoker::invoke; _embind_register_class_class_function( TypeID::get(), methodName, args.getCount(), args.getTypes(), getSignature(invoke), reinterpret_cast(invoke), reinterpret_cast(classMethod), isAsync::value, isNonnullReturn::value); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& class_property(const char* name, const FieldType* field) const { using namespace internal; auto getter = &GlobalAccess::get; _embind_register_class_class_property( TypeID::get(), name, TypeID::get(), field, getSignature(getter), reinterpret_cast(getter), 0, 0); return *this; } template EMSCRIPTEN_ALWAYS_INLINE const class_& class_property(const char* name, FieldType* field) const { using namespace internal; auto getter = &GlobalAccess::get; auto setter = &GlobalAccess::set; _embind_register_class_class_property( TypeID::get(), name, TypeID::get(), field, getSignature(getter), reinterpret_cast(getter), getSignature(setter), reinterpret_cast(setter)); return *this; } }; template void register_optional() { // Optional types are automatically registered for some internal types so // only run the register method once so we don't conflict with a user's // bindings if they also register the optional type. thread_local bool hasRun; if (hasRun) { return; } hasRun = true; internal::_embind_register_optional( internal::TypeID>::get(), internal::TypeID::type>::get()); } //////////////////////////////////////////////////////////////////////////////// // VECTORS //////////////////////////////////////////////////////////////////////////////// namespace internal { template struct VectorAccess { static std::optional get( const VectorType& v, unsigned int index ) { if (index < v.size()) { return v[index]; } else { return {}; } } static bool set( VectorType& v, unsigned int index, const typename VectorType::value_type& value ) { v[index] = value; return true; } static unsigned int size(const VectorType& v) { return v.size(); } static void resize( VectorType& v, unsigned int len, const typename VectorType::value_type& value ) { v.resize(len, value); } static void push_back( VectorType& v, typename VectorType::value_type&& value ) { v.push_back(std::move(value)); } }; } // end namespace internal template> class_> register_vector(const char* name) { typedef std::vector VecType; register_optional(); using VectorElementType = typename internal::RawPointerTransformer::value>::type; return class_(name) .template constructor<>() .function("push_back", internal::VectorAccess::push_back, allow_raw_pointers()) .function("resize", internal::VectorAccess::resize, allow_raw_pointers()) .function("size", internal::VectorAccess::size, allow_raw_pointers()) .function("get", internal::VectorAccess::get, allow_raw_pointers()) .function("set", internal::VectorAccess::set, allow_raw_pointers()) .template iterable("size", "get"); } //////////////////////////////////////////////////////////////////////////////// // MAPS //////////////////////////////////////////////////////////////////////////////// namespace internal { template struct MapAccess { static std::optional get( const MapType& m, const typename MapType::key_type& k ) { auto i = m.find(k); if (i == m.end()) { return {}; } else { return i->second; } } static void set( MapType& m, const typename MapType::key_type& k, const typename MapType::mapped_type& v ) { m[k] = v; } static std::vector keys( const MapType& m ) { std::vector keys; keys.reserve(m.size()); for (const auto& pair : m) { keys.push_back(pair.first); } return keys; } static unsigned int size(const MapType& m) { return m.size(); } }; } // end namespace internal template, class Allocator = std::allocator>> class_> register_map(const char* name) { typedef std::map MapType; register_optional(); return class_(name) .template constructor<>() .function("size", internal::MapAccess::size) .function("get", internal::MapAccess::get) .function("set", internal::MapAccess::set) .function("keys", internal::MapAccess::keys) ; } //////////////////////////////////////////////////////////////////////////////// // ENUMS //////////////////////////////////////////////////////////////////////////////// template class enum_ { public: typedef EnumType enum_type; enum_(const char* name, enum_value_type valueType = enum_value_type::object) { using namespace internal; _embind_register_enum( internal::TypeID::get(), name, sizeof(EnumType), std::is_signed::type>::value, static_cast(valueType)); } enum_& value(const char* name, EnumType value) { using namespace internal; // TODO: there's still an issue here. // if EnumType is an unsigned long, then JS may receive it as a signed long static_assert(sizeof(value) <= sizeof(internal::GenericEnumValue), "enum type must fit in a GenericEnumValue"); _embind_register_enum_value( internal::TypeID::get(), name, static_cast(value)); return *this; } }; //////////////////////////////////////////////////////////////////////////////// // CONSTANTS //////////////////////////////////////////////////////////////////////////////// namespace internal { template double asGenericValue(T t) { return static_cast(t); } template uintptr_t asGenericValue(T* p) { return reinterpret_cast(p); } } template void constant(const char* name, const ConstantType& v) { using namespace internal; typedef BindingType BT; _embind_register_constant( name, TypeID::get(), static_cast(asGenericValue(BT::toWireType(v, rvp::default_tag{})))); } template inline void register_type(const char* name) { using namespace internal; _embind_register_user_type(TypeID::get(), name); } template inline void register_type(const char* name, const char* definition) { using namespace internal; _embind_register_user_type_definition(TypeID::get(), name, definition); } // EMSCRIPTEN_BINDINGS creates a static struct to initialize the binding which // will get included in the program if the translation unit in which it is // defined gets linked into the program. Using a C++ constructor here ensures it // occurs after any other C++ constructors in this file, which is not true for // __attribute__((constructor)) (they run before C++ constructors in the same // file). #define EMSCRIPTEN_BINDINGS(name) \ static void embind_init_##name(); \ static struct EmBindInit_##name : emscripten::internal::InitFunc { \ EmBindInit_##name() : InitFunc(embind_init_##name) {} \ } EmBindInit_##name##_instance; \ static void embind_init_##name() } // end namespace emscripten PK!Z Z 5emscripten/cache/sysroot/include/emscripten/console.h/* * Copyright 2021 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #include // for size_t #ifdef __cplusplus extern "C" { #endif // Write directly to the JavaScript console. This can be useful for debugging since it // bypasses the stdio and filesystem sub-systems. void emscripten_console_log(const char * _Nonnull utf8String); void emscripten_console_warn(const char * _Nonnull utf8String); void emscripten_console_error(const char * _Nonnull utf8String); void emscripten_console_trace(const char * _Nonnull utf8String); // Write to the out(), err() and dbg() JS functions directly. // These are defined in shell.js and have different behavior compared // to console.log/err. Under node, they write to stdout and stderr which is a // more direct way to write output especially from worker threads. The default // behavior of these functions can be overridden by print and printErr, if // provided on the Module object. These functions are mainly intended for // internal use. void emscripten_out(const char * _Nonnull utf8String); void emscripten_err(const char * _Nonnull utf8String); void emscripten_dbg(const char * _Nonnull utf8String); void emscripten_dbg_backtrace(const char * _Nonnull utf8String); // Same as above but only with the length of string specified by the second // argument. This allows for non-NULL-terminated strings to be passed. void emscripten_outn(const char * _Nonnull utf8String, size_t len); void emscripten_errn(const char * _Nonnull utf8String, size_t len); void emscripten_dbgn(const char * _Nonnull utf8String, size_t len); // Legacy/internal names for the above #define _emscripten_out(x) emscripten_out(x) #define _emscripten_err(x) emscripten_err(x) #define _emscripten_dbg(x) emscripten_dbg(x) // Similar to the above functions but operate with printf-like semantics. void emscripten_console_logf(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); void emscripten_console_warnf(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); void emscripten_console_errorf(const char * _Nonnull format, ...)__attribute__((__format__(printf, 1, 2))); void emscripten_console_tracef(const char * _Nonnull format, ...)__attribute__((__format__(printf, 1, 2))); void emscripten_outf(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); void emscripten_errf(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); void emscripten_dbgf(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); void emscripten_dbg_backtracef(const char * _Nonnull format, ...) __attribute__((__format__(printf, 1, 2))); // Legacy/internal names for the above #define _emscripten_outf(format, ...) emscripten_outf(format, ##__VA_ARGS__) #define _emscripten_errf(format, ...) emscripten_errf(format, ##__VA_ARGS__) #define _emscripten_dbgf(format, ...) emscripten_dbgf(format, ##__VA_ARGS__) #ifdef __cplusplus } #endif PK!§..:emscripten/cache/sysroot/include/emscripten/dom_pk_codes.h/* * Copyright 2018 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. * * This file was automatically generated from script * tools/maint/create_dom_pk_codes.py. Edit that file to make changes here. * Then run: * * tools/maint/create_dom_pk_codes.py * * in Emscripten root directory to regenerate this file. */ #pragma once #define DOM_PK_CODE_TYPE int #define DOM_PK_UNKNOWN 0x0000 /* "Unidentified" */ #define DOM_PK_ESCAPE 0x0001 /* "Escape" */ #define DOM_PK_0 0x0002 /* "Digit0" */ #define DOM_PK_1 0x0003 /* "Digit1" */ #define DOM_PK_2 0x0004 /* "Digit2" */ #define DOM_PK_3 0x0005 /* "Digit3" */ #define DOM_PK_4 0x0006 /* "Digit4" */ #define DOM_PK_5 0x0007 /* "Digit5" */ #define DOM_PK_6 0x0008 /* "Digit6" */ #define DOM_PK_7 0x0009 /* "Digit7" */ #define DOM_PK_8 0x000A /* "Digit8" */ #define DOM_PK_9 0x000B /* "Digit9" */ #define DOM_PK_MINUS 0x000C /* "Minus" */ #define DOM_PK_EQUAL 0x000D /* "Equal" */ #define DOM_PK_BACKSPACE 0x000E /* "Backspace" */ #define DOM_PK_TAB 0x000F /* "Tab" */ #define DOM_PK_Q 0x0010 /* "KeyQ" */ #define DOM_PK_W 0x0011 /* "KeyW" */ #define DOM_PK_E 0x0012 /* "KeyE" */ #define DOM_PK_R 0x0013 /* "KeyR" */ #define DOM_PK_T 0x0014 /* "KeyT" */ #define DOM_PK_Y 0x0015 /* "KeyY" */ #define DOM_PK_U 0x0016 /* "KeyU" */ #define DOM_PK_I 0x0017 /* "KeyI" */ #define DOM_PK_O 0x0018 /* "KeyO" */ #define DOM_PK_P 0x0019 /* "KeyP" */ #define DOM_PK_BRACKET_LEFT 0x001A /* "BracketLeft" */ #define DOM_PK_BRACKET_RIGHT 0x001B /* "BracketRight" */ #define DOM_PK_ENTER 0x001C /* "Enter" */ #define DOM_PK_CONTROL_LEFT 0x001D /* "ControlLeft" */ #define DOM_PK_A 0x001E /* "KeyA" */ #define DOM_PK_S 0x001F /* "KeyS" */ #define DOM_PK_D 0x0020 /* "KeyD" */ #define DOM_PK_F 0x0021 /* "KeyF" */ #define DOM_PK_G 0x0022 /* "KeyG" */ #define DOM_PK_H 0x0023 /* "KeyH" */ #define DOM_PK_J 0x0024 /* "KeyJ" */ #define DOM_PK_K 0x0025 /* "KeyK" */ #define DOM_PK_L 0x0026 /* "KeyL" */ #define DOM_PK_SEMICOLON 0x0027 /* "Semicolon" */ #define DOM_PK_QUOTE 0x0028 /* "Quote" */ #define DOM_PK_BACKQUOTE 0x0029 /* "Backquote" */ #define DOM_PK_SHIFT_LEFT 0x002A /* "ShiftLeft" */ #define DOM_PK_BACKSLASH 0x002B /* "Backslash" */ #define DOM_PK_Z 0x002C /* "KeyZ" */ #define DOM_PK_X 0x002D /* "KeyX" */ #define DOM_PK_C 0x002E /* "KeyC" */ #define DOM_PK_V 0x002F /* "KeyV" */ #define DOM_PK_B 0x0030 /* "KeyB" */ #define DOM_PK_N 0x0031 /* "KeyN" */ #define DOM_PK_M 0x0032 /* "KeyM" */ #define DOM_PK_COMMA 0x0033 /* "Comma" */ #define DOM_PK_PERIOD 0x0034 /* "Period" */ #define DOM_PK_SLASH 0x0035 /* "Slash" */ #define DOM_PK_SHIFT_RIGHT 0x0036 /* "ShiftRight" */ #define DOM_PK_NUMPAD_MULTIPLY 0x0037 /* "NumpadMultiply" */ #define DOM_PK_ALT_LEFT 0x0038 /* "AltLeft" */ #define DOM_PK_SPACE 0x0039 /* "Space" */ #define DOM_PK_CAPS_LOCK 0x003A /* "CapsLock" */ #define DOM_PK_F1 0x003B /* "F1" */ #define DOM_PK_F2 0x003C /* "F2" */ #define DOM_PK_F3 0x003D /* "F3" */ #define DOM_PK_F4 0x003E /* "F4" */ #define DOM_PK_F5 0x003F /* "F5" */ #define DOM_PK_F6 0x0040 /* "F6" */ #define DOM_PK_F7 0x0041 /* "F7" */ #define DOM_PK_F8 0x0042 /* "F8" */ #define DOM_PK_F9 0x0043 /* "F9" */ #define DOM_PK_F10 0x0044 /* "F10" */ #define DOM_PK_PAUSE 0x0045 /* "Pause" */ #define DOM_PK_SCROLL_LOCK 0x0046 /* "ScrollLock" */ #define DOM_PK_NUMPAD_7 0x0047 /* "Numpad7" */ #define DOM_PK_NUMPAD_8 0x0048 /* "Numpad8" */ #define DOM_PK_NUMPAD_9 0x0049 /* "Numpad9" */ #define DOM_PK_NUMPAD_SUBTRACT 0x004A /* "NumpadSubtract" */ #define DOM_PK_NUMPAD_4 0x004B /* "Numpad4" */ #define DOM_PK_NUMPAD_5 0x004C /* "Numpad5" */ #define DOM_PK_NUMPAD_6 0x004D /* "Numpad6" */ #define DOM_PK_NUMPAD_ADD 0x004E /* "NumpadAdd" */ #define DOM_PK_NUMPAD_1 0x004F /* "Numpad1" */ #define DOM_PK_NUMPAD_2 0x0050 /* "Numpad2" */ #define DOM_PK_NUMPAD_3 0x0051 /* "Numpad3" */ #define DOM_PK_NUMPAD_0 0x0052 /* "Numpad0" */ #define DOM_PK_NUMPAD_DECIMAL 0x0053 /* "NumpadDecimal" */ #define DOM_PK_PRINT_SCREEN 0x0054 /* "PrintScreen" */ #define DOM_PK_INTL_BACKSLASH 0x0056 /* "IntlBackslash" */ #define DOM_PK_F11 0x0057 /* "F11" */ #define DOM_PK_F12 0x0058 /* "F12" */ #define DOM_PK_NUMPAD_EQUAL 0x0059 /* "NumpadEqual" */ #define DOM_PK_F13 0x0064 /* "F13" */ #define DOM_PK_F14 0x0065 /* "F14" */ #define DOM_PK_F15 0x0066 /* "F15" */ #define DOM_PK_F16 0x0067 /* "F16" */ #define DOM_PK_F17 0x0068 /* "F17" */ #define DOM_PK_F18 0x0069 /* "F18" */ #define DOM_PK_F19 0x006A /* "F19" */ #define DOM_PK_F20 0x006B /* "F20" */ #define DOM_PK_F21 0x006C /* "F21" */ #define DOM_PK_F22 0x006D /* "F22" */ #define DOM_PK_F23 0x006E /* "F23" */ #define DOM_PK_KANA_MODE 0x0070 /* "KanaMode" */ #define DOM_PK_LANG_2 0x0071 /* "Lang2" */ #define DOM_PK_LANG_1 0x0072 /* "Lang1" */ #define DOM_PK_INTL_RO 0x0073 /* "IntlRo" */ #define DOM_PK_F24 0x0076 /* "F24" */ #define DOM_PK_CONVERT 0x0079 /* "Convert" */ #define DOM_PK_NON_CONVERT 0x007B /* "NonConvert" */ #define DOM_PK_INTL_YEN 0x007D /* "IntlYen" */ #define DOM_PK_NUMPAD_COMMA 0x007E /* "NumpadComma" */ #define DOM_PK_PASTE 0xE00A /* "Paste" */ #define DOM_PK_MEDIA_TRACK_PREVIOUS 0xE010 /* "MediaTrackPrevious" */ #define DOM_PK_CUT 0xE017 /* "Cut" */ #define DOM_PK_COPY 0xE018 /* "Copy" */ #define DOM_PK_MEDIA_TRACK_NEXT 0xE019 /* "MediaTrackNext" */ #define DOM_PK_NUMPAD_ENTER 0xE01C /* "NumpadEnter" */ #define DOM_PK_CONTROL_RIGHT 0xE01D /* "ControlRight" */ #define DOM_PK_AUDIO_VOLUME_MUTE 0xE020 /* "AudioVolumeMute" */ #define DOM_PK_AUDIO_VOLUME_MUTE 0xE020 /* "VolumeMute" */ #define DOM_PK_LAUNCH_APP_2 0xE021 /* "LaunchApp2" */ #define DOM_PK_MEDIA_PLAY_PAUSE 0xE022 /* "MediaPlayPause" */ #define DOM_PK_MEDIA_STOP 0xE024 /* "MediaStop" */ #define DOM_PK_EJECT 0xE02C /* "Eject" */ #define DOM_PK_AUDIO_VOLUME_DOWN 0xE02E /* "AudioVolumeDown" */ #define DOM_PK_AUDIO_VOLUME_DOWN 0xE02E /* "VolumeDown" */ #define DOM_PK_AUDIO_VOLUME_UP 0xE030 /* "AudioVolumeUp" */ #define DOM_PK_AUDIO_VOLUME_UP 0xE030 /* "VolumeUp" */ #define DOM_PK_BROWSER_HOME 0xE032 /* "BrowserHome" */ #define DOM_PK_NUMPAD_DIVIDE 0xE035 /* "NumpadDivide" */ #define DOM_PK_ALT_RIGHT 0xE038 /* "AltRight" */ #define DOM_PK_HELP 0xE03B /* "Help" */ #define DOM_PK_NUM_LOCK 0xE045 /* "NumLock" */ #define DOM_PK_HOME 0xE047 /* "Home" */ #define DOM_PK_ARROW_UP 0xE048 /* "ArrowUp" */ #define DOM_PK_PAGE_UP 0xE049 /* "PageUp" */ #define DOM_PK_ARROW_LEFT 0xE04B /* "ArrowLeft" */ #define DOM_PK_ARROW_RIGHT 0xE04D /* "ArrowRight" */ #define DOM_PK_END 0xE04F /* "End" */ #define DOM_PK_ARROW_DOWN 0xE050 /* "ArrowDown" */ #define DOM_PK_PAGE_DOWN 0xE051 /* "PageDown" */ #define DOM_PK_INSERT 0xE052 /* "Insert" */ #define DOM_PK_DELETE 0xE053 /* "Delete" */ #define DOM_PK_META_LEFT 0xE05B /* "MetaLeft" */ #define DOM_PK_OS_LEFT 0xE05B /* "OSLeft" */ #define DOM_PK_META_RIGHT 0xE05C /* "MetaRight" */ #define DOM_PK_OS_RIGHT 0xE05C /* "OSRight" */ #define DOM_PK_CONTEXT_MENU 0xE05D /* "ContextMenu" */ #define DOM_PK_POWER 0xE05E /* "Power" */ #define DOM_PK_BROWSER_SEARCH 0xE065 /* "BrowserSearch" */ #define DOM_PK_BROWSER_FAVORITES 0xE066 /* "BrowserFavorites" */ #define DOM_PK_BROWSER_REFRESH 0xE067 /* "BrowserRefresh" */ #define DOM_PK_BROWSER_STOP 0xE068 /* "BrowserStop" */ #define DOM_PK_BROWSER_FORWARD 0xE069 /* "BrowserForward" */ #define DOM_PK_BROWSER_BACK 0xE06A /* "BrowserBack" */ #define DOM_PK_LAUNCH_APP_1 0xE06B /* "LaunchApp1" */ #define DOM_PK_LAUNCH_MAIL 0xE06C /* "LaunchMail" */ #define DOM_PK_LAUNCH_MEDIA_PLAYER 0xE06D /* "LaunchMediaPlayer" */ #define DOM_PK_MEDIA_SELECT 0xE06D /* "MediaSelect" */ #ifdef __cplusplus extern "C" { #endif /* Maps the EmscriptenKeyboardEvent::code field from emscripten/html5.h to one of the DOM_PK codes above. */ DOM_PK_CODE_TYPE emscripten_compute_dom_pk_code(const char *keyCodeString); /* Returns the string representation of the given key code ID. Useful for debug printing. */ const char *emscripten_dom_pk_code_to_string(DOM_PK_CODE_TYPE code); #ifdef __cplusplus } #endif PK!(884emscripten/cache/sysroot/include/emscripten/em_asm.h/* * Copyright 2017 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #ifdef __cplusplus extern "C" { #endif // __cplusplus // You can use these functions by passing format string to arg_sigs. // Note that `code` requires you to provide a const C string known at compile // time, otherwise the "unable to find data for ASM/EM_JS const" error will be // thrown. // https://github.com/WebAssembly/binaryen/blob/51c8f2469f8fd05197b7694c65041b1567f2c6b5/src/wasm/wasm-emscripten.cpp#L183 // C++ needs the nothrow attribute so -O0 doesn't lower these calls as invokes. __attribute__((nothrow)) int emscripten_asm_const_int(const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) void* emscripten_asm_const_ptr(const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) double emscripten_asm_const_double(const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) int emscripten_asm_const_int_sync_on_main_thread( const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) void* emscripten_asm_const_ptr_sync_on_main_thread( const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) double emscripten_asm_const_double_sync_on_main_thread( const char* code, const char* arg_sigs, ...); __attribute__((nothrow)) void emscripten_asm_const_async_on_main_thread( const char* code, const char* arg_sigs, ...); #ifdef __cplusplus } #endif // __cplusplus // EM_ASM does not work in strict C mode. #if !defined(__cplusplus) && defined(__STRICT_ANSI__) #define EM_ASM_ERROR _Pragma("GCC error(\"EM_ASM does not work in -std=c* modes, use -std=gnu* modes instead\")") #define EM_ASM(...) EM_ASM_ERROR #define EM_ASM_INT(...) EM_ASM_ERROR #define EM_ASM_PTR(...) EM_ASM_ERROR #define EM_ASM_DOUBLE(...) EM_ASM_ERROR #define MAIN_THREAD_EM_ASM(...) EM_ASM_ERROR #define MAIN_THREAD_EM_ASM_INT(...) EM_ASM_ERROR #define MAIN_THREAD_EM_ASM_PTR(...) EM_ASM_ERROR #define MAIN_THREAD_EM_ASM_DOUBLE(...) EM_ASM_ERROR #define MAIN_THREAD_ASYNC_EM_ASM(...) EM_ASM_ERROR #define EM_ASM_(...) EM_ASM_ERROR #define EM_ASM_ARGS(...) EM_ASM_ERROR #define EM_ASM_INT_V(...) EM_ASM_ERROR #define EM_ASM_DOUBLE_V(...) EM_ASM_ERROR #else // In wasm backend, we need to call the emscripten_asm_const_* functions with // the C vararg calling convention, because we will call it with a variety of // arguments, but need to generate a coherent import for the wasm module before // binaryen can run over it to fix up any calls to emscripten_asm_const_*. In // order to read from a vararg buffer, we need to know the signatures to read. // We can use compile-time trickery to generate a format string, and read that // in JS in order to correctly handle the vararg buffer. #ifndef __cplusplus // We can use the generic selection C11 feature (that clang supports pre-C11 // as an extension) to emulate function overloading in C. // All other types, including *all* pointer types go through the default case #ifdef __wasm64__ #define LONG_CODE 'j' #else #define LONG_CODE 'i' #endif #define _EM_ASM_SIG_CHAR(x) _Generic((x), \ float: 'f', \ double: 'd', \ char: 'i', \ unsigned char: 'i', \ unsigned short: 'i', \ unsigned int: 'i', \ unsigned long: LONG_CODE, \ unsigned long long: 'j', \ signed char: 'i', \ signed short: 'i', \ signed int: 'i', \ signed long: LONG_CODE, \ signed long long: 'j', \ default: 'p') // This indirection is needed to allow us to concatenate computed results, e.g. // #define BAR(N) _EM_ASM_CONCATENATE(FOO_, N) // BAR(3) // rewritten to BAR_3 // whereas using ## or _EM_ASM_CONCATENATE_ directly would result in BAR_N #define _EM_ASM_CONCATENATE(a, b) _EM_ASM_CONCATENATE_(a, b) #define _EM_ASM_CONCATENATE_(a, b) a##b // Counts arguments. We use $$ as a sentinel value to enable using ##__VA_ARGS__ // which omits a comma in the event that we have 0 arguments passed, which is // necessary to keep the count correct. #define _EM_ASM_COUNT_ARGS_EXP(_$,_0,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,_11,_12,_13,_14,_15,n,...) n #define _EM_ASM_COUNT_ARGS(...) \ _EM_ASM_COUNT_ARGS_EXP($$,##__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0) // Find the corresponding char for each argument. #define _EM_ASM_ARG_SIGS_0(x, ...) #define _EM_ASM_ARG_SIGS_1(x, ...) _EM_ASM_SIG_CHAR(x), #define _EM_ASM_ARG_SIGS_2(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_1(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_3(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_2(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_4(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_3(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_5(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_4(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_6(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_5(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_7(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_6(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_8(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_7(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_9(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_8(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_10(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_9(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_11(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_10(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_12(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_11(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_13(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_12(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_14(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_13(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_15(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_14(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_16(x, ...) _EM_ASM_SIG_CHAR(x), _EM_ASM_ARG_SIGS_15(__VA_ARGS__) #define _EM_ASM_ARG_SIGS_(N, ...) \ ((char[]){ _EM_ASM_CONCATENATE(_EM_ASM_ARG_SIGS_,N)(__VA_ARGS__) '\0' }) #define _EM_ASM_ARG_SIGS(...) \ _EM_ASM_ARG_SIGS_(_EM_ASM_COUNT_ARGS(__VA_ARGS__), ##__VA_ARGS__) // We lead with commas to avoid adding an extra comma in the 0-argument case. #define _EM_ASM_PREP_ARGS(...) , _EM_ASM_ARG_SIGS(__VA_ARGS__), ##__VA_ARGS__ #else // __cplusplus // C++ needs to support vararg template parameter packs, e.g. like in // test/core/test_em_asm_parameter_pack.cpp. Because of that, a macro-only // approach doesn't work (a macro applied to a parameter pack would expand // incorrectly). So we can use a template class instead to build a temporary // buffer of characters. // As emscripten is required to build successfully with -std=c++03, we cannot // use std::tuple or std::integral_constant. Using C++11 features is only a // warning in modern Clang, which are ignored in system headers. template struct __em_asm_sig {}; template<> struct __em_asm_sig { static const char value = 'f'; }; template<> struct __em_asm_sig { static const char value = 'd'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; #if __wasm64__ template<> struct __em_asm_sig { static const char value = 'j'; }; template<> struct __em_asm_sig { static const char value = 'j'; }; #else template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; #endif template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'i'; }; template<> struct __em_asm_sig { static const char value = 'j'; }; template<> struct __em_asm_sig { static const char value = 'j'; }; template struct __em_asm_sig { static const char value = 'p'; }; // Explicit support for enums, they're passed as int via variadic arguments. template struct __em_asm_if { }; template<> struct __em_asm_if { typedef void type; }; template struct __em_asm_sig::type> { static const char value = 'i'; }; // Instead of std::tuple template struct __em_asm_type_tuple {}; // Instead of std::make_tuple template __em_asm_type_tuple __em_asm_make_type_tuple(Args... args) { return {}; } template struct __em_asm_sig_builder {}; template struct __em_asm_sig_builder<__em_asm_type_tuple > { inline static const char buffer[sizeof...(Args) + 1] = { __em_asm_sig::value..., 0 }; }; // We move to type level with decltype(make_tuple(...)) to avoid double // evaluation of arguments. Use __typeof__ instead of decltype, though, // because the header should be able to compile with clang's -std=c++03. #define _EM_ASM_PREP_ARGS(...) \ , __em_asm_sig_builder<__typeof__(__em_asm_make_type_tuple(__VA_ARGS__))>::buffer, ##__VA_ARGS__ #endif // __cplusplus // Note: If the code block in the EM_ASM() family of functions below contains a // comma, then wrap the whole code block inside parentheses (). See // test/core/test_em_asm_2.cpp for example code snippets. #define CODE_EXPR(code) (__extension__({ \ __attribute__((section("em_asm"), aligned(1))) \ static const char x[] = code; \ x; \ })) // Runs the given JavaScript code on the calling thread (synchronously), and // returns no value back. #define EM_ASM(code, ...) ((void)emscripten_asm_const_int(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__))) // Runs the given JavaScript code on the calling thread (synchronously), and // returns an i32 back. #define EM_ASM_INT(code, ...) emscripten_asm_const_int(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Runs the given JavaScript code on the calling thread (synchronously), and // returns an pointer back. // On wasm32 this is the same as emscripten_asm_const_int but on wasm64 it // returns an i64. #define EM_ASM_PTR(code, ...) emscripten_asm_const_ptr(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Runs the given JavaScript code on the calling thread (synchronously), and // returns a double back. #define EM_ASM_DOUBLE(code, ...) emscripten_asm_const_double(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Runs the given JavaScript code synchronously on the main browser thread, and // returns no value back. // Call this function for example to access DOM elements in a pthread when // building with -pthread. // Avoid calling this function in performance sensitive code, because this will // effectively sleep the calling thread until the main browser thread is able to // service the proxied function call. If you have multiple MAIN_THREAD_EM_ASM() // code blocks to call in succession, it will likely be much faster to coalesce // all the calls to a single MAIN_THREAD_EM_ASM() block. If you do not need // synchronization nor a return value back, consider using the function // MAIN_THREAD_ASYNC_EM_ASM() instead, which will not block. // In single-threaded builds (including proxy-to-worker), MAIN_THREAD_EM_ASM*() // functions are direct aliases to the corresponding EM_ASM*() family of // functions. #define MAIN_THREAD_EM_ASM(code, ...) ((void)emscripten_asm_const_int_sync_on_main_thread(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__))) // Runs the given JavaScript code synchronously on the main browser thread, and // returns an integer back. // The same considerations apply as with MAIN_THREAD_EM_ASM(). #define MAIN_THREAD_EM_ASM_INT(code, ...) emscripten_asm_const_int_sync_on_main_thread(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Runs the given JavaScript code synchronously on the main browser thread, and // returns an pointer back. // The same considerations apply as with MAIN_THREAD_EM_ASM(). // On wasm32 this is the same as emscripten_asm_const_int but on wasm64 it // returns an i64. #define MAIN_THREAD_EM_ASM_PTR(code, ...) emscripten_asm_const_ptr_sync_on_main_thread(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Runs the given JavaScript code synchronously on the main browser thread, and // returns a double back. // The same considerations apply as with MAIN_THREAD_EM_ASM(). #define MAIN_THREAD_EM_ASM_DOUBLE(code, ...) emscripten_asm_const_double_sync_on_main_thread(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) // Asynchronously dispatches the given JavaScript code to be run on the main // browser thread. // If the calling thread is the main browser thread, then the specified // JavaScript code is executed synchronously. Otherwise an event will be queued // on the main browser thread to execute the call later (think postMessage()), // and this call will immediately return without waiting. Be sure to guard any // accesses to shared memory on the heap inside the JavaScript code with // appropriate locking. #define MAIN_THREAD_ASYNC_EM_ASM(code, ...) ((void)emscripten_asm_const_async_on_main_thread(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__))) // Old forms for compatibility, no need to use these. // Replace EM_ASM_, EM_ASM_ARGS and EM_ASM_INT_V with EM_ASM_INT, // and EM_ASM_DOUBLE_V with EM_ASM_DOUBLE. #define EM_ASM_(code, ...) emscripten_asm_const_int(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) #define EM_ASM_ARGS(code, ...) emscripten_asm_const_int(CODE_EXPR(#code) _EM_ASM_PREP_ARGS(__VA_ARGS__)) #define EM_ASM_INT_V(code) EM_ASM_INT(code) #define EM_ASM_DOUBLE_V(code) EM_ASM_DOUBLE(code) // Normally macros like `true` and `false` are not expanded inside // of `EM_JS` or `EM_ASM` blocks. However, in the case then an // additional macro later is added these will be expanded and we want // to make sure the resulting expansion doesn't break the expectations // of JS code #if defined(true) && defined(false) #undef true #undef false // These work for both C and javascript. // In C !!0 ==> 0 and in javascript !!0 ==> false // In C !!1 ==> 1 and in javascript !!1 ==> true #define true (!!1) #define false (!!0) #endif #endif // !defined(__cplusplus) && defined(__STRICT_ANSI__) PK!XX3emscripten/cache/sysroot/include/emscripten/em_js.h/* * Copyright 2018 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include // EM_JS declares JS functions in C code. // Example uses can be found in test/core/test_em_js.cpp // Implementation details: // The EM_JS macro is specified as: // EM_JS(return type, function name, (arguments), {body}) // but the macro uses __VA_ARGS__ instead of a fourth argument. This is so that // function bodies containing commas are seamlessly handled. // EM_JS declares the JS function with a C function prototype, which becomes a // function import in wasm. It also declares an __em_js__-prefixed string constant, // which we can use to pass information to the Emscripten compiler that survives // going through LLVM. // Example: // // EM_JS(int, foo, (int x, int y), { return 2 * x + y; }) // // would get translated into: // // __attribute__((import_name("foo"))) int foo(int x, int y); // // __attribute__((used)) static void* __em_js_ref_foo = (void*)&foo; // // __attribute__((used, visibility("default"))) // char __em_js__foo[] = "(int x, int y)<::>{ return 2 * x + y; }"; // // We pack the arguments and function body into a constant string so it's // readable during wasm post-processing. // Later we see an export called __em_js__foo, meaning we need to create a JS // function: // function foo(x, y) { return 2 * x + y; } // We use <::> to separate the arguments from the function body because it isn't // valid anywhere in a C function declaration. // The __em_js_ref_foo pointer simply exists in order to force a reference to // `foo` to exist in the object file, even if there are no other local uses. // This means the linker will always use the import_name attribute for this // function even if it is not locally used. // Generated __em_js__-prefixed symbols are read by binaryen, and the string // data is extracted into the Emscripten metadata dictionary under the // "emJsFuncs" key. emJsFuncs itself is a dictionary where the keys are function // names (not prefixed with __em_js__), and the values are the <::>-including // description strings. // emJsFuncs metadata is read in emscripten.py's create_em_js, which creates an // array of JS function strings to be included in the JS output. #define _EM_JS(ret, c_name, js_name, params, code) \ _EM_BEGIN_CDECL \ ret c_name params EM_IMPORT(js_name); \ __attribute__((visibility("hidden"))) \ void* __em_js_ref_##c_name = (void*)&c_name; \ EMSCRIPTEN_KEEPALIVE \ __attribute__((section("em_js"), aligned(1))) char __em_js__##js_name[] = \ #params "<::>" code; \ _EM_END_CDECL #define EM_JS(ret, name, params, ...) _EM_JS(ret, name, name, params, #__VA_ARGS__) #define EM_ASYNC_JS(ret, name, params, ...) _EM_JS(ret, name, __asyncjs__##name, params, \ "{ return Asyncify.handleAsync(async () => " #__VA_ARGS__ "); }") // Normally macros like `true` and `false` are not expanded inside // of `EM_JS` or `EM_ASM` blocks. However, in the case when an // additional macro later is added these will be expanded and we want // to make sure the resulting expansion doesn't break the expectations // of JS code #include #if defined(true) && defined(false) #undef true #undef false // These work for both C and javascript. // In C !!0 ==> 0 and in javascript !!0 ==> false // In C !!1 ==> 1 and in javascript !!1 ==> true #define true (!!1) #define false (!!0) #endif PK!ۉWW7emscripten/cache/sysroot/include/emscripten/em_macros.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #define EMSCRIPTEN_KEEPALIVE __attribute__((used)) #ifdef __wasm__ #define EM_IMPORT(NAME) __attribute__((import_module("env"), import_name(#NAME))) #else #define EM_IMPORT(NAME) #endif #ifdef __cplusplus #define _EM_BEGIN_CDECL extern "C" { #define _EM_END_CDECL } #else // __cplusplus #define _EM_BEGIN_CDECL #define _EM_END_CDECL #endif // __cplusplus /* * EM_JS_DEPS: Use this macro to declare indirect dependencies on JS symbols. * The first argument is just a unique name for the set of dependencies. The * second argument is a C string that lists JS library symbols in the same way * they would be specified in the DEFAULT_LIBRARY_FUNCS_TO_INCLUDE command line * setting. * * For example, if your code contains an EM_ASM or EM_JS block that make use of * the stringToNewUTF8 and stackSave JS library functions then you might write this in * your library source code: * * EM_JS_DEPS(mylib_dep, "$stringToNewUTF8,$stackSave"); * * The emscripten linker will then pick this up and make sure those symbols get * included in the JS support library. * * Dependencies declared in this way will be included if-and-only-if the object * file (translation unit) in which they exist is included by the linker, so * it makes sense co-locate them with the EM_JS or EM_ASM code they correspond * to. */ #define EM_JS_DEPS(tag, deps) \ _EM_BEGIN_CDECL \ EMSCRIPTEN_KEEPALIVE \ __attribute__((section("em_lib_deps"))) \ __attribute__((aligned(1))) \ char __em_lib_deps_##tag[] = deps; \ _EM_END_CDECL PK!/5emscripten/cache/sysroot/include/emscripten/em_math.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #ifdef __cplusplus extern "C" { #endif /** * This file contains C functions to access the JavaScript Math API via Emscripten. * Please note that accessing these functions is relatively slow, since they each * incur a language boundary crossing call from WebAssembly out to JavaScript. * These functions are best used in scenarios where small code size is more desirable * than performance. * See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Reference/Global_Objects/Math * for details. */ // The following operations have very fast WebAssembly opcodes. Therefore they are not // exposed as individual functions: // Math.abs(x) -> f32.abs and f64.abs. (use fabsf() and fabs() from math.h) // Math.ceil -> f32.ceil and f64.ceil (ceil() and ceilf() in math.h) // Math.clz32(x) -> i32.clz and i64.clz (call __builtin_clz() and __builtin_clzll()) // Math.floor -> f32.floor and f64.floor (floor() and floorf() in math.h) // Math.fround -> f64.promote_f32(f32.demote_f64()) (double d = (double)(float)someDouble;) // Math.imul(x, y) -> i32.mul and i64.mul (directly multiply two signed integers) // Math.min -> f32.min and f64.min (fminf() and fmin() in math.h) // Math.max -> f32.max and f64.max (fmaxf() and fmax() in math.h) // Math.trunc -> f32.trunc and f64.trunc (truncf() and trunc() in math.h) // The following constants are available on the JS Math object, mirrored here for convenience. #define EM_MATH_E 2.718281828459045 #define EM_MATH_LN2 0.6931471805599453 #define EM_MATH_LN10 2.302585092994046 #define EM_MATH_LOG2E 1.4426950408889634 #define EM_MATH_LOG10E 0.4342944819032518 #define EM_MATH_PI 3.141592653589793 #define EM_MATH_SQRT1_2 0.7071067811865476 #define EM_MATH_SQRT2 1.4142135623730951 // The following Math operations do not have native WebAssembly opcodes, and // are provided here as small sized alternatives to their libc counterparts. double emscripten_math_acos(double x); // acos() in math.h double emscripten_math_acosh(double x); // acosh() in math.h double emscripten_math_asin(double x); // asin() in math.h double emscripten_math_asinh(double x); // asinh() in math.h double emscripten_math_atan(double x); // atan() in math.h double emscripten_math_atan2(double y, double x); // atan2() in math.h double emscripten_math_atanh(double x); // atanh() in math.h double emscripten_math_cbrt(double x); // cbrt() in math.h double emscripten_math_cos(double x); // cos() in math.h double emscripten_math_cosh(double x); // cosh() in math.h double emscripten_math_exp(double x); // exp() in math.h double emscripten_math_expm1(double x); // expm1() in math.h double emscripten_math_fmod(double x, double y); // fmod() in math.h, not a function on Math, but calls JS "x % y" operator. double emscripten_math_hypot(int count, ...); // hypot() in math.h (although only for fixed 2 arguments) double emscripten_math_log(double x); // log() in math.h double emscripten_math_log1p(double x); // log1p() in math.h double emscripten_math_log10(double x); // log10() in math.h double emscripten_math_log2(double x); // log2() in math.h double emscripten_math_pow(double x, double y); // pow(x, y) in math.h double emscripten_math_random(void); // N.b. emscripten_random() in emscripten.h returns a single-precision float! double emscripten_math_round(double x); // round() in math.h double emscripten_math_sign(double x); // No equivalent in libc double emscripten_math_sin(double x); // sin() in math.h double emscripten_math_sinh(double x); // sinh() in math.h double emscripten_math_sqrt(double x); // sqrt() in math.h double emscripten_math_tan(double x); // tan() in math.h double emscripten_math_tanh(double x); // tanh() in math.h #ifdef __cplusplus } #endif PK!5=\OO6emscripten/cache/sysroot/include/emscripten/em_types.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include /* Typedefs */ typedef short __attribute__((aligned(1))) emscripten_align1_short; typedef long long __attribute__((aligned(4))) emscripten_align4_int64; typedef long long __attribute__((aligned(2))) emscripten_align2_int64; typedef long long __attribute__((aligned(1))) emscripten_align1_int64; typedef int __attribute__((aligned(2))) emscripten_align2_int; typedef int __attribute__((aligned(1))) emscripten_align1_int; typedef float __attribute__((aligned(2))) emscripten_align2_float; typedef float __attribute__((aligned(1))) emscripten_align1_float; typedef double __attribute__((aligned(4))) emscripten_align4_double; typedef double __attribute__((aligned(2))) emscripten_align2_double; typedef double __attribute__((aligned(1))) emscripten_align1_double; typedef void (*em_callback_func)(void); typedef void (*em_arg_callback_func)(void*); typedef void (*em_str_callback_func)(const char *); /* Legacy EM_BOOL type. Emscripten no longer uses this */ #define EM_BOOL bool #define EM_TRUE true #define EM_FALSE false #define EM_UTF8 char #define EMSCRIPTEN_RESULT int #define EMSCRIPTEN_RESULT_SUCCESS 0 #define EMSCRIPTEN_RESULT_DEFERRED 1 #define EMSCRIPTEN_RESULT_NOT_SUPPORTED -1 #define EMSCRIPTEN_RESULT_FAILED_NOT_DEFERRED -2 #define EMSCRIPTEN_RESULT_INVALID_TARGET -3 #define EMSCRIPTEN_RESULT_UNKNOWN_TARGET -4 #define EMSCRIPTEN_RESULT_INVALID_PARAM -5 #define EMSCRIPTEN_RESULT_FAILED -6 #define EMSCRIPTEN_RESULT_NO_DATA -7 #define EMSCRIPTEN_RESULT_TIMED_OUT -8 PK!*A/6emscripten/cache/sysroot/include/emscripten/emmalloc.h#pragma once #include #ifdef __cplusplus extern "C" { #endif // emmalloc: A lightweight web-friendly memory allocator suitable for very small applications. // Enable the usage of emmalloc by passing the linker flag -sMALLOC=emmalloc to the application. // A debug function that dumps the whole structure of malloc internal memory blocks to console. // *extremely slow*, use for debugging allocation test cases. void emmalloc_dump_memory_regions(void); // Allocates size bytes with the given pow-2 alignment. If the WebAssembly memory runs out of // free bytes, this function will abort execution, or if building with -sABORTING_MALLOC=0, // return a null pointer. void *memalign(size_t alignment, size_t size); void *emmalloc_memalign(size_t alignment, size_t size); void *aligned_alloc(size_t alignment, size_t size); // Allocates size bytes with default alignment (8 bytes). Like above, either aborts or returns // null on OOM. void *malloc(size_t size); void *emmalloc_malloc(size_t size); // Returns the number of bytes that are actually allocated to the given pointer ptr. // E.g. due to alignment or size requirements, the actual size of the allocation can be // larger than what was requested. It is ok to pass a null pointer to these functions, in which // case 0 will be returned. size_t malloc_usable_size(void *ptr); size_t emmalloc_usable_size(void *ptr); // Frees a memory pointer allocated with any of the memory allocation functions declared // in this file, e.g. // (emmalloc_)memalign, (emmalloc_)malloc, (emmalloc_)calloc, aligned_alloc, // (emmalloc_)realloc, emmalloc_realloc_try, emmalloc_realloc_uninitialized, (emmalloc_)aligned_realloc // It is ok to pass null in ptr, which will be a no-op. void free(void *ptr); void emmalloc_free(void *ptr); // Performs a reallocation of the given memory pointer to a new size. If the memory region // pointed by ptr cannot be resized in place, a new memory region will be allocated, old // memory copied over, and the old memory area freed. The pointer ptr must have been // allocated with one of the emmalloc memory allocation functions (malloc, memalign, ...). // If called with size == 0, the pointer ptr is freed, and a null pointer is returned. // If called with null ptr, a new pointer is allocated. // If there is not enough memory, the old memory block is not freed and null pointer is // returned. void *realloc(void *ptr, size_t size); void *emmalloc_realloc(void *ptr, size_t size); // emmalloc_realloc_try() is like realloc(), but only attempts to try to resize the existing // memory area. If resizing the existing memory area fails, then realloc_try() will return 0 // (the original memory block is not freed or modified). If resizing succeeds, previous // memory contents will be valid up to min(old length, new length) bytes. // If a null pointer is passed, no allocation is attempted but the function will return 0. // If zero size is passed, the function will behave like free(). void *emmalloc_realloc_try(void *ptr, size_t size); // emmalloc_realloc_uninitialized() is like realloc(), but old memory contents // will be undefined after reallocation. (old memory is not preserved in any case) void *emmalloc_realloc_uninitialized(void *ptr, size_t size); // Like realloc(), but allows specifying the alignment to allocate to. This function cannot // be used to change the alignment of an existing allocation, but the original pointer should // be aligned to the given alignment already. void *aligned_realloc(void *ptr, size_t alignment, size_t size); void *emmalloc_aligned_realloc(void *ptr, size_t alignment, size_t size); // emmalloc_aligned_realloc_uninitialized() is like aligned_realloc(), but old memory contents // will be undefined after reallocation. (old memory is not preserved in any case) void *emmalloc_aligned_realloc_uninitialized(void *ptr, size_t alignment, size_t size); // posix_memalign allocates memory with a given alignment, like memalign, but with a slightly // different usage signature. int posix_memalign(void **memptr, size_t alignment, size_t size); int emmalloc_posix_memalign(void **memptr, size_t alignment, size_t size); // calloc allocates memory that is initialized to zero. void *calloc(size_t num, size_t size); void *emmalloc_calloc(size_t num, size_t size); // mallinfo() returns information about current emmalloc allocation state. This function // is very slow, only good for debugging. Avoid calling it for "routine" diagnostics. struct mallinfo mallinfo(void); struct mallinfo emmalloc_mallinfo(void); // malloc_trim() returns unused dynamic memory back to the WebAssembly heap. Returns 1 if it // actually freed any memory, and 0 if not. Note: this function does not release memory back to // the system, but it only marks memory held by emmalloc back to unused state for other users // of sbrk() to claim. int malloc_trim(size_t pad); int emmalloc_trim(size_t pad); // Validates the consistency of the malloc heap. Returns non-zero and prints an error to console // if memory map is corrupt. Returns 0 (and does not print anything) if memory is intact. int emmalloc_validate_memory_regions(void); // Computes the size of the dynamic memory region governed by emmalloc. This represents the // amount of memory that emmalloc has sbrk()ed in for itself to manage. Use this function // for memory statistics tracking purposes. Calling this function is quite fast, practically // O(1) time. size_t emmalloc_dynamic_heap_size(void); // Computes the amount of memory currently reserved under emmalloc's governance that is free // for the application to allocate. Use this function for memory statistics tracking purposes. // Note that calling this function is very slow, as it walks through each free memory block in // linear time. size_t emmalloc_free_dynamic_memory(void); // Estimates the amount of untapped memory that emmalloc could expand its dynamic memory area // via sbrk()ing. Theoretically the maximum amount of memory that can still be malloc()ed can // be calculated via emmalloc_free_dynamic_memory() + emmalloc_unclaimed_heap_memory(). // Calling this function is very fast constant time lookup. size_t emmalloc_unclaimed_heap_memory(void); // Computes a detailed fragmentation map of available free memory. Pass in a pointer to a // 32 element long array. This function populates into each array index i the number of free // memory regions that have a size 2^i <= size < 2^(i+1), and returns the total number of // free memory regions (the sum of the array entries). This function runs very slowly, as it // iterates through all free memory blocks. size_t emmalloc_compute_free_dynamic_memory_fragmentation_map(size_t freeMemorySizeMap[32]); // Same as above, but instead of returning the information in an array, prints it directly // to stdout. void emmalloc_dump_free_dynamic_memory_fragmentation_map(void); #ifdef __cplusplus } #endif PK!$$8emscripten/cache/sysroot/include/emscripten/emscripten.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once /** * This file contains a few useful things for compiling C/C++ code * with Emscripten. * * Documentation for the public APIs defined in this file must be updated in: * site/source/docs/api_reference/emscripten.h.rst * A prebuilt local version of the documentation is available at: * site/build/text/docs/api_reference/emscripten.h.txt * You can also build docs locally as HTML or other formats in site/ * An online HTML version (which may be of a different version of Emscripten) * is up at http://kripken.github.io/emscripten-site/docs/api_reference/emscripten.h.html */ #include "em_asm.h" #include "em_js.h" #include "em_macros.h" #include "em_types.h" #include "promise.h" #include "version.h" #include "wget.h" #ifdef __EMSCRIPTEN__ #ifndef EMSCRIPTEN #define EMSCRIPTEN #endif #pragma clang deprecated(EMSCRIPTEN, "use __EMSCRIPTEN__ instead") #endif #ifdef __cplusplus extern "C" { #endif void emscripten_run_script(const char * _Nonnull script); int emscripten_run_script_int(const char * _Nonnull script); char *emscripten_run_script_string(const char * _Nonnull script); void emscripten_async_run_script(const char * _Nonnull script, int millis); void emscripten_async_load_script(const char * _Nonnull script, em_callback_func onload, em_callback_func onerror); void emscripten_set_main_loop(em_callback_func func, int fps, bool simulate_infinite_loop); #define EM_TIMING_SETTIMEOUT 0 #define EM_TIMING_RAF 1 #define EM_TIMING_SETIMMEDIATE 2 int emscripten_set_main_loop_timing(int mode, int value); void emscripten_get_main_loop_timing(int *mode, int *value); // Pass a null pointer to skip receiving that particular value void emscripten_set_main_loop_arg(em_arg_callback_func func, void *arg, int fps, bool simulate_infinite_loop); void emscripten_pause_main_loop(void); void emscripten_resume_main_loop(void); void emscripten_cancel_main_loop(void); typedef void (*em_socket_callback)(int fd, void *userData); typedef void (*em_socket_error_callback)(int fd, int err, const char* msg, void *userData); void emscripten_set_socket_error_callback(void *userData, em_socket_error_callback callback); void emscripten_set_socket_open_callback(void *userData, em_socket_callback callback); void emscripten_set_socket_listen_callback(void *userData, em_socket_callback callback); void emscripten_set_socket_connection_callback(void *userData, em_socket_callback callback); void emscripten_set_socket_message_callback(void *userData, em_socket_callback callback); void emscripten_set_socket_close_callback(void *userData, em_socket_callback callback); void _emscripten_push_main_loop_blocker(em_arg_callback_func func, void *arg, const char *name); void _emscripten_push_uncounted_main_loop_blocker(em_arg_callback_func func, void *arg, const char *name); #define emscripten_push_main_loop_blocker(func, arg) \ _emscripten_push_main_loop_blocker(func, arg, #func) #define emscripten_push_uncounted_main_loop_blocker(func, arg) \ _emscripten_push_uncounted_main_loop_blocker(func, arg, #func) void emscripten_set_main_loop_expected_blockers(int num); void emscripten_async_call(em_arg_callback_func func, void *arg, int millis); void emscripten_exit_with_live_runtime(void) __attribute__((__noreturn__)); void emscripten_force_exit(int status) __attribute__((__noreturn__)); double emscripten_get_device_pixel_ratio(void); char *emscripten_get_window_title(void); void emscripten_set_window_title(const char *); void emscripten_get_screen_size(int * _Nonnull width, int * _Nonnull height); void emscripten_hide_mouse(void); void emscripten_set_canvas_size(int width, int height) __attribute__((deprecated("This variant does not allow specifying the target canvas", "Use emscripten_set_canvas_element_size() instead"))); void emscripten_get_canvas_size(int * _Nonnull width, int * _Nonnull height, int * _Nonnull isFullscreen) __attribute__((deprecated("This variant does not allow specifying the target canvas", "Use emscripten_get_canvas_element_size() and emscripten_get_fullscreen_status() instead"))); double emscripten_get_now(void); float emscripten_random(void); // IDB typedef void (*em_idb_onload_func)(void*, void*, int); void emscripten_idb_async_load(const char * _Nonnull db_name, const char * _Nonnull file_id, void* arg, em_idb_onload_func onload, em_arg_callback_func onerror); void emscripten_idb_async_store(const char * _Nonnull db_name, const char * _Nonnull file_id, void* ptr, int num, void* arg, em_arg_callback_func onstore, em_arg_callback_func onerror); void emscripten_idb_async_delete(const char * _Nonnull db_name, const char * _Nonnull file_id, void* arg, em_arg_callback_func ondelete, em_arg_callback_func onerror); typedef void (*em_idb_exists_func)(void*, int); void emscripten_idb_async_exists(const char * _Nonnull db_name, const char * _Nonnull file_id, void* arg, em_idb_exists_func oncheck, em_arg_callback_func onerror); void emscripten_idb_async_clear(const char * _Nonnull db_name, void* arg, em_arg_callback_func onclear, em_arg_callback_func onerror); // IDB "sync" void emscripten_idb_load(const char *db_name, const char *file_id, void** pbuffer, int* pnum, int *perror); void emscripten_idb_store(const char *db_name, const char *file_id, void* buffer, int num, int *perror); void emscripten_idb_delete(const char *db_name, const char *file_id, int *perror); void emscripten_idb_exists(const char *db_name, const char *file_id, int* pexists, int *perror); void emscripten_idb_clear(const char *db_name, int *perror); // other async utilities int emscripten_run_preload_plugins(const char* file, em_str_callback_func onload, em_str_callback_func onerror); typedef void (*em_run_preload_plugins_data_onload_func)(void*, const char*); void emscripten_run_preload_plugins_data(char* data, int size, const char *suffix, void *arg, em_run_preload_plugins_data_onload_func onload, em_arg_callback_func onerror); // show an error on some renamed methods #define emscripten_async_prepare(...) _Pragma("GCC error(\"emscripten_async_prepare has been replaced by emscripten_run_preload_plugins\")") #define emscripten_async_prepare_data(...) _Pragma("GCC error(\"emscripten_async_prepare_data has been replaced by emscripten_run_preload_plugins_data\")") // worker APIs typedef int worker_handle; worker_handle emscripten_create_worker(const char *url); void emscripten_destroy_worker(worker_handle worker); typedef void (*em_worker_callback_func)(char*, int, void*); void emscripten_call_worker(worker_handle worker, const char *funcname, char *data, int size, em_worker_callback_func callback, void *arg); void emscripten_worker_respond(char *data, int size); void emscripten_worker_respond_provisionally(char *data, int size); int emscripten_get_worker_queue_size(worker_handle worker); // misc. long emscripten_get_compiler_setting(const char *name); // Returns the value of -sASYNCIFY. Can be 0, 1, or 2 (in the case of JSPI). int emscripten_has_asyncify(void); void emscripten_debugger(void); // Forward declare FILE from musl libc headers to avoid needing to #include from emscripten.h struct _IO_FILE; typedef struct _IO_FILE FILE; char *emscripten_get_preloaded_image_data(const char *path, int *w, int *h); char *emscripten_get_preloaded_image_data_from_FILE(FILE *file, int *w, int *h); #define EM_LOG_CONSOLE 1 #define EM_LOG_WARN 2 #define EM_LOG_ERROR 4 #define EM_LOG_C_STACK 8 #define EM_LOG_JS_STACK 16 #define EM_LOG_DEMANGLE 32 // deprecated #pragma clang deprecated(EM_LOG_DEMANGLE) #define EM_LOG_NO_PATHS 64 #define EM_LOG_FUNC_PARAMS 128 // deprecated #pragma clang deprecated(EM_LOG_FUNC_PARAMS) #define EM_LOG_DEBUG 256 #define EM_LOG_INFO 512 void emscripten_log(int flags, const char* format, ...); int emscripten_get_callstack(int flags, char *out, int maxbytes); int emscripten_print_double(double x, char *to, signed max); typedef void (*em_scan_func)(void*, void*); void emscripten_scan_registers(em_scan_func func); void emscripten_scan_stack(em_scan_func func); // Asynchronous version of dlopen. Since WebAssembly module loading in general // is asynchronous the normal dlopen function can't be used in all situations. typedef void (*em_dlopen_callback)(void* user_data, void* handle); void emscripten_dlopen(const char *filename, int flags, void* user_data, em_dlopen_callback onsuccess, em_arg_callback_func onerror); // Promisified version of emscripten_dlopen // The returned promise will resolve once the dso has been loaded. It's up to // the caller to call emscripten_promise_destroy on this promise. em_promise_t emscripten_dlopen_promise(const char *filename, int flags); void emscripten_throw_number(double number); void emscripten_throw_string(const char *utf8String); /* ===================================== */ /* Internal APIs. Be careful with these. */ /* ===================================== */ void emscripten_sleep(unsigned int ms); #ifdef __cplusplus } #endif PK!fqS7emscripten/cache/sysroot/include/emscripten/eventloop.h/* * Copyright 2021 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include "em_types.h" #ifdef __cplusplus extern "C" { #endif void emscripten_unwind_to_js_event_loop(void) __attribute__((__noreturn__)); int emscripten_set_timeout(void (* _Nonnull cb)(void *user_data), double msecs, void *user_data); void emscripten_clear_timeout(int id); void emscripten_set_timeout_loop(bool (* _Nonnull cb)(double time, void *user_data), double interval_ms, void *user_data); int emscripten_set_immediate(void (* _Nonnull cb)(void *user_data), void *user_data); void emscripten_clear_immediate(int id); void emscripten_set_immediate_loop(bool (*cb)(void *user_data), void *user_data); int emscripten_set_interval(void (* _Nonnull cb)(void *user_data), double interval_ms, void *user_data); void emscripten_clear_interval(int id); void emscripten_runtime_keepalive_push(void); void emscripten_runtime_keepalive_pop(void); bool emscripten_runtime_keepalive_check(void); #ifdef __cplusplus } #endif PK!s٦5emscripten/cache/sysroot/include/emscripten/exports.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once // API that gives access to the function exports of a Wasm module. Build with // -lexports.js to use this API. #ifdef __cplusplus extern "C" { #endif // Returns a function pointer to the given exported function by name. Cast the returned pointer // to its proper signature before calling the function. void *emscripten_get_exported_function(const char * _Nonnull fname); #ifdef __cplusplus } #endif PK!^F''3emscripten/cache/sysroot/include/emscripten/fetch.h/* * Copyright 2016 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #include #ifdef __cplusplus extern "C" { #endif // Emscripten fetch attributes: // If passed, the body of the request will be present in full in the onsuccess() // handler. #define EMSCRIPTEN_FETCH_LOAD_TO_MEMORY 1 // If passed, the intermediate streamed bytes will be passed in to the // onprogress() handler. If not specified, the onprogress() handler will still // be called, but without data bytes. Note: Firefox only as it depends on // 'moz-chunked-arraybuffer'. #define EMSCRIPTEN_FETCH_STREAM_DATA 2 // If passed, the final download will be stored in IndexedDB. If not specified, // the file will only reside in browser memory. #define EMSCRIPTEN_FETCH_PERSIST_FILE 4 // Looks up if the file already exists in IndexedDB, and if so, it is returned // without redownload. If a partial transfer exists in IndexedDB, the download // will resume from where it left off and run to completion. // EMSCRIPTEN_FETCH_APPEND, EMSCRIPTEN_FETCH_REPLACE and // EMSCRIPTEN_FETCH_NO_DOWNLOAD are mutually exclusive. If none of these three // flags is specified, the fetch operation is implicitly treated as if // EMSCRIPTEN_FETCH_APPEND had been passed. #define EMSCRIPTEN_FETCH_APPEND 8 // If the file already exists in IndexedDB, the old file will be deleted and a // new download is started. // EMSCRIPTEN_FETCH_APPEND, EMSCRIPTEN_FETCH_REPLACE and // EMSCRIPTEN_FETCH_NO_DOWNLOAD are mutually exclusive. If you would like to // perform an XHR that neither reads or writes to IndexedDB, pass this flag // EMSCRIPTEN_FETCH_REPLACE, and do not pass the flag // EMSCRIPTEN_FETCH_PERSIST_FILE. #define EMSCRIPTEN_FETCH_REPLACE 16 // If specified, the file will only be looked up in IndexedDB, but if it does // not exist, it is not attempted to be downloaded over the network but an error // is raised. // EMSCRIPTEN_FETCH_APPEND, EMSCRIPTEN_FETCH_REPLACE and // EMSCRIPTEN_FETCH_NO_DOWNLOAD are mutually exclusive. #define EMSCRIPTEN_FETCH_NO_DOWNLOAD 32 // If specified, emscripten_fetch() will synchronously run to completion before // returning. The callback handlers will be called from within // emscripten_fetch() while the operation is in progress. #define EMSCRIPTEN_FETCH_SYNCHRONOUS 64 #define EMSCRIPTEN_FETCH_WAITABLE 128 #pragma clang deprecated(EMSCRIPTEN_FETCH_WAITABLE, "waitable fetch requests are no longer implemented") struct emscripten_fetch_t; // Specifies the parameters for a newly initiated fetch operation. typedef struct emscripten_fetch_attr_t { // 'POST', 'GET', etc. char requestMethod[32]; // Custom data that can be tagged along the process. void *userData; void (*onsuccess)(struct emscripten_fetch_t *fetch); void (*onerror)(struct emscripten_fetch_t *fetch); void (*onprogress)(struct emscripten_fetch_t *fetch); void (*onreadystatechange)(struct emscripten_fetch_t *fetch); // EMSCRIPTEN_FETCH_* attributes uint32_t attributes; // Specifies the amount of time the request can take before failing due to a // timeout. uint32_t timeoutMSecs; // Indicates whether cross-site access control requests should be made using // credentials. bool withCredentials; // Specifies the destination path in IndexedDB where to store the downloaded // content body. If this is empty, the transfer is not stored to IndexedDB at // all. Note that this struct does not contain space to hold this string, it // only carries a pointer. // Calling emscripten_fetch() will make an internal copy of this string. const char *destinationPath; // Specifies the authentication username to use for the request, if necessary. // Note that this struct does not contain space to hold this string, it only // carries a pointer. // Calling emscripten_fetch() will make an internal copy of this string. const char *userName; // Specifies the authentication username to use for the request, if necessary. // Note that this struct does not contain space to hold this string, it only // carries a pointer. // Calling emscripten_fetch() will make an internal copy of this string. const char *password; // Points to an array of strings to pass custom headers to the request. This // array takes the form // {"key1", "value1", "key2", "value2", "key3", "value3", ..., 0 }; Note // especially that the array needs to be terminated with a null pointer. const char * const *requestHeaders; // Pass a custom MIME type here to force the browser to treat the received // data with the given type. const char *overriddenMimeType; // If non-zero, specifies a pointer to the data that is to be passed as the // body (payload) of the request that is being performed. Leave as zero if no // request body needs to be sent. The memory pointed to by this field is // provided by the user, and needs to be valid throughout the duration of the // fetch operation. If passing a non-zero pointer into this field, make sure // to implement *both* the onsuccess and onerror handlers to be notified when // the fetch finishes to know when this memory block can be freed. Do not pass // a pointer to memory on the stack or other temporary area here. const char *requestData; // Specifies the length of the buffer pointed by 'requestData'. Leave as 0 if // no request body needs to be sent. size_t requestDataSize; } emscripten_fetch_attr_t; typedef struct emscripten_fetch_t { // Unique identifier for this fetch in progress. uint32_t id; // Custom data that can be tagged along the process. void *userData; // The remote URL set in the original request. const char *url; // In onsuccess() handler: // - If the EMSCRIPTEN_FETCH_LOAD_TO_MEMORY attribute was specified for the // transfer, this points to the body of the downloaded data. Otherwise // this will be null. // In onprogress() handler: // - If the EMSCRIPTEN_FETCH_STREAM_DATA attribute was specified for the // transfer, this points to a partial chunk of bytes related to the // transfer. Otherwise this will be null. // The data buffer provided here has identical lifetime with the // emscripten_fetch_t object itself, and is freed by calling // emscripten_fetch_close() on the emscripten_fetch_t pointer. const char *data; // Specifies the length of the above data block in bytes. When the download // finishes, this field will be valid even if EMSCRIPTEN_FETCH_LOAD_TO_MEMORY // was not specified. uint64_t numBytes; // If EMSCRIPTEN_FETCH_STREAM_DATA is being performed, this indicates the byte // offset from the start of the stream that the data block specifies. (for // onprogress() streaming XHR transfer, the number of bytes downloaded so far // before this chunk) uint64_t dataOffset; // Specifies the total number of bytes that the response body will be. // Note: This field may be zero, if the server does not report the // Content-Length field. uint64_t totalBytes; // Specifies the readyState of the XHR request: // 0: UNSENT: request not sent yet // 1: OPENED: emscripten_fetch has been called. // 2: HEADERS_RECEIVED: emscripten_fetch has been called, and headers and // status are available. // 3: LOADING: download in progress. // 4: DONE: download finished. // See https://developer.mozilla.org/en-US/docs/Web/API/XMLHttpRequest/readyState unsigned short readyState; // Specifies the status code of the response. unsigned short status; // Specifies a human-readable form of the status code. char statusText[64]; // For internal use only. emscripten_fetch_attr_t __attributes; // The response URL set by the fetch. It will be null until HEADERS_RECEIVED // readyState in async, or until completion in sync. const char *responseUrl; } emscripten_fetch_t; // Clears the fields of an emscripten_fetch_attr_t structure to their default // values in a future-compatible manner. void emscripten_fetch_attr_init(emscripten_fetch_attr_t * _Nonnull fetch_attr); // Initiates a new Emscripten fetch operation, which downloads data from the // given URL or from IndexedDB database. emscripten_fetch_t *emscripten_fetch(emscripten_fetch_attr_t * _Nonnull fetch_attr, const char * _Nonnull url); EMSCRIPTEN_RESULT emscripten_fetch_wait(emscripten_fetch_t * _Nonnull fetch, double timeoutMSecs) __attribute__((deprecated)); // Closes a finished or an executing fetch operation and frees up all memory. If // the fetch operation was still executing, the onerror() handler will be called // in the calling thread before this function returns. EMSCRIPTEN_RESULT emscripten_fetch_close(emscripten_fetch_t * _Nonnull fetch); // Gets the size (in bytes) of the response headers as plain text. // This must be called on the same thread as the fetch originated on. // Note that this will return 0 if readyState < HEADERS_RECEIVED. size_t emscripten_fetch_get_response_headers_length(emscripten_fetch_t * _Nonnull fetch); // Gets the response headers as plain text. dstSizeBytes should be // headers_length + 1 (for the null terminator). // This must be called on the same thread as the fetch originated on. size_t emscripten_fetch_get_response_headers(emscripten_fetch_t * _Nonnull fetch, char * _Nonnull dst, size_t dstSizeBytes); // Converts the plain text headers into an array of strings. This array takes // the form {"key1", "value1", "key2", "value2", "key3", "value3", ..., 0 }; // Note especially that the array is terminated with a null pointer. char **emscripten_fetch_unpack_response_headers(const char * _Nonnull headersString); // This frees the memory used by the array of headers. Call this when finished // with the data returned by emscripten_fetch_unpack_response_headers. void emscripten_fetch_free_unpacked_response_headers(char **unpackedHeaders); #ifdef __cplusplus } #endif PK!F3emscripten/cache/sysroot/include/emscripten/fiber.h/* * Copyright 2019 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #ifdef __cplusplus extern "C" { #endif typedef struct asyncify_data_s { void *stack_ptr; /** Current position in the Asyncify stack (*not* the C stack) */ void *stack_limit; /** Where the Asyncify stack ends. */ int rewind_id; /** Interned ID of the rewind entry point; opaque to application. */ } asyncify_data_t; typedef struct emscripten_fiber_s { void *stack_base; /** Where the C stack starts (NOTE: grows down). */ void *stack_limit; /** Where the C stack ends. */ void *stack_ptr; /** Current position in the C stack. */ em_arg_callback_func entry; /** Function to call when resuming this context. If NULL, asyncify_data is used to rewind the call stack. */ void *user_data; /** Opaque pointer, passed as-is to the entry function. */ asyncify_data_t asyncify_data; } emscripten_fiber_t; void emscripten_fiber_init( emscripten_fiber_t * _Nonnull fiber, em_arg_callback_func entry_func, void *entry_func_arg, void * _Nonnull c_stack, size_t c_stack_size, void * _Nonnull asyncify_stack, size_t asyncify_stack_size ); void emscripten_fiber_init_from_current_context( emscripten_fiber_t * _Nonnull fiber, void * _Nonnull asyncify_stack, size_t asyncify_stack_size ); void emscripten_fiber_swap( emscripten_fiber_t * _Nonnull old_fiber, emscripten_fiber_t * _Nonnull new_fibe ); #ifdef __cplusplus } #endif PK!c2emscripten/cache/sysroot/include/emscripten/heap.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #include #include #define WASM_PAGE_SIZE 65536 #define EMSCRIPTEN_PAGE_SIZE WASM_PAGE_SIZE #ifdef __cplusplus extern "C" { #endif // Returns a pointer to a memory location that contains the current sbrk // location (which marks the end of the dynamic memory region used for malloc, // etc). uintptr_t *emscripten_get_sbrk_ptr(void); // Attempts to geometrically or linearly increase the size of the WebAssembly // memory (referred to as heap for legacy reason) so that its new size is at // least `requested_size` bytes. The size may be overallocated, see // src/settings.js variables MEMORY_GROWTH_GEOMETRIC_STEP, // MEMORY_GROWTH_GEOMETRIC_CAP and MEMORY_GROWTH_LINEAR_STEP. This function // cannot be used to shrink the size of the memory. // Returns true on success, false otherwise. bool emscripten_resize_heap(size_t requested_size) EM_IMPORT(emscripten_resize_heap); // Returns the current size of the WebAssembly memory (referred to as heap for // legacy reason). size_t emscripten_get_heap_size(void); // Returns the max size of the WebAssembly memory (referred to as heap for // legacy reason). size_t emscripten_get_heap_max(void); // Direct access to the system allocator. Use these to access that underlying // allocator when intercepting/wrapping the allocator API. Works with both // dlmalloc and emmalloc. void *emscripten_builtin_memalign(size_t alignment, size_t size); void *emscripten_builtin_malloc(size_t size); void *emscripten_builtin_realloc(void *ptr, size_t size); void *emscripten_builtin_calloc(size_t nmemb, size_t size); void emscripten_builtin_free(void *ptr); #ifdef __cplusplus } #endif PK!W[ovov3emscripten/cache/sysroot/include/emscripten/html5.h/* * Copyright 2014 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include // Include eventloop.h, console.h and html5_webgl.h for compat with older // version of this header that used to define these functions. #include #include #include #include #ifdef __cplusplus extern "C" { #endif /* * This file defines Emscripten low-level glue bindings for interfacing with HTML5 APIs * * Documentation for the public APIs defined in this file must be updated in: * site/source/docs/api_reference/html5.h.rst * You can also build docs locally as HTML or other formats in site/ * An online HTML version (which may be of a different version of Emscripten) * is up at http://kripken.github.io/emscripten-site/docs/api_reference/html5.h.html */ #define EMSCRIPTEN_EVENT_KEYPRESS 1 #define EMSCRIPTEN_EVENT_KEYDOWN 2 #define EMSCRIPTEN_EVENT_KEYUP 3 #define EMSCRIPTEN_EVENT_CLICK 4 #define EMSCRIPTEN_EVENT_MOUSEDOWN 5 #define EMSCRIPTEN_EVENT_MOUSEUP 6 #define EMSCRIPTEN_EVENT_DBLCLICK 7 #define EMSCRIPTEN_EVENT_MOUSEMOVE 8 #define EMSCRIPTEN_EVENT_WHEEL 9 #define EMSCRIPTEN_EVENT_RESIZE 10 #define EMSCRIPTEN_EVENT_SCROLL 11 #define EMSCRIPTEN_EVENT_BLUR 12 #define EMSCRIPTEN_EVENT_FOCUS 13 #define EMSCRIPTEN_EVENT_FOCUSIN 14 #define EMSCRIPTEN_EVENT_FOCUSOUT 15 #define EMSCRIPTEN_EVENT_DEVICEORIENTATION 16 #define EMSCRIPTEN_EVENT_DEVICEMOTION 17 #define EMSCRIPTEN_EVENT_ORIENTATIONCHANGE 18 #define EMSCRIPTEN_EVENT_FULLSCREENCHANGE 19 #define EMSCRIPTEN_EVENT_POINTERLOCKCHANGE 20 #define EMSCRIPTEN_EVENT_VISIBILITYCHANGE 21 #define EMSCRIPTEN_EVENT_TOUCHSTART 22 #define EMSCRIPTEN_EVENT_TOUCHEND 23 #define EMSCRIPTEN_EVENT_TOUCHMOVE 24 #define EMSCRIPTEN_EVENT_TOUCHCANCEL 25 #define EMSCRIPTEN_EVENT_GAMEPADCONNECTED 26 #define EMSCRIPTEN_EVENT_GAMEPADDISCONNECTED 27 #define EMSCRIPTEN_EVENT_BEFOREUNLOAD 28 #define EMSCRIPTEN_EVENT_BATTERYCHARGINGCHANGE 29 #define EMSCRIPTEN_EVENT_BATTERYLEVELCHANGE 30 #define EMSCRIPTEN_EVENT_WEBGLCONTEXTLOST 31 #define EMSCRIPTEN_EVENT_WEBGLCONTEXTRESTORED 32 #define EMSCRIPTEN_EVENT_MOUSEENTER 33 #define EMSCRIPTEN_EVENT_MOUSELEAVE 34 #define EMSCRIPTEN_EVENT_MOUSEOVER 35 #define EMSCRIPTEN_EVENT_MOUSEOUT 36 #define EMSCRIPTEN_EVENT_CANVASRESIZED 37 #define EMSCRIPTEN_EVENT_POINTERLOCKERROR 38 #define EMSCRIPTEN_EVENT_CONTEXTMENU 39 #define EMSCRIPTEN_EVENT_TARGET_INVALID 0 #define EMSCRIPTEN_EVENT_TARGET_DOCUMENT ((const char*)1) #define EMSCRIPTEN_EVENT_TARGET_WINDOW ((const char*)2) #define EMSCRIPTEN_EVENT_TARGET_SCREEN ((const char*)3) #define DOM_KEY_LOCATION int #define DOM_KEY_LOCATION_STANDARD 0x00 #define DOM_KEY_LOCATION_LEFT 0x01 #define DOM_KEY_LOCATION_RIGHT 0x02 #define DOM_KEY_LOCATION_NUMPAD 0x03 #define EM_HTML5_SHORT_STRING_LEN_BYTES 32 #define EM_HTML5_MEDIUM_STRING_LEN_BYTES 64 #define EM_HTML5_LONG_STRING_LEN_BYTES 128 typedef struct EmscriptenKeyboardEvent { double timestamp; unsigned int location; bool ctrlKey; bool shiftKey; bool altKey; bool metaKey; bool repeat; unsigned int charCode; unsigned int keyCode; unsigned int which; EM_UTF8 key[EM_HTML5_SHORT_STRING_LEN_BYTES]; EM_UTF8 code[EM_HTML5_SHORT_STRING_LEN_BYTES]; EM_UTF8 charValue[EM_HTML5_SHORT_STRING_LEN_BYTES]; EM_UTF8 locale[EM_HTML5_SHORT_STRING_LEN_BYTES]; } EmscriptenKeyboardEvent; typedef bool (*em_key_callback_func)(int eventType, const EmscriptenKeyboardEvent * _Nonnull keyEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_keypress_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_key_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_keydown_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_key_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_keyup_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_key_callback_func callback, pthread_t targetThread); typedef struct EmscriptenMouseEvent { double timestamp; int screenX; int screenY; int clientX; int clientY; bool ctrlKey; bool shiftKey; bool altKey; bool metaKey; unsigned short button; unsigned short buttons; int movementX; int movementY; int targetX; int targetY; // canvasX and canvasY are deprecated - there no longer exists a Module['canvas'] object, so canvasX/Y are no longer reported (register a listener on canvas directly to get canvas coordinates, or translate manually) int canvasX; int canvasY; int padding; } EmscriptenMouseEvent; typedef bool (*em_mouse_callback_func)(int eventType, const EmscriptenMouseEvent * _Nonnull mouseEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_click_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mousedown_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mouseup_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_dblclick_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mousemove_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mouseenter_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mouseleave_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mouseover_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_mouseout_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_contextmenu_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_mouse_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_mouse_status(EmscriptenMouseEvent * _Nonnull mouseState); #define DOM_DELTA_PIXEL 0x00 #define DOM_DELTA_LINE 0x01 #define DOM_DELTA_PAGE 0x02 typedef struct EmscriptenWheelEvent { EmscriptenMouseEvent mouse; double deltaX; double deltaY; double deltaZ; unsigned int deltaMode; } EmscriptenWheelEvent; typedef bool (*em_wheel_callback_func)(int eventType, const EmscriptenWheelEvent * _Nonnull wheelEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_wheel_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_wheel_callback_func callback, pthread_t targetThread); typedef struct EmscriptenUiEvent { int detail; int documentBodyClientWidth; int documentBodyClientHeight; int windowInnerWidth; int windowInnerHeight; int windowOuterWidth; int windowOuterHeight; int scrollTop; int scrollLeft; } EmscriptenUiEvent; typedef bool (*em_ui_callback_func)(int eventType, const EmscriptenUiEvent * _Nonnull uiEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_resize_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_ui_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_scroll_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_ui_callback_func callback, pthread_t targetThread); typedef struct EmscriptenFocusEvent { EM_UTF8 nodeName[EM_HTML5_LONG_STRING_LEN_BYTES]; EM_UTF8 id[EM_HTML5_LONG_STRING_LEN_BYTES]; } EmscriptenFocusEvent; typedef bool (*em_focus_callback_func)(int eventType, const EmscriptenFocusEvent * _Nonnull focusEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_blur_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_focus_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_focus_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_focus_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_focusin_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_focus_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_focusout_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_focus_callback_func callback, pthread_t targetThread); typedef struct EmscriptenDeviceOrientationEvent { double alpha; double beta; double gamma; bool absolute; } EmscriptenDeviceOrientationEvent; typedef bool (*em_deviceorientation_callback_func)(int eventType, const EmscriptenDeviceOrientationEvent * _Nonnull deviceOrientationEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_deviceorientation_callback_on_thread(void *userData, bool useCapture, em_deviceorientation_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_deviceorientation_status(EmscriptenDeviceOrientationEvent * _Nonnull orientationState); #define EMSCRIPTEN_DEVICE_MOTION_EVENT_SUPPORTS_ACCELERATION 0x01 #define EMSCRIPTEN_DEVICE_MOTION_EVENT_SUPPORTS_ACCELERATION_INCLUDING_GRAVITY 0x02 #define EMSCRIPTEN_DEVICE_MOTION_EVENT_SUPPORTS_ROTATION_RATE 0x04 typedef struct EmscriptenDeviceMotionEvent { double accelerationX; double accelerationY; double accelerationZ; double accelerationIncludingGravityX; double accelerationIncludingGravityY; double accelerationIncludingGravityZ; double rotationRateAlpha; double rotationRateBeta; double rotationRateGamma; int supportedFields; } EmscriptenDeviceMotionEvent; typedef bool (*em_devicemotion_callback_func)(int eventType, const EmscriptenDeviceMotionEvent * _Nonnull deviceMotionEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_devicemotion_callback_on_thread(void *userData, bool useCapture, em_devicemotion_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_devicemotion_status(EmscriptenDeviceMotionEvent * _Nonnull motionState); #define EMSCRIPTEN_ORIENTATION_UNSUPPORTED 0 #define EMSCRIPTEN_ORIENTATION_PORTRAIT_PRIMARY 1 #define EMSCRIPTEN_ORIENTATION_PORTRAIT_SECONDARY 2 #define EMSCRIPTEN_ORIENTATION_LANDSCAPE_PRIMARY 4 #define EMSCRIPTEN_ORIENTATION_LANDSCAPE_SECONDARY 8 typedef struct EmscriptenOrientationChangeEvent { int orientationIndex; int orientationAngle; } EmscriptenOrientationChangeEvent; typedef bool (*em_orientationchange_callback_func)(int eventType, const EmscriptenOrientationChangeEvent * _Nonnull orientationChangeEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_orientationchange_callback_on_thread(void *userData, bool useCapture, em_orientationchange_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_orientation_status(EmscriptenOrientationChangeEvent * _Nonnull orientationStatus); EMSCRIPTEN_RESULT emscripten_lock_orientation(int allowedOrientations); EMSCRIPTEN_RESULT emscripten_unlock_orientation(void); typedef struct EmscriptenFullscreenChangeEvent { bool isFullscreen; bool fullscreenEnabled; EM_UTF8 nodeName[EM_HTML5_LONG_STRING_LEN_BYTES]; EM_UTF8 id[EM_HTML5_LONG_STRING_LEN_BYTES]; int elementWidth; int elementHeight; int screenWidth; int screenHeight; } EmscriptenFullscreenChangeEvent; typedef bool (*em_fullscreenchange_callback_func)(int eventType, const EmscriptenFullscreenChangeEvent * _Nonnull fullscreenChangeEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_fullscreenchange_callback_on_thread(const char *target, void *userData, bool useCapture, em_fullscreenchange_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_fullscreen_status(EmscriptenFullscreenChangeEvent * _Nonnull fullscreenStatus); #define EMSCRIPTEN_FULLSCREEN_SCALE int #define EMSCRIPTEN_FULLSCREEN_SCALE_DEFAULT 0 #define EMSCRIPTEN_FULLSCREEN_SCALE_STRETCH 1 #define EMSCRIPTEN_FULLSCREEN_SCALE_ASPECT 2 #define EMSCRIPTEN_FULLSCREEN_SCALE_CENTER 3 #define EMSCRIPTEN_FULLSCREEN_CANVAS_SCALE int #define EMSCRIPTEN_FULLSCREEN_CANVAS_SCALE_NONE 0 #define EMSCRIPTEN_FULLSCREEN_CANVAS_SCALE_STDDEF 1 #define EMSCRIPTEN_FULLSCREEN_CANVAS_SCALE_HIDEF 2 #define EMSCRIPTEN_FULLSCREEN_FILTERING int #define EMSCRIPTEN_FULLSCREEN_FILTERING_DEFAULT 0 #define EMSCRIPTEN_FULLSCREEN_FILTERING_NEAREST 1 #define EMSCRIPTEN_FULLSCREEN_FILTERING_BILINEAR 2 typedef bool (*em_canvasresized_callback_func)(int eventType, const void *reserved, void *userData); typedef struct EmscriptenFullscreenStrategy { EMSCRIPTEN_FULLSCREEN_SCALE scaleMode; EMSCRIPTEN_FULLSCREEN_CANVAS_SCALE canvasResolutionScaleMode; EMSCRIPTEN_FULLSCREEN_FILTERING filteringMode; em_canvasresized_callback_func canvasResizedCallback; void *canvasResizedCallbackUserData; pthread_t canvasResizedCallbackTargetThread; } EmscriptenFullscreenStrategy; EMSCRIPTEN_RESULT emscripten_request_fullscreen(const char * _Nonnull target, bool deferUntilInEventHandler); EMSCRIPTEN_RESULT emscripten_request_fullscreen_strategy(const char * _Nonnull target, bool deferUntilInEventHandler, const EmscriptenFullscreenStrategy * _Nonnull fullscreenStrategy); EMSCRIPTEN_RESULT emscripten_exit_fullscreen(void); EMSCRIPTEN_RESULT emscripten_enter_soft_fullscreen(const char * _Nonnull target, const EmscriptenFullscreenStrategy * _Nonnull fullscreenStrategy); EMSCRIPTEN_RESULT emscripten_exit_soft_fullscreen(void); typedef struct EmscriptenPointerlockChangeEvent { bool isActive; EM_UTF8 nodeName[EM_HTML5_LONG_STRING_LEN_BYTES]; EM_UTF8 id[EM_HTML5_LONG_STRING_LEN_BYTES]; } EmscriptenPointerlockChangeEvent; typedef bool (*em_pointerlockchange_callback_func)(int eventType, const EmscriptenPointerlockChangeEvent * _Nonnull pointerlockChangeEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_pointerlockchange_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_pointerlockchange_callback_func callback, pthread_t targetThread); typedef bool (*em_pointerlockerror_callback_func)(int eventType, const void *reserved, void *userData); EMSCRIPTEN_RESULT emscripten_set_pointerlockerror_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_pointerlockerror_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_pointerlock_status(EmscriptenPointerlockChangeEvent * _Nonnull pointerlockStatus); EMSCRIPTEN_RESULT emscripten_request_pointerlock(const char * _Nonnull target, bool deferUntilInEventHandler); EMSCRIPTEN_RESULT emscripten_exit_pointerlock(void); #define EMSCRIPTEN_VISIBILITY_HIDDEN 0 #define EMSCRIPTEN_VISIBILITY_VISIBLE 1 #define EMSCRIPTEN_VISIBILITY_PRERENDER 2 #define EMSCRIPTEN_VISIBILITY_UNLOADED 3 typedef struct EmscriptenVisibilityChangeEvent { bool hidden; int visibilityState; } EmscriptenVisibilityChangeEvent; typedef bool (*em_visibilitychange_callback_func)(int eventType, const EmscriptenVisibilityChangeEvent * _Nonnull visibilityChangeEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_visibilitychange_callback_on_thread(void *userData, bool useCapture, em_visibilitychange_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_visibility_status(EmscriptenVisibilityChangeEvent * _Nonnull visibilityStatus); typedef struct EmscriptenTouchPoint { int identifier; int screenX; int screenY; int clientX; int clientY; int pageX; int pageY; bool isChanged; bool onTarget; int targetX; int targetY; // canvasX and canvasY are deprecated - there no longer exists a Module['canvas'] object, so canvasX/Y are no longer reported (register a listener on canvas directly to get canvas coordinates, or translate manually) int canvasX; int canvasY; } EmscriptenTouchPoint; typedef struct EmscriptenTouchEvent { double timestamp; int numTouches; bool ctrlKey; bool shiftKey; bool altKey; bool metaKey; EmscriptenTouchPoint touches[32]; } EmscriptenTouchEvent; typedef bool (*em_touch_callback_func)(int eventType, const EmscriptenTouchEvent * _Nonnull touchEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_touchstart_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_touch_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_touchend_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_touch_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_touchmove_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_touch_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_touchcancel_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_touch_callback_func callback, pthread_t targetThread); typedef struct EmscriptenGamepadEvent { double timestamp; int numAxes; int numButtons; double axis[64]; double analogButton[64]; bool digitalButton[64]; bool connected; int index; EM_UTF8 id[EM_HTML5_MEDIUM_STRING_LEN_BYTES]; EM_UTF8 mapping[EM_HTML5_MEDIUM_STRING_LEN_BYTES]; } EmscriptenGamepadEvent; typedef bool (*em_gamepad_callback_func)(int eventType, const EmscriptenGamepadEvent * _Nonnull gamepadEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_gamepadconnected_callback_on_thread(void *userData, bool useCapture, em_gamepad_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_gamepaddisconnected_callback_on_thread(void *userData, bool useCapture, em_gamepad_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_sample_gamepad_data(void); int emscripten_get_num_gamepads(void); EMSCRIPTEN_RESULT emscripten_get_gamepad_status(int index, EmscriptenGamepadEvent * _Nonnull gamepadState); typedef struct EmscriptenBatteryEvent { double chargingTime; double dischargingTime; double level; bool charging; } EmscriptenBatteryEvent; typedef bool (*em_battery_callback_func)(int eventType, const EmscriptenBatteryEvent * _Nonnull batteryEvent, void *userData); EMSCRIPTEN_RESULT emscripten_set_batterychargingchange_callback_on_thread(void *userData, em_battery_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_batterylevelchange_callback_on_thread(void *userData, em_battery_callback_func callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_get_battery_status(EmscriptenBatteryEvent * _Nonnull batteryState); EMSCRIPTEN_RESULT emscripten_vibrate(int msecs); EMSCRIPTEN_RESULT emscripten_vibrate_pattern(int * _Nonnull msecsArray, int numEntries); typedef const char *(*em_beforeunload_callback)(int eventType, const void *reserved, void *userData); EMSCRIPTEN_RESULT emscripten_set_beforeunload_callback_on_thread(void *userData, em_beforeunload_callback callback, pthread_t targetThread); // Sets the canvas.width & canvas.height properties. EMSCRIPTEN_RESULT emscripten_set_canvas_element_size(const char * _Nonnull target, int width, int height); // Returns the canvas.width & canvas.height properties. EMSCRIPTEN_RESULT emscripten_get_canvas_element_size(const char * _Nonnull target, int *width, int *height); EMSCRIPTEN_RESULT emscripten_set_element_css_size(const char * _Nonnull target, double width, double height); EMSCRIPTEN_RESULT emscripten_get_element_css_size(const char * _Nonnull target, double *width, double *height); void emscripten_html5_remove_all_event_listeners(void); EMSCRIPTEN_RESULT emscripten_html5_remove_event_listener(const char * _Nonnull target, void *userData, int eventTypeId, void * _Nonnull callback); #define EM_CALLBACK_THREAD_CONTEXT_MAIN_RUNTIME_THREAD ((pthread_t)0x1) #define EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD ((pthread_t)0x2) // Legacy name for EM_CALLBACK_THREAD_CONTEXT_MAIN_RUNTIME_THREAD #define EM_CALLBACK_THREAD_CONTEXT_MAIN_BROWSER_THREAD EM_CALLBACK_THREAD_CONTEXT_MAIN_RUNTIME_THREAD #define emscripten_set_keypress_callback(target, userData, useCapture, callback) emscripten_set_keypress_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_keydown_callback(target, userData, useCapture, callback) emscripten_set_keydown_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_keyup_callback(target, userData, useCapture, callback) emscripten_set_keyup_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_click_callback(target, userData, useCapture, callback) emscripten_set_click_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mousedown_callback(target, userData, useCapture, callback) emscripten_set_mousedown_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mouseup_callback(target, userData, useCapture, callback) emscripten_set_mouseup_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_dblclick_callback(target, userData, useCapture, callback) emscripten_set_dblclick_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mousemove_callback(target, userData, useCapture, callback) emscripten_set_mousemove_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mouseenter_callback(target, userData, useCapture, callback) emscripten_set_mouseenter_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mouseleave_callback(target, userData, useCapture, callback) emscripten_set_mouseleave_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mouseover_callback(target, userData, useCapture, callback) emscripten_set_mouseover_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_mouseout_callback(target, userData, useCapture, callback) emscripten_set_mouseout_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_contextmenu_callback(target, userData, useCapture, callback) emscripten_set_contextmenu_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_wheel_callback(target, userData, useCapture, callback) emscripten_set_wheel_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_resize_callback(target, userData, useCapture, callback) emscripten_set_resize_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_scroll_callback(target, userData, useCapture, callback) emscripten_set_scroll_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_blur_callback(target, userData, useCapture, callback) emscripten_set_blur_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_focus_callback(target, userData, useCapture, callback) emscripten_set_focus_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_focusin_callback(target, userData, useCapture, callback) emscripten_set_focusin_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_focusout_callback(target, userData, useCapture, callback) emscripten_set_focusout_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_deviceorientation_callback(userData, useCapture, callback) emscripten_set_deviceorientation_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_devicemotion_callback(userData, useCapture, callback) emscripten_set_devicemotion_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_orientationchange_callback(userData, useCapture, callback) emscripten_set_orientationchange_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_fullscreenchange_callback(target, userData, useCapture, callback) emscripten_set_fullscreenchange_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_pointerlockchange_callback(target, userData, useCapture, callback) emscripten_set_pointerlockchange_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_pointerlockerror_callback(target, userData, useCapture, callback) emscripten_set_pointerlockerror_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_visibilitychange_callback(userData, useCapture, callback) emscripten_set_visibilitychange_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_touchstart_callback(target, userData, useCapture, callback) emscripten_set_touchstart_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_touchend_callback(target, userData, useCapture, callback) emscripten_set_touchend_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_touchmove_callback(target, userData, useCapture, callback) emscripten_set_touchmove_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_touchcancel_callback(target, userData, useCapture, callback) emscripten_set_touchcancel_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_gamepadconnected_callback(userData, useCapture, callback) emscripten_set_gamepadconnected_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_gamepaddisconnected_callback(userData, useCapture, callback) emscripten_set_gamepaddisconnected_callback_on_thread( (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_batterychargingchange_callback(userData, callback) emscripten_set_batterychargingchange_callback_on_thread( (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_batterylevelchange_callback(userData, callback) emscripten_set_batterylevelchange_callback_on_thread( (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_beforeunload_callback(userData, callback) emscripten_set_beforeunload_callback_on_thread( (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_MAIN_RUNTIME_THREAD) int emscripten_request_animation_frame(bool (*cb)(double time, void *userData), void *userData); void emscripten_cancel_animation_frame(int requestAnimationFrameId); void emscripten_request_animation_frame_loop(bool (*cb)(double time, void *userData), void *userData); double emscripten_date_now(void); double emscripten_performance_now(void); #ifdef __cplusplus } // ~extern "C" #endif PK!b%**9emscripten/cache/sysroot/include/emscripten/html5_webgl.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #ifdef __cplusplus extern "C" { #endif typedef uintptr_t EMSCRIPTEN_WEBGL_CONTEXT_HANDLE; typedef int EMSCRIPTEN_WEBGL_CONTEXT_PROXY_MODE; #define EMSCRIPTEN_WEBGL_CONTEXT_PROXY_DISALLOW 0 #define EMSCRIPTEN_WEBGL_CONTEXT_PROXY_FALLBACK 1 #define EMSCRIPTEN_WEBGL_CONTEXT_PROXY_ALWAYS 2 typedef int EM_WEBGL_POWER_PREFERENCE; #define EM_WEBGL_POWER_PREFERENCE_DEFAULT 0 #define EM_WEBGL_POWER_PREFERENCE_LOW_POWER 1 #define EM_WEBGL_POWER_PREFERENCE_HIGH_PERFORMANCE 2 typedef struct EmscriptenWebGLContextAttributes { bool alpha; bool depth; bool stencil; bool antialias; bool premultipliedAlpha; bool preserveDrawingBuffer; EM_WEBGL_POWER_PREFERENCE powerPreference; bool failIfMajorPerformanceCaveat; int majorVersion; int minorVersion; bool enableExtensionsByDefault; bool explicitSwapControl; EMSCRIPTEN_WEBGL_CONTEXT_PROXY_MODE proxyContextToMainThread; bool renderViaOffscreenBackBuffer; bool desynchronized; } EmscriptenWebGLContextAttributes; void emscripten_webgl_init_context_attributes(EmscriptenWebGLContextAttributes * _Nonnull attributes); EMSCRIPTEN_WEBGL_CONTEXT_HANDLE emscripten_webgl_create_context(const char * _Nonnull target, const EmscriptenWebGLContextAttributes * _Nonnull attributes); EMSCRIPTEN_RESULT emscripten_webgl_make_context_current(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); EMSCRIPTEN_WEBGL_CONTEXT_HANDLE emscripten_webgl_get_current_context(void); EMSCRIPTEN_RESULT emscripten_webgl_get_drawing_buffer_size(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context, int * _Nonnull width, int * _Nonnull height); EMSCRIPTEN_RESULT emscripten_webgl_get_context_attributes(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context, EmscriptenWebGLContextAttributes * _Nonnull outAttributes); EMSCRIPTEN_RESULT emscripten_webgl_destroy_context(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_extension(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context, const char * _Nonnull extension); bool emscripten_webgl_enable_ANGLE_instanced_arrays(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_OES_vertex_array_object(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_WEBGL_draw_buffers(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_WEBGL_draw_instanced_base_vertex_base_instance(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_WEBGL_multi_draw(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_WEBGL_multi_draw_instanced_base_vertex_base_instance(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_EXT_polygon_offset_clamp(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_EXT_clip_control(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); bool emscripten_webgl_enable_WEBGL_polygon_mode(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); typedef bool (*em_webgl_context_callback)(int eventType, const void *reserved, void *userData); EMSCRIPTEN_RESULT emscripten_set_webglcontextlost_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_webgl_context_callback callback, pthread_t targetThread); EMSCRIPTEN_RESULT emscripten_set_webglcontextrestored_callback_on_thread(const char * _Nonnull target, void *userData, bool useCapture, em_webgl_context_callback callback, pthread_t targetThread); bool emscripten_is_webgl_context_lost(EMSCRIPTEN_WEBGL_CONTEXT_HANDLE context); EMSCRIPTEN_RESULT emscripten_webgl_commit_frame(void); bool emscripten_supports_offscreencanvas(void); // Returns function pointers to WebGL 1 functions. Please avoid using this function ever - all WebGL1/GLES2 functions, even those for WebGL1 extensions, are available to user code via static linking. Calling GL functions // via function pointers obtained here is slow, and using this function can greatly increase resulting compiled program size. This functionality is available only for easier program code porting purposes, but be aware // that calling this is causing a noticeable performance and compiled code size hit. void *emscripten_webgl1_get_proc_address(const char * _Nonnull name); // Returns function pointers to WebGL 2 functions. Please avoid using this function ever - all WebGL2/GLES3 functions, even those for WebGL2 extensions, are available to user code via static linking. Calling GL functions // via function pointers obtained here is slow, and using this function can greatly increase resulting compiled program size. This functionality is available only for easier program code porting purposes, but be aware // that calling this is causing a noticeable performance and compiled code size hit. void *emscripten_webgl2_get_proc_address(const char * _Nonnull name); // Combines emscripten_webgl1_get_proc_address() and emscripten_webgl2_get_proc_address() to return function pointers to both WebGL1 and WebGL2 functions. Same drawbacks apply. void *emscripten_webgl_get_proc_address(const char * _Nonnull name); #define emscripten_set_webglcontextlost_callback(target, userData, useCapture, callback) emscripten_set_webglcontextlost_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_set_webglcontextrestored_callback(target, userData, useCapture, callback) emscripten_set_webglcontextrestored_callback_on_thread( (target), (userData), (useCapture), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define GLint int #define GLenum int #define GLint64 long long int #define EMSCRIPTEN_WEBGL_PARAM_TYPE int #define EMSCRIPTEN_WEBGL_PARAM_TYPE_INT 0 #define EMSCRIPTEN_WEBGL_PARAM_TYPE_FLOAT 1 // Calls GLctx.getSupportedExtensions(): // Returns a newly allocated string that contains all supported WebGL extensions by the currently active WebGL context, // separated by a space character ' '. Call free() to deallocate the string. char *emscripten_webgl_get_supported_extensions(void); // Calls GLctx.getShaderParameter(): // Returns a parameter of a WebGL shader as a double. // Call this function only for values of 'param' that return a Number type. double emscripten_webgl_get_shader_parameter_d(GLint shader, GLenum param); // Calls GLctx.getShaderInfoLog(): // Returns a newly allocated string that contains the shader info log of the given shader. Call free() to deallocate the string. char *emscripten_webgl_get_shader_info_log_utf8(GLint shader); // Calls GLctx.getShaderSource(): // Returns a newly allocated string that contains the shader source the given shader. Call free() to deallocate the string. char *emscripten_webgl_get_shader_source_utf8(GLint shader); // Calls GLctx.getProgramParameter(): // Returns a parameter of a WebGL shader program as a double. // Call this function only for values of 'param' that return a Number type. double emscripten_webgl_get_program_parameter_d(GLint program, GLenum param); // Calls GLctx.getProgramInfoLog(): // Returns a newly allocated string that contains the info log of the given program. Call free() to deallocate the string. char *emscripten_webgl_get_program_info_log_utf8(GLint program); // Calls GLctx.getVertexAttrib(): // Returns the given vertex attribute as a double. // Call this function only for values of 'param' that return a Number type. double emscripten_webgl_get_vertex_attrib_d(int index, GLenum param); // Calls GLctx.getVertexAttrib(): // Returns the WebGL object name bound to the given vertex attribute. // Call this function only for values of 'param' that return a WebGL object type. GLint emscripten_webgl_get_vertex_attrib_o(int index, GLenum param); // Calls GLctx.getVertexAttrib(): // Gets an array of currently active vertex attributes. // Call this function only for values of 'param' that return an array of types. // Use dstType to specify whether to read an array of ints or floats. // The function writes at most dstLength array elements to array dst. // The actual length of the state array is returned (not the number of elements written) int emscripten_webgl_get_vertex_attrib_v(int index, GLenum param, void * _Nonnull dst, int dstLength, EMSCRIPTEN_WEBGL_PARAM_TYPE dstType); // Calls GLctx.getUniform(): // Returns the value of a uniform set in a program in the given location. // Call this function only for scalar uniform types. (float and int) double emscripten_webgl_get_uniform_d(GLint program, int location); // Calls GLctx.getUniform(): // Gets an array set to a uniform in a program in the given location. // Call this function only for array uniform types. (vec2, ivec2 and so on) // Use dstType to specify whether to read in ints or floats. // The function writes at most dstLength array elements to array dst. // The actual length of the state array is returned (not the number of elements written) int emscripten_webgl_get_uniform_v(GLint program, int location, void * _Nonnull dst, int dstLength, EMSCRIPTEN_WEBGL_PARAM_TYPE dstType); // Calls GLctx.getParameter(): // Gets an array of state set to the active WebGL context. // Call this function only for values of 'param' that return an array of types. // Use dstType to specify whether to read in ints or floats. // The function writes at most dstLength array elements to array dst. // The actual length of the state array is returned (not the number of elements written) int emscripten_webgl_get_parameter_v(GLenum param, void * _Nonnull dst, int dstLength, EMSCRIPTEN_WEBGL_PARAM_TYPE dstType); // Calls GLctx.getParameter(): // Returns the given WebGL context state as double. // Call this function only for values of 'param' that return a Number type. double emscripten_webgl_get_parameter_d(GLenum param); // Calls GLctx.getParameter(): // Returns the WebGL object name bound to the given WebGL context state binding point. // Call this function only for values of 'param' that return a WebGL object type. GLint emscripten_webgl_get_parameter_o(GLenum param); // Calls GLctx.getParameter(): // Returns a newly allocated string containing the WebGL state associated with the given parameter. // Call free() to deallocate the string. // Call this function only for values of 'param' that return a WebGL string type. char *emscripten_webgl_get_parameter_utf8(GLenum param); // Calls GLctx.getParameter(): // Returns the given WebGL context state as GLint64, written to the given heap location. // Call this function only for values of 'param' that return a WebGL Number type. void emscripten_webgl_get_parameter_i64v(GLenum param, GLint64 * _Nonnull dst); #undef GLint #undef GLenum #undef GLint64 #ifdef __cplusplus } // ~extern "C" #endif PK!谻8 7emscripten/cache/sysroot/include/emscripten/key_codes.h/* * Copyright 2017 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once // The following are definitions of "virtual" key codes from // https://developer.mozilla.org/en-US/docs/Web/API/KeyboardEvent/keyCode // In keydown and keyup events, the EmscriptenKeyboardEvent::keyCode field // has one of these values. In keypress events, the keyCode field may no // longer be present. #define DOM_VK_CANCEL 0x03 #define DOM_VK_HELP 0x06 #define DOM_VK_BACK_SPACE 0x08 #define DOM_VK_TAB 0x09 #define DOM_VK_CLEAR 0x0C #define DOM_VK_RETURN 0x0D #define DOM_VK_ENTER 0x0E #define DOM_VK_SHIFT 0x10 #define DOM_VK_CONTROL 0x11 #define DOM_VK_ALT 0x12 #define DOM_VK_PAUSE 0x13 #define DOM_VK_CAPS_LOCK 0x14 #define DOM_VK_KANA 0x15 #define DOM_VK_HANGUL 0x15 #define DOM_VK_EISU 0x16 #define DOM_VK_JUNJA 0x17 #define DOM_VK_FINAL 0x18 #define DOM_VK_HANJA 0x19 #define DOM_VK_KANJI 0x19 #define DOM_VK_ESCAPE 0x1B #define DOM_VK_CONVERT 0x1C #define DOM_VK_NONCONVERT 0x1D #define DOM_VK_ACCEPT 0x1E #define DOM_VK_MODECHANGE 0x1F #define DOM_VK_SPACE 0x20 #define DOM_VK_PAGE_UP 0x21 #define DOM_VK_PAGE_DOWN 0x22 #define DOM_VK_END 0x23 #define DOM_VK_HOME 0x24 #define DOM_VK_LEFT 0x25 #define DOM_VK_UP 0x26 #define DOM_VK_RIGHT 0x27 #define DOM_VK_DOWN 0x28 #define DOM_VK_SELECT 0x29 #define DOM_VK_PRINT 0x2A #define DOM_VK_EXECUTE 0x2B #define DOM_VK_PRINTSCREEN 0x2C #define DOM_VK_INSERT 0x2D #define DOM_VK_DELETE 0x2E #define DOM_VK_0 0x30 #define DOM_VK_1 0x31 #define DOM_VK_2 0x32 #define DOM_VK_3 0x33 #define DOM_VK_4 0x34 #define DOM_VK_5 0x35 #define DOM_VK_6 0x36 #define DOM_VK_7 0x37 #define DOM_VK_8 0x38 #define DOM_VK_9 0x39 #define DOM_VK_COLON 0x3A #define DOM_VK_SEMICOLON 0x3B #define DOM_VK_LESS_THAN 0x3C #define DOM_VK_EQUALS 0x3D #define DOM_VK_GREATER_THAN 0x3E #define DOM_VK_QUESTION_MARK 0x3F #define DOM_VK_AT 0x40 #define DOM_VK_A 0x41 #define DOM_VK_B 0x42 #define DOM_VK_C 0x43 #define DOM_VK_D 0x44 #define DOM_VK_E 0x45 #define DOM_VK_F 0x46 #define DOM_VK_G 0x47 #define DOM_VK_H 0x48 #define DOM_VK_I 0x49 #define DOM_VK_J 0x4A #define DOM_VK_K 0x4B #define DOM_VK_L 0x4C #define DOM_VK_M 0x4D #define DOM_VK_N 0x4E #define DOM_VK_O 0x4F #define DOM_VK_P 0x50 #define DOM_VK_Q 0x51 #define DOM_VK_R 0x52 #define DOM_VK_S 0x53 #define DOM_VK_T 0x54 #define DOM_VK_U 0x55 #define DOM_VK_V 0x56 #define DOM_VK_W 0x57 #define DOM_VK_X 0x58 #define DOM_VK_Y 0x59 #define DOM_VK_Z 0x5A #define DOM_VK_WIN 0x5B #define DOM_VK_CONTEXT_MENU 0x5D #define DOM_VK_SLEEP 0x5F #define DOM_VK_NUMPAD0 0x60 #define DOM_VK_NUMPAD1 0x61 #define DOM_VK_NUMPAD2 0x62 #define DOM_VK_NUMPAD3 0x63 #define DOM_VK_NUMPAD4 0x64 #define DOM_VK_NUMPAD5 0x65 #define DOM_VK_NUMPAD6 0x66 #define DOM_VK_NUMPAD7 0x67 #define DOM_VK_NUMPAD8 0x68 #define DOM_VK_NUMPAD9 0x69 #define DOM_VK_MULTIPLY 0x6A #define DOM_VK_ADD 0x6B #define DOM_VK_SEPARATOR 0x6C #define DOM_VK_SUBTRACT 0x6D #define DOM_VK_DECIMAL 0x6E #define DOM_VK_DIVIDE 0x6F #define DOM_VK_F1 0x70 #define DOM_VK_F2 0x71 #define DOM_VK_F3 0x72 #define DOM_VK_F4 0x73 #define DOM_VK_F5 0x74 #define DOM_VK_F6 0x75 #define DOM_VK_F7 0x76 #define DOM_VK_F8 0x77 #define DOM_VK_F9 0x78 #define DOM_VK_F10 0x79 #define DOM_VK_F11 0x7A #define DOM_VK_F12 0x7B #define DOM_VK_F13 0x7C #define DOM_VK_F14 0x7D #define DOM_VK_F15 0x7E #define DOM_VK_F16 0x7F #define DOM_VK_F17 0x80 #define DOM_VK_F18 0x81 #define DOM_VK_F19 0x82 #define DOM_VK_F20 0x83 #define DOM_VK_F21 0x84 #define DOM_VK_F22 0x85 #define DOM_VK_F23 0x86 #define DOM_VK_F24 0x87 #define DOM_VK_NUM_LOCK 0x90 #define DOM_VK_SCROLL_LOCK 0x91 #define DOM_VK_WIN_OEM_FJ_JISHO 0x92 #define DOM_VK_WIN_OEM_FJ_MASSHOU 0x93 #define DOM_VK_WIN_OEM_FJ_TOUROKU 0x94 #define DOM_VK_WIN_OEM_FJ_LOYA 0x95 #define DOM_VK_WIN_OEM_FJ_ROYA 0x96 #define DOM_VK_CIRCUMFLEX 0xA0 #define DOM_VK_EXCLAMATION 0xA1 #define DOM_VK_DOUBLE_QUOTE 0xA2 #define DOM_VK_HASH 0xA3 #define DOM_VK_DOLLAR 0xA4 #define DOM_VK_PERCENT 0xA5 #define DOM_VK_AMPERSAND 0xA6 #define DOM_VK_UNDERSCORE 0xA7 #define DOM_VK_OPEN_PAREN 0xA8 #define DOM_VK_CLOSE_PAREN 0xA9 #define DOM_VK_ASTERISK 0xAA #define DOM_VK_PLUS 0xAB #define DOM_VK_PIPE 0xAC #define DOM_VK_HYPHEN_MINUS 0xAD #define DOM_VK_OPEN_CURLY_BRACKET 0xAE #define DOM_VK_CLOSE_CURLY_BRACKET 0xAF #define DOM_VK_TILDE 0xB0 #define DOM_VK_VOLUME_MUTE 0xB5 #define DOM_VK_VOLUME_DOWN 0xB6 #define DOM_VK_VOLUME_UP 0xB7 #define DOM_VK_COMMA 0xBC #define DOM_VK_PERIOD 0xBE #define DOM_VK_SLASH 0xBF #define DOM_VK_BACK_QUOTE 0xC0 #define DOM_VK_OPEN_BRACKET 0xDB #define DOM_VK_BACK_SLASH 0xDC #define DOM_VK_CLOSE_BRACKET 0xDD #define DOM_VK_QUOTE 0xDE #define DOM_VK_META 0xE0 #define DOM_VK_ALTGR 0xE1 #define DOM_VK_WIN_ICO_HELP 0xE3 #define DOM_VK_WIN_ICO_00 0xE4 #define DOM_VK_WIN_ICO_CLEAR 0xE6 #define DOM_VK_WIN_OEM_RESET 0xE9 #define DOM_VK_WIN_OEM_JUMP 0xEA #define DOM_VK_WIN_OEM_PA1 0xEB #define DOM_VK_WIN_OEM_PA2 0xEC #define DOM_VK_WIN_OEM_PA3 0xED #define DOM_VK_WIN_OEM_WSCTRL 0xEE #define DOM_VK_WIN_OEM_CUSEL 0xEF #define DOM_VK_WIN_OEM_ATTN 0xF0 #define DOM_VK_WIN_OEM_FINISH 0xF1 #define DOM_VK_WIN_OEM_COPY 0xF2 #define DOM_VK_WIN_OEM_AUTO 0xF3 #define DOM_VK_WIN_OEM_ENLW 0xF4 #define DOM_VK_WIN_OEM_BACKTAB 0xF5 #define DOM_VK_ATTN 0xF6 #define DOM_VK_CRSEL 0xF7 #define DOM_VK_EXSEL 0xF8 #define DOM_VK_EREOF 0xF9 #define DOM_VK_PLAY 0xFA #define DOM_VK_ZOOM 0xFB #define DOM_VK_PA1 0xFD #define DOM_VK_WIN_OEM_CLEAR 0xFE #ifdef __cplusplus extern "C" { #endif const char *emscripten_dom_vk_to_string(int dom_vk_code); #ifdef __cplusplus } // ~extern "C" #endif #include "dom_pk_codes.h" PK!Usk:emscripten/cache/sysroot/include/emscripten/posix_socket.h#pragma once #include "websocket.h" #ifdef __cplusplus extern "C" { #endif EMSCRIPTEN_RESULT emscripten_init_websocket_to_posix_socket_bridge(const char * _Nonnull bridgeUrl); #ifdef __cplusplus } #endif PK!c;35emscripten/cache/sysroot/include/emscripten/promise.h/* * Copyright 2023 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #ifdef __cplusplus extern "C" { #endif // EXPERIMENTAL AND SUBJECT TO CHANGE! // An opaque handle to a JS Promise object. typedef struct _em_promise* em_promise_t; typedef enum em_promise_result_t { EM_PROMISE_FULFILL, EM_PROMISE_MATCH, EM_PROMISE_MATCH_RELEASE, EM_PROMISE_REJECT, } em_promise_result_t; // A callback passed to `emscripten_promise_then` to be invoked once a promise // is fulfilled or rejected. `data` is arbitrary user-provided data provided // when `emscripten_promise_then` is called to install the callback and `value` // is the value the promise was fulfilled or rejected with. // // The callback can signal how to resolve the new promise returned from // `emscripten_promise_then` via its return and by writing a new result to // outparam `result`. The behavior depends on the returned `em_promise_result_t` // value: // // - `EM_PROMISE_FULFILL`: The new promise is fulfilled with the value written // to `result` or NULL if no value is written. // // - `EM_PROMISE_MATCH` or `EM_PROMISE_MATCH_RELEASE`: The callback must write // a promise handle to `result` and the new promise is resolved to match the // eventual state of that promise. `EM_PROMISE_MATCH_RELEASE` will also cause // the written promise handle to be destroyed so that the user does not have // to arrange for it to be destroyed after the callback is executed. // // - `EM_PROMISE_REJECT`: The new promise is rejected with the reason written // to `result` or NULL if no reason is written. // // If the callback throws a number (or bigint in the case of memory64), the new // promise will be rejected with that number converted to a pointer as its // rejection reason. If the callback throws any other value, the new promise // will be rejected with a NULL rejection reason. typedef em_promise_result_t (*em_promise_callback_t)(void** result, void* data, void* value); // Create a new promise that can be explicitly resolved or rejected using // `emscripten_promise_resolve`. The returned promise handle must eventually be // freed with `emscripten_promise_destroy`. [[nodiscard]] em_promise_t emscripten_promise_create(void); // Release the resources associated with this promise. This must be called on // every promise handle created, whether by `emscripten_promise_create` or any // other function that returns a fresh promise, such as // `emscripten_promise_then`. It is fine to call `emscripten_promise_destroy` on // a promise handle before the promise is resolved; the configured callbacks // will still be called. void emscripten_promise_destroy(em_promise_t promise); // Explicitly resolve the `promise` created by `emscripten_promise_create`. If // `result` is `EM_PROMISE_FULFILL`, then the promise is fulfilled with the // given `value`. If `result` is `EM_PROMISE_MATCH`, then the promise is // resolved to match the eventual state of `value` interpreted as a promise // handle. Finally, if `result` is `EM_PROMISE_REJECT`, then the promise is // rejected with the given value. Promises not created by // `emscripten_promise_create` should not be passed to this function. void emscripten_promise_resolve(em_promise_t promise, em_promise_result_t result, void* value); // Install `on_fulfilled` and `on_rejected` callbacks on the given `promise`, // creating and returning a handle to a new promise. See `em_promise_callback_t` // for documentation on how the callbacks work. `data` is arbitrary user data // that will be passed to the callbacks. The returned promise handle must // eventually be freed with `emscripten_promise_destroy`. [[nodiscard]] em_promise_t emscripten_promise_then(em_promise_t promise, em_promise_callback_t on_fulfilled, em_promise_callback_t on_rejected, void* data); // Call Promise.all to create and return a new promise that is either fulfilled // once the `num_promises` input promises passed in `promises` have been // fulfilled or is rejected once any of the input promises has been rejected. // When the returned promise is fulfilled, the values each of the input promises // were resolved with will be written to the `results` array if it is non-null // and the returned promise will be fulfilled with the address of that array as // well. [[nodiscard]] em_promise_t emscripten_promise_all(em_promise_t* promises, void** results, size_t num_promises); typedef struct em_settled_result_t { em_promise_result_t result; void* value; } em_settled_result_t; // Call Promise.allSettled to create and return a new promise that is fulfilled // once the `num_promises` input promises passed in `promises` have been // settled. When the returned promise is fulfilled, the `results` buffer will be // filled with the result comprising of either EM_PROMISE_FULFILL and the // fulfilled value or EM_PROMISE_REJECT and the rejection reason for each of the // input promises if `results` is non-null. The returned promise will be // fulfilled with the value of `results` as well. [[nodiscard]] em_promise_t emscripten_promise_all_settled( em_promise_t* promises, em_settled_result_t* results, size_t num_promises); // Call Promise.any to create and return a new promise that is fulfilled once // any of the `num_promises` input promises passed in `promises` has been // fulfilled or is rejected once all of the input promises have been rejected. // If the returned promise is fulfilled, it will be fulfilled with the same // value as the first fulfilled input promise. Otherwise, if the returned // promise is rejected, the rejection reasons for each input promise will be // written to the `errors` buffer if it is non-null. The rejection reason for // the returned promise will also be the address of the `errors` buffer. [[nodiscard]] em_promise_t emscripten_promise_any(em_promise_t* promises, void** errors, size_t num_promises); // Call Promise.race to create and return a new promise that settles once any of // the `num_promises` input promises passed in `promises` has been settled. If // the first input promise to settle is fulfilled, the resulting promise is // fulfilled with the same value. Otherwise, if the first input promise to // settle is rejected, the resulting promise is rejected with the same reason. [[nodiscard]] em_promise_t emscripten_promise_race(em_promise_t* promises, size_t num_promises); // Suspend the current Wasm execution context until the given promise has been // settled. // // Since the stack is not unwound while Wasm execution is suspended, it is // safe to pass pointers to the stack to asynchronous work that is waited on // with this function. // // This function can only be used in programs that were built with `-sASYNCIFY`. [[nodiscard]] em_settled_result_t emscripten_promise_await(em_promise_t promise); // Just like emscripten_promise_await but does not include a rejection handler // and simply returns result if/when the promise is fulfilled. // If the promise is rejected it would then get handled elsewhere in the promise // chain, or result in a top level unhandled rejection. [[nodiscard]] void* emscripten_promise_await_unchecked(em_promise_t promise); #ifdef __cplusplus } #endif PK!O~FN,N,6emscripten/cache/sysroot/include/emscripten/proxying.h/* * Copyright 2021 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #ifdef __cplusplus extern "C" { #endif // Opaque handle to a set of thread-local work queues to which work can be // asynchronously or synchronously proxied from other threads. When work is // proxied to a queue on a particular thread, that thread is notified to start // processing work from that queue if it is not already doing so. // // Proxied work can only be completed on live thread runtimes, so users must // ensure either that all proxied work is completed before a thread exits or // that the thread exits with a live runtime, e.g. via // `emscripten_exit_with_live_runtime` to avoid dropped work. typedef struct em_proxying_queue em_proxying_queue; // Create and destroy proxying queues. em_proxying_queue* em_proxying_queue_create(void); void em_proxying_queue_destroy(em_proxying_queue* q); // Get the queue used for proxying low-level runtime work. Work on this queue // may be processed at any time inside system functions, so it must be // nonblocking and safe to run at any time, similar to a native signal handler. em_proxying_queue* emscripten_proxy_get_system_queue(void); // Execute all the tasks enqueued for the current thread on the given queue. New // tasks that are enqueued concurrently with this execution will be executed as // well. This function returns once it observes an empty queue. void emscripten_proxy_execute_queue(em_proxying_queue* q); // Opaque handle to a currently-executing proxied task, used to signal the end // of the task. typedef struct em_proxying_ctx em_proxying_ctx; // Signal the end of a task proxied with `emscripten_proxy_sync_with_ctx`. void emscripten_proxy_finish(em_proxying_ctx* ctx); // Enqueue `func` on the given queue and thread and return immediately. Returns // true if the work was successfully enqueued and the target thread notified or // false otherwise. bool emscripten_proxy_async(em_proxying_queue* q, pthread_t target_thread, void (*func)(void*), void* arg); // Enqueue `func` on the given queue and thread and wait for it to finish // executing before returning. Returns true if the task was successfully // completed and false otherwise, including if the target thread is canceled or // exits before the work is completed. bool emscripten_proxy_sync(em_proxying_queue* q, pthread_t target_thread, void (*func)(void*), void* arg); // Enqueue `func` on the given queue and thread and wait for it to be executed // and for the task to be marked finished with `emscripten_proxy_finish` before // returning. `func` need not call `emscripten_proxy_finish` itself; it could // instead store the context pointer and call `emscripten_proxy_finish` at an // arbitrary later time. Returns true if the task was successfully completed and // false otherwise, including if the target thread is canceled or exits before // the work is completed. bool emscripten_proxy_sync_with_ctx(em_proxying_queue* q, pthread_t target_thread, void (*func)(em_proxying_ctx*, void*), void* arg); // Enqueue `func` on the given queue and thread. Once (and if) it finishes // executing, it will asynchronously proxy `callback` back to the current thread // on the same queue, or if the target thread dies before the work can be // completed, `cancel` will be proxied back instead. All three functions will // receive the same argument, `arg`. Returns true if `func` was successfully // enqueued and the target thread notified or false otherwise. bool emscripten_proxy_callback(em_proxying_queue* q, pthread_t target_thread, void (*func)(void*), void (*callback)(void*), void (*cancel)(void*), void* arg); // Enqueue `func` on the given queue and thread. Once (and if) it finishes the // task by calling `emscripten_proxy_finish` on the given `em_proxying_ctx`, it // will asynchronously proxy `callback` back to the current thread on the same // queue, or if the target thread dies before the work can be completed, // `cancel` will be proxied back instead. All three functions will receive the // same argument, `arg`. Returns true if `func` was successfully enqueued and // the target thread notified or false otherwise. bool emscripten_proxy_callback_with_ctx(em_proxying_queue* q, pthread_t target_thread, void (*func)(em_proxying_ctx*, void*), void (*callback)(void*), void (*cancel)(void*), void* arg); __attribute__((warn_unused_result)) em_promise_t emscripten_proxy_promise(em_proxying_queue* q, pthread_t target_thread, void (*func)(void*), void* arg); __attribute__((warn_unused_result)) em_promise_t emscripten_proxy_promise_with_ctx(em_proxying_queue* q, pthread_t target_thread, void (*func)(em_proxying_ctx*, void*), void* arg); #ifdef __cplusplus } // extern "C" #if __cplusplus < 201103L #warning "C++ ProxyingQueue support requires building with -std=c++11 or newer!" #else #include #include #include namespace emscripten { // A thin C++ wrapper around the underlying C API. class ProxyingQueue { public: // Simple wrapper around `em_proxying_ctx*` providing a `finish` method as an // alternative to `emscripten_proxy_finish`. struct ProxyingCtx { em_proxying_ctx* ctx; ProxyingCtx() = default; ProxyingCtx(em_proxying_ctx* ctx) : ctx(ctx) {} void finish() { emscripten_proxy_finish(ctx); } }; private: static void runAndFree(void* arg) { auto* f = (std::function*)arg; (*f)(); delete f; } static void run(void* arg) { auto* f = (std::function*)arg; (*f)(); } static void runWithCtx(em_proxying_ctx* ctx, void* arg) { auto* f = (std::function*)arg; (*f)(ProxyingCtx{ctx}); } struct CallbackFuncs { std::function func; std::function callback; std::function cancel; CallbackFuncs(std::function&& func, std::function&& callback, std::function&& cancel) : func(std::move(func)), callback(std::move(callback)), cancel(std::move(cancel)) {} }; static void runFunc(void* arg) { auto* info = (CallbackFuncs*)arg; info->func(); } static void runCallback(void* arg) { auto* info = (CallbackFuncs*)arg; info->callback(); delete info; } static void runCancel(void* arg) { auto* info = (CallbackFuncs*)arg; if (info->cancel) { info->cancel(); } delete info; } struct CallbackWithCtxFuncs { std::function func; std::function callback; std::function cancel; CallbackWithCtxFuncs(std::function&& func, std::function&& callback, std::function&& cancel) : func(std::move(func)), callback(std::move(callback)), cancel(std::move(cancel)) {} }; static void runFuncWithCtx(em_proxying_ctx* ctx, void* arg) { auto* info = (CallbackWithCtxFuncs*)arg; info->func(ProxyingCtx{ctx}); } static void runCallbackWithCtx(void* arg) { auto* info = (CallbackWithCtxFuncs*)arg; info->callback(); delete info; } static void runCancelWithCtx(void* arg) { auto* info = (CallbackWithCtxFuncs*)arg; if (info->cancel) { info->cancel(); } delete info; } public: em_proxying_queue* queue = em_proxying_queue_create(); // ProxyingQueue can be moved but not copied. It is not valid to call any // methods on ProxyingQueues that have been moved out of. ProxyingQueue() = default; ProxyingQueue& operator=(const ProxyingQueue&) = delete; ProxyingQueue& operator=(ProxyingQueue&& other) { if (this != &other) { if (queue) { em_proxying_queue_destroy(queue); } queue = other.queue; other.queue = nullptr; } return *this; } ProxyingQueue(const ProxyingQueue&) = delete; ProxyingQueue(ProxyingQueue&& other) : queue(nullptr) { *this = std::move(other); } ~ProxyingQueue() { if (queue) { em_proxying_queue_destroy(queue); } } void execute() { emscripten_proxy_execute_queue(queue); } // Return true if the work was successfully enqueued and false otherwise. // Refer to the corresponding C API documentation. bool proxyAsync(pthread_t target, std::function&& func) { std::function* arg = new std::function(std::move(func)); if (!emscripten_proxy_async(queue, target, runAndFree, (void*)arg)) { delete arg; return false; } return true; } bool proxySync(const pthread_t target, const std::function& func) { return emscripten_proxy_sync(queue, target, run, (void*)&func); } bool proxySyncWithCtx(const pthread_t target, const std::function& func) { return emscripten_proxy_sync_with_ctx( queue, target, runWithCtx, (void*)&func); } bool proxyCallback(pthread_t target, std::function&& func, std::function&& callback, std::function&& cancel) { CallbackFuncs* info = new CallbackFuncs( std::move(func), std::move(callback), std::move(cancel)); if (!emscripten_proxy_callback( queue, target, runFunc, runCallback, runCancel, info)) { delete info; return false; } return true; } bool proxyCallbackWithCtx(pthread_t target, std::function&& func, std::function&& callback, std::function&& cancel) { CallbackWithCtxFuncs* info = new CallbackWithCtxFuncs( std::move(func), std::move(callback), std::move(cancel)); if (!emscripten_proxy_callback_with_ctx(queue, target, runFuncWithCtx, runCallbackWithCtx, runCancelWithCtx, info)) { delete info; return false; } return true; } }; } // namespace emscripten #endif // __cplusplus < 201103L #endif // __cplusplus PK!%,)3emscripten/cache/sysroot/include/emscripten/stack.h/* * Copyright 2020 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include // API that gives access to introspecting the Wasm data stack. #ifdef __cplusplus extern "C" { #endif // Returns the starting address of the stack. This is the address // that the stack pointer would point to when no bytes are in use on the stack. uintptr_t emscripten_stack_get_base(void); // Returns the end address of the stack. This is the address that the stack // pointer would point to when the whole stack is in use. (the address pointed // to by the end is not part of the stack itself). Note that the stack grows // down so the address returned by emscripten_stack_get_end() is smaller than // emscripten_stack_get_base(). uintptr_t emscripten_stack_get_end(void); // Setup internal base/end values based on the initial values that were either // set at compile time (in static linking) or instantiation time (for dynamic // linking). void emscripten_stack_init(void); // Sets the internal values reported by emscripten_stack_get_base() and // emscripten_stack_get_end(). This should be only used by low level libraries // such as asyncify fibers. void emscripten_stack_set_limits(void* _Nonnull base, void* _Nonnull end); // Returns the current stack pointer. uintptr_t emscripten_stack_get_current(void); // Returns the number of free bytes left on the stack. This is required to be // fast so that it can be called frequently. size_t emscripten_stack_get_free(void); #ifdef __cplusplus } #endif PK!7R>6emscripten/cache/sysroot/include/emscripten/syscalls.h/* * Copyright 2026 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #include #include #include #include #include #include #ifdef __cplusplus extern "C" { #endif int __syscall_chdir(const char *path); int __syscall_mknod(const char *path, mode_t mode, dev_t dev); int __syscall_chmod(const char *path, mode_t mode); pid_t __syscall_getpid(void); int __syscall_access(const char *path, int amode); int __syscall_sync(void); int __syscall_rmdir(const char *path); int __syscall_dup(int fd); int __syscall_acct(const char *filename); int __syscall_ioctl(int fd, int request, ...); int __syscall_setpgid(pid_t pid, pid_t gpid); mode_t __syscall_umask(mode_t mask); pid_t __syscall_getppid(void); pid_t __syscall_getpgrp(void); pid_t __syscall_setsid(void); int __syscall_getrusage(int who, struct rusage *usage); int __syscall_munmap(void *addr, size_t len); int __syscall_fchmod(int fd, mode_t mode); int __syscall_getpriority(int which, id_t who); int __syscall_setpriority(int which, id_t who, int prio); int __syscall_socketcall(int call, long args[6]); pid_t __syscall_wait4(pid_t pid, int *wstatus, int options, struct rusage *rusage); int __syscall_setdomainname(const char *name, size_t len); int __syscall_uname(struct utsname *buf); int __syscall_mprotect(size_t start, size_t len, int prot); pid_t __syscall_getpgid(pid_t pid); int __syscall_fchdir(int fd); int __syscall_msync(void *addr, size_t len, int flags); pid_t __syscall_getsid(pid_t pid); int __syscall_fdatasync(int fd); int __syscall_mlock(const void *addr, size_t len); int __syscall_munlock(const void *addr, size_t len); int __syscall_mlockall(int flags); int __syscall_munlockall(void); int __syscall_mremap(void *old_addr, size_t old_size, size_t new_size, int flags, void *new_addr); int __syscall_poll(struct pollfd *fds, nfds_t nfds, int timeout); int __syscall_poll_nonblocking(struct pollfd *fds, nfds_t nfds); int __syscall_getcwd(char *buf, size_t size); intptr_t __syscall_mmap2(void *addr, size_t len, int prot, int flags, int fd, off_t offset); int __syscall_truncate64(const char *path, off_t length); int __syscall_ftruncate64(int fd, off_t length); int __syscall_stat64(const char *path, struct stat *buf); int __syscall_lstat64(const char *path, struct stat *buf); int __syscall_fstat64(int fd, struct stat *buf); uid_t __syscall_getuid32(void); gid_t __syscall_getgid32(void); uid_t __syscall_geteuid32(void); gid_t __syscall_getegid32(void); int __syscall_setreuid32(uid_t ruid, uid_t euid); int __syscall_setregid32(gid_t rgid, gid_t egid); int __syscall_getgroups32(int count, gid_t list[]); int __syscall_fchown32(int fd, uid_t owner, gid_t group); int __syscall_setresuid32(uid_t ruid, uid_t euid, uid_t suid); int __syscall_getresuid32(uid_t *ruid, uid_t *euid, uid_t *suid); int __syscall_setresgid32(gid_t rgid, gid_t egid, gid_t sgid); int __syscall_getresgid32(gid_t *rgid, gid_t *egid, gid_t *sgid); int __syscall_setuid32(uid_t uid); int __syscall_setgid32(gid_t gid); int __syscall_mincore(void *addr, size_t length, unsigned char *vec); int __syscall_madvise(void *addr, size_t length, int advice); int __syscall_getdents64(int fd, void *dirp, size_t count); int __syscall_fcntl64(int fd, int cmd, ...); int __syscall_statfs64(const char *path, size_t size, struct statfs *buf); int __syscall_fstatfs64(int fd, size_t size, struct statfs *buf); int __syscall_fadvise64(int fd, off_t offset, off_t len, int advice); int __syscall_openat(int dirfd, const char *path, int flags, ...); // mode is optional int __syscall_mkdirat(int dirfd, const char *path, mode_t mode); int __syscall_mknodat(int dirfd, const char *path, mode_t mode, dev_t dev); int __syscall_fchownat(int dirfd, const char *path, uid_t owner, gid_t group, int flags); int __syscall_newfstatat(int dirfd, const char *path, struct stat *buf, int flags); int __syscall_unlinkat(int dirfd, const char *path, int flags); int __syscall_renameat(int olddirfd, const char *oldpath, int newdirfd, const char *newpath); int __syscall_linkat(int olddirfd, const char *oldpath, int newdirfd, const char *newpath, int flags); int __syscall_symlinkat(const char *target, int newdirfd, const char *linkpath); int __syscall_readlinkat(int dirfd, const char *path, char *buf, size_t bufsize); int __syscall_fchmodat2(int dirfd, const char *path, mode_t mode, int flags); int __syscall_faccessat(int dirfd, const char *path, int amode, int flags); int __syscall_utimensat(int dirfd, const char *path, const struct timespec times[2], int flags); int __syscall_fallocate(int fd, int mode, off_t offset, off_t len); int __syscall_dup3(int oldfd, int newfd, int flags); int __syscall_pipe2(int fd[2], int flags); int __syscall_prlimit64(pid_t pid, int resource, const struct rlimit *new_limit, struct rlimit *old_limit); int __syscall_socket(int domain, int type, int protocol, int unused1, int unused2, int unused3); int __syscall_socketpair(int domain, int type, int protocol, int fd[2], int unused1, int unused2); int __syscall_bind(int sockfd, const struct sockaddr *addr, socklen_t len, int unused1, int unused2, int unused3); int __syscall_connect(int sockfd, const struct sockaddr *addr, socklen_t len, int unused1, int unused2, int unused3); int __syscall_listen(int sockfd, int backlog, int unused1, int unused2, int unused3, int unused4); int __syscall_accept4(int sockfd, struct sockaddr *addr, socklen_t *len, int flags, int unused1, int unused2); int __syscall_getsockopt(int sockfd, int level, int optname, void *optval, socklen_t *optlen, int unused); int __syscall_setsockopt(int sockfd, int level, int optname, const void *optval, socklen_t optlen, int unused); int __syscall_getsockname(int sockfd, struct sockaddr *addr, socklen_t *len, int unused1, int unused2, int unused3); int __syscall_getpeername(int sockfd, struct sockaddr *addr, socklen_t *len, int unused1, int unused2, int unused3); int __syscall_sendto(int sockfd, const void *buf, size_t len, int flags, const struct sockaddr *addr, socklen_t alen); int __syscall_sendmsg(int sockfd, const struct msghdr *msg, int flags, int unused1, int unused2, int unused3); int __syscall_recvfrom(int sockfd, void *buf, size_t len, int flags, struct sockaddr *addr, socklen_t *alen); int __syscall_recvmsg(int sockfd, struct msghdr *msg, int flags, int unused1, int unused2, int unused3); int __syscall_shutdown(int sockfd, int how, int unused1, int unused2, int unused3, int unused4); int __syscall_epoll_create1(int flags); int __syscall_epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev); int __syscall_epoll_pwait(int epfd, struct epoll_event *ev, int maxevents, int timeout, const sigset_t *sigmask, size_t sigsetsize); int __syscall_epoll_pwait_nonblocking(int epfd, struct epoll_event *ev, int maxevents); #ifdef __cplusplus } #endif PK!ӕ7emscripten/cache/sysroot/include/emscripten/threading.h/* * Copyright 2015 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include // Legacy proxying functions. See proxying.h for the new proxying system. #include #include #include #include #include #ifdef __cplusplus extern "C" { #endif // Returns true if the current runtime is able to spawn threads with shared // memory. If this function returns false then it will not be possible to // create new pthreads or Wasm Workers. bool emscripten_has_threading_support(void); // Returns the number of logical cores on the system. int emscripten_num_logical_cores(void); // Returns true if the current thread is the thread that hosts the Emscripten // runtime. // Returns false on pthreads and Wasm Workers. bool emscripten_is_main_runtime_thread(void); // Returns true if the current thread is the main browser thread. In the case // that the Emscripten module is started in a worker there will be no thread // for which this returns true. // Returns false on pthreads and Wasm Workers. bool emscripten_is_main_browser_thread(void); // A temporary workaround to issue // https://github.com/emscripten-core/emscripten/issues/3495: // Call this in the body of all lock-free atomic (cas) loops that the main // thread might enter which don't otherwise call to any pthread api calls // (mutexes) or C runtime functions that are considered cancellation points. void emscripten_main_thread_process_queued_calls(void); void emscripten_current_thread_process_queued_calls(void); // Returns the thread ID of the thread that hosts the Emscripten runtime. pthread_t emscripten_main_runtime_thread_id(void); // Synchronously sleeps the calling thread for the given number of milliseconds. // Note: Calling this on the main browser thread is _very_ _very_ bad for // application logic throttling, because it does not save any battery, it will // spin up the CPU at 100%, lock up the UI, printfs will not come through on web // page or the console, and eventually it will show up the slow script dialog. // Calling this function in a pthread (Web Worker) is fine, and a good way to go // if you need to synchronously sleep for a specific amount of time while saving // power. // Note 2: This function will process the pthread-specific event queue for the // calling thread while sleeping, and this function also acts as a // cancellation point. // Note 3: This function is enabled when targeting pthreads (SharedArrayBuffer), // not to be confused with // similarly named function emscripten_sleep(), which is intended for // Asyncify builds. void emscripten_thread_sleep(double msecs); // Sets the name of the given thread. Pass pthread_self() as the thread ID to // set the name of the calling thread. // The name parameter is a UTF-8 encoded string which is truncated to 32 bytes. // When thread profiler is not enabled (not building with --threadprofiler), // this is a no-op. void emscripten_set_thread_name(pthread_t threadId, const char * _Nonnull name); // Gets the stored pointer to a string representing the canvases to transfer to // the created thread. int emscripten_pthread_attr_gettransferredcanvases(const pthread_attr_t * _Nonnull a, const char ** _Nonnull str); // Specifies a comma-delimited list of canvas DOM element IDs to transfer to the // thread to be created. // Note: this pointer is weakly stored (not copied) to the given pthread_attr_t, // so must be held alive until pthread_create() has been called. If 0 or "", no // canvases are transferred. // The special value "#canvas" denotes the element stored in Module.canvas. int emscripten_pthread_attr_settransferredcanvases(pthread_attr_t * _Nonnull a, const char * _Nonnull str); // Called when blocking on the main thread. This will error if main thread // blocking is not enabled, see ALLOW_BLOCKING_ON_MAIN_THREAD. void emscripten_check_blocking_allowed(void); #ifdef __cplusplus } #endif PK!@``>emscripten/cache/sysroot/include/emscripten/threading_legacy.h/* * Copyright 2015 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. * * Legacy proxying functions. See proxying.h for the new proxying system. */ #pragma once #include #include #ifdef __cplusplus extern "C" { #endif #define emscripten_main_browser_thread_id() emscripten_main_runtime_thread_id() #pragma clang deprecated(emscripten_main_browser_thread_id, "use emscripten_main_runtime_thread_id instead") typedef struct em_queued_call em_queued_call; // Encode function signatures into a single uint32_t integer. // N.B. This encoding scheme is internal to the implementation, and can change // in the future. Do not depend on the exact numbers in this scheme. #define EM_FUNC_SIGNATURE unsigned int // Proxied JS function can support a few more arguments than proxied C/C++ // functions, because the dispatch is variadic and signature independent. #define EM_QUEUED_JS_CALL_MAX_ARGS 20 // The encoding scheme is as follows: // - highest three bits identify the type of the return value #define EM_FUNC_SIG_RETURN_VALUE_MASK (0x7U << 29) #define EM_FUNC_SIG_RETURN_VALUE_V 0 #define EM_FUNC_SIG_RETURN_VALUE_I (0x1U << 29) #define EM_FUNC_SIG_RETURN_VALUE_J (0x2U << 29) #define EM_FUNC_SIG_RETURN_VALUE_F (0x3U << 29) #define EM_FUNC_SIG_RETURN_VALUE_D (0x4U << 29) #if __wasm64__ #define EM_FUNC_SIG_RETURN_VALUE_P EM_FUNC_SIG_RETURN_VALUE_J #else #define EM_FUNC_SIG_RETURN_VALUE_P EM_FUNC_SIG_RETURN_VALUE_I #endif // - next highest four bits specify the number of input parameters to the // function (allowed values are 0-12, inclusively) #define EM_FUNC_SIG_NUM_PARAMETERS_SHIFT 25 #define EM_FUNC_SIG_NUM_PARAMETERS_MASK (0xFU << EM_FUNC_SIG_NUM_PARAMETERS_SHIFT) #define EM_FUNC_SIG_WITH_N_PARAMETERS(x) (((EM_FUNC_SIGNATURE)(x)) << EM_FUNC_SIG_NUM_PARAMETERS_SHIFT) // - starting from the lowest bits upwards, each pair of two subsequent bits // specifies the type of an input parameter. // That is, bits 1:0 encode the type of the first input, bits 3:2 encode the // type of the second input, and so on. #define EM_FUNC_SIG_ARGUMENTS_TYPE_MASK (~(EM_FUNC_SIG_RETURN_VALUE_MASK | EM_FUNC_SIG_NUM_PARAMETERS_MASK)) #define EM_FUNC_SIG_ARGUMENT_TYPE_SIZE_MASK 0x3U #define EM_FUNC_SIG_ARGUMENT_TYPE_SIZE_SHIFT 2 #define EM_FUNC_SIG_PARAM_I 0 #define EM_FUNC_SIG_PARAM_J 0x1U #define EM_FUNC_SIG_PARAM_F 0x2U #define EM_FUNC_SIG_PARAM_D 0x3U #if __wasm64__ #define EM_FUNC_SIG_PARAM_P EM_FUNC_SIG_PARAM_J #else #define EM_FUNC_SIG_PARAM_P EM_FUNC_SIG_PARAM_I #endif #define EM_FUNC_SIG_SET_PARAM(i, type) ((EM_FUNC_SIGNATURE)(type) << (EM_FUNC_SIG_ARGUMENT_TYPE_SIZE_SHIFT*i)) // Extra types used in WebGL glGet*() calls (not used in proxying) #define EM_FUNC_SIG_PARAM_B 0x4U #define EM_FUNC_SIG_PARAM_F2I 0x5U // In total, the above encoding scheme gives the following 32-bit structure for // the proxied function signatures (highest -> lowest bit order): // RRRiiiiSbbaa99887766554433221100 // where RRR is return type // iiii is the number of inputs // S denotes a special function (internal proxying mechanism for functions // related to built-in threading APIs, like thread creation itself) // 00-bb encode the type of up to 12 function parameters #define EM_FUNC_SIG_V (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(0)) #define EM_FUNC_SIG_D (EM_FUNC_SIG_RETURN_VALUE_D | EM_FUNC_SIG_WITH_N_PARAMETERS(0)) #define EM_FUNC_SIG_VI (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_FI (EM_FUNC_SIG_RETURN_VALUE_F | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_DI (EM_FUNC_SIG_RETURN_VALUE_D | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VIFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VFFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIFI (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIFFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VFFFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_IIFFF (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(5) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIFFFF (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(5) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_F) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_F)) #define EM_FUNC_SIG_VIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(6) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(7) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(8) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(9) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(8, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(10) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(8, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(9, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(11) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(8, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(9, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(10, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_I (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(0)) #define EM_FUNC_SIG_II (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_III (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIJ (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_J)) #define EM_FUNC_SIG_IIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIPP (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_IIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(5) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(6) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIIIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(7) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(8) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IIIIIIIIII (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(9) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(8, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_IP (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_PI (EM_FUNC_SIG_RETURN_VALUE_P | EM_FUNC_SIG_WITH_N_PARAMETERS(1) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_PPP (EM_FUNC_SIG_RETURN_VALUE_P | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_PII (EM_FUNC_SIG_RETURN_VALUE_P | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_PIIII (EM_FUNC_SIG_RETURN_VALUE_P | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIIJ (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_J)) #define EM_FUNC_SIG_VIPI (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(3) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_IIP (EM_FUNC_SIG_RETURN_VALUE_I | EM_FUNC_SIG_WITH_N_PARAMETERS(2) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIIPP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIPPI (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_P) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I)) #define EM_FUNC_SIG_VIIIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(4) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIIIIIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(6) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIIIIIIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(7) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_VIIIIIIIIP (EM_FUNC_SIG_RETURN_VALUE_V | EM_FUNC_SIG_WITH_N_PARAMETERS(9) | EM_FUNC_SIG_SET_PARAM(0, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(1, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(2, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(3, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(4, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(5, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(6, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(7, EM_FUNC_SIG_PARAM_I) | EM_FUNC_SIG_SET_PARAM(8, EM_FUNC_SIG_PARAM_P)) #define EM_FUNC_SIG_NUM_FUNC_ARGUMENTS(x) ((((EM_FUNC_SIGNATURE)x) & EM_FUNC_SIG_NUM_PARAMETERS_MASK) >> EM_FUNC_SIG_NUM_PARAMETERS_SHIFT) // There are some built-in special proxied functions, that embed the signatures // inside the above encoding scheme #define EM_FUNC_SIG_SPECIAL_INTERNAL (1 << 24) #define EM_PROXIED_FUNC_SPECIAL(x) (EM_FUNC_SIG_SPECIAL_INTERNAL | ((x) << 20)) // Runs the given function synchronously on the main Emscripten runtime thread. // If this thread is the main thread, the operation is immediately performed, // and the result is returned. // If the current thread is not the main Emscripten runtime thread (but a // pthread), the function // will be proxied to be called by the main thread. // - Calling emscripten_sync_* functions requires that the application was // compiled with pthreads support enabled (-pthread) and that the // browser supports SharedArrayBuffer specification. int emscripten_sync_run_in_main_runtime_thread_(EM_FUNC_SIGNATURE sig, void * _Nonnull func_ptr, ...); // The 'async' variant of the run_in_main_thread functions are otherwise the // same as the synchronous ones, except that the operation is performed in a // fire and forget manner. The call is placed to the command queue of the main // Emscripten runtime thread, but its completion is not waited for. As a result, // if the function did have a return value, the return value is not received. // - Note that multiple asynchronous commands from a single pthread/Worker are // guaranteed to be executed on the main thread in the program order they // were called in. void emscripten_async_run_in_main_runtime_thread_(EM_FUNC_SIGNATURE sig, void * _Nonnull func_ptr, ...); // The 'async_waitable' variant of the run_in_main_runtime_thread functions run // like the 'async' variants, except that while the operation starts off // asynchronously, the result is then later waited upon to receive the return // value. // - The object returned by this function call is dynamically allocated, and // should be freed up via a call to emscripten_async_waitable_close() after // the wait has been performed. em_queued_call *emscripten_async_waitable_run_in_main_runtime_thread_(EM_FUNC_SIGNATURE sig, void * _Nonnull func_ptr, ...); // Since we can't validate the function pointer type, allow implicit casting of // functions to void* without complaining. #define emscripten_sync_run_in_main_runtime_thread(sig, func_ptr, ...) emscripten_sync_run_in_main_runtime_thread_((sig), (void*)(func_ptr),##__VA_ARGS__) #ifdef __wasm64__ // For wasm64 we need to special handling of pointer (P) return types since // int and pointer have different widths void* emscripten_sync_run_in_main_runtime_thread_ptr_(EM_FUNC_SIGNATURE sig, void * _Nonnull func_ptr, ...); #define emscripten_sync_run_in_main_runtime_thread_ptr(sig, func_ptr, ...) emscripten_sync_run_in_main_runtime_thread_ptr_((sig), (void*)(func_ptr),##__VA_ARGS__) #else #define emscripten_sync_run_in_main_runtime_thread_ptr emscripten_sync_run_in_main_runtime_thread #endif #define emscripten_async_run_in_main_runtime_thread(sig, func_ptr, ...) emscripten_async_run_in_main_runtime_thread_((sig), (void*)(func_ptr),##__VA_ARGS__) #define emscripten_async_waitable_run_in_main_runtime_thread(sig, func_ptr, ...) emscripten_async_waitable_run_in_main_runtime_thread_((sig), (void*)(func_ptr),##__VA_ARGS__) EMSCRIPTEN_RESULT emscripten_wait_for_call_v(em_queued_call * _Nonnull call, double timeoutMSecs); EMSCRIPTEN_RESULT emscripten_wait_for_call_i(em_queued_call * _Nonnull call, double timeoutMSecs, int *outResult); void emscripten_async_waitable_close(em_queued_call * _Nonnull call); // Runs the given function on the specified thread. If we are currently on // that target thread then we just execute the call synchronously; otherwise it // is queued on that thread to execute asynchronously. // Returns 1 if it executed the code (i.e., it was on the target thread), and 0 // otherwise. int emscripten_dispatch_to_thread_args(pthread_t target_thread, EM_FUNC_SIGNATURE sig, void* _Nonnull func_ptr, void* satellite, va_list args); int emscripten_dispatch_to_thread_(pthread_t target_thread, EM_FUNC_SIGNATURE sig, void* _Nonnull func_ptr, void* satellite, ...); #define emscripten_dispatch_to_thread( \ target_thread, sig, func_ptr, satellite, ...) \ emscripten_dispatch_to_thread_( \ (target_thread), (sig), (void*)(func_ptr), (satellite), ##__VA_ARGS__) // Similar to emscripten_dispatch_to_thread, but always runs the // function asynchronously, even if on the same thread. This is less efficient // but may be simpler to reason about in some cases. int emscripten_dispatch_to_thread_async_args(pthread_t target_thread, EM_FUNC_SIGNATURE sig, void* _Nonnull func_ptr, void* satellite, va_list args); int emscripten_dispatch_to_thread_async_(pthread_t target_thread, EM_FUNC_SIGNATURE sig, void* _Nonnull func_ptr, void* satellite, ...); #define emscripten_dispatch_to_thread_async( \ target_thread, sig, func_ptr, satellite, ...) \ emscripten_dispatch_to_thread_async_( \ (target_thread), (sig), (void*)(func_ptr), (satellite), ##__VA_ARGS__) #ifdef __cplusplus } #endif PK!L.L.Bemscripten/cache/sysroot/include/emscripten/threading_primitives.h/* * Copyright 2026 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #ifdef __cplusplus extern "C" { #endif #define emscripten_lock_t volatile uint32_t // Use with syntax "emscripten_lock_t l = EMSCRIPTEN_LOCK_T_STATIC_INITIALIZER;" #define EMSCRIPTEN_LOCK_T_STATIC_INITIALIZER 0 void emscripten_lock_init(emscripten_lock_t * _Nonnull lock); // Attempts to acquire the specified lock. If the lock is free, then this // function acquires the lock and immediately returns true. If the lock is // not free at the time of the call, the calling thread is set to synchronously // sleep for at most maxWaitNanoseconds long, until another thread releases the // lock. If the lock is acquired within that period, the function returns // true. If the lock is not acquired within the specified period, then the // wait times out and false is returned. // NOTE: This function can be only called in a Worker, and not on the main // browser thread, because the main browser thread cannot synchronously // sleep to wait for locks. bool emscripten_lock_wait_acquire(emscripten_lock_t * _Nonnull lock, int64_t maxWaitNanoseconds); // Similar to emscripten_lock_wait_acquire(), but instead of waiting for at most // a specified timeout value, the thread will wait indefinitely long until the // lock can be acquired. // NOTE: The only way to abort this wait is to call // emscripten_terminate_wasm_worker() on the Worker. // NOTE: This function can be only called in a Worker, and not on the main // browser thread, because the main browser thread cannot synchronously // sleep to wait for locks. void emscripten_lock_waitinf_acquire(emscripten_lock_t * _Nonnull lock); // Similar to emscripten_lock_wait_acquire(), but instead of placing the calling // thread to sleep until the lock can be acquired, this function will burn CPU // cycles attempting to acquire the lock, until the given timeout is met. // This function can be called in both main thread and in Workers. // NOTE: The wait period used for this function is specified in milliseconds // instead of nanoseconds, see // https://github.com/WebAssembly/threads/issues/175 for details. // NOTE: If this function is called on the main thread, be sure to use a // reasonable max wait value, or otherwise a "slow script dialog" // notification can pop up, and can cause the browser to stop executing // the page. bool emscripten_lock_busyspin_wait_acquire(emscripten_lock_t * _Nonnull lock, double maxWaitMilliseconds); // Similar to emscripten_lock_wait_acquire(), but instead of placing the calling // thread to sleep until the lock can be acquired, this function will burn CPU // cycles indefinitely until the given lock can be acquired. // This function can be called in both main thread and in Workers. // NOTE: The only way to abort this wait is to call // emscripten_terminate_wasm_worker() on the Worker. If called on the main // thread, and the lock cannot be acquired within a reasonable time // period, this function will *HANG* the browser page content process, and // show up a "slow script dialog", and/or cause the browser to stop the // page. If you call this function on the main browser thread, be extra // careful to analyze that the given lock will be extremely fast to // acquire without contention from other threads. void emscripten_lock_busyspin_waitinf_acquire(emscripten_lock_t * _Nonnull lock); // Similar to emscripten_async_wait_callback_t but with a volatile first // argument. typedef void (*emscripten_async_wait_volatile_callback_t)(volatile void* address, uint32_t value, ATOMICS_WAIT_RESULT_T waitResult, void* userData); // Registers an *asynchronous* lock acquire operation. The calling thread will // asynchronously try to obtain the given lock after the calling thread yields // back to the event loop. If the attempt is successful within // maxWaitMilliseconds period, then the given callback asyncWaitFinished is // called with waitResult == ATOMICS_WAIT_OK. If the lock is not acquired within // the timeout period, then the callback asyncWaitFinished is called with // waitResult == ATOMICS_WAIT_TIMED_OUT. // NOTE: Unlike function emscripten_lock_wait_acquire() which takes in the wait // timeout parameter as int64 nanosecond units, this function takes in the wait // timeout parameter as double millisecond units. See // https://github.com/WebAssembly/threads/issues/175 for more information. // NOTE: This function can be called in both main thread and in Workers. // NOTE 2: This function will always acquire the lock asynchronously. That is, // the lock will only be attempted to acquire after current control flow // yields back to the browser, so that the Wasm call stack is empty. // This is to guarantee a uniform control flow. If you use this API in // a Worker, you cannot utilise an infinite loop programming model. void emscripten_lock_async_acquire(emscripten_lock_t * _Nonnull lock, emscripten_async_wait_volatile_callback_t _Nonnull asyncWaitFinished, void *userData, double maxWaitMilliseconds); // Attempts to acquire a lock, returning true if successful. If the lock is // already held, this function will not sleep to wait until the lock is // released, but immediately returns false. // This function can be called on both main thread and in Workers. bool emscripten_lock_try_acquire(emscripten_lock_t * _Nonnull lock); // Unlocks the specified lock for another thread to access. Note that locks are // extremely lightweight, there is no "lock owner" tracking: this function does // not actually check whether the calling thread owns the specified lock, but // any thread can call this function to release a lock on behalf of whichever // thread owns it. This function can be called on both main thread and in // Workers. void emscripten_lock_release(emscripten_lock_t * _Nonnull lock); #define emscripten_semaphore_t volatile uint32_t // Use with syntax emscripten_semaphore_t s = EMSCRIPTEN_SEMAPHORE_T_STATIC_INITIALIZER(num); #define EMSCRIPTEN_SEMAPHORE_T_STATIC_INITIALIZER(num) ((int)(num)) void emscripten_semaphore_init(emscripten_semaphore_t * _Nonnull sem, int num); // main thread, try acquire num instances, but do not sleep to wait if not // available. // Returns idx that was acquired or -1 if acquire failed. int emscripten_semaphore_try_acquire(emscripten_semaphore_t * _Nonnull sem, int num); // main thread, poll to try acquire num instances. Returns idx that was // acquired. If you use this API in Worker, you cannot run an infinite loop. void emscripten_semaphore_async_acquire(emscripten_semaphore_t * _Nonnull sem, int num, emscripten_async_wait_volatile_callback_t _Nonnull asyncWaitFinished, void *userData, double maxWaitMilliseconds); // worker, sleep to acquire num instances. Returns idx that was acquired, or -1 // if timed out unable to acquire. int emscripten_semaphore_wait_acquire(emscripten_semaphore_t * _Nonnull sem, int num, int64_t maxWaitNanoseconds); // worker, sleep infinitely long to acquire num instances. Returns idx that was // acquired. int emscripten_semaphore_waitinf_acquire(emscripten_semaphore_t * _Nonnull sem, int num); // Releases the given number of resources back to the semaphore. Note that the // ownership of resources is completely conceptual - there is no actual checking // that the calling thread had previously acquired that many resources, so // programs need to keep check of their semaphore usage consistency themselves. // Returns how many resources were available in the semaphore before the new // resources were released back to the semaphore. (i.e. the index where the // resource was put back to) // [main thread or worker] uint32_t emscripten_semaphore_release(emscripten_semaphore_t * _Nonnull sem, int num); // Condition variable is an object that can be waited on, and another thread can // signal, while coordinating an access to a related mutex. #define emscripten_condvar_t volatile uint32_t // Use with syntax emscripten_condvar_t cv = EMSCRIPTEN_CONDVAR_T_STATIC_INITIALIZER; #define EMSCRIPTEN_CONDVAR_T_STATIC_INITIALIZER ((int)(0)) // Creates a new condition variable to the given memory location. void emscripten_condvar_init(emscripten_condvar_t * _Nonnull condvar); // Atomically performs the following: // 1. releases the given lock. The lock should (but does not strictly need to) // be held by the calling thread prior to this call. // 2. sleep the calling thread to wait for the specified condition variable to // be signaled. // 3. once the sleep has finished (another thread has signaled the condition // variable), the calling thread wakes up and reacquires the lock prior to // returning from this function. void emscripten_condvar_waitinf(emscripten_condvar_t * _Nonnull condvar, emscripten_lock_t * _Nonnull lock); // Same as the above, except that an attempt to wait for the condition variable // to become true is only performed for a maximum duration. // On success (no timeout), this function will return true. If the wait times // out, this function will return false. In this case, // the calling thread will not try to reacquire the lock. bool emscripten_condvar_wait(emscripten_condvar_t * _Nonnull condvar, emscripten_lock_t * _Nonnull lock, int64_t maxWaitNanoseconds); // Asynchronously wait for the given condition variable to signal. ATOMICS_WAIT_TOKEN_T emscripten_condvar_wait_async(emscripten_condvar_t * _Nonnull condvar, emscripten_lock_t * _Nonnull lock, emscripten_async_wait_callback_t _Nonnull asyncWaitFinished, void *userData, double maxWaitMilliseconds); // Signals the given number of waiters on the specified condition variable. // Pass numWaitersToSignal == EMSCRIPTEN_NOTIFY_ALL_WAITERS to wake all waiters // ("broadcast" operation). void emscripten_condvar_signal(emscripten_condvar_t * _Nonnull condvar, uint32_t numWaitersToSignal); // If the given memory address contains value val, puts the calling thread to // sleep waiting for that address to be notified. Like the linux futex syscall // this function returns negative errno values on failure. // Pass maxWaitMilliseconds = INFINITY (or __builtin_inf()) to sleep indefinitely. // Returns: // * negative value -EINVAL if addr is null. // * negative value -ETIMEDOUT if the maxWaitMilliseconds timeout was exceeded. // * negative value -EINTR if the operation was interrupted (e.g. a timer fired, or an // async signal was received). // * negative value -EWOULDBLOCK if the value of the memory address 'addr' was // not equal to 'val' to begin with. // * negative value -ECANCELED if the calling thread has been canceled. // * the value 0 on success (i.e. another thread signaled this address) int emscripten_futex_wait(volatile void/*uint32_t*/ * _Nonnull addr, uint32_t val, double maxWaitMilliseconds); // Wakes the given number of threads waiting on a location. Pass count == // INT_MAX to wake all waiters on that location. // Returns -EINVAL if addr is null. int emscripten_futex_wake(volatile void/*uint32_t*/ * _Nonnull addr, int count); #ifdef __cplusplus } #endif PK!ItZ773emscripten/cache/sysroot/include/emscripten/trace.h/* * Copyright 2014 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #ifdef __cplusplus extern "C" { #endif #ifdef __EMSCRIPTEN_TRACING__ void emscripten_trace_configure(const char *collector_url, const char *application); void emscripten_trace_configure_for_google_wtf(void); void emscripten_trace_configure_for_test(void); void emscripten_trace_set_enabled(bool enabled); void emscripten_trace_set_session_username(const char *username); void emscripten_trace_record_frame_start(void); void emscripten_trace_record_frame_end(void); void emscripten_trace_mark(const char *message); void emscripten_trace_log_message(const char *channel, const char *message); void emscripten_trace_report_error(const char *error); void emscripten_trace_record_allocation(const void *address, int32_t size); void emscripten_trace_record_reallocation(const void *old_address, const void *new_address, int32_t size); void emscripten_trace_record_free(const void *address); void emscripten_trace_annotate_address_type(const void *address, const char *type); void emscripten_trace_associate_storage_size(const void *address, int32_t size); void emscripten_trace_report_memory_layout(void); void emscripten_trace_report_off_heap_data(void); void emscripten_trace_enter_context(const char *name); void emscripten_trace_exit_context(void); void emscripten_trace_task_start(int task_id, const char *name); void emscripten_trace_task_associate_data(const char *key, const char *value); void emscripten_trace_task_suspend(const char *explanation); void emscripten_trace_task_resume(int task_id, const char *explanation); void emscripten_trace_task_end(void); void emscripten_trace_close(void); void emscripten_trace_sbrk_grow(intptr_t old, intptr_t new); #else #define emscripten_trace_configure(collector_url, application) ((void)0) #define emscripten_trace_configure_for_google_wtf() ((void)0) #define emscripten_trace_configure_for_test() ((void)0) #define emscripten_trace_set_enabled(enabled) ((void)0) #define emscripten_trace_set_session_username(username) ((void)0) #define emscripten_trace_record_frame_start() ((void)0) #define emscripten_trace_record_frame_end() ((void)0) #define emscripten_trace_mark(message) ((void)0) #define emscripten_trace_log_message(channel, message) ((void)0) #define emscripten_trace_report_error(error) ((void)0) #define emscripten_trace_record_allocation(address, size) ((void)0) #define emscripten_trace_record_reallocation(old_address, new_address, size) ((void)0) #define emscripten_trace_record_free(address) ((void)0) #define emscripten_trace_annotate_address_type(address, type) ((void)0) #define emscripten_trace_associate_storage_size(address, size) ((void)0) #define emscripten_trace_report_memory_layout() ((void)0) #define emscripten_trace_report_off_heap_data() ((void)0) #define emscripten_trace_enter_context(name) ((void)0) #define emscripten_trace_exit_context() ((void)0) #define emscripten_trace_task_start(task_id, taskname) ((void)0) #define emscripten_trace_task_associate_data(key, value) ((void)0) #define emscripten_trace_task_suspend(explanation) ((void)0) #define emscripten_trace_task_resume(task_id, explanation) ((void)0) #define emscripten_trace_task_end() ((void)0) #define emscripten_trace_close() ((void)0) #define emscripten_trace_sbrk_grow(old, new) ((void)0) #endif #ifdef __cplusplus } // ~extern "C" #endif PK!XOkOk1emscripten/cache/sysroot/include/emscripten/val.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #include // uintptr_t #include #include #include #include #if __cplusplus >= 202002L #include #include #include #endif namespace emscripten { class val; typedef struct _EM_VAL* EM_VAL; namespace internal { template val wrapped_extend(const std::string&, const val&); enum class EM_INVOKER_KIND { FUNCTION, METHOD, CONSTRUCTOR, CAST, }; // Implemented in JavaScript. Don't call these directly. extern "C" { void _emval_register_symbol(const char*); enum { _EMVAL_UNDEFINED = 2, _EMVAL_NULL = 4, _EMVAL_TRUE = 6, _EMVAL_FALSE = 8, _EMVAL_LAST_RESERVED_HANDLE = 8, }; typedef struct _EM_DESTRUCTORS* EM_DESTRUCTORS; typedef struct _EM_INVOKER* EM_INVOKER; typedef double EM_GENERIC_WIRE_TYPE; typedef const void* EM_VAR_ARGS; void _emval_incref(EM_VAL value); void _emval_decref(EM_VAL value); void _emval_run_destructors(EM_DESTRUCTORS handle); EM_VAL _emval_new_array(void); EM_VAL _emval_new_array_from_memory_view(EM_VAL mv); void _emval_array_to_memory_view(EM_VAL dst, EM_VAL src); EM_VAL _emval_new_object(void); EM_VAL _emval_new_cstring(const char*); EM_VAL _emval_new_u8string(const char*); EM_VAL _emval_new_u16string(const char16_t*); EM_VAL _emval_get_global(const char* name); EM_VAL _emval_get_module_property(const char* name); EM_VAL _emval_get_property(EM_VAL object, EM_VAL key); void _emval_set_property(EM_VAL object, EM_VAL key, EM_VAL value); bool _emval_equals(EM_VAL first, EM_VAL second); bool _emval_strictly_equals(EM_VAL first, EM_VAL second); bool _emval_greater_than(EM_VAL first, EM_VAL second); bool _emval_less_than(EM_VAL first, EM_VAL second); bool _emval_not(EM_VAL object); // DO NOT call this more than once per signature. It will // leak generated function objects! EM_INVOKER _emval_create_invoker( unsigned argCount, // including return value const TYPEID argTypes[], EM_INVOKER_KIND kind); EM_GENERIC_WIRE_TYPE _emval_invoke( EM_INVOKER caller, EM_VAL handle, const char* methodName, EM_DESTRUCTORS* destructors, EM_VAR_ARGS argv); int64_t _emval_invoke_i64( EM_INVOKER caller, EM_VAL handle, const char* methodName, EM_DESTRUCTORS* destructors, EM_VAR_ARGS argv); EM_VAL _emval_typeof(EM_VAL value); bool _emval_instanceof(EM_VAL object, EM_VAL constructor); bool _emval_is_number(EM_VAL object); bool _emval_is_string(EM_VAL object); bool _emval_in(EM_VAL item, EM_VAL object); bool _emval_delete(EM_VAL object, EM_VAL property); bool _emval_is_catchable_cpp_exception_object(EM_VAL object); [[noreturn]] bool _emval_throw(EM_VAL object); EM_VAL _emval_await(EM_VAL promise); EM_VAL _emval_iter_begin(EM_VAL iterable); EM_VAL _emval_iter_next(EM_VAL iterator); #if __cplusplus >= 202002L void _emval_coro_suspend(EM_VAL promise, void* coro_ptr); EM_VAL _emval_from_current_cxa_exception(); EM_VAL _emval_coro_make_promise(EM_VAL *resolve, EM_VAL *reject); #endif } // extern "C" template struct symbol_registrar { symbol_registrar() { internal::_emval_register_symbol(address); } }; struct DestructorsRunner { public: explicit DestructorsRunner(EM_DESTRUCTORS d) : destructors(d) {} ~DestructorsRunner() { if (destructors) { _emval_run_destructors(destructors); } } DestructorsRunner(const DestructorsRunner&) = delete; void operator=(const DestructorsRunner&) = delete; private: EM_DESTRUCTORS destructors; }; template struct GenericWireTypeConverter { static WireType from(double wt) { return static_cast(wt); } }; template struct GenericWireTypeConverter { static Pointee* from(double wt) { return reinterpret_cast(static_cast(wt)); } }; template<> struct GenericWireTypeConverter::WireType> { static BindingType::WireType from(double) { return {}; } }; template struct PackSize; template<> struct PackSize<> { static constexpr size_t value = 0; }; template struct PackSize { static constexpr size_t value = (sizeof(typename BindingType::WireType) + 7) / 8 + PackSize::value; }; union GenericWireType { union { unsigned u; size_t s; float f; const void* p; } w[2]; double d; uint64_t u; }; static_assert(sizeof(GenericWireType) == 2*sizeof(void*), "GenericWireType must be size of 2 pointers"); static_assert(alignof(GenericWireType) == 8, "GenericWireType must be 8-byte-aligned"); inline void writeGenericWireType(GenericWireType*& cursor, float wt) { cursor->w[0].f = wt; ++cursor; } inline void writeGenericWireType(GenericWireType*& cursor, double wt) { cursor->d = wt; ++cursor; } inline void writeGenericWireType(GenericWireType*& cursor, int64_t wt) { cursor->u = wt; ++cursor; } inline void writeGenericWireType(GenericWireType*& cursor, uint64_t wt) { cursor->u = wt; ++cursor; } // Explicit overload for size_t to prevent fallback to the 32-bit generic template inline void writeGenericWireType(GenericWireType*& cursor, std::size_t wt) { cursor->w[0].s = wt; // Uses the size_t member (64-bit in Memory64) ++cursor; } template void writeGenericWireType(GenericWireType*& cursor, T* wt) { cursor->w[0].p = wt; ++cursor; } template inline void writeGenericWireType(GenericWireType*& cursor, const memory_view& wt) { cursor->w[0].s = wt.size; cursor->w[1].p = (void*)wt.data; ++cursor; } template void writeGenericWireType(GenericWireType*& cursor, T wt) { static_assert(sizeof(T) <= sizeof(cursor->w[0].u), "Generic wire type must be smaller than unsigned."); cursor->w[0].u = static_cast(wt); ++cursor; } inline void writeGenericWireTypes(GenericWireType*&) { } template EMSCRIPTEN_ALWAYS_INLINE void writeGenericWireTypes(GenericWireType*& cursor, First&& first, Rest&&... rest) { writeGenericWireType(cursor, BindingType::toWireType(std::forward(first), rvp::default_tag{})); writeGenericWireTypes(cursor, std::forward(rest)...); } template struct WireTypePack { WireTypePack(Args&&... args) { GenericWireType* cursor = elements.data(); writeGenericWireTypes(cursor, std::forward(args)...); } operator EM_VAR_ARGS() const { return elements.data(); } private: std::array::value> elements; }; } // end namespace internal #define EMSCRIPTEN_SYMBOL(name) \ static const char name##_symbol[] = #name; \ static const ::emscripten::internal::symbol_registrar name##_registrar class EMBIND_VISIBILITY_DEFAULT val { public: // missing operators: // * ~ - + ++ -- // * * / % // * + - // * << >> >>> // * & ^ | && || ?: // // exposing void, comma, and conditional is unnecessary // same with: = += -= *= /= %= <<= >>= >>>= &= ^= |= static val array() { return val(internal::_emval_new_array()); } template static val array(Iter begin, Iter end) { #if __cplusplus >= 202002L if constexpr (std::contiguous_iterator && internal::typeSupportsMemoryView< typename std::iterator_traits::value_type>()) { val view{ typed_memory_view(std::distance(begin, end), std::to_address(begin)) }; return val(internal::_emval_new_array_from_memory_view(view.as_handle())); } // For numeric arrays, the following code is unreachable and the compiler // will do 'dead code elimination'. // Others fallback old way. #endif val new_array = array(); for (auto it = begin; it != end; ++it) { new_array.call("push", *it); } return new_array; } template static val array(const std::vector& vec) { if constexpr (internal::typeSupportsMemoryView()) { // for numeric types, pass memory view and copy in JS side one-off val view{ typed_memory_view(vec.size(), vec.data()) }; return val(internal::_emval_new_array_from_memory_view(view.as_handle())); } else { return array(vec.begin(), vec.end()); } } static val object() { return val(internal::_emval_new_object()); } static val u8string(const char* s) { return val(internal::_emval_new_u8string(s)); } static val u16string(const char16_t* s) { return val(internal::_emval_new_u16string(s)); } static val undefined() { return val(EM_VAL(internal::_EMVAL_UNDEFINED)); } static val null() { return val(EM_VAL(internal::_EMVAL_NULL)); } static val take_ownership(EM_VAL e) { return val(e); } static val global(const char* name = 0) { return val(internal::_emval_get_global(name)); } static val module_property(const char* name) { return val(internal::_emval_get_module_property(name)); } template explicit val(T&& value, Policies...) { using namespace internal; new (this) val(internalCallWithPolicy, val>(nullptr, nullptr, std::forward(value))); } val() : val(EM_VAL(internal::_EMVAL_UNDEFINED)) {} explicit val(const char* v) : val(internal::_emval_new_cstring(v)) {} // Note: unlike other constructors, this doesn't use as_handle() because // it just moves a value and doesn't need to go via incref/decref. // This means it's safe to move values across threads - an error will // only arise if you access or free it from the wrong thread later. val(val&& v) : handle(v.handle), thread(v.thread) { v.handle = 0; } val(const val& v) : val(v.as_handle()) { if (uses_ref_count()) { internal::_emval_incref(handle); } } // Add an explicit overload for `val&` as well. // Without it, C++ will try to use the `T&&` constructor instead of the more // efficient `val(const val&)` when trying to copy a `val` instance. val(val& v) : val(static_cast(v)) {} ~val() { if (uses_ref_count()) { internal::_emval_decref(as_handle()); handle = 0; } } EM_VAL as_handle() const { #ifdef __EMSCRIPTEN_PTHREADS__ assert(pthread_equal(thread, pthread_self()) && "val accessed from wrong thread"); #endif return handle; } // Takes ownership of the handle away from, and invalidates, this instance. EM_VAL release_ownership() { EM_VAL taken = as_handle(); handle = 0; return taken; } val& operator=(val&& v) & { val tmp(std::move(v)); this->~val(); new (this) val(std::move(tmp)); return *this; } val& operator=(const val& v) & { return *this = val(v); } bool hasOwnProperty(const char* key) const { return val::global("Object")["prototype"]["hasOwnProperty"].call("call", *this, val(key)); } bool isNull() const { return as_handle() == EM_VAL(internal::_EMVAL_NULL); } bool isUndefined() const { return as_handle() == EM_VAL(internal::_EMVAL_UNDEFINED); } bool isTrue() const { return as_handle() == EM_VAL(internal::_EMVAL_TRUE); } bool isFalse() const { return as_handle() == EM_VAL(internal::_EMVAL_FALSE); } bool isNumber() const { return internal::_emval_is_number(as_handle()); } bool isString() const { return internal::_emval_is_string(as_handle()); } bool isArray() const { return instanceof(global("Array")); } bool equals(const val& v) const { return internal::_emval_equals(as_handle(), v.as_handle()); } bool operator==(const val& v) const { return equals(v); } bool operator!=(const val& v) const { return !equals(v); } bool strictlyEquals(const val& v) const { return internal::_emval_strictly_equals(as_handle(), v.as_handle()); } bool operator>(const val& v) const { return internal::_emval_greater_than(as_handle(), v.as_handle()); } bool operator>=(const val& v) const { return (*this > v) || (*this == v); } bool operator<(const val& v) const { return internal::_emval_less_than(as_handle(), v.as_handle()); } bool operator<=(const val& v) const { return (*this < v) || (*this == v); } bool operator!() const { return internal::_emval_not(as_handle()); } template val operator[](const T& key) const { return val(internal::_emval_get_property(as_handle(), val_ref(key).as_handle())); } template void set(const K& key, const V& value, Policies... policies) { internal::_emval_set_property(as_handle(), val_ref(key).as_handle(), val_ref(value, policies...).as_handle()); } template bool delete_(const T& property) const { return internal::_emval_delete(as_handle(), val_ref(property).as_handle()); } template val new_(Args&&... args) const { using namespace internal; return internalCall(as_handle(), nullptr, std::forward(args)...); } template val operator()(Args&&... args) const { using namespace internal; return internalCall(as_handle(), nullptr, std::forward(args)...); } template ReturnValue call(const char* name, Args&&... args) const { using namespace internal; return internalCall(as_handle(), name, std::forward(args)...); } template T as(Policies...) const { using namespace internal; return internalCallWithPolicy, T>(as_handle(), nullptr, *this); } // Prefer calling val::typeOf() over val::typeof(), since this form works in both C++11 and GNU++11 build modes. "typeof" is a reserved word in GNU++11 extensions. val typeOf() const { return val(internal::_emval_typeof(as_handle())); } // If code is not being compiled with GNU extensions enabled, typeof() is a valid identifier, so support that as a member function. #if __is_identifier(typeof) [[deprecated("Use typeOf() instead.")]] val typeof() const { return typeOf(); } #endif bool instanceof(const val& v) const { return internal::_emval_instanceof(as_handle(), v.as_handle()); } bool in(const val& v) const { return internal::_emval_in(as_handle(), v.as_handle()); } [[noreturn]] void throw_() const { internal::_emval_throw(as_handle()); } val await() const { return val(internal::_emval_await(as_handle())); } struct iterator; iterator begin() const; // our iterators are sentinel-based range iterators; use nullptr as the end sentinel constexpr nullptr_t end() const { return nullptr; } #if __cplusplus >= 202002L class awaiter; awaiter operator co_await() const; class promise_type; #endif private: // takes ownership, assumes handle already incref'd and lives on the same thread explicit val(EM_VAL handle) : #ifdef __EMSCRIPTEN_PTHREADS__ thread(pthread_self()), #endif handle(handle) {} // Whether this value is a uses incref/decref (true) or is a special reserved // value (false). bool uses_ref_count() const { return handle > reinterpret_cast(internal::_EMVAL_LAST_RESERVED_HANDLE); } template friend val internal::wrapped_extend(const std::string& , const val& ); template static Ret internalCall(EM_VAL handle, const char *methodName, Args&&... args) { using namespace internal; using Policy = WithPolicies>; auto filteredArgs = Filter(args...); return std::apply( [&](auto&&... actualArgs) -> decltype(auto) { return internalCallWithPolicy(handle, methodName, std::forward(actualArgs)...); }, filteredArgs ); } template static Ret internalCallWithPolicy(EM_VAL handle, const char *methodName, Args&&... args) { using namespace internal; using RetWire = typename BindingType::WireType; static constexpr typename Policy::template ArgTypeList argTypes; thread_local EM_INVOKER mc = _emval_create_invoker(argTypes.getCount(), argTypes.getTypes(), Kind); WireTypePack argv(std::forward(args)...); EM_DESTRUCTORS destructors = nullptr; RetWire result; if constexpr (std::is_integral::value && sizeof(RetWire) == 8) { // 64-bit integers can't go through "generic wire type" because double and int64 have different ABI. result = static_cast(_emval_invoke_i64( mc, handle, methodName, &destructors, argv)); } else { result = GenericWireTypeConverter::from(_emval_invoke( mc, handle, methodName, &destructors, argv)); } DestructorsRunner rd(destructors); return BindingType::fromWireType(result); } template val val_ref(const T& v, Policies... policies) const { return val(v, policies...); } const val& val_ref(const val& v) const { return v; } pthread_t thread; EM_VAL handle; template friend struct ::emscripten::internal::BindingType; }; struct val::iterator { iterator() = delete; // Make sure iterator is only moveable, not copyable as it represents a mutable state. iterator(iterator&&) = default; iterator(const val& v) : iter(internal::_emval_iter_begin(v.as_handle())) { this->operator++(); } val&& operator*() { return std::move(cur_value); } const val& operator*() const { return cur_value; } void operator++() { cur_value = val(internal::_emval_iter_next(iter.as_handle())); } bool operator!=(nullptr_t) const { return cur_value.as_handle() != nullptr; } private: val iter; val cur_value; }; inline val::iterator val::begin() const { return iterator(*this); } #if __cplusplus >= 202002L // Awaiter defines a set of well-known methods that compiler uses // to drive the argument of the `co_await` operator (regardless // of the type of the parent coroutine). // This one is used for Promises represented by the `val` type. class val::awaiter { struct state_promise { val promise; }; struct state_coro { std::coroutine_handle<> handle; // Is std::coroutine_handle? // In other words, are we also enclosed by a JS Promise? bool is_val_promise = false; }; struct state_result { val result; }; struct state_error { val error; }; // State machine holding awaiter's current state. One of: std::variant< state_promise, // Initially created with the JS Promise we're awaiting state_coro, // Waiting with a given coroutine handle state_result, // Resolved with result state_error // Rejected with error > state; void await_suspend_impl(state_coro coro) { // Use get_if instead of get because we want it to work with exceptions disabled. auto* promise_ptr = std::get_if(&state); assert(promise_ptr && "Invalid awaiter state: expected JS Promise. An awaiter cannot be awaited multiple times."); internal::_emval_coro_suspend(promise_ptr->promise.as_handle(), this); state.emplace(coro); } public: awaiter(val promise) : state(std::in_place_type, std::move(promise)) {} // just in case, ensure nobody moves / copies this type around awaiter(const awaiter&) = delete; awaiter& operator=(const awaiter&) = delete; // Promises don't have a synchronously accessible "ready" state. bool await_ready() const { return false; } // On suspend, store the coroutine handle and invoke a helper that will do // a rough equivalent of // `promise.then(value => this.resume_with(value)).catch(error => this.reject_with(error))`. void await_suspend(std::coroutine_handle handle) { await_suspend_impl({handle, true}); } void await_suspend(std::coroutine_handle<> handle) { await_suspend_impl({handle, false}); } // When JS invokes `resume_with` with some value, store that value and resume // the coroutine. void resume_with(val&& result) { auto* coro_ptr = std::get_if(&state); assert(coro_ptr && "Invalid awaiter state: expected suspended coroutine handle."); auto coro = *coro_ptr; state.emplace(std::move(result)); coro.handle.resume(); } // When JS invokes `reject_with` with some error value, reject currently suspended // coroutine's promise with the error value and destroy coroutine frame, because // in this scenario coroutine never reaches final_suspend point to be destroyed automatically. void reject_with(val&& error); // `await_resume` finalizes the awaiter and should return the result // of the `co_await ...` expression - in our case, the stored value. val await_resume() { if (auto* result = std::get_if(&state)) { return std::move(result->result); } // If a JS exception ended up here, it will be uncaught as C++ code cannot catch it auto* error_ptr = std::get_if(&state); assert(error_ptr && "Invalid awaiter state: expected result or error."); error_ptr->error.throw_(); } }; inline val::awaiter val::operator co_await() const { return {*this}; } // `promise_type` is a well-known subtype with well-known method names // that compiler uses to drive the coroutine itself // (`T::promise_type` is used for any coroutine with declared return type `T`). class val::promise_type { val promise, resolve, reject; public: // Create a `new Promise` and store it alongside the `resolve` and `reject` // callbacks that can be used to fulfill it. promise_type() { EM_VAL resolve_handle; EM_VAL reject_handle; promise = val(internal::_emval_coro_make_promise(&resolve_handle, &reject_handle)); resolve = val(resolve_handle); reject = val(reject_handle); } // Return the stored promise as the actual return value of the coroutine. val get_return_object() { return promise; } // For similarity with JS async functions, our coroutines are eagerly evaluated. auto initial_suspend() noexcept { return std::suspend_never{}; } auto final_suspend() noexcept { return std::suspend_never{}; } // On an unhandled exception, reject the stored promise instead of throwing // it asynchronously where it can't be handled. void unhandled_exception() { #ifdef __cpp_exceptions try { std::rethrow_exception(std::current_exception()); } catch (const val& error) { reject(error); } catch (...) { val error = val(internal::_emval_from_current_cxa_exception()); reject(error); } #else std::terminate(); #endif } // Reject the stored promise due to rejection deeper in the call chain void reject_with(val&& error) { reject(std::move(error)); } // Resolve the stored promise on `co_return value`. template void return_value(T&& value) { resolve(std::forward(value)); } }; inline void val::awaiter::reject_with(val&& error) { auto* coro_ptr = std::get_if(&state); assert(coro_ptr && "Invalid awaiter state: expected suspended coroutine handle."); auto coro = *coro_ptr; if (coro.is_val_promise) { if (!internal::_emval_is_catchable_cpp_exception_object(error.as_handle())) { // C++ code cannot catch JS exceptions. // Thus, we can just reject an enclosing JS Promise. auto& promise = std::coroutine_handle::from_address(coro.handle.address()).promise(); promise.reject_with(std::move(error)); coro.handle.destroy(); return; } } state.emplace(std::move(error)); coro.handle.resume(); } #endif // Declare a custom type that can be used in conjunction with // emscripten::register_type to emit custom TypeScript definitions for val // types. #define EMSCRIPTEN_DECLARE_VAL_TYPE(name) \ struct name : public ::emscripten::val { \ explicit name(val const &other) : val(other) {} \ }; namespace internal { template struct BindingType::value && !std::is_const::value>::type> { typedef EM_VAL WireType; // Marshal to JS with move semantics when we can invalidate the temporary val // object. static WireType toWireType(val&& v, rvp::default_tag) { return v.release_ownership(); } // Marshal to JS with copy semantics when we cannot transfer the val object's // reference count. static WireType toWireType(const val& v, rvp::default_tag) { EM_VAL handle = v.as_handle(); if (v.uses_ref_count()) { _emval_incref(handle); } return handle; } static T fromWireType(WireType v) { return T(val::take_ownership(v)); } }; template struct BindingType> { using ValBinding = BindingType; using WireType = ValBinding::WireType; template static WireType toWireType(std::optional value, rvp::default_tag) { if (value) { return ValBinding::toWireType(val(*value, allow_raw_pointers()), rvp::default_tag{}); } return ValBinding::toWireType(val::undefined(), rvp::default_tag{}); } static std::optional fromWireType(WireType value) { val optional = val::take_ownership(value); if (optional.isUndefined()) { return {}; } return optional.as(); } }; } template std::vector vecFromJSArray(const val& v, Policies... policies) { const uint32_t l = v["length"].as(); std::vector rv; rv.reserve(l); for (uint32_t i = 0; i < l; ++i) { rv.push_back(v[i].as(std::forward(policies)...)); } return rv; } template std::vector convertJSArrayToNumberVector(const val& v) { const size_t l = v["length"].as(); std::vector rv; rv.resize(l); // Copy the array into our vector through the use of typed arrays. // It will try to convert each element through Number(). // See https://www.ecma-international.org/ecma-262/6.0/#sec-%typedarray%.prototype.set-array-offset // and https://www.ecma-international.org/ecma-262/6.0/#sec-tonumber val memoryView{ typed_memory_view(l, rv.data()) }; internal::_emval_array_to_memory_view(memoryView.as_handle(), v.as_handle()); return rv; } } // end namespace emscripten PK!0GG5emscripten/cache/sysroot/include/emscripten/version.h/* Automatically generated by tools/system_libs.py */ #define __EMSCRIPTEN_MAJOR__ 6 #define __EMSCRIPTEN_MINOR__ 0 #define __EMSCRIPTEN_TINY__ 9 // Legacy mixed-case macros: #define __EMSCRIPTEN_major__ __EMSCRIPTEN_MAJOR__ #define __EMSCRIPTEN_minor__ __EMSCRIPTEN_MINOR__ #define __EMSCRIPTEN_tiny__ __EMSCRIPTEN_TINY__ #pragma clang deprecated(__EMSCRIPTEN_major__, "Use __EMSCRIPTEN_MAJOR__ instead") #pragma clang deprecated(__EMSCRIPTEN_minor__, "Use __EMSCRIPTEN_MINOR__ instead") #pragma clang deprecated(__EMSCRIPTEN_tiny__, "Use __EMSCRIPTEN_TINY__ instead") PK!E}}9emscripten/cache/sysroot/include/emscripten/wasm_worker.h/* * Copyright 2022 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #include #include #ifdef __cplusplus extern "C" { #endif #define emscripten_wasm_worker_t int #define EMSCRIPTEN_WASM_WORKER_ID_PARENT 0 // Creates a new Worker() that is attached to executing this // WebAssembly.Instance and WebAssembly.Memory. // // emscripten_malloc_wasm_worker: // Creates a new Worker, dynamically allocating stack and TLS for it. // Unfortunately due to the asynchronous no-notifications nature of how Worker // API specification teardown behaves, the dynamically allocated memory can // never be freed, so use this function only in scenarios where the page does // not need to deinitialize/tear itself down. // // emscripten_create_wasm_worker: // Creates a Wasm Worker given a preallocated region for stack and TLS data. // Use this function to manually manage the memory that a Worker should use. // This function does not use any dynamic memory allocation. // Unlike with the above function, this variant requires that size of the // region provided is large enough to hold both stack and TLS area. // The size of the TLS area can be determined at runtime by calling // __builtin_wasm_tls_size(). // // Returns an ID that represents the given Worker. If not building with Wasm // workers enabled (-sWASM_WORKERS=0), these functions will return 0 to denote // failure. // Note that the Worker will be loaded up asynchronously, and initially will not // be executing any code. Use emscripten_wasm_worker_post_function_*() set of // functions to start executing code on the Worker. emscripten_wasm_worker_t emscripten_malloc_wasm_worker(size_t stackSize); emscripten_wasm_worker_t emscripten_create_wasm_worker(void * _Nonnull stackPlusTLSAddress, size_t stackPlusTLSSize); // Terminates the given Wasm Worker some time after it has finished executing // its current, or possibly some subsequent posted functions. Note that this // function is not C++ RAII safe, but you must manually coordinate to release // any resources from the given Worker that it may have allocated from the heap // or may have stored on its TLS slots. There are no TLS destructors that would // execute. // Exists, but is a no-op if not building with Wasm Workers enabled // (-sWASM_WORKERS=0) void emscripten_terminate_wasm_worker(emscripten_wasm_worker_t id); // Note the comment on emscripten_terminate_wasm_worker(id) about thread // destruction. // Exists, but is a no-op if not building with Wasm Workers enabled // (-sWASM_WORKERS=0) void emscripten_terminate_all_wasm_workers(void); // Returns true if the current thread is executing a Wasm Worker, false // otherwise. bool emscripten_current_thread_is_wasm_worker(void); // Returns a unique ID that identifies the calling Wasm Worker. Similar to // pthread_self(). The main browser thread will return 0 as the ID. First Wasm // Worker will return 1, and so on. // Note: This function also returns 0 when called from other non-Wasm Worker // contexts, such as pthreads in a program built with both pthread and Wasm // Worker support. uint32_t emscripten_wasm_worker_self_id(void); // emscripten_wasm_worker_post_function_*: Post a pointer to a C/C++ function to // be executed on the target Wasm Worker (via sending a postMessage() to the // target thread). Notes: If running inside a Wasm Worker, specify worker ID 0 // to pass a message to the parent thread. When specifying non-zero ID, the // target worker must have been created by the calling thread. That is, a Wasm // Worker can only send a message to its parent or its children, but not to its // siblings. The target function pointer will be executed on the target Worker // only after it yields back to its event loop. If the target Wasm Worker // executes an infinite loop that never yields, then the function pointer will // never be called. // Passing messages between threads with this family of functions is relatively // slow and has a really high latency cost compared to direct coordination using // atomics and synchronization primitives like mutexes. Additionally these // functions will generate garbage on the JS heap. Therefore avoid using these // functions where performance is critical. void emscripten_wasm_worker_post_function_v(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(void)); void emscripten_wasm_worker_post_function_vi(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(int), int arg0); void emscripten_wasm_worker_post_function_vii(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(int, int), int arg0, int arg1); void emscripten_wasm_worker_post_function_viii(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(int, int, int), int arg0, int arg1, int arg2); void emscripten_wasm_worker_post_function_vd(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(double), double arg0); void emscripten_wasm_worker_post_function_vdd(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(double, double), double arg0, double arg1); void emscripten_wasm_worker_post_function_vddd(emscripten_wasm_worker_t id, void (* _Nonnull funcPtr)(double, double, double), double arg0, double arg1, double arg2); void emscripten_wasm_worker_post_function_sig(emscripten_wasm_worker_t id, void * _Nonnull funcPtr, const char * _Nonnull sig, ...); // Sleeps the calling wasm worker for the given nanoseconds. Calling this // function on the main thread either results in a TypeError exception // (Firefox), or a silent return without waiting (Chrome), see // https://github.com/WebAssembly/threads/issues/174 void emscripten_wasm_worker_sleep(int64_t nanoseconds); // Returns the value of navigator.hardwareConcurrency, i.e. the number of // logical threads available for the user agent. NOTE: If the execution // environment does not support navigator.hardwareConcurrency, this function // will return zero to signal no support. (If the value 1 is returned, then it // means that navigator.hardwareConcurrency is supported, but there is only one // logical thread of concurrency available) int emscripten_navigator_hardware_concurrency(void); // Legacy names for emscripten_atomic_wait/notify functions, defined in // emscripten/atomic.h #define emscripten_wasm_wait_i32 emscripten_atomic_wait_u32 #define emscripten_wasm_wait_i64 emscripten_atomic_wait_u64 #define emscripten_wasm_notify emscripten_atomic_notify #pragma clang deprecated(emscripten_wasm_wait_i32, "use emscripten_atomic_wait_u32 instead") #pragma clang deprecated(emscripten_wasm_wait_i64, "use emscripten_atomic_wait_u64 instead") #pragma clang deprecated(emscripten_wasm_notify, "use emscripten_atomic_notify instead") #ifdef __cplusplus } #endif PK!4emscripten/cache/sysroot/include/emscripten/wasmfs.h/* * Copyright 2021 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #ifdef __cplusplus extern "C" { #endif typedef struct Backend* backend_t; // Obtains the backend_t of a specified path. backend_t wasmfs_get_backend_by_path(const char* _Nonnull path); // Obtains the backend_t of a specified fd. backend_t wasmfs_get_backend_by_fd(int fd); // Creates and opens a new file using a specific backend. // Returns the file descriptor for the new file like `open`. Returns a negative // value on error. TODO: It might be worth returning a more specialized type // like __wasi_fd_t here. // TODO: Remove this function so that only directories can be mounted. int wasmfs_create_file(const char* _Nonnull pathname, mode_t mode, backend_t backend); // Creates a new directory using a specific backend. // Returns 0 on success like `mkdir`, or a negative value on error. // TODO: Add an alias with wasmfs_mount. int wasmfs_create_directory(const char* _Nonnull path, mode_t mode, backend_t backend); // Unmounts the directory (Which must be a valid mountpoint) at a specific path. // Returns 0 on success, or a negative value on error. int wasmfs_unmount(const char* _Nonnull path); // Backend creation // Creates a new JSFile Backend backend_t wasmfs_create_js_file_backend(void); // A function that receives a void* and returns a backend. typedef backend_t (*backend_constructor_t)(void*); backend_t wasmfs_create_memory_backend(void); // Fetch backend // // Creates a new fetchfs backend. FetchFS will backstop filesystem // reads to HTTP fetch requests, which will download just specific // ranges of the requested files. FetchFS works best when your web // server supports HTTP range requests, and it's important that those // files are not stored encrypted or compressed at rest. FetchFS by // default will dispatch HTTP requests to URLs beginning with base_url // and ending with whatever the file's path is relative to where the // fetchfs directory is mounted. // // Individual range requests will be no bigger than chunk_size, and will // be aligned to boundaries of chunk_size. Files smaller than chunk_size // will be downloaded all at once. // // If chunk_size is 0, a reasonable default value will be used. // // Note: this cannot be called on the browser main thread because it might // deadlock while waiting for its dedicated worker thread to be spawned. // // Note: This function blocks on the main browser thread returning to its event // loop. Calling this function while holding a lock the main thread is waiting // to acquire will cause a deadlock. // // TODO: Add an async version of this function that will work on the main // thread. // backend_t wasmfs_create_fetch_backend(const char* _Nonnull base_url, uint32_t chunk_size); backend_t wasmfs_create_node_backend(const char* _Nonnull root); // Note: this cannot be called on the browser main thread because it might // deadlock while waiting for the OPFS dedicated worker thread to be spawned. // // Note: This function blocks on the main browser thread returning to its event // loop. Calling this function while holding a lock the main thread is waiting // to acquire will cause a deadlock. // // TODO: Add an async version of this function that will work on the main // thread. backend_t wasmfs_create_opfs_backend(void); // Creates a generic JSIMPL backend backend_t wasmfs_create_jsimpl_backend(void); backend_t wasmfs_create_icase_backend(backend_t backend); // Similar to fflush(0), but also flushes all internal buffers inside WasmFS. // This is necessary because in a Web environment we must buffer at an // additional level after libc, since console.log() prints entire lines, that // is, we can't print individual characters as libc feeds them to us, so we // buffer them and call console.log() only after a newline. This function will // actually flush all buffers and add newlines as necessary to get everything // printed out. void wasmfs_flush(void); // Hooks // A hook users can do to create the root directory. Overriding this allows the // user to set a particular backend as the root. If this is not set then the // default backend is used. backend_t wasmfs_create_root_dir(void); // A hook users can do to run code during WasmFS startup. This hook happens // before file preloading, so user code could create backends and mount them, // which would then affect in which backend the preloaded files are loaded (the // preloaded files have paths, and so they are added to that path and whichever // backend is present there). void wasmfs_before_preload(void); #ifdef __cplusplus } #endif PK!u...6emscripten/cache/sysroot/include/emscripten/webaudio.h/* * Copyright 2022 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #ifdef __cplusplus extern "C" { #endif // A handle type that represents a JavaScript side object related to WebAudio. // Used to denote the AudioContext and Audio Nodes, especially the Audio Worklet // Node. typedef int EMSCRIPTEN_WEBAUDIO_T; // An outdated node type that represented an AudioWorklet node. // If you are using this type in your application, replace it with // EMSCRIPTEN_WEBAUDIO_T handle type instead. typedef int EMSCRIPTEN_AUDIO_WORKLET_NODE_T __attribute__((deprecated("use EMSCRIPTEN_WEBAUDIO_T instead"))); // Default render size of 128 frames #define AUDIO_CONTEXT_RENDER_SIZE_DEFAULT 0 // Let the hardware determine the best render size #define AUDIO_CONTEXT_RENDER_SIZE_HARDWARE -1 typedef struct EmscriptenWebAudioCreateAttributes { const char *latencyHint; // Specify one of "balanced", "interactive" or "playback" uint32_t sampleRate; // E.g. 44100 or 48000 int32_t renderSizeHint; // AUDIO_CONTEXT_RENDER_SIZE_* or number of samples } EmscriptenWebAudioCreateAttributes; // Creates a new Web Audio AudioContext, and returns a handle to it. EMSCRIPTEN_WEBAUDIO_T emscripten_create_audio_context(const EmscriptenWebAudioCreateAttributes *options); typedef int AUDIO_CONTEXT_STATE; #define AUDIO_CONTEXT_STATE_SUSPENDED 0 #define AUDIO_CONTEXT_STATE_RUNNING 1 #define AUDIO_CONTEXT_STATE_CLOSED 2 #define AUDIO_CONTEXT_STATE_INTERRUPTED 3 typedef void (*EmscriptenResumeAudioContextCallback)(EMSCRIPTEN_WEBAUDIO_T audioContext, AUDIO_CONTEXT_STATE state, void *userData1); // Resumes the given AudioContext. The specified callback will fire when the AudioContext has completed resuming. Call this function // inside a user event handler (mousedown, button click, etc.) // userData1: A custom userdata pointer to pass to the callback function. This value will be passed on to the call to the given EmscriptenResumeAudioContextCallback callback function. void emscripten_resume_audio_context_async(EMSCRIPTEN_WEBAUDIO_T audioContext, EmscriptenResumeAudioContextCallback callback, void *userData1); // Synchronously attempts to resume the given AudioContext. void emscripten_resume_audio_context_sync(EMSCRIPTEN_WEBAUDIO_T audioContext); // Returns the current AudioContext state. AUDIO_CONTEXT_STATE emscripten_audio_context_state(EMSCRIPTEN_WEBAUDIO_T audioContext); typedef void (*EmscriptenStartWebAudioWorkletCallback)(EMSCRIPTEN_WEBAUDIO_T audioContext, bool success, void *userData2); // Calls .suspend() on the given AudioContext and releases the JS object table // reference to the given audio context. The specified handle is invalid // after calling this function. void emscripten_destroy_audio_context(EMSCRIPTEN_WEBAUDIO_T audioContext); // Disconnects the given audio node from its audio graph, and then releases // the JS object table reference to the given audio node. The specified handle // is invalid after calling this function. void emscripten_destroy_web_audio_node(EMSCRIPTEN_WEBAUDIO_T objectHandle); // Create Wasm AudioWorklet thread. Call this function once at application startup to establish an AudioWorkletGlobalScope for your app. // After the scope has been initialized, the given callback will fire. // audioContext: The Web Audio context object to initialize the Wasm AudioWorklet thread on. Each AudioContext can have only one AudioWorklet // thread running, so do not call this function multiple times on the same AudioContext. // stackLowestAddress: The base address for the thread's stack. Must be aligned to 16 bytes. Use e.g. memalign(16, 1024) to allocate a 1KB stack for the thread. // stackSize: The size of the thread's stack. Must be a multiple of 16 bytes. // callback: The callback function that will be run when thread creation either succeeds or fails. // userData2: A custom userdata pointer to pass to the callback function. This value will be passed on to the call to the given EmscriptenStartWebAudioWorkletCallback callback function. void emscripten_start_wasm_audio_worklet_thread_async(EMSCRIPTEN_WEBAUDIO_T audioContext, void *stackLowestAddress, uint32_t stackSize, EmscriptenStartWebAudioWorkletCallback callback, void *userData2); typedef int WEBAUDIO_PARAM_AUTOMATION_RATE; #define WEBAUDIO_PARAM_A_RATE 0 #define WEBAUDIO_PARAM_K_RATE 1 typedef struct WebAudioParamDescriptor { float defaultValue; // Default == 0.0 float minValue; // Default = -3.4028235e38 float maxValue; // Default = 3.4028235e38 WEBAUDIO_PARAM_AUTOMATION_RATE automationRate; // Either WEBAUDIO_PARAM_A_RATE or WEBAUDIO_PARAM_K_RATE. Default = WEBAUDIO_PARAM_A_RATE } WebAudioParamDescriptor; typedef struct WebAudioWorkletProcessorCreateOptions { const char *name; // The name of the AudioWorkletProcessor that is being created. int numAudioParams; const WebAudioParamDescriptor *audioParamDescriptors; } WebAudioWorkletProcessorCreateOptions; typedef void (*EmscriptenWorkletProcessorCreatedCallback)(EMSCRIPTEN_WEBAUDIO_T audioContext, bool success, void *userData3); // Creates a new AudioWorkletProcessor with the given name and specified set of control parameters. // userData3: A custom userdata pointer to pass to the callback function. This value will be passed on to the call to the given EmscriptenWorkletProcessorCreatedCallback callback function. void emscripten_create_wasm_audio_worklet_processor_async(EMSCRIPTEN_WEBAUDIO_T audioContext, const WebAudioWorkletProcessorCreateOptions *options, EmscriptenWorkletProcessorCreatedCallback callback, void *userData3); // Returns the number of samples processed per channel in an AudioSampleFrame, fixed at 128 in the Web Audio API 1.0 specification, and valid for the lifetime of the audio context. // For this to differ from the default 128, the context would need to be created with a WebAudioWorkletProcessorCreateOptions renderSizeHint, part of the 1.1 Web Audio API. int emscripten_audio_context_quantum_size(EMSCRIPTEN_WEBAUDIO_T audioContext); // Returns the sampling rate of the given Audio Context, e.g. 48000 or 44100 or similar. int emscripten_audio_context_sample_rate(EMSCRIPTEN_WEBAUDIO_T audioContext); typedef struct AudioSampleFrame { // Number of audio channels to process (multiplied by samplesPerChannel gives the elements in data) const int numberOfChannels; // Number of samples per channel in data const int samplesPerChannel; // An array of length numberOfChannels*samplesPerChannel elements. Samples are always arranged in a planar fashion, // where data[channelIndex*samplesPerChannel+i] locates the data of the i'th sample of channel channelIndex. float *data; } AudioSampleFrame; typedef struct AudioParamFrame { // Specifies the length of the input array data (in float elements). This will be guaranteed to either have // a value of 1, for a parameter valid for the entire frame, or emscripten_audio_context_quantum_size() for a parameter that changes per sample during the frame. int length; // An array of length specified in 'length'. float *data; } AudioParamFrame; typedef bool (*EmscriptenWorkletNodeProcessCallback)(int numInputs, const AudioSampleFrame *inputs, int numOutputs, AudioSampleFrame *outputs, int numParams, const AudioParamFrame *params, void *userData4); typedef enum { WEBAUDIO_CHANNEL_COUNT_MODE_MAX = 0, WEBAUDIO_CHANNEL_COUNT_MODE_CLAMPED_MAX = 1, WEBAUDIO_CHANNEL_COUNT_MODE_EXPLICIT = 2 } WEBAUDIO_CHANNEL_COUNT_MODE; typedef enum { WEBAUDIO_CHANNEL_INTERPRETATION_SPEAKERS = 0, WEBAUDIO_CHANNEL_INTERPRETATION_DISCRETE = 1 } WEBAUDIO_CHANNEL_INTERPRETATION; typedef struct EmscriptenAudioWorkletNodeCreateOptions { // How many audio nodes does this node take inputs from? Default=1 int numberOfInputs; // How many audio nodes does this node output to? Default=1 int numberOfOutputs; // For each output, specifies the number of audio channels (1=mono/2=stereo/etc.) for that output. Default=an array of ones for each output channel. int *outputChannelCounts; // Number of channels used when up-mixing and down-mixing connections to any inputs to the node. Default=2 unsigned long channelCount; // How channels will be counted when up-mixing and down-mixing connections to any inputs to the node? Default=max WEBAUDIO_CHANNEL_COUNT_MODE channelCountMode; // How individual channels will be treated when up-mixing and down-mixing connections to any inputs to the node? Default=speakers WEBAUDIO_CHANNEL_INTERPRETATION channelInterpretation; } EmscriptenAudioWorkletNodeCreateOptions; // Instantiates the given AudioWorkletProcessor as an AudioWorkletNode, which continuously calls the specified processCallback() function on the browser's audio thread to perform audio processing. // userData4: A custom userdata pointer to pass to the callback function. This value will be passed on to the call to the given EmscriptenWorkletNodeProcessCallback callback function. // Returns a handle to the created audio worklet node object. EMSCRIPTEN_WEBAUDIO_T emscripten_create_wasm_audio_worklet_node(EMSCRIPTEN_WEBAUDIO_T audioContext, const char *name, const EmscriptenAudioWorkletNodeCreateOptions *options, EmscriptenWorkletNodeProcessCallback processCallback, void *userData4); // Connects a node's output to a target, e.g., connect the worklet node to the context. // For outputIndex and inputIndex, see the AudioNode.connect() documentation (setting 0 as the default values) void emscripten_audio_node_connect(EMSCRIPTEN_WEBAUDIO_T source, EMSCRIPTEN_WEBAUDIO_T destination, int outputIndex, int inputIndex); // Returns true if the current thread is executing a Wasm AudioWorklet, false otherwise. // Note that calling this function can be relatively slow as it incurs a Wasm->JS transition, // so avoid calling it in hot paths. bool emscripten_current_thread_is_audio_worklet(void); #define EMSCRIPTEN_AUDIO_MAIN_THREAD 0 /* emscripten_audio_worklet_function_*: Post a pointer to a C/C++ function to be executed on the Audio Worklet thread of the given Web Audio context. Notes: - If running inside an Audio Worklet thread, specify ID EMSCRIPTEN_AUDIO_MAIN_THREAD (== 0) to pass a message from the audio worklet to the main thread. - When specifying non-zero ID, the Audio Context denoted by the ID must have been created by the calling thread. - Passing messages between audio thread and main thread with this family of functions is relatively slow and has a really high latency cost compared to direct coordination using atomics and synchronization primitives like mutexes. Additionally these functions will generate garbage on the JS heap. Therefore avoid using these functions where performance is critical. */ void emscripten_audio_worklet_post_function_v(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(void)); void emscripten_audio_worklet_post_function_vi(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(int), int arg0); void emscripten_audio_worklet_post_function_vii(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(int, int), int arg0, int arg1); void emscripten_audio_worklet_post_function_viii(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(int, int, int), int arg0, int arg1, int arg2); void emscripten_audio_worklet_post_function_vd(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(double), double arg0); void emscripten_audio_worklet_post_function_vdd(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(double, double), double arg0, double arg1); void emscripten_audio_worklet_post_function_vddd(EMSCRIPTEN_WEBAUDIO_T id, void (*funcPtr)(double, double, double), double arg0, double arg1, double arg2); void emscripten_audio_worklet_post_function_sig(EMSCRIPTEN_WEBAUDIO_T id, void *funcPtr, const char *sig, ...); #ifdef __cplusplus } // ~extern "C" #endif PK!N4%%7emscripten/cache/sysroot/include/emscripten/websocket.h/* * Copyright 2018 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include #include #include #include #ifdef __cplusplus extern "C" { #endif #define EMSCRIPTEN_WEBSOCKET_T int // Returns the WebSocket.readyState field into readyState. readyState must not be a null pointer. EMSCRIPTEN_RESULT emscripten_websocket_get_ready_state(EMSCRIPTEN_WEBSOCKET_T socket, unsigned short * _Nonnull readyState); // Returns the WebSocket.bufferedAmount field into bufferedAmount. bufferedAmount must not be a null pointer. EMSCRIPTEN_RESULT emscripten_websocket_get_buffered_amount(EMSCRIPTEN_WEBSOCKET_T socket, size_t * _Nonnull bufferedAmount); // Writes the WebSocket.url field as a UTF-8 string to the memory area pointed by url. The memory area must contain at least urlLength bytes of free space. If this memory area cannot // fit the url string, it will be truncated. Call emscripten_websocket_get_url_length() to determine how large memory area will be required to store the url. // url must not be a null pointer. EMSCRIPTEN_RESULT emscripten_websocket_get_url(EMSCRIPTEN_WEBSOCKET_T socket, char * _Nonnull url, int urlLength); // Returns the byte length needed to store WebSocket.url string in Wasm heap. This length can be passed to emscripten_websocket_get_url as it includes the null byte in the count. // urlLength must not be a null pointer. EMSCRIPTEN_RESULT emscripten_websocket_get_url_length(EMSCRIPTEN_WEBSOCKET_T socket, int * _Nonnull urlLength); // Similar to emscripten_websocket_get_url(), but returns WebSocket.extensions field instead. EMSCRIPTEN_RESULT emscripten_websocket_get_extensions(EMSCRIPTEN_WEBSOCKET_T socket, char * _Nonnull extensions, int extensionsLength); EMSCRIPTEN_RESULT emscripten_websocket_get_extensions_length(EMSCRIPTEN_WEBSOCKET_T socket, int * _Nonnull extensionsLength); // Similar to emscripten_websocket_get_url(), but returns WebSocket.protocol field instead. EMSCRIPTEN_RESULT emscripten_websocket_get_protocol(EMSCRIPTEN_WEBSOCKET_T socket, char * _Nonnull protocol, int protocolLength); EMSCRIPTEN_RESULT emscripten_websocket_get_protocol_length(EMSCRIPTEN_WEBSOCKET_T socket, int * _Nonnull protocolLength); typedef struct EmscriptenWebSocketOpenEvent { EMSCRIPTEN_WEBSOCKET_T socket; } EmscriptenWebSocketOpenEvent; typedef bool (*em_websocket_open_callback_func)(int eventType, const EmscriptenWebSocketOpenEvent * _Nonnull websocketEvent, void *userData); EMSCRIPTEN_RESULT emscripten_websocket_set_onopen_callback_on_thread(EMSCRIPTEN_WEBSOCKET_T socket, void *userData, em_websocket_open_callback_func callback, pthread_t targetThread); typedef struct EmscriptenWebSocketMessageEvent { EMSCRIPTEN_WEBSOCKET_T socket; uint8_t *data; uint32_t numBytes; bool isText; } EmscriptenWebSocketMessageEvent; typedef bool (*em_websocket_message_callback_func)(int eventType, const EmscriptenWebSocketMessageEvent * _Nonnull websocketEvent, void *userData); EMSCRIPTEN_RESULT emscripten_websocket_set_onmessage_callback_on_thread(EMSCRIPTEN_WEBSOCKET_T socket, void *userData, em_websocket_message_callback_func callback, pthread_t targetThread); typedef struct EmscriptenWebSocketErrorEvent { EMSCRIPTEN_WEBSOCKET_T socket; } EmscriptenWebSocketErrorEvent; typedef bool (*em_websocket_error_callback_func)(int eventType, const EmscriptenWebSocketErrorEvent * _Nonnull websocketEvent, void *userData); EMSCRIPTEN_RESULT emscripten_websocket_set_onerror_callback_on_thread(EMSCRIPTEN_WEBSOCKET_T socket, void *userData, em_websocket_error_callback_func callback, pthread_t targetThread); typedef struct EmscriptenWebSocketCloseEvent { EMSCRIPTEN_WEBSOCKET_T socket; bool wasClean; unsigned short code; char reason[512]; // WebSockets spec enforces this can be max 123 characters, so as UTF-8 at most 123*4 bytes < 512. } EmscriptenWebSocketCloseEvent; typedef bool (*em_websocket_close_callback_func)(int eventType, const EmscriptenWebSocketCloseEvent * _Nonnull websocketEvent, void *userData); EMSCRIPTEN_RESULT emscripten_websocket_set_onclose_callback_on_thread(EMSCRIPTEN_WEBSOCKET_T socket, void *userData, em_websocket_close_callback_func callback, pthread_t targetThread); #define emscripten_websocket_set_onopen_callback(socket, userData, callback) emscripten_websocket_set_onopen_callback_on_thread( (socket), (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_websocket_set_onerror_callback(socket, userData, callback) emscripten_websocket_set_onerror_callback_on_thread( (socket), (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_websocket_set_onclose_callback(socket, userData, callback) emscripten_websocket_set_onclose_callback_on_thread( (socket), (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) #define emscripten_websocket_set_onmessage_callback(socket, userData, callback) emscripten_websocket_set_onmessage_callback_on_thread((socket), (userData), (callback), EM_CALLBACK_THREAD_CONTEXT_CALLING_THREAD) typedef struct EmscriptenWebSocketCreateAttributes { // The target URL to connect to. This string can point to a stack local variable, the string is read immediately at a call to emscripten_websocket_new(). const char *url; // A comma-separated list of protocol strings. Set to e.g. "binary,base64" to create a WebSocket connection with two supported protocols "binary" and "base64". // Be careful to avoid leading and trailing spaces, e.g. "binary, base64" may not be interpreted properly. // This string can point to a stack local variable, the string is read immediately at a call to emscripten_websocket_new(). const char *protocols; // If true, the created socket will reside on the main browser thread. If false, the created socket is bound to the calling thread. // If you want to share the created EMSCRIPTEN_WEBSOCKET_T structure across multiple threads, or are running your own main loop in the // pthread that you create the socket, set createOnMainThread to true. If the created WebSocket only needs to be accessible on the thread // that created it, and the creating thread is an event based thread (meaning it regularly yields back to the browser event loop), then // it is more efficient to set this to false. bool createOnMainThread; } EmscriptenWebSocketCreateAttributes; //extern void emscripten_websocket_init_create_attributes(EmscriptenWebSocketCreateAttributes *attributes); #define emscripten_websocket_init_create_attributes(attributes) do { memset((attributes), 0, sizeof(EmscriptenWebSocketCreateAttributes)); } while(0) // Returns true if WebSockets are supported by the current browser bool emscripten_websocket_is_supported(void); // Creates a new WebSocket and connects it to the given remote host. // If the return value of this function is > 0, the function has succeeded and the return value represents a handle to the WebSocket object. // If the return value of this function is < 0, then the function has failed, and the return value can be interpreted as a EMSCRIPTEN_RESULT code // representing the cause of the failure. If the function returns 0, then the call has failed with an unknown reason (build with -sWEBSOCKET_DEBUG for more information) EMSCRIPTEN_WEBSOCKET_T emscripten_websocket_new(EmscriptenWebSocketCreateAttributes * _Nonnull createAttributes); // Sends the given string of null-delimited UTF8 encoded text data to the connected server. EMSCRIPTEN_RESULT emscripten_websocket_send_utf8_text(EMSCRIPTEN_WEBSOCKET_T socket, const char * _Nonnull textData); // Sends the given block of raw memory data out to the connected server. EMSCRIPTEN_RESULT emscripten_websocket_send_binary(EMSCRIPTEN_WEBSOCKET_T socket, void * _Nonnull binaryData, uint32_t dataLength); // Closes the specified WebSocket. N.B.: the meaning of "closing" a WebSocket means "eager read/lazy write"-closing the socket. That is, all still // pending untransferred outbound bytes will continue to transfer out, but after calling close on the socket, any pending bytes still in the process // of being received will never be available. See https://html.spec.whatwg.org/multipage/web-sockets.html#dom-websocket-sclose // After calling close(), it is no longer possible to send() on the WebSocket to send more bytes. EMSCRIPTEN_RESULT emscripten_websocket_close(EMSCRIPTEN_WEBSOCKET_T socket, unsigned short code, const char *reason); // Releases the given WebSocket object and all associated allocated memory for garbage collection. This effectively frees the socket handle, after calling // this function the given handle no longer exists. EMSCRIPTEN_RESULT emscripten_websocket_delete(EMSCRIPTEN_WEBSOCKET_T socket); // This function close()s and releases all created WebSocket connections for the current thread. You can call this at application exit time to enforce // teardown of all active sockets, although it is optional. When a pthread terminates, it will call this function to delete all active connections bound to // that specific pthread (sockets created with createOnMainThread=false). Any WebSockets created by a pthread with createOnMainThread=true will remain alive // even after the pthread quits, although be warned that if the target thread that was registered to handle events for a given WebSocket quits, then those // events will stop from being delivered altogether. void emscripten_websocket_deinitialize(void); #ifdef __cplusplus } // ~extern "C" #endif PK!"O2emscripten/cache/sysroot/include/emscripten/wget.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #include "em_types.h" #ifdef __cplusplus extern "C" { #endif // wget void emscripten_async_wget(const char* url, const char* file, em_str_callback_func onload, em_str_callback_func onerror); typedef void (*em_async_wget_onload_func)(void* userdata, void* data, int size); void emscripten_async_wget_data(const char* url, void *userdata, em_async_wget_onload_func onload, em_arg_callback_func onerror); typedef void (*em_async_wget2_onload_func)(unsigned handle, void* userdata, const char* data); typedef void (*em_async_wget2_onstatus_func)(unsigned handle, void* userdata, int status); int emscripten_async_wget2(const char* url, const char* file, const char* requesttype, const char* param, void *userdata, em_async_wget2_onload_func onload, em_async_wget2_onstatus_func onerror, em_async_wget2_onstatus_func onprogress); typedef void (*em_async_wget2_data_onload_func)(unsigned handle, void* userdata, void* data, unsigned size); typedef void (*em_async_wget2_data_onerror_func)(unsigned handle, void* userdata, int status, const char* status_text); typedef void (*em_async_wget2_data_onprogress_func)(unsigned handle, void* userdata, int loaded, int total); int emscripten_async_wget2_data(const char* url, const char* requesttype, const char* param, void *arg, int free, em_async_wget2_data_onload_func onload, em_async_wget2_data_onerror_func onerror, em_async_wget2_data_onprogress_func onprogress); void emscripten_async_wget2_abort(int handle); // wget "sync" int emscripten_wget(const char* url, const char* file); void emscripten_wget_data(const char* url, void** pbuffer, int* pnum, int *perror); #ifdef __cplusplus } #endif PK!KK2emscripten/cache/sysroot/include/emscripten/wire.h/* * Copyright 2012 The Emscripten Authors. All rights reserved. * Emscripten is available under two separate licenses, the MIT license and the * University of Illinois/NCSA Open Source License. Both these licenses can be * found in the LICENSE file. */ #pragma once #if __cplusplus < 201703L #error "embind requires -std=c++17 or newer" #endif // A value moving between JavaScript and C++ has three representations: // - The original JS value: a String // - The native on-the-wire value: a stack-allocated char*, say // - The C++ value: std::string // // We'll call the on-the-wire type WireType. #include #include #include #include #define EMSCRIPTEN_ALWAYS_INLINE __attribute__((always_inline)) #define EMBIND_VISIBILITY_DEFAULT __attribute__((visibility("default"))) #ifndef EMSCRIPTEN_HAS_UNBOUND_TYPE_NAMES #define EMSCRIPTEN_HAS_UNBOUND_TYPE_NAMES 1 #endif namespace emscripten { #if EMSCRIPTEN_HAS_UNBOUND_TYPE_NAMES constexpr bool has_unbound_type_names = true; #else constexpr bool has_unbound_type_names = false; #endif namespace internal { typedef const void* TYPEID; // We don't need the full std::type_info implementation. We // just need a unique identifier per type and polymorphic type // identification. template static inline constexpr bool IsCanonicalized = std::is_same::type>::value; template struct CanonicalizedID { static_assert(IsCanonicalized, "T should not be a reference or cv-qualified"); static char c; static constexpr TYPEID get() { return &c; } }; template char CanonicalizedID::c; template struct Canonicalized { typedef typename std::remove_cv::type>::type type; }; template struct LightTypeID { static constexpr TYPEID get() { static_assert(IsCanonicalized, "T should not be a reference or cv-qualified"); if (has_unbound_type_names) { #if __has_feature(cxx_rtti) return &typeid(T); #else static_assert(!has_unbound_type_names, "Unbound type names are illegal with RTTI disabled. " "Either add -DEMSCRIPTEN_HAS_UNBOUND_TYPE_NAMES=0 to or remove -fno-rtti " "from the compiler arguments"); #endif } typedef typename Canonicalized::type C; return CanonicalizedID::get(); } }; template constexpr TYPEID getLightTypeID(const T& value) { static_assert(IsCanonicalized, "T should not be a reference or cv-qualified"); if (has_unbound_type_names) { #if __has_feature(cxx_rtti) return &typeid(value); #else static_assert(!has_unbound_type_names, "Unbound type names are illegal with RTTI disabled. " "Either add -DEMSCRIPTEN_HAS_UNBOUND_TYPE_NAMES=0 to or remove -fno-rtti " "from the compiler arguments"); #endif } return LightTypeID::get(); } // The second typename is an unused stub so it's possible to // specialize groups of classes via SFINAE. template struct TypeID { static constexpr TYPEID get() { return LightTypeID::get(); } }; template struct TypeID> { static_assert(std::is_class::value, "The type for a std::unique_ptr binding must be a class."); static constexpr TYPEID get() { return TypeID::get(); } }; template struct TypeID { static_assert(!std::is_pointer::value, "Implicitly binding raw pointers is illegal. Specify allow_raw_pointer>"); }; namespace rvp { struct default_tag {}; struct take_ownership : public default_tag {}; struct reference : public default_tag {}; } // end namespace rvp template struct AllowedRawPointer { }; template struct TypeID> { static constexpr TYPEID get() { return LightTypeID::get(); } }; template struct TypeID : TypeID { }; template struct TypeID : TypeID { }; template struct TypeID : TypeID { }; // ExecutePolicies<> template struct ExecutePolicies; template<> struct ExecutePolicies<> { template struct With { typedef T type; }; }; template struct ExecutePolicies { template struct With { typedef typename Policy::template Transform< typename ExecutePolicies::template With::type, Index >::type type; }; }; // TypeList<> template struct TypeList {}; // Cons :: T, TypeList -> Cons template struct Cons; template struct Cons> { typedef TypeList type; }; // Apply :: T, TypeList -> T template class Output, typename TypeList> struct Apply; template class Output, typename... Types> struct Apply> { typedef Output type; }; // MapWithIndex_ template class Mapper, size_t CurrentIndex, typename... Args> struct MapWithIndex_; template class Mapper, size_t CurrentIndex, typename First, typename... Rest> struct MapWithIndex_ { typedef typename Cons< typename Mapper::type, typename MapWithIndex_::type >::type type; }; template class Mapper, size_t CurrentIndex> struct MapWithIndex_ { typedef TypeList<> type; }; template class Output, template class Mapper, typename... Args> struct MapWithIndex { typedef typename internal::Apply< Output, typename MapWithIndex_::type >::type type; }; template struct ArgArrayGetter; template struct ArgArrayGetter> { static const TYPEID* get() { static constexpr TYPEID types[] = { TypeID::get()... }; return types; } }; // WithPolicies<...>::ArgTypeList<...> template struct WithPolicies { template struct MapWithPolicies { typedef typename ExecutePolicies::template With::type type; }; template struct ArgTypeList { unsigned getCount() const { return sizeof...(Args); } const TYPEID* getTypes() const { return ArgArrayGetter< typename MapWithIndex::type >::get(); } }; }; template struct WithPolicies> : WithPolicies {}; // BindingType // The second typename is an unused stub so it's possible to // specialize groups of classes via SFINAE. template struct BindingType; #define EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(type) \ template<> \ struct BindingType { \ typedef type WireType; \ constexpr static WireType toWireType(const type& v, rvp::default_tag) { \ return v; \ } \ constexpr static type fromWireType(WireType v) { \ return v; \ } \ } EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(char); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(signed char); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(unsigned char); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(signed short); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(unsigned short); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(signed int); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(unsigned int); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(signed long); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(unsigned long); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(float); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(double); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(int64_t); EMSCRIPTEN_DEFINE_NATIVE_BINDING_TYPE(uint64_t); template<> struct BindingType { // Using empty struct instead of void is ABI-compatible, but makes it easier // to work with wire types in a generic template context, as void can't be // stored in local variables or passed around but empty struct can. // TODO: switch to std::monostate when we require C++17. struct WireType {}; static void fromWireType(WireType) { // No-op, as void has no value. } }; template<> struct BindingType { typedef bool WireType; static WireType toWireType(bool b, rvp::default_tag) { return b; } static bool fromWireType(WireType wt) { return wt; } }; template struct BindingType> { using String = std::basic_string; static_assert(std::is_trivially_copyable::value, "basic_string elements are memcpy'd"); typedef struct { size_t length; T data[1]; // trailing data }* WireType; static WireType toWireType(const String& v, rvp::default_tag) { WireType wt = (WireType)malloc(sizeof(size_t) + v.length() * sizeof(T)); wt->length = v.length(); memcpy(wt->data, v.data(), v.length() * sizeof(T)); return wt; } static String fromWireType(WireType v) { return String(v->data, v->length); } }; template struct BindingType : public BindingType { }; template struct BindingType : public BindingType { }; template struct BindingType { typedef typename BindingType::WireType WireType; static T fromWireType(WireType wt) { return BindingType::fromWireType(wt); } }; template struct BindingType { typedef T* WireType; static WireType toWireType(T* p, rvp::default_tag) { return p; } static WireType toWireType(T* p, rvp::take_ownership) { return p; } static WireType toWireType(T* p, rvp::reference) { return p; } static T* fromWireType(WireType wt) { return wt; } }; template struct GenericBindingType { typedef typename std::remove_reference::type ActualT; typedef ActualT* WireType; template static WireType toWireType(R&& v, rvp::default_tag) { return new ActualT(v); } template static WireType toWireType(R&& v, rvp::take_ownership) { return new ActualT(std::move(v)); } template static WireType toWireType(R&& v, rvp::reference) { return &v; } static ActualT& fromWireType(WireType p) { return *p; } }; template struct GenericBindingType> { typedef typename BindingType::WireType WireType; static WireType toWireType(std::unique_ptr p, rvp::default_tag) { return BindingType::toWireType(p.release(), rvp::default_tag{}); } static std::unique_ptr fromWireType(WireType wt) { return std::unique_ptr(BindingType::fromWireType(wt)); } }; template struct EnumBindingType { typedef Enum WireType; static WireType toWireType(Enum v, rvp::default_tag) { return v; } static Enum fromWireType(WireType v) { return v; } }; // catch-all generic binding template struct BindingType : std::conditional< std::is_enum::value, EnumBindingType, GenericBindingType >::type {}; template auto toWireType(T&& v) -> typename BindingType::WireType { return BindingType::toWireType(std::forward(v)); } template constexpr bool typeSupportsMemoryView() { return (std::is_floating_point::value && (sizeof(T) == 4 || sizeof(T) == 8)) || (std::is_integral::value && (sizeof(T) == 1 || sizeof(T) == 2 || sizeof(T) == 4 || sizeof(T) == 8)); } } // namespace internal template struct EMBIND_VISIBILITY_DEFAULT memory_view { memory_view() = delete; explicit memory_view(size_t size, const ElementType* data) : size(size) , data(data) {} const size_t size; // in elements, not bytes const void* const data; }; // Note that 'data' is marked const just so it can accept both // const and nonconst pointers. It is certainly possible for // JavaScript to modify the C heap through the typed array given, // as it merely aliases the C heap. template inline memory_view typed_memory_view(size_t size, const T* data) { static_assert(internal::typeSupportsMemoryView(), "type of typed_memory_view is invalid"); return memory_view(size, data); } namespace internal { template struct BindingType> { // This non-word-sized WireType only works because I // happen to know that clang will pass aggregates as // pointers to stack elements and we never support // converting JavaScript typed arrays back into // memory_view. (That is, fromWireType is not implemented // on the C++ side, nor is toWireType implemented in // JavaScript.) typedef memory_view WireType; static WireType toWireType(const memory_view& mv, rvp::default_tag) { return mv; } }; } //////////////////////////////////////////////////////////////////////////////// // POLICIES //////////////////////////////////////////////////////////////////////////////// template struct arg { static constexpr int index = Index + 1; }; struct ret_val { static constexpr int index = 0; }; namespace internal { template struct RawPointerTransformer { // Use decay to handle references to pointers e.g.(T*&)->(T*). using DecayedType = std::decay_t; static constexpr bool ShouldWrap = EnableWrapper && std::is_pointer_v; using type = std::conditional_t< ShouldWrap, internal::AllowedRawPointer>, InputType >; }; } // namespace internal template struct allow_raw_pointer { template struct Transform : internal::RawPointerTransformer< InputType, Index == Slot::index > {}; }; // allow all raw pointers struct allow_raw_pointers { template struct Transform : internal::RawPointerTransformer< InputType, true > {}; }; struct async { template struct Transform { typedef InputType type; }; }; struct pure_virtual { template struct Transform { typedef InputType type; }; }; template struct nonnull { static_assert(std::is_same::value, "Only nonnull return values are currently supported."); template struct Transform { typedef InputType type; }; }; namespace return_value_policy { struct take_ownership : public allow_raw_pointers {}; struct reference : public allow_raw_pointers {}; } // end namespace return_value_policy enum class enum_value_type { object = 0, number = 1, string = 2 }; namespace internal { template struct isPolicy; template struct isPolicy { static constexpr bool value = true; }; template struct isPolicy { static constexpr bool value = true; }; template struct isPolicy { static constexpr bool value = true; }; template struct isPolicy, Rest...> { static constexpr bool value = true; }; template struct isPolicy { static constexpr bool value = true; }; template struct isPolicy { static constexpr bool value = true; }; template struct isPolicy, Rest...> { static constexpr bool value = true; }; template struct isPolicy { static constexpr bool value = isPolicy::value; }; template<> struct isPolicy<> { static constexpr bool value = false; }; template struct isNotPolicy { static constexpr bool value = !isPolicy::value; }; template struct GetReturnValuePolicy { using tag = rvp::default_tag; }; template struct GetReturnValuePolicy { using tag = rvp::take_ownership; }; template struct GetReturnValuePolicy { using tag = rvp::reference; }; template struct GetReturnValuePolicy { using tag = typename GetReturnValuePolicy::tag; }; template using isAsync = std::disjunction...>; template using isNonnullReturn = std::disjunction, Policies>...>; // Build a tuple type that contains all the types where the predicate is true. // e.g. FilterTypes would return std::tuple. template